CN114499213A - Synchronous rectification control method, circuit, device and medium - Google Patents
Synchronous rectification control method, circuit, device and medium Download PDFInfo
- Publication number
- CN114499213A CN114499213A CN202210354920.8A CN202210354920A CN114499213A CN 114499213 A CN114499213 A CN 114499213A CN 202210354920 A CN202210354920 A CN 202210354920A CN 114499213 A CN114499213 A CN 114499213A
- Authority
- CN
- China
- Prior art keywords
- voltage
- value
- synchronous rectification
- reference voltage
- integral value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
- H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
- H02M3/33592—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/38—Means for preventing simultaneous conduction of switches
Abstract
The application discloses a control method, a circuit, a device and a medium for synchronous rectification, which are applied to the electrical field. The synchronous rectification circuit comprises a synchronous rectification chip and an MOS (metal oxide semiconductor) tube, and the method comprises the following steps: acquiring a voltage difference value between the voltage of a VD pin and the voltage of a VCC pin of a synchronous rectification chip; and if the first voltage integral value is greater than the first reference voltage value, controlling the conduction of the MOS tube when the voltage of the VD pin is negative next time, wherein the first reference voltage value is greater than the first voltage integral value caused by VD pin oscillation and is less than the first voltage integral value caused by the normal work of the synchronous rectification circuit. The MOS tube can be prevented from being switched on by mistake caused by VD pin oscillation.
Description
Technical Field
The present application relates to the electrical field, and in particular, to a method, a circuit, a device, and a medium for controlling synchronous rectification.
Background
The conventional output side rectification of the switching power supply uses a diode, but the diode has a forward voltage drop, so that the efficiency of the switching power supply is limited. In the existing synchronous rectification technology, a Metal-Oxide-Semiconductor Field-Effect Transistor (MOS Transistor) is generally used to replace a diode, and a reasonably designed circuit drives the MOS Transistor to be turned on and off, so that the working characteristic of the diode is simulated, and the diode has forward on performance compared with the diode, thereby improving the efficiency of the switching power supply. Fig. 1 is a schematic structural diagram of a synchronous rectification circuit, which includes an MOS transistor 1 and a synchronous rectification chip 2, as shown in the figure, a source of the MOS transistor 1 is connected to a GNVD pin of the synchronous rectification chip 2 and a first end of a capacitor, a second end of the capacitor is connected to a VCC pin of the synchronous rectification chip 2 and a first end of a secondary side of a transformer, a drain of the MOS transistor 1 is connected to a second end of the secondary side of the transformer and a first end of a resistor, a second end of the resistor is connected to a VD pin of the synchronous rectification chip 2, a gate of the MOS transistor 1 is connected to a DRV pin of the synchronous rectification chip 2, wherein the DRV pin is a driving pin of the MOS transistor 1, the VCC pin is a power supply pin of the synchronous rectification chip 2, and the VD pin is a voltage determination pin. At present, a general control scheme is that when the voltage of the VD pin is negative, the DRV pin is controlled to output a high level, the MOS transistor 1 is turned on, and when the voltage of the VD pin is positive, the DRV pin is controlled to output a low level, and the MOS transistor 1 is turned off.
However, the control architecture completely controls the on and off of the MOS transistor by judging the voltage, and a primary side on identification mechanism is lacked, so that the misoperation of the MOS transistor is easily caused, and the machine explosion phenomenon is easily caused. When the secondary side current of the transformer is reduced to zero and the synchronous rectification is turned off, the VD pin oscillates and possibly oscillates to negative pressure, the MOS tube is turned on by mistake at the moment, and if the PWM signal of the primary side of the transformer is changed to be high at the moment, the common explosion machine is caused.
Therefore, how to improve the safety of the synchronous rectification circuit is a problem to be solved urgently by those skilled in the art.
Disclosure of Invention
The application aims to provide a control method, a circuit, a device and a medium for synchronous rectification so as to improve the safety of a synchronous rectification circuit.
In order to solve the technical problem, the present application provides a control method of synchronous rectification, which is applied to a synchronous rectification circuit, where the synchronous rectification circuit includes a synchronous rectification chip and a MOS transistor, and the method includes:
acquiring a voltage difference value between the voltage of a VD pin and the voltage of a VCC pin of the synchronous rectification chip;
integrating the voltage difference value in a first time period to obtain a first voltage integral value; wherein the first time period comprises from when the voltage difference value is greater than a first threshold value to the next time the voltage difference value is less than the first threshold value, the first threshold value being less than a maximum value of the voltage difference value and greater than a minimum value of the voltage difference value;
comparing the first voltage integral value with a first reference voltage value, wherein the first reference voltage value is larger than the first voltage integral value caused by VD pin oscillation and smaller than the first voltage integral value caused by normal operation of the synchronous rectification circuit;
and if the first voltage integral value is larger than the first reference voltage value and the voltage of the VD pin is negative next time, controlling the MOS tube to be conducted.
Preferably, comparing the first voltage integral value with the first reference voltage value is specifically:
acquiring a voltage coefficient;
acquiring a second voltage integral value, wherein the second voltage integral value is the product of the first voltage integral value and the voltage coefficient;
comparing the second voltage integral value with a second reference voltage value;
if the second voltage integral value is larger than a second reference voltage value, the first voltage integral value is larger than the first reference voltage value;
and if the second voltage integral value is larger than the second reference voltage value and the difference value between the second voltage integral value and the second reference voltage value is larger than a second threshold value, reducing the voltage coefficient, and returning to the step of acquiring the voltage coefficient.
Preferably, after comparing the second voltage integrated value with a second reference voltage value, the method further includes:
and if the second voltage integral value is smaller than the second reference voltage value and the difference value between the second voltage integral value and the second reference voltage value is smaller than a third threshold value, increasing the voltage coefficient.
Preferably, the first reference voltage value is obtained from information of the synchronous rectification circuit.
Preferably, the information at least includes any one or any combination of power of the synchronous rectification circuit, input voltage of the synchronous rectification circuit, output voltage of the synchronous rectification circuit, highest working voltage of the synchronous rectification chip and production process of the synchronous rectification chip.
In order to solve the above technical problem, the present application further provides a control circuit of synchronous rectification, which is applied to a synchronous rectification circuit, the synchronous rectification circuit includes a synchronous rectification chip and a MOS transistor, the control circuit of synchronous rectification includes: the device comprises a difference value acquisition circuit, a capacitor, a reset MOS tube, a comparator and a processor; the difference value acquisition circuit is used for acquiring a voltage difference value between the voltage of the VD pin of the synchronous rectification chip and the voltage of the VCC pin;
the difference value acquisition circuit is connected with the first end of the capacitor and used for outputting a voltage consistent with the voltage difference value to the capacitor from the moment that the voltage difference value is greater than a first threshold value; wherein the first threshold is less than a maximum value of the voltage difference and greater than a minimum value of the voltage difference;
the processor is connected with the grid electrode of the reset MOS tube and used for sending a reset signal to the reset MOS tube when the voltage difference value is smaller than the first threshold value next time after the voltage difference value is larger than the first threshold value;
the drain electrode of the reset MOS tube is connected with the first end of the capacitor, and the source electrode of the reset MOS tube is grounded and used for resetting the voltage of the capacitor after receiving the reset signal;
the second end of the capacitor is grounded and used for storing electric energy in a first time period; wherein the first time period comprises from when the voltage difference value is greater than a first threshold to the next time the voltage difference value is less than the first threshold;
the input end of the comparator is connected with the first end of the capacitor and used for acquiring the voltage of the first end of the capacitor as a first voltage integral value, and the comparator is also used for comparing the first voltage integral value with a first reference voltage value;
the processor is connected with the output end of the comparator and used for controlling the conduction of the MOS tube if the first voltage integral value is larger than the first reference voltage value and the voltage of the VD pin is negative next time, wherein the first reference voltage value is larger than the first voltage integral value caused by the oscillation of the VD pin and is smaller than the first voltage integral value caused by the normal work of the synchronous rectification circuit.
Preferably, the method further comprises the following steps: a current mirror;
the connection of the difference value acquisition circuit and the first end of the capacitor specifically comprises:
the difference value acquisition circuit is connected with the input end of the current mirror, and the output end of the current mirror is connected with the first end of the capacitor, so that the current mirror can determine a voltage coefficient according to the number of closed switches of the current mirror; wherein the voltage output to the capacitor is a voltage that is consistent in magnitude with the product between the voltage difference and the voltage coefficient, the voltage coefficient being proportional to the number of switch closures of the current mirror;
the comparator is used for acquiring the voltage of the first end of the capacitor to be used as a second voltage integral value, and is also used for comparing the second voltage integral value with a second reference voltage value, wherein if the second voltage integral value is larger than the second reference voltage value, the first voltage integral value is larger than the first reference voltage value;
the processor is connected with the current mirror and used for reducing the number of closed switches of the current mirror when the second voltage integral value is larger than the second reference voltage value and the difference value between the second voltage integral value and the second reference voltage value is larger than a second threshold value; and is further configured to increase the number of switch closures of the current mirror when the second voltage integral value is less than the second reference voltage value and a difference between the second voltage integral value and the second reference voltage value is less than a third threshold value.
In order to solve the above technical problem, the present application further provides a control device for synchronous rectification, which is applied to a synchronous rectification circuit, the synchronous rectification circuit includes a synchronous rectification chip and a MOS transistor, and the device includes:
the acquisition module is used for acquiring a voltage difference value between the voltage of the VD pin of the synchronous rectification chip and the voltage of the VCC pin;
the integration module is used for integrating the voltage difference value in a first time period to obtain a first voltage integral value; wherein the first time period comprises from the time the voltage difference value is greater than a first threshold value to the next time the voltage difference value is less than the first threshold value, the first threshold value being less than a maximum value of the voltage difference value and greater than a minimum value of the voltage difference value;
the comparison module is used for comparing the first voltage integral value with a first reference voltage value, wherein the first reference voltage value is larger than the first voltage integral value caused by VD pin oscillation and smaller than the first voltage integral value caused by normal work of the synchronous rectification circuit;
and the control module is used for controlling the MOS tube to be conducted if the first voltage integral value is greater than the first reference voltage value and the voltage of the VD pin is negative next time.
In order to solve the above technical problem, the present application further provides a synchronous rectification control device, including: a memory for storing a computer program;
and the processor is used for realizing the steps of the control method of the synchronous rectification when executing the computer program.
In order to solve the above technical problem, the present application further provides a computer-readable storage medium, where a computer program is stored, and the computer program, when executed by a processor, implements the steps of the control method for synchronous rectification.
The control method of synchronous rectification provided by the application is applied to a synchronous rectification circuit, the synchronous rectification circuit comprises a synchronous rectification chip and an MOS (metal oxide semiconductor) tube, and the method comprises the following steps: acquiring a voltage difference value between the voltage of a VD pin and the voltage of a VCC pin of a synchronous rectification chip; integrating the voltage difference value in a first time period to obtain a first voltage integral value, wherein the first time period comprises the period from the time when the voltage difference value is larger than a first threshold value to the time when the voltage difference value is smaller than the first threshold value, and the first threshold value is smaller than the maximum value of the voltage difference value and larger than the minimum value of the voltage difference value; after the voltage difference is greater than the first threshold, the voltage of the VD pin at the next time is negative, which may be caused by normal operation of the synchronous rectification circuit, or may be caused by voltage oscillation of the VD pin, and the two situations need to be distinguished. Therefore, the first voltage integral value is compared with a first reference voltage value, if the first voltage integral value is larger than the first reference voltage value, the next time the voltage of the VD pin is negative is caused by the normal operation of the synchronous rectification circuit, the MOS tube is controlled to be conducted when the voltage of the next VD pin is negative, wherein the first reference voltage value is larger than the first voltage integral value caused by the oscillation of the VD pin and is smaller than the first voltage integral value caused by the normal operation of the synchronous rectification circuit. The method provided by the application can avoid the common explosion accident caused by the error opening of the MOS tube caused by VD pin oscillation.
The application also provides a control circuit for synchronous rectification, which corresponds to the method, so that the control circuit has the same beneficial effects as the method.
The application also provides a control device and a computer readable storage medium for synchronous rectification, which correspond to the method, so that the method has the same beneficial effects as the method.
Drawings
In order to more clearly illustrate the embodiments of the present application, the drawings needed for the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained by those skilled in the art without inventive effort.
FIG. 1 is a schematic diagram of a synchronous rectification circuit;
fig. 2 is a flowchart of a control method of synchronous rectification according to an embodiment of the present disclosure;
fig. 3 is a schematic waveform diagram of each node when a synchronous rectification circuit provided in the embodiment of the present application operates;
fig. 4 is a schematic structural diagram of a control circuit for synchronous rectification according to an embodiment of the present disclosure;
fig. 5 is a structural diagram of a control device for synchronous rectification according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without any creative effort belong to the protection scope of the present application.
The core of the application is to provide a control method, a circuit, a device and a medium for synchronous rectification.
In order that those skilled in the art will better understand the disclosure, the following detailed description will be given with reference to the accompanying drawings.
An embodiment of the present application provides a method for controlling synchronous rectification, which is applied to a synchronous rectification circuit, for example, the synchronous rectification circuit shown in fig. 1 includes a synchronous rectification chip and an MOS transistor, and fig. 2 is a flowchart of the method for controlling synchronous rectification provided in the embodiment of the present application, where as shown in the figure, the method includes the following steps:
s10: and acquiring a voltage difference value between the voltage of the VD pin and the voltage of the VCC pin of the synchronous rectification chip.
Fig. 3 is a waveform diagram of each node when a synchronous rectification circuit works according to an embodiment of the present application, it should be noted that the waveform shown in fig. 3 is only one specific case in implementation, the specific waveform is based on an actual situation, the embodiment of the present application is only illustrated by this waveform, and a waveform corresponding to VD-VCC in the diagram is a voltage difference between a voltage of a VD pin and a voltage of a VCC pin of a synchronous rectification chip. As can be seen from the waveform shape in fig. 3, when the VD-VCC is a square wave, i.e., the waveform of the synchronous rectification circuit during normal operation (i.e., the primary side of the transformer is actually turned on), and when the VD-VCC waveform oscillates, i.e., the VD pin of the synchronous rectification chip oscillates. It should be noted that how to obtain the VD-VCC is not limited here, and there are various implementations, for example, the voltages of the VD pin and the VCC pin may be directly obtained, and then the difference value obtaining circuit is used to obtain the difference value between the two. In addition, the waveform corresponding to the PWM in fig. 3 is a PWM signal of the primary side of the transformer to drive the transformer to operate. The waveform corresponding to the DRV is the voltage of a DRV pin so as to control the conduction and the disconnection of the MOS tube.
S11: integrating the voltage difference value in a first time period to obtain a first voltage integral value; the first time period includes that the voltage difference value is smaller than the first threshold value from the time when the voltage difference value is larger than the first threshold value to the next time, and the first threshold value is smaller than the maximum value of the voltage difference value and larger than the minimum value of the voltage difference value.
As shown in fig. 3, the maximum value of the first threshold is equivalent to the maximum value in the waveform corresponding to VD-VCC, the minimum value of the first threshold is equivalent to the minimum value in the waveform corresponding to VD-VCC, the actual value of the first threshold may usually be 0V or a value slightly larger than zero, for example, 0.7V, the specific value may be adjusted according to the magnitude of the operating power of the synchronous rectification circuit, the time for the VD-VCC oscillating waveform to be maintained above the first threshold is short, and the time for the VD-VCC to be maintained above the first threshold when the synchronous rectification circuit normally operates is long, so that two cases may be distinguished according to the characteristic. Taking the first threshold value of 0.7V as an example, the integration is started when VD-VCC is greater than 0.7V, and the integration is ended when VD-VCC is less than 0.7V next time. Analyzing the waveform corresponding to VD-VCC in the figure, the first voltage integral value corresponding to the normal work of the synchronous rectification circuit is larger than the first voltage integral value corresponding to the oscillation of VD pin.
S12: and comparing the first voltage integral value with a first reference voltage value, wherein the first reference voltage value is larger than the first voltage integral value caused by VD pin oscillation and smaller than the first voltage integral value caused by normal work of the synchronous rectification circuit.
In specific implementation, whether the first voltage integral value is caused by normal work of the synchronous rectification circuit or VD pin oscillation is distinguished by setting a first reference voltage value. If the first voltage integral value is larger than the first reference voltage value, the first voltage integral value is determined to be caused by normal work of the synchronous rectification circuit, and if the first voltage integral value is smaller than the first reference voltage value, the first voltage integral value is determined to be caused by oscillation of the VD pin. The value of the first reference voltage is not limited, but the first reference voltage can be obtained by any one or any combination of the power of the synchronous rectification circuit, the input voltage of the synchronous rectification circuit, the output voltage of the synchronous rectification circuit, the highest working voltage of the synchronous rectification chip and the production process of the synchronous rectification chip, and the power can be set to be 2.4V, 1.2V, 0.5V and the like according to different magnitudes of the synchronous rectification circuit. The first reference voltage value can be corrected according to actual conditions, but the first reference voltage value is larger than a first voltage integral value caused by VD pin oscillation and smaller than the first voltage integral value caused by normal operation of the synchronous rectification circuit.
S13: and if the first voltage integral value is larger than the first reference voltage value and the voltage of the VD pin is negative next time, controlling the MOS tube to be conducted.
Taking the first threshold value of 0.7V as an example, the integration is started when VD-VCC is greater than 0.7V, and the integration is ended when VD-VCC is less than 0.7V next time. If the synchronous rectification circuit works normally, the first voltage integral value is larger than the first reference voltage value, and the MOS tube is conducted when the voltage of the VD pin is negative next time. If the VD pin of the synchronous rectification chip oscillates, the first voltage integral value is smaller than the first reference voltage value, and if the MOS tube is conducted at the moment, the common fryer is caused.
The control method of synchronous rectification provided by the application is applied to a synchronous rectification circuit, the synchronous rectification circuit comprises a synchronous rectification chip and an MOS (metal oxide semiconductor) tube, and the method comprises the following steps: acquiring a voltage difference value between the voltage of a VD pin and the voltage of a VCC pin of a synchronous rectification chip; integrating the voltage difference value in a first time period to obtain a first voltage integral value, wherein the first time period comprises the period from the time when the voltage difference value is larger than a first threshold value to the time when the voltage difference value is smaller than the first threshold value, and the first threshold value is smaller than the maximum value of the voltage difference value and larger than the minimum value of the voltage difference value; after the voltage difference is greater than the first threshold, the voltage of the VD pin at the next time is negative, which may be caused by normal operation of the synchronous rectification circuit, or may be caused by voltage oscillation of the VD pin, and the two situations need to be distinguished. Therefore, the first voltage integral value is compared with a first reference voltage value, if the first voltage integral value is larger than the first reference voltage value, the next time the voltage of the VD pin is negative is caused by the normal operation of the synchronous rectification circuit, the MOS tube is controlled to be conducted when the voltage of the next VD pin is negative, wherein the first reference voltage value is larger than the first voltage integral value caused by the oscillation of the VD pin and is smaller than the first voltage integral value caused by the normal operation of the synchronous rectification circuit. The method provided by the application can avoid the common explosion accident caused by the error opening of the MOS tube caused by VD pin oscillation.
In practical application, the value of the first reference voltage value may be inaccurate, and therefore, comparing the first voltage integral value with the first reference voltage value specifically includes: acquiring a voltage coefficient; acquiring a second voltage integral value, wherein the second voltage integral value is the product of the first voltage integral value and a voltage coefficient; comparing the second voltage integral value with a second reference voltage value; if the second voltage integral value is larger than the second reference voltage value, the first voltage integral value is larger than the first reference voltage value. In specific implementation, the voltage coefficient may be adjusted at any time to adjust a magnitude relationship between the second voltage integral value and the second reference voltage value, specifically: and if the second voltage integral value is greater than the second reference voltage value and the difference value between the second voltage integral value and the second reference voltage value is greater than a second threshold value, reducing the voltage coefficient and returning to the step of acquiring the voltage coefficient. After comparing the magnitude of the second voltage integration value with the magnitude of the second reference voltage value, the method further includes: and if the second voltage integral value is smaller than the second reference voltage value and the difference value between the second voltage integral value and the second reference voltage value is smaller than a third threshold value, increasing the voltage coefficient.
As shown in fig. 3, the second reference voltage value is denoted as VREF2, the sum of the second reference voltage value and the second threshold value is denoted as VREF1, and the difference between the second reference voltage value and the third threshold value is denoted as VREF3, so that the magnitude relationship between the three values is: and VREF1, VREF2, VREF3, the second voltage integral value is recorded as Vcap, the voltage coefficient is recorded as k/C, under the normal condition, if Vcap is larger than VREF2, the primary side of the transformer is considered to be really connected, and the MOS tube can be switched on when the VD pin is negative. If Vcap > VREF1, the voltage coefficient is set too large, the voltage coefficient needs to be reduced, and then when comparison is carried out, Vcap is gradually reduced until the voltage coefficient is smaller than VREF1 and does not change. If VREF3< Vcap < VREF2, it is indicated that the voltage coefficient may be set to be small, so that the primary side of the transformer may be actually conducted, and the comparison result indicates that Vcap is caused by VD pin oscillation, the voltage coefficient is increased, and then during comparison, Vcap is gradually increased until the Vcap voltage exceeds VREF2, and at this time, the MOS transistor can be controlled to be turned on. In addition, if Vcap < VREF3, which indicates that Vcap is actually caused by VD pin oscillation, the voltage coefficient is kept unchanged, and because the duration of a single period during VD-VCC oscillation is short, Vcap is hardly higher than VREF3, so that the waveform of VD-VCC oscillation and the waveform corresponding to the primary side turn-on of the transformer can be effectively distinguished in this way. It should be noted that the degree of increasing or decreasing the voltage coefficient each time is not limited, and is subject to practical conditions.
According to the method provided by the embodiment of the application, the magnitude of the voltage coefficient is adjusted by comparing the magnitude of Vcap with three values of VREF1, VREF2 and VREF 3. When Vcap > VREF1, it is said that the voltage coefficient is set too large, and Vcap caused by VD pin oscillation may be mistakenly determined as Vcap caused by the primary side conduction of the transformer, so that the voltage coefficient is reduced. When VREF3< Vcap < VREF2, the voltage coefficient is possibly set to be smaller, and the voltage coefficient is properly increased, so that the situation that the Vcap caused by the primary side conduction of the transformer is mistakenly judged as the Vcap caused by VD pin oscillation can be avoided. The embodiment of the application improves the accuracy of judgment by adjusting the voltage coefficient in real time.
The above embodiments are discussions on a control method of synchronous rectification, and embodiments of the present application provide a control circuit of synchronous rectification, which is also applied to a synchronous rectification circuit shown in fig. 1, where the synchronous rectification circuit includes a synchronous rectification chip and a MOS transistor. Fig. 4 is a schematic structural diagram of a control circuit for synchronous rectification provided in an embodiment of the present application, where it should be noted that the structure shown in the drawing is only one of the structures provided in the present application, and does not limit other structures. As shown, the control circuit for synchronous rectification includes: the circuit comprises a difference value acquisition circuit 3, a capacitor 4, a reset MOS tube 5, a comparator 6 and a processor. Fig. 4 further includes a current mirror 7, and in a case that the current mirror 7 is not needed, the difference obtaining circuit 3 is directly connected to the first end of the capacitor 4, and this embodiment of the present application takes a case that the current mirror 7 is not needed as an example for explanation. The difference value acquisition circuit 3 is used for acquiring a voltage difference value between the voltage of the VD pin of the synchronous rectification chip and the voltage of the VCC pin; the difference value acquisition circuit 3 is connected with the first end of the capacitor 4 and is used for outputting a voltage which is consistent with the voltage difference value to the capacitor 4 from the moment that the voltage difference value is greater than the first threshold value; the first threshold value is smaller than the maximum value of the voltage difference value and larger than the minimum value of the voltage difference value; the processor is connected with the grid electrode of the Reset MOS tube 5 and used for sending a Reset signal Reset to the Reset MOS tube 5 when the voltage difference value is smaller than the first threshold value at the next time after being larger than the first threshold value, the drain electrode of the Reset MOS tube 5 is connected with the first end of the capacitor 4, and the source electrode of the Reset MOS tube 5 is grounded and used for resetting the voltage of the capacitor 4 after receiving the Reset signal; the second end of the capacitor 4 is grounded and used for storing electric energy in a first time period; wherein the first time period comprises from when the voltage difference is greater than the first threshold to when the next voltage difference is less than the first threshold; the input end of the comparator 6 is connected with the first end of the capacitor 4, and is used for acquiring the voltage of the first end of the capacitor 4 to be used as a first voltage integral value, and the comparator 6 is further used for comparing the first voltage integral value with a first reference voltage value; the processor is connected with the output end of the comparator 6 and used for controlling the conduction of the MOS tube if the first voltage integral value is larger than a first reference voltage value and the voltage of the VD pin is negative next time, wherein the first reference voltage value is larger than the first voltage integral value caused by the oscillation of the VD pin and is smaller than the first voltage integral value caused by the normal work of the synchronous rectification circuit.
Since the embodiments of the circuit portion and the method portion correspond to each other, please refer to the description of the embodiments of the method portion for the embodiments of the circuit portion, which is not repeated here.
The control circuit for synchronous rectification provided by the embodiment corresponds to the method, so that the control circuit has the same beneficial effects as the method.
In the embodiment of the present application, the synchronous rectification control circuit including the current mirror 7 is taken as an example for explanation, and the connection between the difference obtaining circuit 3 and the first end of the capacitor 4 specifically includes: the difference value acquisition circuit 3 is connected with the input end of the current mirror 7, and the output end of the current mirror 7 is connected with the first end of the capacitor 4, so that the current mirror 7 can determine a voltage coefficient according to the number of closed switches of the current mirror 7; the voltage output to the capacitor 4 is the voltage with the same magnitude as the product of the voltage difference and the voltage coefficient, and the voltage coefficient is in direct proportion to the number of closed switches of the current mirror 7; the comparator 6 is configured to obtain a voltage at the first end of the capacitor 4 as a second voltage integral value, and the comparator 6 is further configured to compare the second voltage integral value with a second reference voltage value, where if the second voltage integral value is greater than the second reference voltage value, the first voltage integral value is greater than the first reference voltage value; the processor is connected with the current mirror 7 and used for reducing the number of the closed switches of the current mirror 7 when the second voltage integral value is larger than a second reference voltage value and the difference value between the second voltage integral value and the second reference voltage value is larger than a second threshold value; and also for increasing the number of switches of the current mirror 7 closed when the second voltage integration value is smaller than the second reference voltage value and the difference between the second voltage integration value and the second reference voltage value is smaller than a third threshold value.
After the current mirror 7 is added, the voltage at the first end of the capacitor 4 acquired by the comparator 6 is the second voltage integrated value Vcap, where the current mirror 7 determines that the voltage coefficient k/C is actually the charging coefficient k in the determined voltage coefficient according to the number of closed switches of the current mirror 7, and C is the value of the capacitor 4, the number of closed switches of the current mirror 7 is increased corresponding to the increased charging coefficient k, and the number of closed switches of the current mirror 7 is decreased corresponding to the decreased charging coefficient k, so that the Vcap is calculated as shown in formula (1).
The three comparators 6 are used to compare Vcap with VREF1, VREF2, and VREF3, respectively. The specific comparison process has been described in the above embodiments, and is not described herein again.
The embodiment of the application provides a control circuit for synchronous rectification, which adjusts the number of closed switches of a current mirror by comparing Vcap with three values of VREF1, VREF2 and VREF 3. When Vcap > VREF1, it indicates that the voltage coefficient is set too large, and Vcap caused by VD pin oscillation may be erroneously determined as Vcap caused by primary side conduction of the transformer, so that the number of closed switches of the current mirror is reduced. When VREF3< Vcap < VREF2, it is indicated that the voltage coefficient may be set to be smaller, and the number of closed switches of the current mirror is properly increased, so that the situation that Vcap caused by the primary side conduction of the transformer is mistakenly judged as Vcap caused by VD pin oscillation can be avoided. The embodiment of the application improves the accuracy of judgment by adjusting the voltage coefficient in real time.
In the above embodiments, the control method of synchronous rectification is described in detail, and the present application also provides embodiments corresponding to the control device of synchronous rectification. It should be noted that the present application describes the embodiments of the apparatus portion from two perspectives, one from the perspective of the function module and the other from the perspective of the hardware.
Based on the angle of the functional module, this embodiment provides a control device of synchronous rectification, is applied to a synchronous rectification circuit, and synchronous rectification circuit includes synchronous rectification chip, MOS transistor, and fig. 5 is the structure diagram of the control device of synchronous rectification that this embodiment of this application provided, as shown in fig. 5, the device includes:
the obtaining module 10 is configured to obtain a voltage difference between a voltage of a VD pin of the synchronous rectification chip and a voltage of a VCC pin;
the integrating module 11 is configured to integrate the voltage difference value in a first time period to obtain a first voltage integration value; the first time period comprises the time from the time when the voltage difference value is larger than the first threshold value to the time when the voltage difference value is smaller than the first threshold value, wherein the first threshold value is smaller than the maximum value of the voltage difference value and larger than the minimum value of the voltage difference value;
a comparing module 12, configured to compare the first voltage integral value with a first reference voltage value;
and the control module 13 is configured to control the MOS transistor to be turned on if the first voltage integral value is greater than a first reference voltage value and the voltage of the VD pin is negative next time, where the first reference voltage value is greater than the first voltage integral value caused by the oscillation of the VD pin and is smaller than the first voltage integral value caused by the normal operation of the synchronous rectification circuit.
Since the embodiments of the apparatus portion and the method portion correspond to each other, please refer to the description of the embodiments of the method portion for the embodiments of the apparatus portion, which is not repeated here.
The synchronous rectification control device provided by the embodiment corresponds to the method, and therefore has the same beneficial effects as the method.
From the perspective of hardware, the present embodiment provides another control device for synchronous rectification, where the control device for synchronous rectification includes: a memory for storing a computer program;
a processor for implementing the steps of the control method of synchronous rectification as mentioned in the above embodiments when executing the computer program.
The control device for synchronous rectification provided by this embodiment may include, but is not limited to, a smart phone, a tablet computer, a notebook computer, or a desktop computer.
The processor may include one or more processing cores, such as a 4-core processor, an 8-core processor, and so on. The Processor may be implemented in at least one hardware form of a Digital Signal Processor (DSP), a Field-Programmable Gate Array (FPGA), and a Programmable Logic Array (PLA). The processor may also include a main processor and a coprocessor, where the main processor is a processor for Processing data in an awake state, and is also called a Central Processing Unit (CPU); a coprocessor is a low power processor for processing data in a standby state. In some embodiments, the processor may be integrated with a Graphics Processing Unit (GPU) that is responsible for rendering and drawing the content that the display screen needs to display. In some embodiments, the processor may further include an Artificial Intelligence (AI) processor for processing computational operations related to machine learning.
The memory may include one or more computer-readable storage media, which may be non-transitory. The memory may also include high speed random access memory, as well as non-volatile memory, such as one or more magnetic disk storage devices, flash memory storage devices. In this embodiment, the memory is at least used for storing a computer program, wherein after the computer program is loaded and executed by the processor, the relevant steps of the control method for synchronous rectification disclosed in any one of the foregoing embodiments can be implemented. In addition, the resources stored by the memory may also include an operating system, data and the like, and the storage mode may be a transient storage mode or a permanent storage mode. The operating system may include Windows, Unix, Linux, and the like. The data may include, but is not limited to, data related to a control method of synchronous rectification, and the like.
In some embodiments, the control device for synchronous rectification may further include a display screen, an input/output interface, a communication interface, a power supply, and a communication bus.
It will be appreciated by those skilled in the art that the configurations shown in the figures do not constitute a limitation of the control means for synchronous rectification and may include more or fewer components than those shown.
The synchronous rectification control device provided by the embodiment of the application comprises a memory and a processor, wherein when the processor executes a program stored in the memory, the following method can be realized: a control method of synchronous rectification.
The synchronous rectification control device provided by the embodiment corresponds to the method, and therefore has the same beneficial effects as the method.
Finally, the application also provides a corresponding embodiment of the computer readable storage medium. The computer-readable storage medium has stored thereon a computer program which, when being executed by a processor, carries out the steps as set forth in the above-mentioned method embodiments.
It is to be understood that if the method in the above embodiments is implemented in the form of software functional units and sold or used as a stand-alone product, it can be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be substantially or partially implemented in the form of a software product, which is stored in a storage medium and performs all or part of the steps of the methods described in the embodiments of the present application, or all or part of the technical solution. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
The computer-readable storage medium provided by the embodiment corresponds to the method, and therefore has the same beneficial effects as the method.
The control method, circuit, apparatus and medium for synchronous rectification provided by the present application are described in detail above. The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the same element.
Claims (10)
1. A control method of synchronous rectification is applied to a synchronous rectification circuit, the synchronous rectification circuit comprises a synchronous rectification chip and an MOS tube, and the method is characterized by comprising the following steps:
acquiring a voltage difference value between the voltage of a VD pin and the voltage of a VCC pin of the synchronous rectification chip;
integrating the voltage difference value in a first time period to obtain a first voltage integral value; wherein the first time period comprises from when the voltage difference value is greater than a first threshold value to the next time the voltage difference value is less than the first threshold value, the first threshold value being less than a maximum value of the voltage difference value and greater than a minimum value of the voltage difference value;
comparing the first voltage integral value with a first reference voltage value, wherein the first reference voltage value is larger than the first voltage integral value caused by VD pin oscillation and smaller than the first voltage integral value caused by normal operation of the synchronous rectification circuit;
and if the first voltage integral value is larger than the first reference voltage value and the voltage of the VD pin is negative next time, controlling the MOS tube to be conducted.
2. The method for controlling synchronous rectification according to claim 1, wherein comparing the first voltage integration value with the first reference voltage value is specifically:
acquiring a voltage coefficient;
acquiring a second voltage integral value, wherein the second voltage integral value is the product of the first voltage integral value and the voltage coefficient;
comparing the second voltage integral value with a second reference voltage value;
if the second voltage integral value is larger than a second reference voltage value, the first voltage integral value is larger than the first reference voltage value;
and if the second voltage integral value is larger than the second reference voltage value and the difference value between the second voltage integral value and the second reference voltage value is larger than a second threshold value, reducing the voltage coefficient, and returning to the step of acquiring the voltage coefficient.
3. The method of controlling synchronous rectification according to claim 2, wherein after comparing the second voltage integration value with a second reference voltage value, further comprising:
and if the second voltage integral value is smaller than the second reference voltage value and the difference value between the second voltage integral value and the second reference voltage value is smaller than a third threshold value, increasing the voltage coefficient.
4. The method according to any one of claims 1 to 3, wherein the first reference voltage value is obtained based on information of the synchronous rectification circuit.
5. The method according to claim 4, wherein the information at least includes any one or any combination of power of the synchronous rectification circuit, input voltage of the synchronous rectification circuit, output voltage of the synchronous rectification circuit, and highest operating voltage of the synchronous rectification chip, and production process of the synchronous rectification chip.
6. The utility model provides a control circuit of synchronous rectification, is applied to a synchronous rectification circuit, synchronous rectification circuit includes synchronous rectification chip, MOS pipe, its characterized in that, control circuit of synchronous rectification includes: the device comprises a difference value acquisition circuit, a capacitor, a reset MOS tube, a comparator and a processor; the difference value acquisition circuit is used for acquiring a voltage difference value between the voltage of the VD pin of the synchronous rectification chip and the voltage of the VCC pin;
the difference value acquisition circuit is connected with the first end of the capacitor and used for outputting a voltage consistent with the voltage difference value to the capacitor from the moment that the voltage difference value is greater than a first threshold value; wherein the first threshold is less than a maximum value of the voltage difference and greater than a minimum value of the voltage difference;
the processor is connected with the grid electrode of the reset MOS tube and used for sending a reset signal to the reset MOS tube when the voltage difference value is smaller than the first threshold value next time after the voltage difference value is larger than the first threshold value;
the drain electrode of the reset MOS tube is connected with the first end of the capacitor, and the source electrode of the reset MOS tube is grounded and used for resetting the voltage of the capacitor after receiving the reset signal;
the second end of the capacitor is grounded and used for storing electric energy in a first time period; wherein the first time period comprises from when the voltage difference value is greater than a first threshold to the next time the voltage difference value is less than the first threshold;
the input end of the comparator is connected with the first end of the capacitor and used for acquiring the voltage of the first end of the capacitor as a first voltage integral value, and the comparator is also used for comparing the first voltage integral value with a first reference voltage value;
the processor is connected with the output end of the comparator and used for controlling the conduction of the MOS tube if the first voltage integral value is larger than the first reference voltage value and the voltage of the VD pin is negative next time, wherein the first reference voltage value is larger than the first voltage integral value caused by the oscillation of the VD pin and is smaller than the first voltage integral value caused by the normal work of the synchronous rectification circuit.
7. The control circuit for synchronous rectification according to claim 6, further comprising: a current mirror;
the connection of the difference value acquisition circuit and the first end of the capacitor specifically comprises:
the difference value acquisition circuit is connected with the input end of the current mirror, and the output end of the current mirror is connected with the first end of the capacitor, so that the current mirror can determine a voltage coefficient according to the number of closed switches of the current mirror; wherein the voltage output to the capacitor is a voltage that is consistent in magnitude with the product between the voltage difference and the voltage coefficient, the voltage coefficient being proportional to the number of switch closures of the current mirror;
the comparator is used for acquiring the voltage of the first end of the capacitor to be used as a second voltage integral value, and the comparator is also used for comparing the second voltage integral value with a second reference voltage value, wherein if the second voltage integral value is larger than the second reference voltage value, the first voltage integral value is represented to be larger than the first reference voltage value;
the processor is connected with the current mirror and used for reducing the number of closed switches of the current mirror when the second voltage integral value is larger than the second reference voltage value and the difference value between the second voltage integral value and the second reference voltage value is larger than a second threshold value; and is further configured to increase the number of switch closures of the current mirror when the second voltage integral value is less than the second reference voltage value and a difference between the second voltage integral value and the second reference voltage value is less than a third threshold value.
8. The utility model provides a controlling means of synchronous rectification, is applied to a synchronous rectification circuit, synchronous rectification circuit includes synchronous rectification chip, MOS pipe, its characterized in that, the device includes:
the acquisition module is used for acquiring a voltage difference value between the voltage of the VD pin and the voltage of the VCC pin of the synchronous rectification chip;
the integration module is used for integrating the voltage difference value in a first time period to obtain a first voltage integration value; wherein the first time period comprises from when the voltage difference value is greater than a first threshold value to the next time the voltage difference value is less than the first threshold value, the first threshold value being less than a maximum value of the voltage difference value and greater than a minimum value of the voltage difference value;
the comparison module is used for comparing the first voltage integral value with a first reference voltage value, wherein the first reference voltage value is larger than the first voltage integral value caused by VD pin oscillation and smaller than the first voltage integral value caused by normal work of the synchronous rectification circuit;
and the control module is used for controlling the MOS tube to be conducted if the first voltage integral value is greater than the first reference voltage value and the voltage of the VD pin is negative next time.
9. A control device for synchronous rectification, comprising a memory for storing a computer program;
a processor for implementing the steps of the control method of synchronous rectification according to any one of claims 1 to 5 when executing said computer program.
10. A computer-readable storage medium, characterized in that a computer program is stored thereon, which computer program, when being executed by a processor, realizes the steps of the control method of synchronous rectification according to any one of claims 1 to 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210354920.8A CN114499213B (en) | 2022-04-06 | 2022-04-06 | Synchronous rectification control method, circuit, device and medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210354920.8A CN114499213B (en) | 2022-04-06 | 2022-04-06 | Synchronous rectification control method, circuit, device and medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114499213A true CN114499213A (en) | 2022-05-13 |
| CN114499213B CN114499213B (en) | 2022-07-15 |
Family
ID=81488618
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210354920.8A Active CN114499213B (en) | 2022-04-06 | 2022-04-06 | Synchronous rectification control method, circuit, device and medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114499213B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120300520A1 (en) * | 2011-05-24 | 2012-11-29 | Chengdu Monolithic Power Systems Co., Ltd. | Switching mode power supply with synchronous rectifying control circuit |
| CN108111025A (en) * | 2018-02-05 | 2018-06-01 | 上海贝岭股份有限公司 | Synchronous commutating control circuit, control device and the Switching Power Supply of Switching Power Supply |
| CN111697838A (en) * | 2020-05-29 | 2020-09-22 | 昂宝电子（上海）有限公司 | Synchronous rectification control circuit and method and switching power supply system |
| US20210296982A1 (en) * | 2020-03-20 | 2021-09-23 | Delta-Q Technologies Corp. | Apparatus and method for single-phase and three-phase power factor correction |
| CN113676057A (en) * | 2021-07-16 | 2021-11-19 | 杭州电子科技大学 | LLC synchronous rectification circuit based on secondary current simulation |
| US11223284B2 (en) * | 2020-01-31 | 2022-01-11 | Dialog Semiconductor Inc. | System and method for determining a primary switching event in an isolated converter |
| CN215580941U (en) * | 2021-04-08 | 2022-01-18 | 昂宝电子（上海）有限公司 | Synchronous rectification controller and synchronous rectification system |
-
2022
- 2022-04-06 CN CN202210354920.8A patent/CN114499213B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120300520A1 (en) * | 2011-05-24 | 2012-11-29 | Chengdu Monolithic Power Systems Co., Ltd. | Switching mode power supply with synchronous rectifying control circuit |
| CN108111025A (en) * | 2018-02-05 | 2018-06-01 | 上海贝岭股份有限公司 | Synchronous commutating control circuit, control device and the Switching Power Supply of Switching Power Supply |
| US11223284B2 (en) * | 2020-01-31 | 2022-01-11 | Dialog Semiconductor Inc. | System and method for determining a primary switching event in an isolated converter |
| US20210296982A1 (en) * | 2020-03-20 | 2021-09-23 | Delta-Q Technologies Corp. | Apparatus and method for single-phase and three-phase power factor correction |
| CN111697838A (en) * | 2020-05-29 | 2020-09-22 | 昂宝电子（上海）有限公司 | Synchronous rectification control circuit and method and switching power supply system |
| CN215580941U (en) * | 2021-04-08 | 2022-01-18 | 昂宝电子（上海）有限公司 | Synchronous rectification controller and synchronous rectification system |
| CN113676057A (en) * | 2021-07-16 | 2021-11-19 | 杭州电子科技大学 | LLC synchronous rectification circuit based on secondary current simulation |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114499213B (en) | 2022-07-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8174802B2 (en) | Switching regulator and operations control method thereof | |
| US20190305573A1 (en) | Electronic Device Fast Charging Method, Apparatus, and Device | |
| EP2911232B1 (en) | Charging method and charger | |
| US20150145468A1 (en) | Device and chip for controlling charging, and user terminal | |
| WO2016101509A1 (en) | Charging control method and device | |
| CN106537286B (en) | OTG peripheral equipment, power supply method, terminal and system | |
| US11202358B2 (en) | Discharge method and circuit for USB connector | |
| US9472967B2 (en) | Power management system and method for a portable device | |
| KR101327082B1 (en) | Method for controlling charging current | |
| KR102532572B1 (en) | Battery rapid charging method, charging device, charging standby equipment and charging system | |
| CN114447889A (en) | Protection method, device and medium for grid-connected inverter | |
| KR20210120092A (en) | Charging circuits and electronics | |
| US7428465B2 (en) | Testing control methods for use in current management systems for digital logic devices | |
| CN114499213B (en) | Synchronous rectification control method, circuit, device and medium | |
| CN113161989B (en) | Digital power supply, fault detection circuit and method thereof, and computer readable storage medium | |
| WO2021088259A1 (en) | Control system and method for power backup system | |
| CN210246387U (en) | Power supply switching circuit and electronic equipment | |
| CN111146837A (en) | Charging method and device, electronic device and storage medium | |
| CN114336867B (en) | Outdoor power supply device charging adaptation method, controller and outdoor power supply device | |
| US8954717B2 (en) | System capable of booting through a universal serial bus device and method thereof | |
| CN112180798B (en) | Time sequence control circuit, power supply control circuit and frequency converter | |
| JP6916629B2 (en) | Electronics and control methods | |
| CN114498563B (en) | Protection method, circuit, device and medium for main power tube of switching power supply | |
| CN214280927U (en) | Power-down protection circuit applied to alternating-current input voltage and power supply chip | |
| CN216751179U (en) | Integrated circuit and power adapter based on fault detection stable starting technology |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |