CN114499111A

CN114499111A - Alternating-current generator and rectifying device thereof

Info

Publication number: CN114499111A
Application number: CN202011146362.3A
Authority: CN
Inventors: 陈维忠; 锺尚书; 陈宴毅; 王惠琪
Original assignee: Actron Technology Corp
Current assignee: Actron Technology Corp
Priority date: 2020-10-23
Filing date: 2020-10-23
Publication date: 2022-05-13

Abstract

The invention provides an alternating-current generator and a rectifying device thereof. The rectifying device comprises a transistor and a grid voltage control circuit. The transistor is controlled by a gate voltage. The grid voltage control circuit generates a grid voltage according to the voltage difference of the input voltage and the rectified voltage. The gate voltage control circuit determines whether the voltage difference is less than a second default threshold voltage within a first time interval after the voltage difference is reduced to be equal to the first default threshold voltage to determine whether to provide a gate voltage to turn on the transistor. When the transistor is turned on, the voltage difference is substantially equal to the first reference voltage. The grid voltage control circuit adjusts the grid voltage to enable the voltage difference to be substantially equal to the second reference voltage in the second time interval.

Description

Alternating-current generator and rectifying device thereof

Technical Field

The present invention relates to an ac generator and a rectifier, and more particularly, to an ac generator and a rectifier capable of preventing a reverse current phenomenon from occurring.

Background

In an alternator, a rectifier device is often used to rectify an ac input voltage and produce a rectified voltage that can be considered a dc voltage. In the prior art, a diode or a transistor is often used to perform an operation of rectifying an input voltage. Ideally, the rectified voltage should be maintained at a voltage value equal to the reference voltage (e.g. 0 volt) in the negative half-wave, but in practical cases, as shown in the waveform diagram of the conventional rectified voltage shown in fig. 1, the rectified voltage with a peak value of the voltage VP, and in the negative half-wave TN, the voltage value of the input voltage is lower than the reference voltage V0. That is, in the negative half-wave TN of the input voltage, a power loss (power loss) phenomenon occurs, which reduces the operating efficiency of the system.

In addition, the related art is related to a technology for performing a rectifying operation of an input voltage by controlling a turn-on timing of a transistor. However, in practical applications, the waveform of the rectified voltage and the timing at which the transistor is turned on must be matched with each other. If the timing of turning on the transistor is too late or too early, a reverse current (reverse current) phenomenon may occur.

Disclosure of Invention

The invention aims at an alternating current generator and a rectifying device thereof, which are used for eliminating a reverse current phenomenon generated in a rectifying process.

According to an embodiment of the present invention, a rectifying device includes a transistor and a gate voltage control circuit. The transistor has a first terminal receiving an input voltage, a second terminal generating a rectified voltage, and a control terminal receiving a gate voltage. The gate voltage control circuit is coupled to the transistor and generates a gate voltage according to a voltage difference between the input voltage and the rectified voltage. The gate voltage control circuit judges whether the voltage difference is smaller than a second default threshold voltage or not in a first time interval after the voltage difference is reduced to be equal to the first default threshold voltage so as to determine whether to provide gate voltage to turn on the transistor or not, wherein when the transistor is turned on, the voltage difference is substantially equal to a first reference voltage; the grid voltage control circuit adjusts the grid voltage in a second time interval after the first time interval so that the voltage difference is substantially equal to the second reference voltage.

According to another embodiment of the invention, the rectifier transistor is controlled by the gate voltage control circuit. The transistor has a first terminal receiving an input voltage, a second terminal generating a rectified voltage, and a control terminal receiving a gate voltage. The gate voltage control circuit is coupled to the transistor and generates a gate voltage according to a voltage difference between the input voltage and the rectified voltage. The gate voltage control circuit determines whether the voltage difference is less than a second default threshold voltage to provide a gate voltage to turn on the transistor in a first time interval after the voltage difference is reduced to be equal to the first default threshold voltage, wherein when the transistor is turned on, the gate voltage is adjusted to turn off the transistor in the first time interval and a second time interval after the first time interval when the voltage difference is increased to a third default threshold voltage. And in the first time interval, the third default critical voltage is greater than or equal to zero, and in the second time interval, the third default critical voltage is less than or equal to zero.

An alternator according to an embodiment of the present invention includes a rotor, a stator, and a plurality of rectifying devices as described above. Each rectifying device receives a corresponding alternating current input voltage as a rectified voltage, and the plurality of rectifying devices jointly generate the rectified voltage.

In view of the above, the gate voltage control circuit of the embodiment of the invention determines whether the voltage difference between the input voltage and the rectified voltage is decreased to be equal to the second default threshold voltage, which is relatively low, within the first time interval after the voltage difference between the input voltage and the rectified voltage is decreased to be equal to the first default threshold voltage, and accordingly determines whether the transistor is completely turned on. Therefore, the reverse current phenomenon generated by the transistor being conducted too slowly can be prevented, and the overall efficiency of the rectifying device is improved.

Drawings

The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.

FIG. 1 shows a waveform diagram of a prior art rectified voltage;

FIG. 2 illustrates a schematic view of a fairing according to an embodiment of the invention;

FIG. 3A illustrates a waveform diagram of an implementation of a fairing of an embodiment of the invention;

FIG. 3B shows an enlarged partial view of region Z1 of the waveform of FIG. 3A in accordance with the present invention;

FIG. 4 illustrates a waveform diagram of a third default threshold voltage implementation of a rectifying device of an embodiment of the present invention;

FIGS. 5A and 5B illustrate waveforms of two different implementations of a fairing according to an embodiment of the invention;

FIG. 6 is a schematic diagram of a gate voltage control circuit according to an embodiment of the invention;

FIG. 7 shows a schematic diagram of an implementation of a seed signal generator in a gate voltage control circuit of an embodiment of the present invention;

FIG. 8 is a schematic diagram of a voltage generator in a gate voltage control circuit according to an embodiment of the present invention;

fig. 9 shows a schematic diagram of an alternator according to an embodiment of the present invention.

Description of the reference numerals

200. 911 to 932: a rectifying device;

210. 600: a gate voltage control circuit;

700: a control signal generator;

710: a multiplexer;

720. 730: a comparator;

740. 750: a counter;

760: a calculator;

770: a logic circuit;

900: an alternator;

c1: a capacitor;

CMP 1-CMP 2: comparing the results;

e1: a first end;

e2: a second end;

EN _ OPA, EN _ SW1, EN _ SW 2: a control signal;

OP 1: an operational amplifier;

OT: an output end;

PA 1-PA 3: a time interval;

PTON: a time interval;

r1: a resistance;

RG: counting the range value;

RT: a rotor;

s1, S2: a state;

ST: a stator;

SW1, SW 2: a switch;

TDI: a transistor;

TN: a negative half-wave;

TP1, TP2, TP 3: a point in time;

v0: a reference voltage;

VA: a power source;

VD: rectifying the voltage;

VDS: a voltage difference;

VG: a gate voltage;

VH: an operating voltage;

VHH: operating a power supply;

VP, Vy, Vz: a voltage;

vx: first voltage/first default threshold voltage;

VR1, VR 2: a reference voltage;

VS: inputting a voltage;

VSS: a ground voltage;

VU, VV, VW: a phase voltage;

VDS _ ON, VDS _ OFF: a default threshold voltage;

α: and (4) parameters.

Detailed Description

Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts.

Referring to fig. 2, fig. 2 is a schematic diagram of a rectifying device according to an embodiment of the invention. The rectifying device 200 includes a transistor TDI and a gate voltage control circuit 210. The transistor TDI has a first terminal E1 receiving the input voltage VS, a second terminal E2 generating a rectified voltage VD, and a control terminal receiving the gate voltage VG. In the present embodiment, the operation of the transistor TDI is equivalent to a diode by the gate voltage VG, the first terminal of the transistor TDI is equivalent to the cathode of the diode, and the second terminal of the transistor TDI is equivalent to the anode of the diode.

The gate voltage control circuit 210 is coupled to the transistor TDI and is used for providing a gate voltage VG. The gate voltage control circuit 210 receives a voltage difference VDs between the rectified voltage VD and the input voltage VS, and generates a gate voltage VG according to the voltage difference VDs. For details of generation of the gate voltage VG, please refer to fig. 2 and fig. 3A synchronously, wherein fig. 3A illustrates a waveform diagram of an embodiment of the rectifying device according to the present invention.

In the present embodiment, the gate voltage control circuit 210 can detect the voltage difference VDS of the transistor TDI and detect a time point TP1 when the voltage difference VDS drops to be equal to the first default threshold voltage Vx. After the time point TP1, the gate voltage control circuit 210 starts counting operation of a first time interval PA 1. Next, the gate voltage control circuit 210 may determine whether the voltage difference VDS of the transistor TDI drops to be equal to a second default threshold voltage VDS _ ON in the first time interval PA1, where the second default threshold voltage VDS _ ON is smaller than the first default threshold voltage Vx. In the embodiment, the gate voltage control circuit 210 determines that the voltage difference VDS of the transistor TDI drops to the time point TP2 equal to the second default threshold voltage VDS _ ON in the first time interval PA1, and the gate voltage control circuit 210 generates the gate voltage VG at the time point TP2 so that the transistor TDI is turned ON. In the present embodiment, the transistor TDI at this time can be completely turned on (full turn on).

In the present embodiment, when the counting operation of the first time interval PA1 is started, the gate voltage control circuit 210 does not immediately turn on the transistor TDI. The gate voltage control circuit 210 continues to detect the voltage difference VDS during the first time interval PA1, and turns ON the transistor TDI when the voltage difference VDS is determined to drop to be equal to the second default threshold voltage VDS _ ON.

Please note that, in the embodiment of the present invention, the first time interval PA1 may be a predetermined limited time interval. The first time interval PA1 can be set according to the time length of the negative half-wave of the voltage difference VDS. Therefore, the later the time point TP2 when the voltage difference VDS drops to be equal to the second default threshold voltage VDS _ ON occurs, the shorter the time length that the transistor TDI is fully turned ON. In addition, if the gate voltage control circuit 210 detects that the voltage difference VDS is not dropping to be equal to the second default threshold voltage VDS _ ON in the first time interval PA1, the transistor TDI will not be fully turned ON in this period.

Incidentally, taking the transistor TDI as an N-type transistor as an example, the gate voltage control circuit 210 can provide the gate voltage VG according to a sufficiently high voltage value to make the transistor TDI be completely turned on. In the case where the transistor TDI is turned on, the voltage difference VDS may be equal to the first reference voltage VR1 of the product of the on-resistance of the transistor TDI and the current flowing through the transistor TDI by the rectifying action of the transistor TDI. Taking transistor TDI in a fully turned-on state as an example, the on-resistance of transistor TDI is very small, so that first reference voltage VR1 can be maintained at or close to 0 volt.

Then, in a second time interval PA2 after the first time interval PA1, the gate voltage control circuit 210 adjusts the equivalent resistance value provided by the transistor TDI by adjusting the gate voltage VG, so that the voltage difference VDS can be equal to the second reference voltage VR 2. In the present embodiment, the first reference voltage VR1 may be greater than the second reference voltage VR 2. However, in other embodiments of the present invention, the first reference voltage VR1 may be equal to or less than the second reference voltage VR2 without fixed limitation.

Referring to fig. 3B, fig. 3B is a partial enlarged view of a region Z1 in the waveform of fig. 3A according to the present invention. In a third time interval PA3 after the second time interval PA2, when the gate voltage control circuit 210 detects that the voltage difference VDS is increased from the second reference voltage VR2 to the third default threshold voltage VDS _ OFF (time point TP4), the gate voltage control circuit 210 adjusts the gate voltage VG so that the transistor TDI is turned OFF. In the present embodiment, the gate voltage control circuit 210 can adjust the gate voltage VG to a sufficiently low voltage value to turn off the transistor TDI.

In addition, referring to fig. 4, fig. 4 is a waveform diagram of a rectifying device according to another embodiment of the present invention. In fig. 4, when the gate voltage control circuit 210 detects that the voltage difference VDS rises to the third default threshold voltage VDS _ OFF in the first time interval PA1 and in the second time interval PA2, the gate voltage control circuit 210 adjusts the gate voltage VG so that the transistor TDI is turned OFF. Wherein the third default threshold voltage VDS OFF is adjustable. In the embodiment, the third default threshold voltage VDS _ OFF in the first time interval PA1 is greater than or equal to zero, and the third default threshold voltage VDS _ OFF in the second time interval PA2 may be less than or equal to zero.

Referring to fig. 2, fig. 5A and fig. 5B, wherein fig. 5A and fig. 5B are waveform diagrams of two different implementations of the rectifying device according to the embodiment of the invention. In fig. 5A, the rectifying device 200 applied to the alternator is switched from the state S1 where the generating rectified current is greater than 0 ampere to the state S2 where the generating rectified current is equal to 0 ampere. After the gate voltage control circuit 210 detects the time point TP1 when the voltage difference VDS drops to be equal to the first default threshold voltage Vx, the gate voltage control circuit 210 counts the first time interval PA 1. At a time point TP2 after a period of time TP1, the gate voltage control circuit 210 detects that the voltage difference VDS drops to be equal to the second default threshold voltage VDS _ ON. The gate voltage control circuit 210 provides the gate voltage VG at a time point TP2 to make the transistor TDI be fully turned on. After the time point TP3 when the first time interval PA1 ends, the gate voltage control circuit 210 performs the counting operation for the second time interval. In the present embodiment, the time length of the time interval PTON during which the transistor TDI is completely turned on is smaller than the time length of the first time interval PA 1.

In fig. 5B, a time point TP2 when the gate voltage control circuit 210 detects that the voltage difference VDS is decreased to be equal to the second default threshold voltage VDS _ ON overlaps with a time point TP3 when the first time interval PA1 ends (or a time point TP2 is later than a time point TP 3). Therefore, in the present embodiment, the transistor TDI will not be fully turned on.

As can be seen from the embodiment of fig. 5B, when the time point TP2 occurs when the voltage difference VDS drops to be equal to the second default threshold voltage VDS _ ON, the gate voltage control circuit 210 can avoid completely turning ON the transistor TDI at a relatively later time point in the time interval of the negative half-wave of the voltage difference VDS. Therefore, the possibility of generating a reverse current due to the voltage difference VDS starting to be pulled up when the transistor TDI is completely turned on can be effectively avoided.

Referring to fig. 6, fig. 6 is a schematic diagram of a gate voltage control circuit according to an embodiment of the invention. The gate voltage control circuit 600 includes an operational amplifier OP1, a switch SW1, and a switch SW 2. The operational amplifier OP1 receives the voltage difference VDS and an adjustment voltage as the second reference voltage VR2, and generates a gate voltage VG at the output terminal OT according to the control signal EN _ OPA to drive a corresponding transistor. In addition, the operational amplifier OP1 receives the power supply VA as an operating power supply and receives the voltage VSS as a ground reference. The switch SW2 is connected in series between the operation voltage VH and the output terminal OT. The switch SW2 is turned on or off according to the control signal EN _ SW 2. The switch SW1 is connected in series between the ground voltage VSS and the output terminal OT. The switch SW1 is turned on or off according to the control signal EN _ SW 1.

In operation details, the gate voltage control circuit 600 disables the operational amplifier OP1 by the control signal EN _ OPA and turns on the switch SW2 by the control signal EN _ SW2 to pull up the gate voltage VG to the operating voltage VH at a time point when the voltage difference VDS is less than the second default threshold voltage in the first time interval. At the same time, the switch SW1 is turned off according to the control signal EN _ SW 1. Then, in a second time interval after the first time interval, the gate voltage control circuit 600 turns off the switches SW2 and SW1 by the control signals EN _ SW2 and EN _ SW1, respectively, and turns on the operational amplifier OP1 by the control signal EN _ OPA. In the second time interval, the operational amplifier OP1 provides the gate voltage VG at the output terminal OT by controlling the voltage difference VDS to be equal to the second reference voltage VR 2. Next, in a third time interval, the gate voltage control circuit 600 turns off the switch SW2 and disables the operational amplifier OP1 by controlling the signals EN _ SW2 and EN _ OPA, respectively. In the third time interval, the gate voltage control circuit 600 controls the signal EN _ SW1 to turn on the switch SW 1. With switch SW1 turned on, the gate voltage VG is pulled low to equal the ground voltage VSS and the corresponding driven transistor is turned off.

In the above embodiments, the control signals EN _ OPA, EN _ SW1 and EN _ SW2 can be generated by providing a control signal generator in the gate voltage control circuit 600. Referring to fig. 7, a schematic diagram of an embodiment of a signal generator in a gate voltage control circuit according to an embodiment of the present invention is shown. In fig. 7, the control signal generator 700 is configured to compare the voltage difference VDS with the first voltage Vx (i.e., equivalent to the first default threshold voltage) to generate a first comparison result CMP1, and compare the voltage difference VDS with the second voltage Vy or the third voltage Vz to generate a second comparison result CMP 2. The control signal generator 700 generates the control signals EN _ SW1, EN _ SW2 and EN _ OPA according to the first comparison result CMP1 and the second comparison result CMP 2. The first voltage Vx ≧ the third voltage Vz ≧ the second voltage Vy ≧ the second default threshold voltage (e.g., the second default threshold voltage VDS _ ON in the embodiment of FIG. 3A), and the third voltage Vz ≧ the third default threshold voltage (e.g., the third default threshold voltage VDS _ OFF in the embodiment of FIG. 3A).

In implementation details, the control signal generator 700 includes a multiplexer 710,

comparators

720 and 730, counters 740 and 750, a calculator 760 and a logic circuit 770. The multiplexer 710 receives the second voltage Vy and the third voltage Vz, and selectively provides the second voltage Vy or the third voltage Vz to the counter 740 according to the second comparison result CMP 2. The comparator 730 receives the voltage difference VDS and the first voltage Vx for starting the counting operation of the counter 750 according to the comparison result CMP1 when the voltage difference VDS decreases to be equal to the first voltage Vx. The counter 750 receives the count range value RG from the calculator 760, and counts a first time interval according to the count range value RG based on the frequency signal CLK. The comparator 720 is coupled to the multiplexer 710 and compares the voltage difference VDS with the voltage at the output terminal of the multiplexer 710. In the initial state, the multiplexer 710 selectively outputs the second voltage Vy to the comparator 720, and the comparator 720 compares the second voltage Vy with the voltage difference VDS and enables the counter 740 to start counting when the voltage difference VDS is equal to the second voltage Vy. After the counting operation of the counter 740 is started, the multiplexer 710 selectively outputs the third voltage Vz to the comparator 720. The comparator 720 stops the counter 740 from counting when the voltage difference VDS is equal to the third voltage Vz, and finishes counting. In the present embodiment, the counter 740 is used for counting the time length of the negative half-wave of the voltage difference VDS, which is approximately equal to the sum of the time of the first time interval and the time of the second time interval.

On the other hand, the calculator 760 receives the time length of the negative half-wave of the voltage difference VDS calculated by the counter 740, and multiplies the received time length by the parameter α to generate the count range value RG. In the present embodiment, the parameter α is a preset value smaller than 1.

In addition, in the embodiment of the present invention, the logic circuit 770 is coupled to the

counters

740 and 750. When the second voltage Vy is equal to the second default threshold voltage and the third voltage Vz is equal to the third default threshold voltage, the logic circuit 770 performs a logic operation according to the counting results of the

counters

740 and 750 and the start or stop states of the counting operation, and generates the control signals EN _ OPA, EN _ SW1 and EN _ SW 2. To be specific, the logic circuit 770 can determine whether the first time interval is reached according to whether the counting operation of the counter 750 is completed. If the counting operation of the counter 750 is enabled and not completed, and the counter 740 is enabled, the logic circuit 770 may enable the control signal EN _ SW 2. If the counting operation of the counter 750 is completed, the counting operation of the counter 740 is enabled and the unfinished logic circuit 770 may enable the control signal EN _ OPA. In addition, if the counting operation of the counter 740 is stopped, the logic circuit 770 may enable the control signal EN _ SW 1. At most one of the control signals EN _ SW1, EN _ SW2, and EN _ OPA is enabled.

ON the other hand, in the embodiments of fig. 6 and 7, the second reference voltage VR2, the first default threshold voltage Vx, the second default threshold voltage VDS _ ON, and the third default threshold voltage VDS _ OFF may be generated by providing a voltage generator in the gate voltage control circuit 600. Referring to fig. 8, fig. 8 is a schematic diagram illustrating a voltage generator in a gate voltage control circuit according to an embodiment of the invention. In fig. 8, the voltage generator 810 receives the operation power VHH and performs a voltage adjustment operation according to the operation power VHH to generate the second reference voltage VR2, the first default threshold voltage Vx, the second default threshold voltage VDS _ ON, and the third default threshold voltage VDS _ OFF. The operation power supply VHH has a relatively high voltage value, and the voltage VSS is the ground voltage. The voltage generator 810 may be a low drop-out (LDO) voltage regulator, or any other type of voltage regulating circuit known to those skilled in the art, without limitation. The first default threshold voltage Vx, the second default threshold voltage VDS _ ON, and the third default threshold voltage VDS _ OFF generated by the voltage generator 810 can be respectively used to implement the first voltage Vx, the second voltage Vy, and the third voltage Vz in the embodiment of fig. 7.

Referring to fig. 9, fig. 9 is a schematic diagram of an alternator according to an embodiment of the present invention. The alternator 900 includes a rotor RT, a stator ST, and a plurality of rectifying devices 911-932. In the present embodiment, the stator ST generates a plurality of phase voltages VU, VV and VW. The phase voltages VU, VV, and VW are supplied to a plurality of

rectifier circuits

910, 920, and 930 of different phases, respectively. The rectifying circuit 910 includes rectifying

devices

911 and 912 coupled in series, the rectifying circuit 920 includes rectifying

devices

921 and 922 coupled in series, and the rectifying circuit 930 includes rectifying

devices

931 and 932 coupled in series. In the present embodiment, the alternator 900 further includes a resistor R1 (equivalent resistance of the equivalent load or the equivalent charging battery) and a capacitor C1 (equivalent charging capacitor) coupled in parallel to generate a rectified output voltage close to dc.

The rectifying devices 911-932 in the present embodiment can be implemented by applying the rectifying device 200 of the previous embodiment. The details of the foregoing embodiments have been described in detail, and are not repeated herein.

According to the above, the rectifying device of the present invention starts counting the first time interval according to the first default threshold voltage, and determines whether the voltage difference between the input voltage and the rectified voltage is decreased to be equal to the second default threshold voltage in the first time interval to determine whether the transistor is completely turned on. Therefore, the transistor can be prevented from being completely turned on at a too late time point, and the voltage difference can be prevented from starting to rise to generate reverse current when the transistor is completely turned on. Ensuring the system can operate normally.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A fairing, comprising:

a transistor having a first terminal receiving an input voltage, a second terminal generating a rectified voltage, and a control terminal receiving a gate voltage; and

a gate voltage control circuit coupled to the transistor to generate the gate voltage according to a voltage difference between the input voltage and the rectified voltage,

wherein the gate voltage control circuit determines whether the voltage difference is less than a second default threshold voltage to determine whether to provide the gate voltage to turn on the transistor in a first time interval after the voltage difference is reduced to be equal to a first default threshold voltage, wherein the voltage difference is substantially equal to a first reference voltage when the transistor is turned on; the gate voltage control circuit adjusts the gate voltage to make the voltage difference substantially equal to a second reference voltage in a second time interval after the first time interval.

2. The rectifying device of claim 1, wherein the first default threshold voltage is greater than the second default threshold voltage, the first reference voltage is greater than, less than, or equal to the second reference voltage.

3. The rectifying device as claimed in claim 1, wherein the gate voltage is provided to turn on the transistor when the gate voltage control circuit determines that the voltage difference is once less than the second default threshold voltage during the first time interval.

4. The rectifying device of claim 1, wherein the gate voltage is provided to turn off the transistor when the gate voltage control circuit determines that the voltage difference is not less than the second default threshold voltage within the first time interval.

5. The rectifying device as claimed in claim 1, wherein the gate voltage control circuit adjusts the gate voltage to turn off the transistor when the voltage difference rises from the second reference voltage to a third default threshold voltage in a third time interval after the second time interval.

6. The rectifying device of claim 5, wherein the gate voltage control circuit comprises:

the operational amplifier receives the voltage difference and the adjusting voltage and generates the grid voltage at an output end according to a first control signal;

a first switch connected in series between a ground voltage and the output terminal and turned on or off according to a second control signal; and

a second switch connected in series between the operating voltage and the output terminal and turned on or off according to a third control signal,

wherein the adjustment voltage is equal to the second reference voltage.

7. The rectifying device of claim 6, wherein the gate voltage control circuit further comprises:

a control signal generator for comparing the voltage difference with a first voltage to generate a first comparison result, comparing the voltage difference with a second voltage or a third voltage to generate a second comparison result, and generating the first control signal, the second control signal, and the third control signal according to the first comparison result and the second comparison result,

wherein the first voltage is equal to or greater than the third voltage is equal to or greater than the second default threshold voltage, the third voltage is equal to or greater than the third default threshold voltage, and the first voltage is equal to the first default threshold voltage.

8. The rectification apparatus according to claim 7, wherein said control signal generator comprises:

a first comparator for generating the first comparison result according to the comparison between the voltage difference and the first voltage;

the first counter counts the first time interval according to the first comparison result and a counting range value based on a frequency signal;

a multiplexer for selecting the second voltage or the third voltage to output according to the second comparison result;

a second comparator for comparing the output of the multiplexer with the voltage difference to generate a second comparison result; and

a second counter, performing a counting operation according to the second comparison result based on the frequency signal to generate a counting result, wherein the counting result represents a sum of the frequent lengths of the first time interval and the second time interval;

a calculator coupled between the first counter and the second counter, for multiplying the counting result by a parameter to generate the counting range value; and

a logic circuit coupled to the first counter and the second counter for generating the first control signal, the second control signal and the third control signal according to the first time interval and the counting result.

9. The rectification device of claim 8, wherein the second counter initiates the counting action when the voltage difference drops to equal the second voltage and stops the counting action when the voltage difference rises to equal the third voltage.

10. The rectifying device of claim 7, wherein the gate voltage control circuit further comprises:

a voltage generator for generating the first default threshold voltage, the second default threshold voltage, the third default threshold voltage, the second voltage, the third voltage, and the second reference voltage according to an operation power.

11. A fairing, comprising:

wherein the gate voltage control circuit determines whether the voltage difference is less than a second default threshold voltage to determine whether to provide the gate voltage to turn on the transistor within a first time interval after the voltage difference decreases to be equal to a first default threshold voltage, wherein when the transistor is turned on, the gate voltage is adjusted to turn off the transistor within the first time interval and a second time interval after the first time interval when the voltage difference increases to a third default threshold voltage, wherein:

during the first time interval, the third default threshold voltage is greater than or equal to zero; and

during the second time interval, the third default threshold voltage is less than or equal to zero.

12. The rectifying device of claim 11, wherein the gate voltage control circuit comprises:

a first switch connected in series between a ground voltage and the output terminal and turned on or off according to a second control signal;

a second switch connected in series between the operating voltage and the output terminal and turned on or off according to a third control signal; and

13. An alternator comprising:

a rotor;

a stator coupled to the rotor and generating a plurality of alternating voltages; and

a plurality of the rectifying devices as claimed in any one of claims 1 to 12, each of the rectifying devices receiving a corresponding alternating voltage as the input voltage, the plurality of rectifying devices collectively generating the rectified voltage.