CN114497190B - Semiconductor device with non-uniformly distributed space life and manufacturing method - Google Patents
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- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 230000001276 controlling effect Effects 0.000 description 2
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- 239000012535 impurity Substances 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
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- 229910052710 silicon Inorganic materials 0.000 description 2
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- 230000000903 blocking effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- -1 helium ions Chemical class 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 230000003446 memory effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66363—Thyristors
- H01L29/66386—Bidirectional thyristors
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Abstract
The invention provides a semiconductor device with non-uniform spatial lifetime distribution, wherein the minority carrier lifetime under a cathode is lower than the minority carrier lifetime under a gate. The semiconductor device with the unevenly distributed space service life and the manufacturing method thereof optimize the distribution density of the electric field of the turn-off transient state by optimizing the distribution density of the steady-state current carriers, and improve the turn-off current capability of a single unit cell, thereby improving the safe working area of the device.
Description
Technical Field
The invention belongs to the technical field of semiconductor devices, and particularly relates to a semiconductor device with non-uniformly distributed space service life and a manufacturing method thereof.
Background
With the rapid development of distributed renewable energy and the urgent need for the reliability of power transmission and distribution systems, the control intelligence and power electronics of power equipment have become recognized development trends. Power electronic devices are widely used in ac/dc converters, dc transformers, dc circuit breakers, fan converters, photovoltaic inverters, etc., and Integrated Gate-Commutated thyristors (IGCTs) also become a new focus in low-frequency high-capacity applications by virtue of their characteristics of low cost, small conduction loss, high reliability, etc.
To further exploit the potential of IGCT in high-volume applications, discussion of device optimization from the standpoint of meeting the overall performance requirements of multiple key parameters at the same time has been a research focus of industry workers. Among these, the maximum off-current capability is a very important parameter, directly affecting the cost and losses of the application.
The macroscopic performance parameters of the IGCT device are determined by microscopic characteristic parameters such as carrier concentration, service life, impact ionization coefficient, surface recombination rate and the like, so that the method for modulating the macroscopic performance by regulating and controlling the microscopic characteristics is a more effective and more targeted means. Among them, the minority carrier (i.e., minority carrier) lifetime is one of the selectable control targets. Because the minority carrier lifetime directly influences the motion state and the law of minority carriers, the modulation range of the minority carrier lifetime regulation and control on the characteristic parameters of the device is wider and the sensitivity is higher.
At present, the basic methods for controlling the minority carrier lifetime of a power semiconductor device mainly comprise two methods: the method is characterized in that firstly, deep-level impurity thermal diffusion is introduced into a silicon forbidden band, and secondly, high-energy particle bombardment for generating lattice damage in crystals is generated. The impurities represented by gold and platinum are subjected to thermal diffusion and high-energy electron irradiation to form uniform defects in the wafer, and the minority carrier lifetime can be integrally controlled, so that the regulation and control effects on the power semiconductor device are single. Light ion irradiation is the only technology which can realize local control of minority carrier lifetime at present, and mainly comprises protons and helium ions; the proton quality is lighter and the proton accelerator technology is more mature in China. Therefore, proton irradiation is the most effective means for realizing local control of minority carrier lifetime of the device and customizing and modulating the performance parameters of the power semiconductor device with the highest degree of freedom. Meanwhile, the multi-dimensional adjustment of the space life of the semiconductor device can be realized by combining with the electron irradiation.
Patent application JP2004288680A proposes a crimp type semiconductor device which can particularly improve the reverse blocking breakdown voltage characteristic or the reverse recovery characteristic of a thyristor. 5 embodiments are presented, 2 of which are relevant for lifetime control.
Among them, the third embodiment describes three local lifetime control regions, which are also typical control regions for proton irradiation, and improves the reverse recovery characteristics of the device by introducing multi-level proton irradiation defects near the cathode side, the middle, and the anode side in the N-base region. As shown in fig. 1, a plurality of lifetime control regions are formed inside the N-type layer of the semiconductor substrate 10 substantially parallel to the substrate surface. In the lifetime control region, a deep level is formed in the semiconductor forbidden band by intentionally introducing crystal defects by irradiation of protons or the like, so that residual carriers can be quickly eliminated at the time of shutdown. Here, three lifetime control regions are formed, and the first lifetime control region 31 closest to the second diffusion layer 12 and the third diffusion layer 13 is a second diffusion layer, and preferably a region having a short lifetime. The second lifetime controlled region 32 is second closer than the second lifetime controlled region 12 and the third diffusion layer 13. In addition, the lifetime of the first lifetime control region 31 is preferably the shortest among the lifetime control regions. The fourth embodiment controls the lifetime of the edge BV structure part to reduce the current density of the edge part, concentrate the current in the central active region, and improve the operating temperature, as shown in fig. 2.
Patent CN103065950B (a method for improving the horizontal non-uniform electron irradiation of the GCT chip safe working area) proposes a horizontal non-uniform electron irradiation method for improving the GCT chip safe working area, mainly using a composite alloy baffle, performing secondary irradiation on the GCT chip by utilizing the non-uniformity of the electron irradiation traditional composite alloy baffle, and by reducing the minority carrier lifetime of the gate bar, reducing the redistribution effect of the current in the GCT turn-off process, improving the whole GCT chip safe working area, and the like. This patent utilizes electron irradiation, optimizes the holistic homogeneity of chip, and then improves the shutoff current ability.
Currently, semiconductor devices are improved by irradiation technology, mainly to optimize turn-off loss and reverse recovery loss, and although the lateral non-uniform electron irradiation (for example, irradiating the outer ring of the chip) at the chip level can improve the safe operating area, the voltage drop is obviously increased, and further, the turn-on loss of the device in application is increased. Therefore, how to significantly improve the turn-off capability of the semiconductor device and avoid the great influence on other characteristic parameters is an urgent technical problem to be solved.
Disclosure of Invention
In order to solve the problems, the invention provides a semiconductor device with non-uniformly distributed space life and a manufacturing method thereof, which can weaken two-dimensional storage effect by reducing the minority carrier life of the region below a cathode, increase the carrier concentration below a gate pole, further optimize electric field distribution in the turn-off process, accelerate the recombination of electron-hole pairs generated by avalanche and improve the turn-off capability. This configuration minimizes the effect of irradiation on other parameters such as pressure drop. The structure can be used for, but not limited to, asymmetric IGCT and reverse-resistance IGCT, and is also suitable for other symmetric and asymmetric power devices, such as thyristors, IGBTs (Insulated Gate Bipolar transistors) and the like.
A semiconductor device with non-uniform spatial lifetime distribution, wherein the minority carrier lifetime under the cathode is lower than the minority carrier lifetime under the gate.
Further, the minority carrier lifetime under the cathode is uniform in longitudinal distribution.
Further, minority carrier lifetime under the cathode is longitudinally distributed non-uniformly;
the maximum minority carrier lifetime under the cathode is not more than the minority carrier lifetime under the gate.
Further, an A1 area and an A2 area are longitudinally distributed below the cathode, wherein the A1 area is arranged between the A2 area and the cathode;
the minority carrier lifetime of the A1 region is not more than the minority carrier lifetime under the gate electrode;
the minority carrier lifetime of the A2 region is smaller than the minority carrier lifetime of the A1 region.
Further, an A2 area and a plurality of A1 areas are longitudinally distributed below the cathode, wherein the A1 area, the A2 area and the A1 area are sequentially arranged from the cathode to the anode;
the minority carrier lifetime of the A1 region is not more than the minority carrier lifetime under the gate electrode;
the minority carrier lifetime of the A2 region is less than the minority carrier lifetime of the A1 region.
Further, a first area with uniformly distributed minority carrier lifetime is arranged below the cathode, and the width of the first area is less than 400um.
Further, the width of the A2 area is less than 400um, the height is less than 200um, and the distance from the A2 area to the cathode side is less than 600um.
Further, the width of the A2 area is the same as the width of the cathode; and/or
The height of the A2 area is 20-40um; and/or
The A2 area is 200-300um away from the cathode side.
Further, the semiconductor device is an IGCT, thyristor or IGBT.
The invention also provides a manufacturing method of the semiconductor device with the non-uniform distribution of the space life, and the semiconductor device is formed by electron irradiation and/or proton irradiation.
The semiconductor device with the unevenly distributed space service life and the manufacturing method thereof optimize the distribution density of the electric field of the turn-off transient state by optimizing the distribution density of the steady-state current carriers, and improve the turn-off current capability of a single unit cell, thereby improving the safe working area of the device. Furthermore, proton irradiation defects are distributed in a certain depth range below the cathode, so that the conduction voltage drop of the device is hardly influenced while a safe working area is optimized.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
Fig. 1 shows a longitudinal sectional view of a third embodiment of a crimp-style semiconductor device according to the prior art;
fig. 2 shows a longitudinal sectional view of a crimp-type semiconductor device according to the prior art;
FIG. 3 shows a schematic diagram of a GCT single cell structure according to an embodiment of the invention;
FIG. 4 illustrates a schematic diagram of a cell structure of a semiconductor device with uniformly distributed spatial lifetime, according to an embodiment of the invention;
FIG. 5 shows a schematic view of localized electron irradiation according to an embodiment of the present invention;
fig. 6 is a schematic diagram illustrating a lifetime non-uniform distribution semiconductor device cell structure according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
A semiconductor device with non-uniformly distributed space life and a manufacturing method thereof. The semiconductor device may be an asymmetric IGCT, a reverse-resistance IGCT, or other symmetric and asymmetric power devices, such as a thyristor, an IGBT, etc. The following description will be made by taking a Gate Commutated Thyristor (GCT) as an example.
The GCT chip is composed of thousands of unit cells, wherein the single unit cell structure is exemplarily shown in fig. 3, and the division is detailed according to the doping concentration, from the cathode to the anode, respectively: the N + emitter, the p base region, the N-base region, the N buffer region and the p + emitter are all three PN junctions J1, J2 and J3 (namely the boundary line of the p-type doped region and the N-type doped region in the semiconductor). In a conducting state, current flows from the anode to the cathode, a current path passes through the PNPN four-layer structure, and the on-state mode is very similar to that of a thyristor; and applying back pressure to the cathode of the gate in the turn-off process, starting to convert the current of the cathode to the gate, and after the conversion is finished, allowing the current to flow from the anode to the gate and pass through the PNP three-layer structure to prepare for the turn-off process in the transistor mode.
Since the GCT chip adopts the height of the cathode and the gateThe structure of staggered distribution, and the height of cathode and gate electrode is not equal, therefore it is inaccurate to describe with the one-dimensional model under the conducting state, the current density is greater below the cathode than below the gate electrode, namely there is two-dimensional memory effect. According to the Poisson equation, the electric field intensity E and the space carrier density in the turn-off process
Related, as shown in formula (1). Wherein the carrier density comprises space charge forming current
And doping the substrate with charges
. The stored charges in the N base region are continuously swept away in the process of expanding the depletion layer, and the electric field intensity below the cathode is high due to the fact that the density of the stored charges below the cathode is high, the current density below the cathode is high in the process of sweeping the carriers of the N base region, and space charges brought by the current.
Wherein,
is the dielectric constant of silicon and q is the unit charge.
Therefore, the uneven distribution of current density in a steady state directly causes uneven distribution of electric field intensity in the turn-off process, if the electric field intensity below the cathode is larger, when hole electron pairs generated by dynamic avalanche flow from the cathode to the gate, the transverse voltage drop in the body is further increased, and turn-off failure is easily caused.
In the conventional structure, the minority carrier lifetime in the chip is consistent. In the semiconductor device with non-uniform spatial lifetime distribution, each cell structure can be divided into two parts, i.e., a region a and a region B, wherein the region a is a low lifetime region (first region), the region B is a high lifetime region (second region), as shown in fig. 4, the first region is a region below a cathode and longitudinally distributed from the cathode to the anode, and the second region is a region below a gate and longitudinally distributed from the gate to the anode. The region A and the region B have the following characteristics:
1. the minority carrier lifetime of the region A can be uniformly distributed, and the minority carrier lifetime of the region A is lower than that of the region B; or non-uniformly distributed, and the maximum minority carrier lifetime is not more than the B region;
2. the width of the A area is 0-400um (not including 0 um), and the typical width is the same as the width of the cathode and is about 200um;
3. the minority carrier lifetime of the B region can be the original lifetime, i.e. no additional irradiation defects are introduced, or uniform irradiation defects can be introduced, but the minority carrier lifetime is still longer than that of the A region;
in the semiconductor device with the unevenly distributed space life, because the life of the area A is lower, the diffusion length of the carrier is shorter, and the carrier concentration of the area in the on state is reduced and even lower than that of the area B. The electric field intensity below the gate electrode is higher than that below the cathode in the process of establishing the electric field, so that the electron hole pairs generated by the dynamic avalanche directly flow to the gate electrode, the transverse voltage drop in the chip body cannot be additionally increased, and the current turn-off capability is further increased.
In order to form an area A with uniformly distributed minority carrier lifetime, additional defects can be introduced into the area A through electron irradiation (non-uniform electron irradiation) of an additional baffle plate, so that the minority carrier lifetime of the area A is shorter than that of the area B, as shown in fig. 5, after the baffle plate is additionally arranged above a gate pole, electron irradiation is carried out on unit cells, and the minority carrier lifetime below a cathode is reduced.
In other embodiments, the minority carrier lifetime of the a region is non-uniformly distributed, illustratively, the a region is longitudinally divided into a plurality of A1 regions and A2 regions that are staggered. Where "A1", "A2", "A" are used only to identify regions of different parameter characteristics (e.g., average minority carrier lifetime). The A2 region introduces additional defects by proton irradiation, and as shown in fig. 6, the A1 region, the A2 region, and the A1 region are in this order from the cathode to the anode, and have the following characteristics:
1. the height H of the A2 region is 0-200um (excluding 0 um), more preferably 20-40um;
2. the width W of the A2 region is 0-400um (excluding 0 um), and the typical width is the same as the width of the cathode, about 200um;
3. the distance L from the A2 region to the cathode side is 0-600um (excluding 0 um), preferably 200-300um;
4. the lifetime of each A1 region may be the original minority carrier lifetime, or additional defects may be introduced by electron irradiation as described above;
5. the lifetime of the B region can be the original minority carrier lifetime, and additional defects can also be introduced through uniform (baffle-free) electron irradiation;
6. the three zone lifetimes should be B > = A1> A2.
In another embodiment, the A1 region and the A2 region may be provided in this order from the cathode to the anode.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (6)
1. A semiconductor device with non-uniform spatial lifetime distribution, wherein the minority carrier lifetime below the cathode is lower than the minority carrier lifetime below the gate;
the minority carrier lifetime longitudinal distribution under the cathode is non-uniform;
the maximum value of the minority carrier lifetime below the cathode is not more than the minority carrier lifetime below the gate electrode;
an A1 area and an A2 area are longitudinally distributed below the cathode, wherein the A1 area is arranged between the A2 area and the cathode;
the minority carrier lifetime of the A1 region is not more than the minority carrier lifetime below the gate electrode;
the minority carrier lifetime of the A2 region is less than that of the A1 region;
wherein the A2 region introduces additional defects by proton irradiation;
the A1 region introduces additional defects by electron irradiation.
2. The semiconductor device according to claim 1, wherein an A2 region and a plurality of A1 regions are longitudinally distributed below the cathode, wherein the A1 region, the A2 region and the A1 region are sequentially arranged from the cathode to the anode;
the minority carrier lifetime of the A1 region is not more than the minority carrier lifetime below the gate electrode;
the minority carrier lifetime of the A2 region is less than the minority carrier lifetime of the A1 region.
3. The semiconductor device according to claim 2,
the width of A2 region is less than 400um, and the height is less than 200um, and the side distance to the cathode is less than 600um.
4. The semiconductor device according to claim 3,
the width of the A2 area is the same as that of the cathode; and/or
The height of the A2 area is 20-40um; and/or
The A2 area is 200-300um away from the cathode side.
5. The semiconductor device according to any one of claims 1 to 4,
the semiconductor device is an IGCT, a thyristor or an IGBT.
6. A method of manufacturing a semiconductor device with a non-uniform distribution of spatial lifetimes, characterized in that the semiconductor device as claimed in any of claims 1 to 5 is formed by electron irradiation and proton irradiation.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4165517A (en) * | 1977-02-28 | 1979-08-21 | Electric Power Research Institute, Inc. | Self-protection against breakover turn-on failure in thyristors through selective base lifetime control |
| EP0628991A1 (en) * | 1993-06-08 | 1994-12-14 | Kabushiki Kaisha Toshiba | Semiconductor device having reduced carrier lifetime and method of manufacturing the same |
| DE19711438A1 (en) * | 1997-03-19 | 1998-09-24 | Asea Brown Boveri | Thyristor with short turn-off time |
| CN104701162A (en) * | 2013-12-06 | 2015-06-10 | 江苏物联网研究发展中心 | Semiconductor device, PIN diode and IGBT manufacturing method |
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| JPS6432641A (en) * | 1987-07-29 | 1989-02-02 | Hitachi Ltd | Semiconductor device |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4165517A (en) * | 1977-02-28 | 1979-08-21 | Electric Power Research Institute, Inc. | Self-protection against breakover turn-on failure in thyristors through selective base lifetime control |
| EP0628991A1 (en) * | 1993-06-08 | 1994-12-14 | Kabushiki Kaisha Toshiba | Semiconductor device having reduced carrier lifetime and method of manufacturing the same |
| DE19711438A1 (en) * | 1997-03-19 | 1998-09-24 | Asea Brown Boveri | Thyristor with short turn-off time |
| CN104701162A (en) * | 2013-12-06 | 2015-06-10 | 江苏物联网研究发展中心 | Semiconductor device, PIN diode and IGBT manufacturing method |
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