CN114489235A - Chip frequency dynamic adjustment method and system for abnormal temperature processing - Google Patents
Chip frequency dynamic adjustment method and system for abnormal temperature processing Download PDFInfo
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- CN114489235A CN114489235A CN202210052416.2A CN202210052416A CN114489235A CN 114489235 A CN114489235 A CN 114489235A CN 202210052416 A CN202210052416 A CN 202210052416A CN 114489235 A CN114489235 A CN 114489235A
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- 230000009467 reduction Effects 0.000 abstract description 6
- 238000001816 cooling Methods 0.000 abstract description 5
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- 230000017525 heat dissipation Effects 0.000 description 6
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/20—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment
- H02H7/205—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment for controlled semi-conductors which are not included in a specific circuit arrangement
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention discloses a chip frequency dynamic adjustment method and a chip frequency dynamic adjustment system for abnormal temperature processing, and provides a hardware scheme for abnormal temperature processing. When the temperature is abnormal, the intervention of upper-layer software and bottom-layer firmware is not needed, the quick response can be carried out without waiting for interruption and stopping tasks, and the temperature is quickly reduced; by presetting two-stage weights, the control is flexible on the premise of ensuring effective cooling, and the influence on the performance of the chip is reduced as much as possible; the positive overshoot of the chip voltage can be effectively prevented through the two-stage frequency reduction, and the negative overshoot of the voltage can be effectively prevented through the two-stage frequency increase.
Description
Technical Field
The invention belongs to the field of chip temperature abnormity control, and particularly relates to a chip frequency dynamic adjustment method and system for abnormal temperature processing.
Background
The temperature control of the PCIe board card is mainly divided into active heat dissipation and passive heat dissipation, the active heat dissipation is that the board card is provided with a fan, the fan controls the rotating speed by PWM (pulse width modulation) waves generated by a chip, and the duty ratio of the PWM waves is related to the temperature so as to play a role in cooling. The passive heat dissipation is that the PCIe integrated circuit board itself does not have the fan, and the fan is located in the server system, carries out the unified control of fan by master control CPU, has polylith integrated circuit board usually in the server, for example 8, and master control CPU can read the chip temperature through outband BMC system, then unified adjustment server's fan system guarantees that the chip work is in normal operating temperature.
The above is normal temperature control, and the frequency and the load are in normal ranges. Once the temperature exceeds the normal range due to over-frequency or over-weight load, the abnormal state is entered, and the air cooling or water cooling for active heat dissipation or passive heat dissipation cannot handle the situation. The conventional exception handling is realized in a manner that the upper layer software is handed over, when the upper layer software receives the temperature exception interrupt, tasks are stopped, and the effect of load reduction is achieved, but the load reduction takes time, although the software can control the tasks not to be issued any more, the issued tasks are still running, the load is not immediately reduced, and the temperature exception or the abnormal temperature continues to rise. The other method is to give the system to a system control unit firmware, and when receiving an abnormal interrupt of temperature or by periodically detecting the temperature, the system adopts a corresponding processing strategy to control the frequency so as to reduce the temperature after finding that the temperature exceeds an Alert threshold (Talert) or a Prochot threshold (Tprochot), but in the software scheme, a period of time is required for intervention processing after receiving the interrupt or periodically detecting and sending a command, the temperature continues to rise in the period of time, and an over-temperature hidden danger exists, which may cause Thermaltrip, direct power off and field loss.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a chip frequency dynamic adjustment method and system for abnormal temperature processing, which realize a hardware scheme, provide a rapid protection mechanism when the temperature is abnormal, and balance the chip frequency performance when the temperature is abnormal on the premise of ensuring the chip temperature safety.
In order to achieve the purpose, the invention adopts the following technical scheme:
a chip frequency dynamic regulation method for abnormal temperature processing comprises the following steps:
step 1: the method comprises the steps that a plurality of groups of temperature sensors are arranged in a plurality of hot spot areas of a chip, temperature information of each hot spot area is sampled at regular time, and temperature digital representations obtained by converting the temperature information through an ADC (analog to digital converter) are transmitted to a temperature sensing controller;
step 2: the temperature sensing controller obtains the maximum value T in all temperature digital representations received at the same time through hardware statisticsmaxAnd respectively transmitting the maximum value to an Alert temperature comparator, a Prochot temperature comparator and a PLL controller;
and step 3: prochot temperature comparator compares TmaxAnd the set Prochot threshold value TprochotCompares and transmits the comparison result to the PLL controller, and at the same time, the Alert temperature comparator sends TmaxAnd a set Alert threshold TalertComparing and transmitting the comparison result to the PLL controller;
and 4, step 4: the PLL controller calculates the working frequency of the chip according to the comparison result of the Alert temperature comparator and the Prochot temperature comparator, and accordingly outputs a corresponding frequency division coefficient which controls the peripheral circuit of the PLL controller to perform glitch-free clock switching so as to adjust the working frequency of the chip.
Further, in the step 4,
if Tmax≤TprochotAnd Tmax≤TalertIf so, keeping the current frequency unchanged and not adjusting the frequency;
if Tmax≤TprochotAnd Tmax＞TalertEntering an Alert temperature exception processing and adjusting state machine according to a preset Alert weight WalertAdjusting and holding the frequency Fout＝Walert*Fori，FoutFor the operating frequency at which the chip should be placed, ForiThe working frequency of the chip before adjustment; then continuing to acquire T at the next momentmaxIf T at the next timemax≥Talert–Ta_s_marginStill maintaining Fout＝Walert*Fori，Ta_s_marginIs an Alert temperature capacityOtherwise, recover the frequency and hold Fout＝Fori；
If Tmax>TprochotEntering a Prochot temperature abnormity processing and adjusting state machine, and according to a preset Prochot weight WprochotAdjusting and holding the frequency Fout＝Wprochot*Fori(ii) a Then continuing to acquire T at the next momentmaxIf T at the next timemax≥Tprochot–Tp_s_marginStill maintain Fout＝Wprochot*Fori，Tp_s_marginAdjusting the output frequency F of the state machine for Prochot temperature tolerance, otherwise first reverting to Alert temperature exception handlingout＝Walert*ForiAnd then entering an Alert temperature exception handling adjustment state machine.
The frequency adjusting system based on the chip frequency dynamic adjusting method comprises a plurality of temperature sensors, a temperature sensing controller, an Alert temperature comparator, a Prochot temperature comparator and a PLL controller with a state machine; the temperature sensors are arranged in a plurality of hot spot areas of the chip and used for acquiring temperature information of each hot spot area at regular time and uploading the temperature information to the temperature sensor controller; the temperature sensing controller is used for setting a sampling time interval of temperature information, acquiring a maximum temperature value at the same moment through hardware statistics, and simultaneously uploading the maximum temperature value to the Alert temperature comparator, the Prochot temperature comparator and the PLL controller; the PLL controller is used for calculating the working frequency of the chip and outputting a corresponding clock signal to adjust the working frequency of the chip.
Compared with the prior art, the invention has the following technical effects: the hardware scheme for processing the abnormal temperature is provided, so that the intervention of upper-layer software and the intervention of bottom-layer firmware are not needed when the Alert occurs, the quick response can be carried out without waiting for interruption and stopping tasks, and the temperature is quickly reduced; two-stage weights are preset, so that the control is flexible and the influence on the performance of the chip is reduced as much as possible on the premise of ensuring effective cooling; the two-stage frequency reduction can effectively prevent positive overshoot of the voltage of the chip, and the two-stage frequency increase can also effectively prevent negative overshoot of the voltage.
Drawings
FIG. 1 is a diagram of a hardware system for exception temperature handling according to the present invention;
fig. 2 is a schematic flow chart of a method for dynamically adjusting the frequency of a chip according to the present invention.
Detailed Description
The present invention will now be described in further detail with reference to the accompanying drawings.
As shown in fig. 1, a dynamic frequency adjustment hardware system for abnormal temperature handling includes a plurality of sets of temperature sensors (T-sensors), temperature sensor controllers (T-sensor controllers), Alert temperature comparators (tall comparators), Prochot comparators (Tprochot comparators), and PLL controllers with state machines (PLL controllers).
The multiple groups of temperature sensors are dispersedly distributed in multiple hot spot areas of the chip to periodically sample hot spot temperature information in real time, digital representations are obtained through ADC conversion, and the digital representations are sent to the temperature sensor controller. The temperature sensing controller is used for converting regularly collected temperature sensing information and obtaining a maximum value T through hardware statisticsmaxThe maximum value will be input to both the Alert and Prochot temperature comparators and the PLL controller.
The Alert temperature comparator is used for comparing T from the temperature sensing controllermaxAnd a set Alert threshold temperature (T)alert) The comparison state is given to the subsequent PLL controller; the Prochot temperature comparator is used for comparing T from the temperature sensing controllermaxAnd a set Prochot threshold temperature (T)prochot) The comparison state will also be given to the subsequent PLL controller at the same time.
The PLL controller determines and sets the frequency division coefficient of the PLL through a control state machine according to the output states of the preorder Alert temperature comparator and the Prochot temperature comparator, and the frequency division coefficient directly controls a PLL peripheral circuit to perform glitch-free clock switching so as to adjust the working frequency of the chip. The frequency division coefficient output by the PLL controller is completely locked according to the hardware of the Alert temperature comparator and the Prochot temperature comparator, and the frequency feedback of temperature change can be realized in real time. The frequency division coefficient output by the PLL controller can be presetWeight WalertAnd WprochotThe output frequency is finely controlled, and the performance of the chip is not damaged as far as possible on the premise of ensuring the temperature safety.
As shown in fig. 2, the temperature sensor controller periodically collects the temperature sensor information in the distributed layout to obtain a maximum temperature value, and then compares the maximum temperature value with a preset Prochot temperature threshold value, if the maximum temperature value is less than TprochotThe next step is carried out and compared with a preset Alert temperature threshold value, and if the temperature is still less than TalertIf so, keeping the current frequency and not adjusting the frequency; if greater than TalertAdjusting the frequency and keeping the frequency, i.e. F, according to a preset weight of Alertout＝Walert*Fori，FoutFor the operating frequency at which the chip should be placed, ForiThe working frequency of the chip before adjustment is obtained; then the temperature sensor controller continues to acquire the temperature if the temperature is not less than Talert–Ta_s_marginStill maintain Fout＝Walert*Fori，Ta_s_marginFor Alert temperature tolerance, otherwise recover frequency and maintain Fout＝Fori。
In two temperature comparison stages, if the temperature is greater than TprochotEntering a Prochot temperature abnormity processing and adjusting state machine, adjusting the frequency by using a preset weight value of the Prochot and keeping, namely Fout＝Wprochot*ForiThen the temperature sensor controller continues to acquire the temperature if not less than Tprochot–Tp_s_marginStill maintaining Fout＝Wprochot*Fori，Tp_s_marginProchot temperature tolerance; if the temperature drops to Tprochot–Tp_s_marginThen, the frequency of the Alert is restored to Fout＝Walert*ForiThen go to the state machine for Alert temperature abnormal adjustment.
When hardware frequency reduction is carried out due to abnormal temperature, the frequency is reduced to the frequency corresponding to Alert and then reduced to the frequency corresponding to Prochot, instead of being reduced to the frequency corresponding to Prochot in one step, and forward overshoot caused by over-fast switching of chip current is prevented by fast frequency reduction step by step. When reverse hardware frequency rising is carried out after abnormal recovery, two-stage correspondence is also adopted, the frequency is firstly raised to the frequency corresponding to the Alert and then raised to the original normal frequency, the safety temperature margin of the frequency rising can be preset instead of being raised to the corresponding frequency in one step, and negative overshoot caused by the fact that the current of the chip is switched too fast is prevented by rapidly raising the frequency step by step.
The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above-mentioned embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention. It should be noted that modifications and embellishments within the scope of the invention may be made by those skilled in the art without departing from the principle of the invention.
Claims (3)
1. A chip frequency dynamic regulation method for abnormal temperature processing is characterized by comprising the following steps:
step 1: the method comprises the steps that a plurality of groups of temperature sensors are arranged in a plurality of hot spot areas of a chip, temperature information of each hot spot area is sampled at regular time, and temperature digital representations obtained by converting the temperature information through an ADC (analog to digital converter) are transmitted to a temperature sensing controller;
step 2: the temperature sensing controller obtains the maximum value T in all temperature digital representations received at the same time through hardware statisticsmaxAnd respectively transmitting the maximum value to an Alert temperature comparator, a Prochot temperature comparator and a PLL controller;
and step 3: prochot temperature comparator compares TmaxAnd the set Prochot threshold value TprochotCompares and transmits the comparison result to the PLL controller, and at the same time, the Alert temperature comparator sends TmaxAnd a set Alert threshold TalertComparing and transmitting the comparison result to the PLL controller;
and 4, step 4: the PLL controller calculates the working frequency of the chip according to the comparison result of the Alert temperature comparator and the Prochot temperature comparator, and accordingly outputs a corresponding frequency division coefficient which controls the peripheral circuit of the PLL controller to perform glitch-free clock switching so as to adjust the working frequency of the chip.
2. The method as claimed in claim 1, wherein in step 4, if T is greater than T, the chip frequency is dynamically adjustedmax≤TprochotAnd Tmax≤TalertIf so, keeping the current frequency unchanged and not adjusting the frequency;
if Tmax≤TprochotAnd Tmax＞TalertEntering an Alert temperature abnormity processing and adjusting state machine, and according to a preset Alert weight value WalertAdjusting and holding the frequency Fout＝Walert*Fori，FoutFor the operating frequency at which the chip should be placed, ForiThe working frequency of the chip before adjustment; then continuing to acquire T at the next momentmaxIf T at the next timemax≥Talert–Ta_s_marginStill maintain Fout＝Walert*Fori，Ta_s_marginFor Alert temperature tolerance, otherwise restore frequency and maintain Fout＝Fori；
If Tmax>TprochotEntering a Prochot temperature abnormity processing and adjusting state machine, and according to a preset Prochot weight WprochotAdjusting and holding the frequency Fout＝Wprochot*Fori(ii) a Then continuing to acquire T at the next momentmaxIf T at the next timemax≥Tprochot–Tp_s_marginStill maintain Fout＝Wprochot*Fori，Tp_s_marginAdjusting the output frequency F of the state machine for Prochot temperature tolerance, otherwise first reverting to Alert temperature exception handlingout＝Walert*ForiAnd then entering an Alert temperature exception handling adjustment state machine.
3. The frequency regulation system of the chip frequency dynamic regulation method according to claim 1 or 2, characterized by comprising a plurality of temperature sensors, a temperature sensing controller, an Alert temperature comparator, a Prochot temperature comparator and a PLL controller with a state machine; the temperature sensors are arranged in a plurality of hot spot areas of the chip and used for acquiring temperature information of each hot spot area at regular time and uploading the temperature information to the temperature sensor controller; the temperature sensing controller is used for setting a sampling time interval of temperature information, acquiring a maximum temperature value at the same moment through hardware statistics, and simultaneously uploading the maximum temperature value to the Alert temperature comparator, the Prochot temperature comparator and the PLL controller; the PLL controller is used for calculating the working frequency of the chip and outputting a corresponding clock signal to adjust the working frequency of the chip.
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Cited By (1)
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| CN117215394A (en) * | 2023-11-07 | 2023-12-12 | 北京数渡信息科技有限公司 | On-chip temperature and energy consumption control device for multi-core processor |
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