CN114446211A - Display panel driving method and display panel - Google Patents
Display panel driving method and display panel Download PDFInfo
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- CN114446211A CN114446211A CN202210224177.4A CN202210224177A CN114446211A CN 114446211 A CN114446211 A CN 114446211A CN 202210224177 A CN202210224177 A CN 202210224177A CN 114446211 A CN114446211 A CN 114446211A
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- 230000002159 abnormal effect Effects 0.000 claims abstract description 39
- 238000006243 chemical reaction Methods 0.000 claims description 17
- 238000013024 troubleshooting Methods 0.000 abstract description 7
- 238000007726 management method Methods 0.000 description 28
- 238000001514 detection method Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 239000004973 liquid crystal related substance Substances 0.000 description 3
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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Abstract
The invention discloses a display panel driving method and a display panel, and relates to the technical field of display panels. The display panel driving method includes: when the scanning driving circuit is detected to be in an abnormal state, setting the output state of the scanning driving circuit to be a high-resistance state; and providing a preset image data signal and a working voltage for the data driving circuit to enable the display panel to display an image corresponding to the image data signal. The driving method provided by the invention can display a preset image when the scanning driving circuit of the display panel is abnormal. Based on the method, a user or a tester can directly determine that the scanning driving circuit of the display panel is abnormal, so that the troubleshooting efficiency is improved.
Description
Technical Field
The invention relates to the technical field of display panels, in particular to a display panel driving method and a display panel.
Background
In the production or test process of the liquid crystal panel, the condition of black screen often occurs. Due to the fact that the reasons for the panel to be blacked are many, in order to further analyze the reasons for the blacked screen, all the lines in the panel need to be analyzed one by one, and therefore the reasons for the blacked screen are determined. For example, OCP (over current protection) protection is one of the reasons why the black screen may be generated. The purpose of OCP protection is to prevent the current in the panel from being too high (e.g., the CK signal line of a Gate On Array (GOA) circuit is shorted, which causes current rise), thereby burning the screen. To investigate this reason, the OCP protection of each signal line is turned off one by one, and whether to blank the screen is detected. If the panel still has a black screen after all the signal lines are tested, the reason for the black screen is not OCP protection, a large amount of time is wasted at the moment, and the test effect of the panel is reduced. Therefore, how to improve the efficiency of the display panel in the troubleshooting process is an urgent technical problem to be solved.
Disclosure of Invention
The invention mainly aims to provide a display panel driving method and a display panel, and aims to solve the technical problem that the display panel in the prior art is low in efficiency in the troubleshooting process.
In order to achieve the above object, the present invention provides a driving method of a display panel, the display panel includes a scan driving circuit and a data driving circuit, the driving method of the display panel includes:
when the scanning driving circuit is detected to be in an abnormal state, setting the output state of the scanning driving circuit to be a high-resistance state;
and providing a preset image data signal and a working voltage for the data driving circuit to enable the display panel to display an image corresponding to the image data signal.
Optionally, providing a preset image data signal and a working voltage to the data driving circuit, and enabling the display panel to display an image corresponding to the image data signal includes:
generating an image data signal according to a preset image, wherein the preset image is a single-color image;
and supplying an image data signal and an operating voltage to the data driving circuit to enable the display panel to display a single-color image.
Optionally, the operating voltage includes a common electrode voltage, a gamma operating voltage, and an analog voltage.
Optionally, the scan driving circuit includes a GOA circuit, the abnormal state includes an overcurrent state, and when the scan driving circuit in the display panel is detected to be in the abnormal state, the output state of the scan driving circuit is set to a high impedance state, including:
and when the GOA circuit is detected to be in an overcurrent state, setting the output state of the GOA circuit to be in a high-impedance state.
Optionally, when detecting that the GOA circuit is in an overcurrent state, setting an output state of the GOA circuit to a high impedance state includes:
detecting the current of a GOA signal input by the GOA circuit;
and when the current value of the GOA signal is greater than the set current value, judging that the GOA circuit is in an overcurrent state, and setting the output state of the GOA circuit to be a high-resistance state.
Optionally, the display panel includes a level shift circuit, and the level shift circuit is configured to provide a GOA signal to the GOA circuit according to the input gate-on voltage and gate-off voltage;
setting the output state of the GOA circuit to a high impedance state comprises:
and stopping supplying the grid opening voltage and the grid closing voltage to the level conversion circuit, so that the output state of the GOA circuit is in a high-impedance state.
In order to achieve the above object, the present invention further provides a display panel, including: the scanning driving circuit and the data driving circuit are connected with the pixel array, the system level chip is respectively connected with the data driving circuit and the power circuit, and the power circuit is respectively connected with the scanning driving circuit and the data driving circuit;
the power supply circuit is used for sending a fault signal to the system-level chip and stopping supplying power to the scanning driving circuit when the scanning driving circuit is detected to be in an abnormal state, so that the output state of the scanning driving circuit is in a high-resistance state;
and the system-level chip is used for providing a preset image data signal to the data driving circuit when receiving the fault signal so as to enable the display panel to display an image corresponding to the image data signal.
Optionally, the scanning driving circuit includes a GOA circuit, the abnormal state includes an overcurrent state, and the GOA circuit is connected to the pixel array and the power supply circuit respectively;
and the power supply circuit is also used for providing the GOA signal for the GOA circuit, detecting the current value of the GOA signal and judging that the GOA circuit is in an overcurrent state when the current value is greater than a set value.
Optionally, the power circuit includes a level shifter circuit and an integrated power management circuit, and the level shifter circuit is respectively connected to the GOA circuit and the integrated power management circuit;
an integrated power management circuit for providing a gate-on voltage and a gate-off voltage to the level shifter circuit;
the level conversion circuit is used for providing a GOA signal for the GOA circuit according to the grid opening voltage and the grid closing voltage;
the level switching circuit is also used for detecting the current value of the GOA signal, judging that the GOA circuit is in an overcurrent state when the current value is greater than a set value, and sending a fault signal to the integrated power management circuit and the system-on-chip;
and the integrated power management circuit is also used for stopping supplying the grid opening voltage and the grid closing voltage to the level conversion circuit when the fault signal is received.
Optionally, the image corresponding to the image data signal is a single color image.
In the invention, when the scanning driving circuit is detected to be in an abnormal state, the output state of the scanning driving circuit is set to be a high-resistance state; and then, providing a preset image data signal and a working voltage for the data driving circuit to enable the display panel to display an image corresponding to the image data signal. The driving method provided by the invention can display a preset image when the scanning driving circuit of the display panel is abnormal. Based on the method, a user or a tester can directly determine that the scanning driving circuit of the display panel is abnormal, so that the troubleshooting efficiency is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a flowchart illustrating a driving method of a display panel according to a first embodiment of the present invention;
FIG. 2 is a flowchart illustrating a second embodiment of a driving method for a display panel according to the present invention;
FIG. 3 is a schematic diagram of a driving structure of a display panel according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a display panel according to an embodiment of the invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 10 | |
40 | System-on-chip |
| 20 | |
50 | |
| 30 | Data driving circuit |
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions relating to "first", "second", etc. in the present invention are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a flowchart illustrating a display panel driving method according to a first embodiment of the present invention. The invention provides a first embodiment of a display panel driving method.
As shown in fig. 1, in the present embodiment, the display panel driving method includes:
step S10: and when the scanning driving circuit is detected to be in the abnormal state, setting the output state of the scanning driving circuit to be in a high-impedance state.
It is understood that the display panel generally includes a scan driving circuit and a data driving circuit, and the scan driving circuit and the data driving circuit are connected to the pixel array, the timing controller and the integrated power circuit. The scanning driving circuit is used for transmitting scanning signals to the pixel array under the control of the time schedule controller. The scan signal is used to turn on each row of pixels in the pixel array. The data driving circuit transmits data signals to the pixel array under the control of the timing controller. The data signal is used to charge each pixel in the pixel array when it is turned on, thereby deflecting the liquid crystal molecules corresponding to the pixel to display a corresponding image. The power supply circuit is used for supplying power to each part of circuit. For example, the power supply circuit may supply the scan driving circuit with a gate-on voltage VGH and a gate-off voltage VGL for turning on the pixels.
The display panel is usually provided with a protection mechanism, such as OCP (over current protection) protection. The OCP protection can protect the panel when the current in the display panel is too large, so that the panel is prevented from being burnt out, and the fault is prevented from being enlarged. Wherein the OCP protection may be performed by the power supply circuit. The power supply circuit can detect signals transmitted to the scanning driving circuit and the data driving circuit, and when the signal current of the scanning driving circuit is overlarge, the scanning driving circuit is judged to be in an abnormal state; when the signal current of the data driving circuit is too large, it is determined that the data driving circuit is in an abnormal state. The present embodiment is described mainly with respect to an abnormal state of the scan driving circuit.
Of course, the display panel may also be provided with other types of detection functions, such as a scan timing detection function. When the scan timing is abnormal, it may be determined that the scan driving circuit is in an abnormal state. The detection mode of the scan driving circuit may be set as required, and this embodiment mode is not limited to this.
It should be noted that the types of signals received by the scan driving circuit are different according to the driving architecture of the panel. For example, in some architectures of display panels, the signals received by the scan driving circuit may include STV (Start Vertical), CPV (Clock Pulse Vertical) and OE (Output Enable). For display panels of other architectures, the signals received by the scan driving circuit may include ST, CK, LC, VSS, and so on. When the power supply circuit detects that the current on any signal line is too large, the scanning driving circuit can be judged to be in an abnormal state.
In the present embodiment, in order to prevent damage due to an excessive current, it is necessary to cut off the current. Specifically, the output of the power supply circuit may be turned off, so that the scan driving circuit has no voltage input. At this time, the output state of the scan driving circuit is a high impedance state. The high-impedance state is neither high level nor low level, and if the high-impedance state is input into the next stage circuit, the high-impedance state has no influence on the next stage circuit.
Step S20: and providing a preset image data signal and a working voltage for the data driving circuit to enable the display panel to display an image corresponding to the image data signal.
It should be noted that, when the output state of the scan driving circuit is in the high impedance state, since the voltage of the scan line on the pixel array is not pulled down to VGL, the TFT (Thin Film Transistor) in the display panel is not completely turned off. Therefore, the data driving circuit can still charge the pixels. And because the current fault occurs at one side of the scanning driving circuit, the data driving circuit keeps working and does not enlarge the fault.
In a specific implementation, due to the limited charging capability of the pixels, a simple picture, such as a single-color image (yellow or green, etc.), can be set for the displayed image. The single color image is pre-stored in a memory as a preset image for extraction when needed. The main control chip of the display panel can extract the preset image when the scanning driving circuit is in an abnormal state, generate an image data signal according to the preset image, and then provide the image data signal for the data driving circuit to enable the display panel to display. Meanwhile, in order to make the data driving circuit operate normally, the power supply circuit is also made to supply operating voltages, such as common electrode voltage VCOM, Gamma operating voltage Gamma, analog voltage AVDD, and the like, to the data driving circuit.
In the present embodiment, the output state of the scan driving circuit is set to the high resistance state by detecting that the scan driving circuit is in the abnormal state; and then, providing a preset image data signal and a working voltage for the data driving circuit to enable the display panel to display an image corresponding to the image data signal. The driving method provided by the embodiment enables a preset image to be displayed when the scanning driving circuit of the display panel is abnormal. Based on the method, a user or a tester can directly determine that the scanning driving circuit of the display panel is abnormal, so that the troubleshooting efficiency is improved.
Referring to fig. 2, fig. 2 is a flow chart illustrating a display panel driving method according to a second embodiment of the present invention. Based on the first embodiment, the present invention provides a second embodiment of a display panel driving method.
Referring to fig. 3, fig. 3 is a schematic diagram of a driving structure of a display panel according to an embodiment of the present invention. The scanning driving circuit comprises GOA circuits which are arranged on two sides of the display area. Of course, the GOA circuit may be disposed only on one side of the display panel with a smaller size. An SOC (System on Chip) is used to realize control of the display panel. A data driving circuit is integrated On a Chip On Flex (COF) for driving the pixels in the display area. The integrated circuit management circuit is used for outputting voltages AVDD, HAVDD, Gamma and VCOM required by COF operation and VGH and VGL voltages required by level conversion circuit operation. The level shifter is used for boosting the gate-on voltage VGH and the gate-off voltage VGL provided by the integrated power management circuit to the voltage required by the GOA circuit.
In this embodiment, the detecting of the over-current state of the panel is mainly performed, and when the panel is over-current, the protecting and fault reporting of the panel are performed, and the step S10 may include:
step S11: and when the GOA circuit is detected to be in an overcurrent state, setting the output state of the GOA circuit to be in a high-impedance state.
The input signal of the GOA circuit comprises an ST/CK/LC/VSS signal; the number of CK signal lines for different GOA circuits is different, such as 4 or 8. Therefore, as the number of CK signal lines is larger, the risk of short-circuiting of the CK signal is higher. After the CK signal line is short-circuited, the current on the CK signal line will rise significantly, i.e., the GOA circuit enters an overcurrent state. Of course, the GOA circuit also enters an overcurrent state when the current on the ST/LC/VSS signal line is too high. Alternatively, when the current of the scanning signal output by the GOA circuit is too high, the GOA circuit also enters an overcurrent state.
Because the power supply of the GOA circuit is provided by the level conversion circuit, the current of the GOA signal input by the GOA circuit can be detected in order to check whether the GOA circuit is over-current; and when the current value of the GOA signal is greater than the set current value, judging that the GOA circuit is in an overcurrent state, and setting the output state of the GOA circuit to be a high-resistance state.
The GOA signal includes an ST/CK/LC/VSS signal. The level shifter circuit may also detect a current of the output GOA signal when the GOA signal is provided to the GOA circuit. And when detecting the overcurrent, the level conversion circuit feeds an overcurrent signal OCP-en back to the integrated power management circuit and the SOC, so that the integrated power management circuit and the SOC execute a corresponding control strategy. For the specific current detection method and structure, the existing mature technology, the specific value of the set current value can also be set according to the requirement, and this embodiment is not limited to this.
In addition, the integrated power management circuit can also detect the gate-on voltage VGH and the gate-off voltage VGL which are provided by the integrated power management circuit to the provided level shift circuit, and can also judge that the GOA circuit is in an overcurrent state when the current on the VGH signal line or the VGL signal line is too high.
In this embodiment, the process of setting the output state of the GOA circuit to the high impedance state may be: and stopping supplying the grid opening voltage and the grid closing voltage to the level conversion circuit, so that the output state of the GOA circuit is in a high-impedance state.
And the integrated power management circuit closes the output of the gate opening voltage VGH and the gate closing voltage VGL when receiving an overcurrent signal OCP-en fed back by the level conversion circuit or detecting that the VGH signal line or the VGL signal line is overcurrent. However, the integrated power management circuit still keeps the output of AVDD, HAVDD, Gamma and VCOM, and ensures the normal operation of the data driving circuit. Meanwhile, the SOC provides a data signal of a single-color image for the data driving circuit, so that the display panel displays the single-color image, and overcurrent protection of a GOA circuit in a panel of a user or a tester is improved.
In the embodiment, the display panel adopts a GOA architecture, and through detecting the GOA circuit and setting the output state of the GOA circuit to be a high-resistance state when the GOA circuit is detected to be in an overcurrent state, overcurrent protection is realized; meanwhile, the output of the integrated power management circuit to the data driving circuit is kept, the integrated power management circuit of the refrigerator improves the data signal of a single color image, so that the display panel displays the image, the effect of prompting a user or a tester is achieved, and the troubleshooting efficiency of the display panel is ensured.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a display panel according to an embodiment of the invention. In order to achieve the above object, the present invention further provides an embodiment of a display panel.
In the present embodiment, the display panel includes a pixel array 10, a scan driving circuit 20, a data driving circuit 30, a system on chip 40, and a power supply circuit 50. The scan driving circuit 20 and the data driving circuit 30 are both connected to the pixel array 10, the system-on-chip 40 is respectively connected to the data driving circuit 30 and the power circuit 50, and the power circuit 50 is respectively connected to the scan driving circuit 20 and the data driving circuit 30. A power supply circuit 50, configured to send a fault signal to the system-on-chip 40 when detecting that the scan driving circuit 20 is in an abnormal state, and stop supplying power to the scan driving circuit 20, so that the output state of the scan driving circuit 20 is in a high impedance state; the system on chip 40 is configured to provide a preset image data signal to the data driving circuit 30 when receiving the failure signal, so that the display panel displays an image corresponding to the image data signal.
The scan driving circuit 20 may transmit a scan signal to the pixel array 10. The scan signal is used to turn on each row of pixels in the pixel array 10. The data driving circuit 30 transmits a data signal to the pixel array 10. The data signal is used to charge each pixel in the pixel array 10 when the pixel is turned on, so that the liquid crystal molecules corresponding to the pixel are deflected to display a corresponding image. The power supply circuit 50 is used for supplying power to each part of the circuit. For example, the power supply circuit 50 may supply the scan driving circuit 20 with a gate-on voltage VGH and a gate-off voltage VGL for turning on the pixels, and supply the data driving circuit 30 with operating voltages AVDD, HAVDD, Gamma, VCOM, and the like.
The display panel is usually provided with a protection mechanism, such as OCP (over current protection) protection. The OCP protection can protect the panel when the current in the display panel is too large, so that the panel is prevented from being burnt out, and the fault is prevented from being enlarged. Wherein OCP protection may be performed by the power supply circuit 50. The power supply circuit 50 may detect signals transmitted to the scan driving circuit 20 and the data driving circuit 30, and determine that the scan driving circuit 20 is in an abnormal state when a signal current of the scan driving circuit 20 is excessive; when the signal current of the data driving circuit 30 is excessively large, it is determined that the data driving circuit 30 is in an abnormal state. The present embodiment is described mainly with respect to an abnormal state of the scan driving circuit.
Of course, the display panel may also be provided with other types of detection functions, such as a scan timing detection function. When the scan timing is abnormal, it may be determined that the scan driving circuit is in an abnormal state. The detection mode of the scan driving circuit 20 may be set as required, and the present embodiment is not limited thereto.
It should be noted that the type of the signal received by the scan driving circuit 20 is different according to the driving structure of the panel. For example, in a display panel of some architectures, the signals received by the scan driving circuit 20 may include STV (Start Vertical), CPV (Clock Pulse Vertical), and OE (Output Enable). For display panels of other architectures, the signals received by the scan driving circuit 20 may include signals ST, CK, LC, VSS, and so on. When the power supply circuit 50 detects that the current on any one of the signal lines is excessive, it can determine that the scan driving circuit 20 is in an abnormal state.
In this embodiment, the scan driving circuit 20 may include a GOA circuit, the abnormal state includes an overcurrent state, and the GOA circuit is connected to the pixel array 10 and the power supply circuit 50, respectively. The power circuit 50 is further configured to provide the GOA signal to the GOA circuit, detect a current value of the GOA signal, and determine that the GOA circuit is in an overcurrent state when the current value is greater than a set value.
The input signal of the GOA circuit comprises an ST/CK/LC/VSS signal; the number of CK signal lines for different GOA circuits is different, such as 4 or 8. Therefore, as the number of CK signal lines is larger, the risk of short-circuiting of the CK signal is higher. After the CK signal line is short-circuited, the current on the CK signal line will rise significantly, i.e., the GOA circuit enters an overcurrent state. Of course, the GOA circuit also enters an overcurrent state when the current on the ST/LC/VSS signal line is too high. Alternatively, when the current of the scanning signal output by the GOA circuit is too high, the GOA circuit also enters an overcurrent state.
In the present embodiment, in order to prevent damage due to an excessive current, it is necessary to cut off the current. Specifically, the output of the power supply circuit may be turned off, so that the scan driving circuit has no voltage input. At this time, the output state of the scan driving circuit is a high impedance state. The high-impedance state is neither high level nor low level, and if the high-impedance state is input into the next stage circuit, the high-impedance state has no influence on the next stage circuit.
In this embodiment, the power circuit 50 may include a level shifter circuit and an integrated power management circuit, and the level shifter circuit is connected to the GOA circuit and the integrated power management circuit, respectively. An integrated power management circuit for providing a gate-on voltage and a gate-off voltage to the level shifter circuit; the level conversion circuit is used for providing a GOA signal for the GOA circuit according to the grid opening voltage and the grid closing voltage; the level conversion circuit is also used for detecting the current value of the GOA signal, judging that the GOA circuit is in an overcurrent state when the current value is greater than a set value, and sending a fault signal to the integrated power management circuit and the system-on-chip 40; and the integrated power management circuit is also used for stopping supplying the grid opening voltage and the grid closing voltage to the level conversion circuit when the fault signal is received.
The power architecture adopted in this embodiment includes a level shifter circuit and an integrated power management circuit, and refer to fig. 3 specifically. The level shift circuit mainly comprises a level shift chip and a peripheral circuit thereof. The level shifter and the integrated power management circuit have a mature technology, and detailed description of the specific circuit structure of the level shifter and the integrated power management circuit is omitted here. Of course, the power architecture can also be composed of a level conversion chip, a gamma chip and an integrated power management circuit.
The integrated circuit management circuit is used for outputting voltages AVDD, HAVDD, Gamma and VCOM required by COF operation and VGH and VGL voltages required by level conversion circuit operation. The level shifter is used for boosting the gate-on voltage VGH and the gate-off voltage VGL provided by the integrated power management circuit to the voltage required by the GOA circuit.
The level shifter circuit may also detect a current of the output GOA signal when the GOA signal is provided to the GOA circuit. And when detecting the overcurrent, the level conversion circuit feeds an overcurrent signal OCP-en back to the integrated power management circuit and the SOC, so that the integrated power management circuit and the SOC execute a corresponding control strategy.
It should be noted that when the output state of the scan driving circuit is in the high impedance state, since the voltage of the scan line on the pixel array is not pulled down to VGL, the TFT (Thin Film Transistor) in the display panel is not completely turned off. Therefore, the data driving circuit can still charge the pixels. And because the current fault occurs at one side of the scanning driving circuit, the data driving circuit keeps working and does not enlarge the fault.
In particular, since the charging capability of the pixel is limited, the displayed image can be provided with a simple picture, such as a single-color image (yellow or green, etc.). The single color image is pre-stored in a memory as a preset image for extraction when needed. The main control chip of the display panel can extract the preset image when the scanning driving circuit is in an abnormal state, generate an image data signal according to the preset image, and then provide the image data signal for the data driving circuit to enable the display panel to display. Meanwhile, in order to make the data driving circuit operate normally, the power supply circuit is also made to supply operating voltages, such as common electrode voltage VCOM, Gamma operating voltage Gamma, analog voltage AVDD, and the like, to the data driving circuit.
In this embodiment, the power circuit 50 is configured to send a fault signal to the system-on-chip 40 and stop supplying power to the scan driving circuit 20 when detecting that the scan driving circuit 20 is in an abnormal state, so that the output state of the scan driving circuit 20 is in a high impedance state; the system on chip 40 is configured to provide a preset image data signal to the data driving circuit 30 when receiving the failure signal, so that the display panel displays an image corresponding to the image data signal. The display panel provided by the embodiment can display a preset image when the scanning driving circuit is abnormal. Based on the method, a user or a tester can directly determine that the scanning driving circuit of the display panel is abnormal, so that the troubleshooting efficiency is improved.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and all equivalent structures or equivalent processes performed by the present invention or directly or indirectly applied to other related technical fields are also included in the scope of the present invention.
Claims (10)
1. A display panel driving method, wherein the display panel includes a scan driving circuit and a data driving circuit, the display panel driving method comprising:
when the scanning driving circuit is detected to be in an abnormal state, setting the output state of the scanning driving circuit to be in a high-impedance state;
and providing preset image data signals and working voltage to the data driving circuit, so that the display panel displays images corresponding to the image data signals.
2. The method for driving a display panel according to claim 1, wherein the supplying a preset image data signal and a preset operating voltage to the data driving circuit to make the display panel display an image corresponding to the image data signal comprises:
generating an image data signal according to a preset image, wherein the preset image is a single-color image;
and providing the image data signal and the working voltage to the data driving circuit to enable the display panel to display the single-color image.
3. The display panel driving method of claim 2, wherein the operation voltage includes a common electrode voltage, a gamma operation voltage, and an analog voltage.
4. The display panel driving method according to any one of claims 1 to 3, wherein the scan driving circuit includes a GOA circuit, the abnormal state includes an overcurrent state, and the setting of the output state of the scan driving circuit to a high resistance state upon detecting that the scan driving circuit within the display panel is in the abnormal state includes:
and when the GOA circuit is detected to be in an overcurrent state, setting the output state of the GOA circuit to be in a high-impedance state.
5. The display panel driving method according to claim 4, wherein the setting the output state of the GOA circuit to a high impedance state when the GOA circuit is detected to be in an overcurrent state comprises:
detecting the current of a GOA signal input by the GOA circuit;
and when the current value of the GOA signal is larger than a set current value, judging that the GOA circuit is in an overcurrent state, and setting the output state of the GOA circuit to be a high-resistance state.
6. The display panel driving method according to claim 5, wherein the display panel includes a level shifter circuit for supplying the GOA signal to the GOA circuit according to an input gate-on voltage and gate-off voltage;
the setting the output state of the GOA circuit to a high impedance state comprises:
and stopping providing the grid opening voltage and the grid closing voltage for the level conversion circuit, so that the output state of the GOA circuit is in a high-impedance state.
7. A display panel, comprising: the scanning driving circuit and the data driving circuit are connected with the pixel array, the system level chip is respectively connected with the data driving circuit and the power circuit, and the power circuit is respectively connected with the scanning driving circuit and the data driving circuit;
the power supply circuit is used for sending a fault signal to the system-level chip and stopping supplying power to the scanning driving circuit when the scanning driving circuit is detected to be in an abnormal state, so that the output state of the scanning driving circuit is in a high-impedance state;
and the system-on-chip is used for providing a preset image data signal to the data driving circuit when the fault signal is received, so that the display panel displays an image corresponding to the image data signal.
8. The display panel according to claim 7, wherein the scan driving circuit includes a GOA circuit, the abnormal state includes an overcurrent state, and the GOA circuit is connected to the pixel array and the power supply circuit, respectively;
the power supply circuit is further used for providing a GOA signal for the GOA circuit, detecting a current value of the GOA signal, and judging that the GOA circuit is in an overcurrent state when the current value is larger than a set value.
9. The display panel according to claim 8, wherein the power supply circuit includes a level shifter circuit and an integrated power management circuit, the level shifter circuit being connected to the GOA circuit and the integrated power management circuit, respectively;
the integrated power management circuit is used for providing a grid opening voltage and a grid closing voltage for the level conversion circuit;
the level conversion circuit is used for providing the GOA signals for the GOA circuit according to the grid opening voltage and the grid closing voltage;
the level switching circuit is further configured to detect a current value of the GOA signal, determine that the GOA circuit is in an overcurrent state when the current value is greater than a set value, and send a fault signal to the integrated power management circuit and the system-on-chip;
the integrated power management circuit is further configured to stop providing the gate-on voltage and the gate-off voltage to the level shift circuit when receiving a fault signal.
10. A display panel as claimed in any one of claims 7 to 9 wherein the image to which the image data signal corresponds is a single colour image.
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| CN202210224177.4A CN114446211A (en) | 2022-03-07 | 2022-03-07 | Display panel driving method and display panel |
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| CN202210224177.4A CN114446211A (en) | 2022-03-07 | 2022-03-07 | Display panel driving method and display panel |
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