CN114420549B - Method for bonding silicon dioxide surface and silicon surface at low temperature - Google Patents

Method for bonding silicon dioxide surface and silicon surface at low temperature Download PDF

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CN114420549B
CN114420549B CN202210327717.1A CN202210327717A CN114420549B CN 114420549 B CN114420549 B CN 114420549B CN 202210327717 A CN202210327717 A CN 202210327717A CN 114420549 B CN114420549 B CN 114420549B
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bonding
wafer
semiconductor product
silicon
low temperature
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CN114420549A (en
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不公告发明人
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China Resources Microelectronics Holding Co ltd
Runxin Perception Technology (Nanchang) Co.,Ltd.
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Shenzhen Newsonic Technologies Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185Joining of semiconductor bodies for junction formation
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/95Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/9501Semiconductor wafers
    • G01N21/9505Wafer internal defects, e.g. microcracks
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N29/00Investigating or analysing materials by the use of ultrasonic, sonic or infrasonic waves; Visualisation of the interior of objects by transmitting ultrasonic or sonic waves through the object
    • G01N29/04Analysing solids
    • G01N29/06Visualisation of the interior, e.g. acoustic microscopy
    • G01N29/0654Imaging
    • G01N29/069Defect imaging, localisation and sizing using, e.g. time of flight diffraction [TOFD], synthetic aperture focusing technique [SAFT], Amplituden-Laufzeit-Ortskurven [ALOK] technique
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Abstract

The invention provides a method for bonding a silicon dioxide surface and a silicon surface at low temperature. Setting a first low-temperature condition, and depositing silicon dioxide on the bonding surface of the substrate through an ethyl silicate heating decomposition process to generate a wafer; activating the wafer through electron cloud, washing the wafer with deionized water, and introducing a hydrogen bond; bonding the wafer introduced with the hydrogen bond and a common silicon wafer under preset pressure, and annealing at a second low temperature after the bonding is finished to generate a bonded semiconductor product; and carrying out ultrasonic flaw detection and grinding tests on the semiconductor product, and judging a bonding result. The invention innovatively uses the silicon dioxide layer prepared by PETEOS at 250-450 ℃ as a bonding surface, and does not need a high-temperature thermal oxidation process at 1000 ℃ and a high-temperature annealing process at 1000 ℃. The method can greatly reduce the requirements on the process machine, reduce energy consumption and comprehensive cost, and most importantly, a feasible process route is created for a plurality of materials and products which cannot bear high temperature, and reliable process effects are output.

Description

Method for bonding silicon dioxide surface and silicon surface at low temperature
Technical Field
The invention relates to the technical field of silicon bonding, in particular to a method for bonding a silicon dioxide surface and a silicon surface at a low temperature.
Background
Currently, the bonding process is mostly used for product pattern transfer or special reinforcement process. The surface of silicon dioxide is bonded with the silicon surface, but the traditional process generally comprises the steps of carrying out 1000 ℃ thermal oxidation process on the bonding surface of a silicon wafer or other material wafers to generate silicon dioxide, then carrying out pre-bonding on the silicon dioxide and then carrying out 1000 ℃ annealing process to realize complete bonding. The key of the bonding strength and the quality mainly depends on the stress expression, the bending degree and the roughness of 2 bonding surface materials of the silicon dioxide material and the silicon material in the pre-bonding process and the conditions of the annealing process after the pre-bonding, so the requirements on a process machine table are high and the energy consumption is high.
Disclosure of Invention
The invention provides a method for bonding a silicon dioxide surface and a silicon surface at a low temperature, which is used for solving the problems that the key of bonding strength and quality in the bonding process in the prior art is mainly determined by stress expression, curvature and roughness of 2 bonding surface materials of a silicon dioxide material and a silicon material in a pre-bonding process and the conditions of an annealing process after pre-bonding, and has high requirements on process machines and high energy consumption.
A method for low temperature bonding of a silicon dioxide surface to a silicon surface, comprising:
setting a first low-temperature condition, and depositing silicon dioxide on the bonding surface of the substrate through an ethyl silicate heating decomposition process to generate a wafer;
activating the wafer through electron cloud, washing the wafer with deionized water, and introducing a hydrogen bond;
bonding the wafer introduced with the hydrogen bond with a common silicon wafer under preset pressure, and annealing at a second low temperature after bonding is finished to generate a bonded semiconductor product;
and carrying out ultrasonic flaw detection and grinding tests on the semiconductor product, and judging a bonding result.
As an embodiment of the present invention: the method further comprises the following steps:
arranging a vapor deposition table, and controlling the temperature condition of the vapor deposition table to be 250-450 ℃;
setting high-density plasma and depositing silicon dioxide under the condition of the high-density plasma;
and after the deposition is finished, generating the wafer with the bonding surface.
As an embodiment of the present invention: the ultrasonic flaw detection includes:
performing infrared scanning on one surface of the bonded common silicon wafer to obtain an infrared scanning image;
carrying out color identification on the infrared scanning image in a color space, and judging whether color difference exists or not; wherein, the first and the second end of the pipe are connected with each other,
when the color difference exists, the bonding result is unqualified;
when color difference does not exist, the bonded semiconductor product is scanned in three directions through the ultrasonic probe; wherein the content of the first and second substances,
the three-way scanning comprises: performing direct flaw detection from the surface of the common silicon wafer, performing direct flaw detection from the surface of the wafer, and performing transverse flaw detection from a bonding position;
respectively acquiring reflection echoes of three different ultrasonic flaw detections according to the three-way scanning;
judging whether the bonded semiconductor product has bubbles or not according to the reflection echo;
and determining the defects and corresponding defect positions according to the bubbles.
As an embodiment of the present invention: the grinding test comprises:
fixing the bonded semiconductor product between a first turntable and a second turntable according to a preset transposition;
setting a force rotating interval of a first rotating disc and a second rotating disc, controlling the bonded semiconductor product to move along with the mutual reverse movement of the first rotating disc and the second rotating disc according to the lowest force rotating value of the force rotating interval, carrying out whole-face grinding, stopping rotating when the force rotating values of the first rotating disc and the second rotating disc reach the maximum value of the force rotating interval, judging whether the semiconductor product falls off, and when the semiconductor product does not fall off, reaching a first bonding strength standard and determining the grinding time of the whole-face grinding; wherein the content of the first and second substances,
when the whole surface is ground, the roughness of the front surface and the back surface of the semiconductor product is increased;
when the semiconductor reaches a first bonding strength standard, the edge of the semiconductor product is ground through the first rotary table and the second rotary table, the edge grinding time is set to be the same as the whole surface grinding time, after the edge grinding is finished, whether the semiconductor product falls off or not is judged, and when the semiconductor product does not fall off, a second bonding strength standard is reached,
and after the semiconductor product reaches the second bonding strength standard, arranging the semiconductor product in a pulsed magnetic field, cutting and grinding the semiconductor product through a magnetic abrasive, grinding the ground thickness of two sides of the bonded semiconductor product to 100um to 200um, judging whether the semiconductor product falls off again, and when the semiconductor product does not fall off, reaching the target bonding strength standard.
As an embodiment of the invention: the electron cloud activation comprises:
arranging a first machine table, and placing the wafer in the first machine table; wherein the content of the first and second substances,
the first machine is provided with an oxygenation device and two laser emitting devices;
placing the wafer in an environment with high oxygen density;
respectively setting a first laser beam and a second laser beam, and projecting the wafer through the first laser beam to generate an ion beam cluster;
projecting the periphery of the ion bunch by a second laser beam to generate a hollow electron cloud.
As an embodiment of the present invention: the method further comprises the following steps:
arranging a second machine, and placing the wafer subjected to the electronic cloud activation in the second machine; wherein the content of the first and second substances,
the second machine table is provided with a sterile water tank and an ion rinsing tank;
placing the wafer after the electronic cloud activation in the sterile water tank for soaking for 1H;
and after soaking, carrying out ion water washing through the ion water washing tank until hydrogen bonds exist in the wafer after the electron cloud activation.
As an embodiment of the invention: the method further comprises the following steps:
setting a bonding machine; wherein the content of the first and second substances,
the bonding machine is provided with a vacuum chamber and a normal pressure chamber;
placing the wafer and the common silicon wafer after the hydrogen bond introduction into the bonding machine, and setting the pressure of the bonding machine as follows: 60KN to 120KN.
As an embodiment of the invention: the annealing at the second low temperature comprises:
putting the bonded wafer and the common silicon wafer into an oven, and setting the temperature of the oven to be 300-500 ℃;
and annealing according to the oven to generate a bonded semiconductor product.
As an embodiment of the present invention: the method further comprises the following steps:
carrying out deep silicon etching on the upper surface of the silicon wafer and carrying out thermal oxidation treatment;
thinning the upper surface of the silicon wafer subjected to thermal oxidation treatment, and then performing top silicon etching on the upper surface of the silicon wafer;
and thinning and removing silicon on the lower surface of the silicon wafer subjected to top silicon etching, and removing the oxidation layer to obtain the target silicon wafer.
As an embodiment of the present invention: the method further comprises the following steps:
arranging a gas mixture, mounting an electrode on the gas mixture, and applying an electric field through the electrode;
generating plasma by charged particles colliding gas molecules of the gas mixture according to the electric field; wherein the content of the first and second substances,
the strength of the electric field is determined by the voltage of the electrodes and the velocity of the charged particles is determined by the strength of the electric field.
The invention has the beneficial effects that:
the invention innovatively uses a silicon dioxide layer prepared by PETEOS (ethyl silicate is heated and decomposed under the condition of high-density plasma) at 250-450 ℃ as a bonding surface, and does not need to carry out a high-temperature thermal oxidation process at 1000 ℃, and does not need to carry out a high-temperature annealing process at 1000 ℃ subsequently. The method can greatly reduce the requirements on the process machine, reduce energy consumption and comprehensive cost, and most importantly, a feasible process route is created for a plurality of materials and products which cannot bear high temperature, and reliable process effects are output.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and drawings.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a flow chart of a method for low temperature bonding of a silicon dioxide surface to a silicon surface in an embodiment of the invention;
FIG. 2 is a defect display of ultrasonic inspection in an embodiment of the present invention;
FIG. 3 is a diagram showing the flaw detection without using ultrasonic waves according to the embodiment of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it should be understood that they are presented herein only to illustrate and explain the present invention and not to limit the present invention.
Example 1:
as shown in fig. 1, the present invention is a method for bonding a silicon dioxide surface and a silicon surface at a low temperature, comprising:
setting a first low-temperature condition, and depositing silicon dioxide on the bonding surface of the substrate through an ethyl silicate heating decomposition process to generate a wafer;
activating the wafer through electron cloud, washing the wafer with deionized water, and introducing a hydrogen bond;
bonding the wafer introduced with the hydrogen bond with a common silicon wafer under preset pressure, and annealing at a second low temperature after bonding is finished to generate a bonded semiconductor product;
and carrying out ultrasonic flaw detection and grinding tests on the semiconductor product, and judging a bonding result.
The working principle of the technical scheme is as follows: compared with the prior art, the invention is an innovative mode, and does not need to be bonded at high temperature of 1000 ℃, so that the bonding mode of the invention is more suitable for a large amount of materials which are not high-temperature resistant, the low-temperature bonding technology exists in the prior art, but the low-temperature bonding in the prior art is easy to become strong when unstable and unpaired chemical bonds are attached during bonding, but the environmental requirement is higher, the flatness and cleanliness need to reach very high degrees, the most easy environmental condition for achieving the very high degree is vacuum, but the bonding surface is not good in activation and is difficult to bond in a vacuum state.
Therefore, the traditional bonding process is also high-temperature bonding, wherein silicon dioxide is generated by performing a 1000 ℃ thermal oxidation process on a bonding surface of a silicon wafer or other material sheets, then the silicon dioxide is pre-bonded with the silicon wafer, and then the silicon dioxide is subjected to a 1000 ℃ annealing process to realize complete bonding. The key of the bonding strength and the quality of the silicon dioxide/silicon material pre-bonding method mainly depends on the stress expression, the bending degree and the roughness of 2 bonding surface materials of the silicon dioxide material and the silicon material during the pre-bonding process and the conditions of the annealing process after the pre-bonding.
However, the high-temperature process is not suitable for some product requirements, such as special structure products containing cavities or heat-sensitive materials, and the high-temperature process has high overall energy consumption and high requirements on hardware.
In the first conventional work, the main effect of the high temperature is that water is generated during the formation of silicon-oxygen bond
Figure DEST_PATH_IMAGE001
The diffusion in (2) is not significant, and
Figure DEST_PATH_IMAGE002
the group can break one bond of the bridging oxygen atom to convert the bridging oxygen atom into a non-bridging oxygen atom, so that better bonding is realized, and under a high-temperature state, adjacent bonded atoms react with each other to generate a covalent bond, so that the bonding is completed, which is also the most important process.
However, the present invention breaks this high temperature situation, and the present invention prepares the silicon dioxide layer as the bonding surface in the high density plasma because the purpose of the thermal oxidation is to allow water to flow into
Figure DEST_PATH_IMAGE003
The diffusion in the process is obvious, the activation of the plasma surface is realized, the activation is mainly carried out at high temperature in the prior art, but the activation is carried out through electron cloud in the invention, and the effect of activating the plasma surface by high-temperature oxidation is also achieved. In addition, the existing process is mainly based on the activation of the plasma surface in the aspect of increasing dangling bonds, and then non-bridged hydroxyl groups are generated based on a chemical solution, but the invention also achieves the effect of the prior art by introducing hydrogen bonds through deionized water washing, and is simpler compared with the prior art. In the cleanliness of the bonding surface, the invention has high densityThe slurry activation can remove impurities from pollutants possibly existing on the bonding surface through the action of the plasma, the plasma bombards the pollutants through a large amount of electrons to achieve higher cleanliness, and meanwhile, the plasma also has an etching action to achieve higher smoothness. Deionized water acts like a sponge. It absorbs contaminants and particles easily and is positively removed. The purity promotes the formation of cavitation bubbles in the ultrasonic cleaner. The cleaning agent is different in cleaning agent, can remove part of pollutants in a wide range, can remove the pollutants doubly, and achieves a high-efficiency dust removal result in a vacuum state.
Finally, in bonding, the prior art is mainly realized by heating, the temperature is the key role of bonding, and the invention is annealing at a second low temperature under preset pressure. Compared with the bonding machine required by the prior art, the bonding machine is firstly subjected to pre-bonding at low temperature and then is subjected to an annealing process to realize bonding.
The beneficial effects of the above technical scheme are: the invention innovatively uses a silicon dioxide layer prepared by PETEOS (ethyl silicate is heated and decomposed under the condition of high-density plasma) at 250-450 ℃ as a bonding surface, and does not need to carry out a high-temperature thermal oxidation process at 1000 ℃, and does not need to carry out a high-temperature annealing process at 1000 ℃ subsequently. The method can greatly reduce the requirements on the process machine, reduce energy consumption and comprehensive cost, and most importantly, a feasible process route is created for a plurality of materials and products which cannot bear high temperature, and reliable process effects are output.
Example 2:
as an embodiment of the present invention: the method further comprises the following steps:
arranging a vapor deposition table, and controlling the temperature condition of the vapor deposition table to be 250-450 ℃;
setting high-density plasma and depositing silicon dioxide under the condition of the high-density plasma;
and after the deposition is finished, generating the wafer with the bonding surface.
The working principle of the technical scheme is as follows: according to the invention, the first bonding surface can be formed by depositing the silicon dioxide under the low temperature condition through the vapor deposition table, and the reason for setting the temperature between 250 ℃ and 450 ℃ is that the first environment reaches the low temperature, but the temperature cannot be particularly low, and the particularly low temperature can cause the silicon dioxide layer to be incapable of being formed. However, a precondition is also set to be high-density plasma, and the high-density plasma mainly plays a role of etching, but in the invention, the high-density plasma replaces the prior art which needs high-temperature treatment to realize the effect of polishing the bonding surface.
The beneficial effects of the above technical scheme are: compared with the prior art, the invention adopts silicon dioxide deposition and high-density plasma treatment when forming the bonding surface, has better polishing effect and can obtain a smooth bonding surface.
Example 3:
as an embodiment of the present invention: the ultrasonic flaw detection includes:
performing infrared scanning on one surface of the bonded common silicon wafer to obtain an infrared scanning image;
carrying out color identification on the infrared scanning image in a color space, and judging whether color difference exists or not; wherein the content of the first and second substances,
when the color difference exists, the bonding result is unqualified;
when color difference does not exist, the bonded semiconductor product is scanned in three directions through the ultrasonic probe; wherein the content of the first and second substances,
the three-way scan includes: performing direct flaw detection from the surface of the common silicon wafer, performing direct flaw detection from the surface of the wafer, and performing transverse flaw detection from a bonding position;
respectively acquiring reflected echoes of three different ultrasonic flaw detections according to the three-way scanning;
judging whether the bonded semiconductor product has bubbles or not according to the reflection echo;
and determining the defect and the corresponding defect position according to the bubble.
The working principle of the technical scheme is as follows: after the bonding is successful, the detection is mainly carried out, the mode adopted by the invention is ultrasonic flaw detection, but before the ultrasonic flaw detection, the infrared scanning adopted by the invention is firstly used, because silicon can penetrate through infrared rays, when the infrared scanning is adopted, the place with poor bonding effect can be timely divided through color difference, however, the infrared scanning mode can only find large defects, and can not find tiny bubbles or places with little color difference, so the invention also adopts the ultrasonic flaw detection, and three-dimensional ultrasonic flaw detection is carried out on the upper surface, the lower surface and the side surface of a semiconductor after the bonding, and through the mode, if the defects exist at a certain point in three directions, the defects exist, and the bonding effect is definitely not good. The results of the ultrasonic testing are shown in FIGS. 2 and 3. In the prior art, a bonding method for realizing a natural frequency by ultrasonic waves exists, but the method is a completely different technical scheme from the method for carrying out flaw detection by ultrasonic waves.
The beneficial effects of the above technical scheme are: according to the invention, flaw detection is carried out on the bonded semiconductor through an innovative double screening mode, and whether the bonding effect is appropriate is judged.
Example 4:
as an embodiment of the present invention: the grinding test comprises:
fixing the bonded semiconductor product between a first turntable and a second turntable according to a preset transposition;
setting a force rotating interval of a first rotating disc and a second rotating disc, controlling the bonded semiconductor product to move along with the mutual reverse movement of the first rotating disc and the second rotating disc according to the lowest force rotating value of the force rotating interval, carrying out whole-face grinding, stopping rotating when the force rotating values of the first rotating disc and the second rotating disc reach the maximum value of the force rotating interval, judging whether the semiconductor product falls off, and when the semiconductor product does not fall off, reaching a first bonding strength standard and determining the grinding time of the whole-face grinding; wherein, the first and the second end of the pipe are connected with each other,
when the whole surface is ground, the roughness of the front surface and the back surface of the semiconductor product is increased;
when the semiconductor reaches a first bonding strength standard, the edge of the semiconductor product is ground through the first rotary table and the second rotary table, the edge grinding time is set to be the same as the whole surface grinding time, after the edge grinding is finished, whether the semiconductor product falls off or not is judged, and when the semiconductor product does not fall off, a second bonding strength standard is reached,
and after the semiconductor product reaches the second bonding strength standard, arranging the semiconductor product in a pulsed magnetic field, cutting and grinding the semiconductor product through a magnetic abrasive, grinding the two grinding surfaces of the bonded semiconductor product to be 100um to 200um in thickness, judging whether the semiconductor product falls off again, and reaching the target bonding strength standard when the semiconductor product does not fall off.
The working principle of the technical scheme is as follows: the bonding effect test of the invention comprises two types, except for the detection of ultrasonic wave, the rest is grinding test, the grinding is mainly used for judging that after grinding, if two bonded parts are separated, the bonding effect is not good, and if the two bonded parts are not separated, the bonding effect is good.
Because the prior art grinding has no fixed standard, the main function of grinding is to thin the whole semiconductor product, and the test for bonding strength in grinding belongs to the additional capability in the thinning process, and the bonding strength is generally very low.
Therefore, when the bonding is combined, the grinding standard of the thickness is set for the whole bonding product, and the optimal thickness in the market is 100um to 200um. According to the standard, the bonding is judged to be qualified or not by triple grinding, and the thinning and bonding strength testing capabilities are achieved.
In this process, we have set two rotating discs that will rotate within a certain rotational force interval, which is the maximum test force after increasing the roughness as the semiconductor product is ground after bonding, because the coarser the more grinding force that must be needed. The rotation force interval of the grinding is obtained through a plurality of experimental tests. Based on the force-rotating interval, grinding for the first time to obtain a first bonding strength standard, and when the bonding strength standard is reached, the highest strength of the test is higher than that of all bonding test modes on the market.
After the first bonding strength standard is reached, the whole wafer grinding is just one-time test in the market, and the stress is uniform during the whole wafer grinding, so the testing strength of the bonding strength is integrally uniform, and the testing effect is not particularly good. This is therefore a second bond strength test, and when this bond strength is reached, the bond strength label is already very high, at which time the rough, non-smooth condition of the two faces is addressed during the lapping process. We have adopted pulsed magnetic field, grind through magnetism abrasive material thickness, carry out thickness adjustment by the way, these magnetism abrasive materials are under pulsed magnetic field's effect, along the even synchronous grinding of magnetism line level of feeling, and then, can be quick reach the thickness that wants, and the level is ground simultaneously, along magnetism line of feeling, can reach synchronous grinding, to the place that the levelness is different, because all on a magnetism line of feeling, unevenness's place only grinds protruding place. The magnetic field is considered to be a horizontal magnetic field, and is not a circular magnetic field similar to an electromagnet, the horizontal magnetic field is formed by two symmetrical and parallel permanent magnets, and the horizontal magnetic field has a horizontal central axis and forms a horizontal forward symmetrical magnetic field.
The beneficial effects of the above technical scheme are: the invention judges whether the bonding effect meets the standard or not by a strong physical grinding means.
Example 5:
as an embodiment of the present invention: the electron cloud activation comprises:
arranging a first machine table, and placing the wafer in the first machine table; wherein the content of the first and second substances,
the first machine is provided with an oxygenation device and two laser emission devices;
placing the wafer in an environment with high oxygen density;
respectively setting a first laser beam and a second laser beam, and projecting the wafer through the first laser beam to generate an ion beam group;
projecting the periphery of the ion bunch by a second laser beam to generate a hollow electron cloud.
The working principle of the technical scheme is as follows: when the invention is used for activating the electron cloud, the electron cloud generation modes are various, but the invention is most suitable for generating the electron cloud by laser, and the electron cloud can be generated in a directional manner for activation, so that the invention provides an environment with high oxygen density by arranging a corresponding machine, and realizes the activation of the wafer by generating the hollow electron cloud by two different lasers.
The beneficial effects of the above technical scheme are: compared with the prior art, the method has the advantages that the wafer can be activated in a laser mode, the method is more convenient, the activation can be realized, the directional activation based on the electronic cloud is realized, and the activation is more comprehensive.
Example 6:
as an embodiment of the invention: the method further comprises the following steps:
arranging a second machine, and placing the wafer subjected to the electronic cloud activation in the second machine; wherein the content of the first and second substances,
the second machine table is provided with a sterile water tank and an ion rinsing tank;
placing the wafer subjected to the electronic cloud activation in the sterile water tank for soaking for 1H;
and after soaking, carrying out ion water washing through the ion water washing tank until hydrogen bonds exist in the wafer after the electron cloud activation.
The working principle of the technical scheme is as follows: compared with the mode in the prior art, the mode generates hydroxyl without bridge bonds through chemical solution after high-temperature activation, the hydrogen bond without bridge bonds generated in the mode has certain problem on smoothness, and the method is soaked in sterile water firstly, so that the activated surface is warmer, and then the hydrogen bond is easily generated through washing with ion water.
The beneficial effects of the above technical scheme are: compared with the prior art, the method is more convenient, can generate more hydrogen bonds more quickly, and achieves better bonding effect.
Example 7:
as an embodiment of the invention: the method further comprises the following steps:
setting a bonding machine; wherein the content of the first and second substances,
the bonding machine is provided with a vacuum chamber and a constant pressure chamber;
placing the wafer and the common silicon wafer into the bonding machine after the hydrogen bond is introduced, and setting the pressure of the bonding machine as follows: 60KN to 120KN.
The working principle of the technical scheme is as follows: in the bonding, the prior art is direct bonding through a high temperature annealing process. However, the invention is provided with a corresponding bonding machine, firstly, the bonding machine is used for pre-bonding, and certain pressure is set to ensure the bonding effect through the pressure.
The beneficial effects of the above technical scheme are: compared with direct high-temperature annealing bonding in the prior art, the method has the advantages that the process is complicated, but the bonding is more convenient after the process is divided. Does not need high temperature and is more suitable for various materials.
Example 8:
as an embodiment of the invention: the annealing at the second low temperature comprises:
putting the bonded wafer and the common silicon wafer into an oven, and setting the temperature of the oven to be 300-500 ℃;
and annealing according to the oven to generate a bonded semiconductor product.
The working principle of the technical scheme is as follows: according to the invention, bonding is carried out through a second low temperature after pre-bonding, but the bonding is required to be placed in an oven, and better annealing bonding is realized through gradual increase of the temperature.
The beneficial effects of the above technical scheme are: because the invention carries out pre-bonding in advance, the annealing process does not need too high temperature to realize bonding.
Example 9:
as an embodiment of the present invention: the method further comprises the following steps:
carrying out deep silicon etching on the upper surface of the silicon wafer and carrying out thermal oxidation treatment;
thinning the upper surface of the silicon wafer subjected to thermal oxidation treatment, and then performing top silicon etching on the upper surface of the silicon wafer;
and thinning and removing silicon on the lower surface of the silicon wafer subjected to top silicon etching, and removing the oxidation layer to obtain the target silicon wafer.
The working principle of the technical scheme is as follows: for a silicon wafer, the smoother the silicon wafer is, the better the effect is in bonding, and in addition, in the bonding detection of the invention, the detection can be realized only by reaching certain conditions in an infrared scanning mode and an ultrasonic mode, namely the silicon wafer needs to be thin to the extent of realizing the detection, and the steps are needed at this time.
The beneficial effects of the above technical scheme are: according to the invention, through pretreatment on the silicon wafer, the silicon wafer can be bonded better, so that the bonding surface is smoother, and the thickness requirement of final bonding detection can be met.
Example 10:
as an embodiment of the present invention: the method further comprises the following steps:
arranging a gas mixture, mounting an electrode on the gas mixture, and applying an electric field through the electrode;
generating plasma by charged particles colliding with gas molecules of the gas mixture according to the electric field; wherein the content of the first and second substances,
the strength of the electric field is determined by the voltage of the electrodes and the velocity of the charged particles is determined by the strength of the electric field.
The working principle of the technical scheme is as follows: the high-density plasma of the invention needs certain generating conditions, and the prior art mostly generates the plasma by gas mixture, but the high-density plasma is difficult to generate, so the invention applies electric field by the electrode, and adjusts the speed of charged particles by the electric field intensity, thereby achieving the purpose of generating the high-density plasma.
The beneficial effects of the above technical scheme are: compared with the prior art, the method for generating the high-density plasma is simple in mode and principle, but better accords with the application scene of the method, and the method does not need to apply electrodes under the condition that the electrodes exist on two bonded surfaces, so that the process is saved.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (7)

1. A method for low temperature bonding of a silicon dioxide surface to a silicon surface, comprising:
setting a first low-temperature condition, and depositing silicon dioxide on the bonding surface of the substrate through an ethyl silicate heating decomposition process to generate a wafer; wherein the content of the first and second substances,
the first low temperature is between 250 ℃ and 450 ℃;
activating the wafer through electron cloud, washing the wafer with deionized water, and introducing a hydrogen bond; wherein the content of the first and second substances,
the electron cloud activation comprises:
arranging a first machine table, and placing the wafer in the first machine table; wherein the content of the first and second substances,
the first machine is provided with an oxygenation device and two laser emission devices;
placing the wafer in an environment with high oxygen density;
respectively setting a first laser beam and a second laser beam, and projecting the wafer through the first laser beam to generate an ion beam cluster;
projecting the periphery of the ion beam cluster by a second laser beam to generate a hollow electron cloud;
bonding the wafer introduced with the hydrogen bond and a common silicon wafer under preset pressure, and annealing at a second low temperature after the bonding is finished to generate a bonded semiconductor product; wherein the content of the first and second substances,
the second low temperature is between 300 ℃ and 500 ℃;
carrying out ultrasonic flaw detection and grinding tests on the semiconductor product, and judging a bonding result;
wherein the ultrasonic flaw detection includes:
carrying out infrared scanning on one surface of the bonded common silicon wafer to obtain an infrared scanning image;
carrying out color identification on the infrared scanning image in a color space, and judging whether color difference exists or not; wherein the content of the first and second substances,
when the color difference exists, the bonding result is unqualified;
when color difference does not exist, the bonded semiconductor product is scanned in three directions through the ultrasonic probe; wherein the content of the first and second substances,
the three-way scan includes: performing direct flaw detection from the surface of the common silicon wafer, performing direct flaw detection from the surface of the wafer, and performing transverse flaw detection from a bonding position;
respectively acquiring reflection echoes of three different ultrasonic flaw detections according to the three-way scanning;
judging whether the bonded semiconductor product has bubbles or not according to the reflection echo;
determining defects and corresponding defect positions according to the bubbles;
the grinding test comprises:
fixing the bonded semiconductor product between a first turntable and a second turntable according to a preset transposition;
setting a rotating force interval of a first rotating disc and a second rotating disc, controlling the bonded semiconductor product to move along with the mutual reverse movement of the first rotating disc and the second rotating disc according to the lowest rotating force value of the rotating force interval, carrying out whole face grinding, stopping rotating when the rotating force values of the first rotating disc and the second rotating disc reach the maximum value of the rotating force interval, judging whether the semiconductor product falls off or not, reaching a first bonding strength standard when the semiconductor product does not fall off, and determining the grinding time of the whole face grinding; wherein the content of the first and second substances,
when the whole surface is ground, the roughness of the front surface and the back surface of the semiconductor product is increased;
when the semiconductor reaches a first bonding strength standard, the edge of the semiconductor product is ground through the first rotary table and the second rotary table, the edge grinding time is set to be the same as the whole surface grinding time, after the edge grinding is finished, whether the semiconductor product falls off or not is judged, and when the semiconductor product does not fall off, a second bonding strength standard is reached,
and after the semiconductor product reaches the second bonding strength standard, arranging the semiconductor product in a pulsed magnetic field, cutting and grinding the semiconductor product through a magnetic abrasive, grinding the ground thickness of two sides of the bonded semiconductor product to 100um to 200um, judging whether the semiconductor product falls off again, and when the semiconductor product does not fall off, reaching the target bonding strength standard.
2. The method for low temperature bonding of a silicon dioxide surface to a silicon surface as claimed in claim 1 wherein the setting of the first low temperature condition and the bottoming of the silicon dioxide on the bonding surface of the substrate by an ethylsilicate thermal decomposition process, the generating of the wafer further comprises:
arranging a vapor deposition table, and controlling the temperature condition of the vapor deposition table to be 250-450 ℃;
setting high-density plasma and depositing silicon dioxide under the condition of the high-density plasma;
and after the deposition is finished, generating the wafer with the bonding surface.
3. The method for low temperature bonding of a silicon dioxide surface to a silicon surface of claim 1, further comprising:
arranging a second machine, and placing the wafer subjected to the electronic cloud activation in the second machine; wherein the content of the first and second substances,
the second machine table is provided with a sterile water tank and an ion rinsing tank;
placing the wafer after the electronic cloud activation in the sterile water tank for soaking for 1H;
and after soaking, carrying out ion water washing through the ion water washing tank until hydrogen bonds exist in the wafer after the electron cloud activation.
4. The method for low temperature bonding of a silicon dioxide surface to a silicon surface of claim 1, further comprising:
setting a bonding machine; wherein the content of the first and second substances,
the bonding machine is provided with a vacuum chamber and a constant pressure chamber;
placing the wafer and the common silicon wafer after the hydrogen bond introduction into the bonding machine, and setting the pressure of the bonding machine as follows: 60KN to 120KN.
5. The method of claim 1, wherein annealing at the second low temperature comprises:
putting the bonded wafer and the common silicon wafer into an oven, and setting the temperature of the oven to be 300-500 ℃;
and annealing according to the oven to generate the bonded semiconductor product.
6. The method for low temperature bonding of a silicon dioxide surface to a silicon surface of claim 1, further comprising:
carrying out deep silicon etching on the upper surface of the common silicon wafer and carrying out thermal oxidation treatment;
thinning the upper surface of the silicon wafer subjected to thermal oxidation treatment, and then performing top silicon etching on the upper surface of the silicon wafer;
and thinning and desiliconizing the lower surface of the silicon wafer subjected to top silicon etching, and removing the oxidation layer to obtain the target silicon wafer.
7. The method for low temperature bonding of a silicon dioxide surface to a silicon surface of claim 1, further comprising:
arranging a gas mixture, mounting an electrode on the gas mixture, and applying an electric field through the electrode;
generating plasma by charged particles colliding with gas molecules of the gas mixture according to the electric field; wherein the content of the first and second substances,
the strength of the electric field is determined by the voltage of the electrodes and the velocity of the charged particles is determined by the strength of the electric field.
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US6911375B2 (en) * 2003-06-02 2005-06-28 International Business Machines Corporation Method of fabricating silicon devices on sapphire with wafer bonding at low temperature
US7776718B2 (en) * 2007-06-25 2010-08-17 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor substrate with reduced gap size between single-crystalline layers
US20090004764A1 (en) * 2007-06-29 2009-01-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate and method for manufacturing semiconductor device
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