CN114420028A

CN114420028A - Display panel and display device

Info

Publication number: CN114420028A
Application number: CN202210067846.1A
Authority: CN
Inventors: 邵智猛; 黄高坤; 张如芹; 杨丰; 孔超
Original assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Priority date: 2022-01-20
Filing date: 2022-01-20
Publication date: 2022-04-29
Anticipated expiration: 2042-01-20
Also published as: CN114420028B

Abstract

The disclosure relates to the technical field of display, and discloses a display panel and a display device, wherein the display panel comprises a driving back plate, a first sub-pixel and a second sub-pixel; the driving back plate comprises a first driving circuit and a second driving circuit; the first sub-pixel is arranged on one side of the driving back plate and is electrically connected with the first driving circuit; the second sub-pixel is arranged on one side of the driving back plate and is electrically connected with the second driving circuit, when the working temperature of the display panel is greater than or equal to the set temperature, the second driving circuit drives the second sub-pixel to work, and the light emitting color of the second sub-pixel is the same as that of the first sub-pixel. The display panel compensates for color deviation caused by too fast brightness attenuation of the first sub-pixel when the temperature is high, namely white balance residual image, through the second sub-pixel, and further adjusts white balance well to obtain a good display picture.

Description

Display panel and display device

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to a display panel and a display device including the same.

Background

The OLED (Organic Light-Emitting Diode) display technology is favored in the display field because it has the advantages of self-luminescence, simple component structure, low lighting voltage, low power consumption, high efficiency, short response time, flexibility and wide color gamut. In order to realize a high-quality display picture for a long time, the service life matching of each sub-pixel is an important prerequisite for the OLED display surface. In addition, each sub-pixel of the OLED display panel corresponds to a corresponding driving circuit, and the driving circuit is controlled to drive each sub-pixel to emit light by inputting a data signal, so that a normal display picture is obtained.

However, in the conventional display panel, color deviation is likely to occur at high temperature.

It is to be noted that the information disclosed in the above background section is only for enhancement of understanding of the background of the present disclosure, and thus may include information that does not constitute prior art known to those of ordinary skill in the art.

Disclosure of Invention

The present disclosure is directed to overcome the above-mentioned disadvantage of the prior art that color deviation is easily generated, and to provide a display panel and a display device including the same, in which color deviation is not easily generated.

According to an aspect of the present disclosure, there is provided a display panel including:

the driving back plate comprises a first driving circuit and a second driving circuit;

the first sub-pixel is arranged on one side of the driving back plate and is electrically connected to the first driving circuit;

and the second sub-pixel is arranged on one side of the driving back plate and is electrically connected with the second driving circuit, when the working temperature of the display panel is greater than or equal to a set temperature, the second driving circuit drives the second sub-pixel to work, and the light emitting color of the second sub-pixel is the same as the light emitting color of the first sub-pixel.

In an exemplary embodiment of the present disclosure, the second driving circuit includes:

the thermistor is provided with a first connecting end and a second connecting end, and the first connecting end is electrically connected to the scanning line;

the second connecting end is electrically connected with the control end of at least one transistor.

In an exemplary embodiment of the present disclosure, the transistors are provided in two, respectively, as a first switching transistor and a driving transistor; the control end of the first switching transistor is electrically connected to the second connecting end of the thermistor, and the first end of the first switching transistor is electrically connected to a data line; the control end of the driving transistor is electrically connected to the second end of the first switching transistor, the first end of the driving transistor is electrically connected to a power line, and the second end of the driving transistor is electrically connected to the second sub-pixel;

the second drive circuit further includes:

and the capacitor is electrically connected between the second end of the first switch transistor and the power line.

In an exemplary embodiment of the present disclosure, the transistors are provided in three, which are a first switching transistor, a second switching thin film transistor, and a driving transistor, respectively; the control end of the first switch thin film transistor is electrically connected to the second connecting end of the thermistor, and the first end of the first switch thin film transistor is electrically connected to the data line; the control end of the second switch thin film transistor is electrically connected to the scanning line, and the first end of the second switch thin film transistor is electrically connected to the second end of the first switch thin film transistor; the control end of the driving thin film transistor is electrically connected to the second end of the second switch thin film transistor, the first end of the driving thin film transistor is electrically connected to a power line, and the second end of the driving thin film transistor is electrically connected to the second sub-pixel;

the second drive circuit further includes:

and the capacitor is electrically connected between the second end of the second switch thin film transistor and the power line.

In an exemplary embodiment of the present disclosure, the thermistor is a negative temperature coefficient thermistor, and the first switching transistor is an N-type transistor; or, the thermistor is a positive temperature coefficient thermistor, and the first switching transistor is a P-type transistor.

In an exemplary embodiment of the present disclosure, the transistors are arranged in seven, and the second connection terminal of the thermistor is electrically connected to one or both of the control terminal of the first transistor and the control terminal of the third transistor.

In an exemplary embodiment of the present disclosure, the thermistor is a negative temperature coefficient thermistor, and one or both of the first transistor and the third transistor are N-type transistors; or, the thermistor is a positive temperature coefficient thermistor, and one or two of the first transistor and the third transistor are P-type transistors.

at least one driving transistor, wherein the grid electrode material of the driving transistor is a thermistor material.

In one exemplary embodiment of the present disclosure, the light emission color of the first sub-pixel and the light emission color of the second sub-pixel are both red.

In an exemplary embodiment of the present disclosure, an area of the light emitting layer group of the second sub-pixel is smaller than an area of the light emitting layer group of the first sub-pixel.

In one exemplary embodiment of the present disclosure, a ratio of an area of the light emitting layer group of the second sub-pixel to an area of the light emitting layer group of the first sub-pixel is 0.7: 1.

In an exemplary embodiment of the present disclosure, the first sub-pixel and the second sub-pixel each include:

the first electrode is arranged on one side of the driving back plate and is electrically connected with the driving back plate;

the pixel defining layer is arranged on one side, away from the driving back plate, of the first electrode, a third through hole is formed in the pixel defining layer and communicated with the first electrode, the light emitting layer is arranged in the third through hole, and the light emitting layer group is connected with the first electrode;

and the second electrode is arranged on one side of the light-emitting layer group, which is far away from the driving back plate.

In an exemplary embodiment of the present disclosure, the first subpixel is disposed adjacent to the second subpixel.

In an exemplary embodiment of the present disclosure, the driving back plate further includes: a third driving circuit and a fourth driving circuit; the display panel further includes:

the third sub-pixel is arranged on one side of the driving back plate and is electrically connected to the third driving circuit;

and the fourth sub-pixel is arranged on one side of the driving back plate and is electrically connected to the fourth driving circuit, the light-emitting color of the third sub-pixel is different from the light-emitting color of the fourth sub-pixel, and the light-emitting color of the third sub-pixel and the light-emitting color of the fourth sub-pixel are different from the light-emitting color of the first sub-pixel.

According to another aspect of the present disclosure, there is provided a display device including: a display panel as described in any of the above.

According to the display panel and the display device, the first sub-pixel is electrically connected to the first driving circuit, the second sub-pixel is electrically connected to the second driving circuit, the light emitting color of the second sub-pixel is the same as the light emitting color of the first sub-pixel, and when the working temperature of the display panel is higher than or equal to the set temperature, the second driving circuit drives the second sub-pixel to work, so that the color deviation caused by the fact that the brightness of the first sub-pixel is attenuated too fast when the temperature is high, namely the white balance residual image, is compensated through the second sub-pixel, the white balance is well adjusted, and a better display picture is obtained.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure. It is to be understood that the drawings in the following description are merely exemplary of the disclosure, and that other drawings may be derived from those drawings by one of ordinary skill in the art without the exercise of inventive faculty.

Fig. 1 is a schematic structural diagram of an exemplary embodiment of a display panel according to the present disclosure.

Fig. 2 is a schematic diagram of an exemplary circuit of the second driving circuit in fig. 1.

Fig. 3 is a schematic diagram of another exemplary embodiment of the circuit of the second driving circuit in fig. 1.

Fig. 4 is a schematic diagram of a circuit of the second driving circuit in fig. 1 according to still another exemplary embodiment.

FIG. 5 is a graph showing a comparison of lifetime degradation of a red sub-pixel at normal temperature (25 ℃ C.) and at high temperature (70 ℃ C.).

FIG. 6 is a graph showing a comparison of lifetime degradation of a green sub-pixel at normal temperature (25 ℃ C.) and at high temperature (70 ℃ C.).

FIG. 7 is a graph showing a comparison of lifetime degradation of a blue subpixel at normal temperature (25 ℃ C.) and high temperature (70 ℃ C.).

Fig. 8 is a schematic diagram illustrating a comparison between white balance color tracks of a display panel of the prior art and the display panel of the present disclosure.

FIG. 9 is a schematic diagram of a CIEY curve with time of a display panel according to the present disclosure and the prior art.

Description of reference numerals:

1. a substrate base plate; 2. a light-shielding layer; 3. a buffer layer;

4. an active layer; 41. a conductor part; 42. a channel portion;

5. a gate insulating layer; 6. a gate electrode;

7. an interlayer dielectric layer; 71. a first via hole;

81. a source electrode; 82. a drain electrode;

9. a planarization layer; 91. a second via hole;

10. a first electrode;

11. a pixel defining layer; 111. a third via hole;

12. a light emitting layer group; 13. a second electrode; 14. packaging a layer group;

rr, thermistor;

r1, first subpixel; r2, a second subpixel; G. a third sub-pixel; B. a fourth sub-pixel;

t1, a first transistor; t2, a second transistor; t3, a third transistor; t4, a fourth transistor; t5, a fifth transistor; t6, a sixth transistor; t7, a seventh transistor;

KT1, a first switching transistor; KT2, a second switching transistor; QT, drive transistor;

q1, a first drive circuit; q2, a second drive circuit; q3, a third drive circuit; q4, fourth drive circuit; C. a capacitor; SCAN, scanning line; VDD, power line; DATA, DATA line; VSS, ground.

Detailed Description

Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus their detailed description will be omitted. Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale.

Although relative terms, such as "upper" and "lower," may be used in this specification to describe one element of an icon relative to another, these terms are used in this specification for convenience only, e.g., in accordance with the orientation of the examples described in the figures. It will be appreciated that if the device of the icon were turned upside down, the element described as "upper" would become the element "lower". When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure via another structure.

The terms "a," "an," "the," "said," and "at least one" are used to indicate the presence of one or more elements/components/parts/etc.; the terms "comprising" and "having" are intended to be inclusive and mean that there may be additional elements/components/etc. other than the listed elements/components/etc.; the terms "first," "second," and "third," etc. are used merely as labels, and are not limiting on the number of their objects.

The lifetime of the OLED display panel is mainly affected by EL (Electro-Luminescence) materials and environments. Because the service lives of the red sub-pixel, the green sub-pixel and the blue sub-pixel are different under the same current density, at normal temperature, the service lives are basically consistent by designing proper aperture ratio proportions of the red sub-pixel, the green sub-pixel and the blue sub-pixel at a product end, and thus, the OLED display panel does not have obvious color deviation, namely white balance residual image even if the OLED display panel works for a long time. However, at high temperature, the lifetime attenuation of the red sub-pixel is much larger than that of the blue sub-pixel and the green sub-pixel, so that the aperture ratios of the red sub-pixel, the green sub-pixel and the blue sub-pixel designed at normal temperature are not suitable at high temperature, and the whole display screen is greenish, i.e. color deviation, i.e. white balance residual image, occurs.

The present disclosure example embodiments provide a display panel, which may include, as shown in fig. 1, a driving backplane, a first subpixel R1, and a second subpixel R2; the driving backplane may include a first driving circuit Q1 and a second driving circuit Q2; the first sub-pixel R1 is arranged on one side of the driving backboard and is electrically connected to the first driving circuit Q1; the second sub-pixel R2 is disposed on one side of the driving backplane and electrically connected to the second driving circuit Q2, and when the operating temperature of the display panel is greater than or equal to the set temperature, the second driving circuit Q2 drives the second sub-pixel R2 to operate, and the light emitting color of the second sub-pixel R2 is the same as the light emitting color of the first sub-pixel R1.

According to the display panel and the display device, when the working temperature of the display panel is higher than or equal to the set temperature, the second driving circuit Q2 drives the second sub-pixel R2 to work, so that color deviation, namely white balance residual image, caused by the fact that the brightness of the first sub-pixel R1 is attenuated too fast when the temperature is high is made up through the second sub-pixel R2, white balance is well adjusted, and a good display picture is obtained.

In the present exemplary embodiment, the driving backplate may include a substrate base plate 1, and the material of the substrate base plate 1 may include an inorganic material, for example, the inorganic material may be glass, quartz, metal, or the like. The material of the base substrate 1 may also include an organic material, and for example, the organic material may be a resin-based material such as polyimide, polycarbonate, polyacrylate, polyetherimide, polyethersulfone, polyethylene terephthalate, and polyethylene naphthalate. The base substrate 1 may be formed by a plurality of material layers, for example, the base substrate 1 may include a plurality of base layers, and the material of the base layers may be any one of the above materials. Of course, the base substrate 1 may be provided as a single layer, and may be any one of the above materials.

A light shielding layer 2 can be further formed on one side of the substrate 1, and light rays incident into the active layer 4 from the substrate 1 can generate photon-generated carriers in the active layer 4, so that the characteristics of the transistor are greatly influenced, and the display image quality of the display device is finally influenced; the light shielding layer 2 can shield light incident from the base substrate 1, thereby preventing the characteristics of the transistor from being affected and preventing the display image quality of the display device from being affected.

The buffer layer 3 can be further formed on the side, away from the substrate 1, of the light shielding layer 2, the buffer layer 3 plays a role in blocking water vapor and impurity ions in the substrate 1 (particularly organic materials) and plays a role in increasing hydrogen ions for the active layer 4 formed subsequently, and the buffer layer 3 is made of an insulating material and can insulate and isolate the light shielding layer 2 from the active layer 4.

A first driving circuit Q1, a second driving circuit Q2, a third driving circuit Q3, and a fourth driving circuit Q4 may be disposed on a side of the buffer layer 3 away from the substrate base plate 1.

The second driving circuit Q2 may include a thermistor Rr having a first connection end electrically connected to the SCAN line SCAN and a second connection end electrically connected to a control end of at least one transistor, and at least two transistors.

The second drive circuit Q2 is exemplified below.

Referring to fig. 2, the second driving circuit Q2 may include a thermistor Rr, a first switching transistor KT1, a second switching transistor KT2, a driving transistor QT, and a capacitor C; the first connecting end of the thermistor Rr is electrically connected to the scanning line SCAN; the control end of the first switch transistor KT1 is electrically connected to the second connection end of the thermistor Rr, and the first end of the first switch transistor KT1 is electrically connected to the DATA line DATA; a control terminal of the second switching transistor KT2 is electrically connected to the SCAN line SCAN, and a first terminal of the second switching transistor KT2 is electrically connected to a second terminal of the first switching transistor KT 1; a control end of the driving transistor QT is electrically connected to a second end of the second switching transistor KT2, a first end of the driving transistor QT is electrically connected to the power supply line VDD, and a second end of the driving transistor QT is electrically connected to the second subpixel R2; the capacitor C is electrically connected between the second terminal of the second switching transistor KT2 and the power line VDD, that is, one electrode pad of the capacitor C is electrically connected to the second terminal of the second switching transistor KT2, and the other electrode pad of the capacitor C is electrically connected to the power line VDD.

In the present exemplary embodiment, the thermistor Rr may be a negative temperature coefficient thermistor, i.e., the resistance of the thermistor Rr decreases as the temperature increases. The negative temperature coefficient thermistor Rr material mainly comprises two or more than two metal oxide ceramics of manganese, copper, silicon, cobalt, iron, nickel, zinc and the like. The first switching transistor KT1 is an N-type transistor. In this case, the specific operation of the second driving circuit Q2 shown in fig. 2 is as follows:

in a low temperature state, the resistance R of the thermistor Rr is large, and therefore the voltage Vr divided by the thermistor Rr is large, the voltage Vg1 of the gate 6 of the first switching transistor KT1 is low, the first switching transistor KT1 is in an off state, a data signal cannot be input to the second switching transistor KT2 through the first switching transistor KT1, the driving transistor QT cannot be turned on, and therefore, the second subpixel R2 does not operate.

In a high temperature state, the resistance R of the thermistor Rr is small, so the voltage Vr divided by the thermistor Rr is small, the voltage Vg1 of the gate 6 of the first switching transistor KT1 is high, Vscan-Vr is high, the first switching transistor KT1 is turned on to be in an operating state, so that the data signal is transmitted to the first terminal of the second switching transistor KT2 through the first switching transistor KT1, and at this time, the scan signal Vscan is at a high potential, the second switching transistor KT2 is turned on to be in an operation state, so that the data signal is transmitted to the control terminal of the driving transistor QT and the capacitor C through the second switching transistor KT2, the capacitor C is charged to maintain the gate 6 voltage of the driving transistor QT, meanwhile, the driving transistor QT is turned on in an operating state so that a power signal of the power supply line VDD is input to the second sub-pixel R2 through the driving transistor QT, and the second sub-pixel R2 operates to emit light.

In other example embodiments of the present disclosure, the thermistor Rr may be a positive temperature coefficient thermistor Rr, i.e., the resistance of the thermistor Rr increases with increasing temperature. The positive temperature coefficient thermistor Rr material mainly comprises semiconductor ceramics such as BaTiO3, SrTiO3, PbTiO3 and the like. The first switching transistor KT1 is a P-type transistor. In this case, the specific operation of the second driving circuit Q2 shown in fig. 2 is as follows:

in a high temperature state, the resistance R of the thermistor Rr is large, so the voltage Vr divided by the thermistor Rr is large, the voltage Vg1 of the gate 6 of the first switching transistor KT1 is low, Vscan-Vr is low, the first switching transistor KT1 is turned on and in an operating state, so that the data signal is transmitted to the first terminal of the second switching transistor KT2 through the first switching transistor KT1, and at this time, the scan signal Vscan is at a high potential, the second switching transistor KT2 is turned on to be in an operation state, so that the data signal is transmitted to the control terminal of the driving transistor QT and the capacitor C through the second switching transistor KT2, the capacitor C is charged to maintain the gate 6 voltage of the driving transistor QT, meanwhile, the driving transistor QT is turned on in an operating state so that a power signal of the power supply line VDD is input to the second sub-pixel R2 through the driving transistor QT, and the second sub-pixel R2 operates to emit light.

In a low temperature state, the resistance Rr of the thermistor Rr is small, and therefore the voltage Vr divided by the thermistor Rr is small, the voltage Vg1 of the gate 6 of the first switching transistor KT1 becomes Vscan-Vr high, the first switching transistor KT1 is in an off state, a data signal cannot be input to the second switching transistor KT2 through the first switching transistor KT1, the driving transistor QT cannot be turned on, and therefore, the second subpixel R2 does not operate.

Each sub-pixel of OLED is the current drive device, and the electric current can not be stably stored, and voltage can be stored temporarily with electric capacity C, so set up drive transistor QT and convert the voltage of storing into the electric current, be responsible for converting the voltage of drive transistor QT grid 6 into the electric current that flows through drive transistor QT, and drive transistor QT and sub-pixel are the series connection structure, and the electric current of drive transistor QT is the electric current when the sub-pixel is worked promptly.

The gate 6 voltage is the DATA voltage, come from the DATA link DATA, but there are many DATA signals of the row on the DATA link DATA, so need a transistor namely the second switching transistor KT2, the selective gate 6 to insert the DATA signal into drive transistor QT, when the scanning signal is the turn-on signal, the DATA signal enters the gate 6 of the drive transistor QT, when the scanning signal is the turn-off signal, the gate 6 voltage of the drive transistor QT is irrelevant with the DATA signal, and the gate 6 voltage of this drive transistor QT is kept by the electric capacity C, if there is not this electric capacity C, the gate 6 voltage of the drive transistor QT can be very easy to drift.

Referring to fig. 3, in other example embodiments of the present disclosure, the second driving circuit Q2 may include a thermistor Rr, a first switching transistor KT1, a driving transistor QT, and a capacitor C; the first connecting end of the thermistor Rr is electrically connected to the scanning line SCAN; the control end of the first switch transistor KT1 is electrically connected to the second connection end of the thermistor Rr, and the first end of the first switch transistor KT1 is electrically connected to the DATA line DATA; a control end of the driving transistor QT is electrically connected to a second end of the first switching transistor KT1, a first end of the driving transistor QT is electrically connected to the power supply line VDD, and a second end of the driving transistor QT is electrically connected to the second subpixel R2; the capacitor C is electrically connected between the second terminal of the first switching transistor KT1 and the power line VDD, that is, one electrode plate of the capacitor C is electrically connected to the second terminal of the first switching transistor KT1, and the other electrode plate of the capacitor C is electrically connected to the power line VDD.

In the present exemplary embodiment, the thermistor Rr may be a negative temperature coefficient thermistor, i.e., the resistance of the thermistor Rr decreases as the temperature increases. The first switching transistor KT1 is an N-type transistor. In this case, the specific operation of the second driving circuit Q2 shown in fig. 3 is as follows:

in a low temperature state, the resistance R of the thermistor Rr is large, and therefore the voltage Vr divided by the thermistor Rr is large, the voltage Vg1 of the gate 6 of the first switching transistor KT1 is low, Vscan-Vr, the first switching transistor KT1 is in an off state, a data signal cannot be input to the driving transistor QT through the first switching transistor KT1, and the driving transistor QT cannot be turned on, and therefore, the second subpixel R2 does not operate.

In a high temperature state, the resistance R of the thermistor Rr is small, and therefore, the voltage Vr dropped by the thermistor Rr is small, the voltage Vg1 of the gate 6 of the first switch transistor KT1 is high, Vscan-Vr is high, the first switch transistor KT1 is turned on and is in an operating state, so that a data signal is transmitted to the control terminal of the driving transistor QT and the capacitor C through the first switch transistor KT1, the capacitor C is charged to maintain the voltage of the gate 6 of the driving transistor QT, meanwhile, the driving transistor QT is turned on and is in an operating state, so that a power signal of the power line VDD is input to the second subpixel R2 through the driving transistor QT, and the second subpixel R2 operates in a light emitting state.

In other example embodiments of the present disclosure, the thermistor Rr may be a positive temperature coefficient thermistor Rr, i.e., the resistance of the thermistor Rr increases with increasing temperature. The first switching transistor KT1 is a P-type transistor. In this case, the specific operation of the second driving circuit Q2 shown in fig. 3 is as follows:

in a high temperature state, the resistance R of the thermistor Rr is large, and therefore, the voltage Vr dropped by the thermistor Rr is large, the voltage Vg1 of the gate 6 of the first switch transistor KT1 is relatively low, the first switch transistor KT1 is turned on and in an operating state, so that a data signal is transmitted to the control terminal of the driving transistor QT and the capacitor C through the first switch transistor KT1, the capacitor C is charged to maintain the voltage of the gate 6 of the driving transistor QT, meanwhile, the driving transistor QT is turned on and in an operating state, so that a power signal of the power line VDD is input to the second subpixel R2 through the driving transistor QT, and the second subpixel R2 operates in a light emitting manner.

In a low temperature state, the resistance R of the thermistor Rr is small, and therefore the voltage Vr dropped by the thermistor Rr is small, the voltage Vg1 of the gate 6 of the first switching transistor KT1 is high, Vscan-Vr, the first switching transistor KT1 is in an off state, a data signal cannot be input to the driving transistor QT through the first switching transistor KT1, and the driving transistor QT cannot be turned on, and therefore, the second subpixel R2 does not operate.

Referring to fig. 4, in other example embodiments of the present disclosure, the second driving circuit Q2 may also be a 7T1C circuit, that is, the second driving circuit Q2 may further include a thermistor Rr, seven transistors and a capacitor C, where the seven transistors are respectively: a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and a seventh transistor T7.

The first connecting end of the thermistor Rr is electrically connected to the scanning line SCAN; a first terminal of the first transistor T1 is connected to the DATA line DATA, a second terminal of the first transistor T1 is connected to the N1 node, and a control terminal of the first transistor T1 is connected to the second connection terminal of the thermistor Rr; a first terminal of the second transistor T2 is connected to the N1 node, a second terminal of the second transistor T2 is connected to the N3 node, and a control terminal of the second transistor T2 is connected to the N2 node; a first terminal of the third transistor T3 is connected to the N3 node, a second terminal of the third transistor T3 is connected to the N2 node, and a control terminal of the third transistor T3 is connected to the SCAN line SCAN; a first terminal of the fourth transistor T4 is connected to the N2 node, a second terminal of the fourth transistor T4 is connected to (an initialization voltage line) Vinit, and a control terminal of the fourth transistor T4 is connected to a first Reset line Reset 1; a first terminal of the fifth transistor T5 is connected to the power supply line VDD, a first terminal of the fifth transistor T5 is connected to the N1 node, and a control terminal of the fifth transistor T5 is connected to the (control signal line) EM line; a first terminal of the sixth transistor T6 is connected to the N3 node, a second terminal of the sixth transistor T6 is connected to the N4 node, and a control terminal of the sixth transistor T6 is connected to the (control signal line) EM line; a first terminal of the seventh transistor T7 is connected to (an initialization voltage line) Vinit, a second terminal of the seventh transistor T7 is connected to the N4 node, and a control terminal of the seventh transistor T7 is connected to a second Reset line Reset 2.

The second sub-pixel R2 is electrically connected to the N4 node.

Since the data signal is written to the memory cell, the third transistor T3 and the first transistor T1 are required to be turned on simultaneously, and thus the thermistor Rr may be disposed at the control terminal of the first transistor T1, i.e., the first connection terminal of the thermistor Rr is electrically connected to the SCAN line SCAN, and the second connection terminal is electrically connected to the control terminal of the first transistor T1; the thermistor Rr may also be disposed at the control terminal of the third transistor T3, i.e., the first connection terminal of the thermistor Rr is electrically connected to the SCAN line SCAN, and the second connection terminal is electrically connected to the control terminal of the third transistor T3. In addition, the first connection terminal of the thermistor Rr may be electrically connected to the SCAN line SCAN, and the second connection terminal of the thermistor Rr may be electrically connected to the control terminal of the first transistor T1 and the control terminal of the third transistor T3. Of course, two thermistors Rr may be further provided, one connected between the control terminal of the first transistor T1 and the SCAN line SCAN, and the other connected between the control terminal of the third transistor T1T3 and the SCAN line SCAN.

The thermistor Rr may be a negative temperature coefficient thermistor Rr, i.e. the resistance of the thermistor Rr decreases with increasing temperature. The first transistor T1 and the third transistor T3 are N-type transistors. The specific working principle is as follows: at a high temperature, the resistance of the thermistor Rr is small, and the first transistor T1 and the third transistor T3 are turned on, so that the scan signal can be normally input to the first transistor T1 and the third transistor T3, and the second sub-pixel R2 normally emits light; at a low temperature, the resistance of the thermistor Rr is large, and the first transistor T1 and the third transistor T3 are turned off, so that the scan signal cannot be input to the first transistor T1 and the third transistor T3, and the second sub-pixel R2 cannot emit light.

The thermistor Rr may be a positive temperature coefficient thermistor Rr, i.e. the resistance of the thermistor Rr increases with increasing temperature. The first transistor T1 and the third transistor T3 are P-type transistors. The working principle of the body is as follows: at a high temperature, the resistance of the thermistor Rr is large, and the first transistor T1 and the third transistor T3 are turned on, so that the scan signal can be normally input to the first transistor T1 and the third transistor T3, and the second subpixel R2 normally emits light; at a low temperature, the resistance of the thermistor Rr is small, and the first transistor T1 and the third transistor T3 are turned off, so that the scan signal cannot be input to the first transistor T1 and the third transistor T3, and the second sub-pixel R2 cannot emit light.

While the second driving circuit Q2 has been described in detail with three specific examples, in other exemplary embodiments of the present disclosure, the second driving circuit Q2 may be "4T 1C", "6T 1C", "6T 2C", or "7T 2C". Where "T" represents a transistor, the number preceding "T" represents the number of transistors, "C" represents a storage capacitor, and the number preceding "C" represents the number of storage capacitors. The thermistor may be connected between the scan line and the transistor connected to the scan line.

In still other example embodiments of the present disclosure, the second driving circuit may include a driving transistor (e.g., the transistor T2 in fig. 4) whose gate material is a thermistor material. Specifically, the second driving circuit may have a structure of "2T 1C", "3T 1C", "6T 1C", "6T 2C", or "7T 2C", in which at least one of the transistors is a driving transistor, the gate material of the driving transistor is a thermistor material, and the thermistor material is a material whose resistance changes with a change in temperature, and is configured such that the driving transistor of the second driving circuit operates in a saturation region at a high temperature (greater than a set temperature, for example, > 50 ℃), and operates in a linear region at a low temperature (less than the set temperature, for example, < 50 ℃), and the lower the temperature, the smaller the operating current of the second subpixel is, so that the second subpixel does not operate at the low temperature and operates at the high temperature.

In other example embodiments of the present disclosure, the second driving circuit may include a transistor and a capacitor, and may further include a temperature control circuit, where the temperature control circuit may include a temperature sensor capable of sensing a temperature change, and the temperature sensor may detect an operating temperature of the display panel in real time, for example, when the operating temperature is greater than a set temperature, the temperature control circuit may enable the second driving circuit to control the second R pixel to enter an operating state.

In this case, the set temperature may correspond to an operating environment of the display panel. The working environment of the display panel may be divided according to seasons (spring, summer, autumn, and winter), i.e., the working environment may include spring, summer, autumn, and winter; for example, in spring and autumn, the set temperature may be 60 ℃, 65 ℃, etc.; in summer, the set temperature can be 50 ℃, 55 ℃ and the like; in winter, the set temperature may be 70 ℃, 75 ℃, and so on. The higher the ambient temperature is, the more unfavorable the heat dissipation is, therefore, the set temperature in this embodiment may be lowered with the increase of the ambient temperature.

The set temperature may also be a difference between the current operating temperature and the initial temperature, for example, when the temperature difference changes to be above 30 ℃, the temperature control circuit may enable the second driving circuit to control the second R pixel to enter the operating state, and the set temperature may still correspond to the operating environment of the display panel, which is not described herein.

In the present disclosure, the term "high temperature" means that the operating temperature of the display panel is equal to or higher than the predetermined set temperature.

With continued reference to fig. 1, from a cross-sectional view, the structures of the transistors may be substantially the same. The transistor may include an active layer 4, a gate electrode 6, a source electrode 81, and a drain electrode 82; specifically, the active layer 4 may include a channel portion 42 and conductor portions 41 provided at both ends of the channel portion 42, the active layer 4 may include a gate insulating layer 5 provided on a side of the active layer 4 remote from the substrate 1, a gate electrode 6 provided on the gate insulating layer 5, an interlayer dielectric layer 7 provided on a side of the gate electrode 6 remote from the substrate 1, and a first via hole 71 provided in the interlayer dielectric layer 7, the first via hole 71 being connected to the conductor portion 41; a source electrode 81 and a drain electrode 82 are provided on the side of the interlayer dielectric layer 7 away from the base substrate 1, and the source electrode 81 and the drain electrode 82 are connected to the two conductor portions 41 through the two first vias 71, respectively. A planarization layer 9 is disposed on the source and drain

electrodes

81 and 82 on the side away from the substrate base plate 1, and a second via 91 is disposed on the planarization layer 9, the second via 91 being connected to the source electrode 81.

The gate 6 is a control terminal of the transistor, the source 81 may be a first terminal of the transistor, and the drain 82 may be a second terminal of the transistor.

In fig. 1, only the driving transistors of the respective driving circuits are shown, and the switching transistors are not shown. When the gate electrode 6 is fabricated, the gate electrodes 6 of the first switching transistor KT1, the first transistor T1 and the third transistor T3 of the second driving circuit Q2 may be fabricated to be large, and at least a portion of the thermistor Rr may be directly formed at a side of the gate electrodes 6 of the first switching transistor KT1, the first transistor T1 and the third transistor T3 away from the substrate, so that the thermistor Rr is directly connected to the control terminals of the first switching transistor KT1, the first transistor T1 and the third transistor T3.

In the present example embodiment, the transistor may be a thin film transistor, and of course, in other example embodiments of the present disclosure, the transistor may be other types of field effect transistors.

It should be noted that the transistor described in this specification is a top-gate transistor, and in other example embodiments of the present disclosure, the transistor may also be a bottom-gate transistor or a dual-gate transistor, and details of the structure thereof are not described herein again.

As shown in fig. 1, four sub-pixels, namely a first sub-pixel R1, a second sub-pixel R2, a third sub-pixel G and a fourth sub-pixel B, are disposed on a side of the planarization layer 9 away from the substrate 1; the light emitting color of the second sub-pixel R2 is the same as that of the first sub-pixel R1, and is red; the first sub-pixel R1 is disposed adjacent to the second sub-pixel R2, facilitating the disposition of the respective sub-pixels, and facilitating the disposition of the driving circuit. The light emitting color of the third sub-pixel G is different from the light emitting color of the fourth sub-pixel B, the light emitting color of the third sub-pixel G is different from the light emitting color of the fourth sub-pixel B and the light emitting color of the first sub-pixel R1, the light emitting color of the third sub-pixel G is green, and the light emitting color of the fourth sub-pixel B is blue.

There are many arrangements and choices of sub-pixels in the display industry, and the arrangement and layout of sub-pixels are designed to improve the pixel density, improve the light-emitting quality, and reduce the power consumption of the shared pixels. Common RGB pixel arrangements or Diamond pixel arrangements are suitable for use in this disclosure.

The first, second, third and fourth sub-pixels R1, R2, G and B have substantially the same structure, and may include a first electrode 10, a pixel defining layer 11, a light emitting layer group 12 and a second electrode 13. Specifically, a first electrode 10 is disposed on the side of the planarization layer 9 away from the substrate base plate 1, the first electrode 10 is connected to the source 81 of the driving back plate through the second via 91, and the first electrode 10 may be an anode. The first electrode 10 of the first sub-pixel R1 is connected to the source 81 of the first driving circuit Q1, the first electrode 10 of the second sub-pixel R2 is connected to the source 81 of the second driving circuit Q2, the first electrode 10 of the third sub-pixel G is connected to the source 81 of the third driving circuit Q3, and the first electrode 10 of the fourth sub-pixel B is connected to the source 81 of the fourth driving circuit Q4.

A pixel defining layer 11 is disposed on a side of the first electrode 10 away from the substrate base plate 1, a third via hole 111 is disposed on the pixel defining layer 11, and a light emitting layer group 12 is disposed in the third via hole 111. A second electrode 13 is disposed on a side of the light emitting layer group 12 away from the substrate base plate 1, the second electrode 13 may be a cathode, and the second electrode 13 is connected to a ground line VSS.

An encapsulation layer group 14 is disposed on a side of the second electrode 13 away from the substrate base plate 1, and the encapsulation layer group 14 may be configured as multiple layers including an organic layer and an inorganic layer, and specific materials and layer numbers are not described herein again.

The light emitting layer group 12 may include a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer, which are sequentially stacked, the hole injection layer being in contact with the first electrode 10, and the electron injection layer being in contact with the second electrode 13. Of course, in other example embodiments of the present disclosure, the light emitting layer group 12 may include only a hole transport layer, a light emitting layer, and an electron transport layer, and the light emitting layer group 12 may also have other structures, and specific structures thereof may be provided as needed.

The first sub-pixel R1, the second sub-pixel R2, the third sub-pixel G, and the fourth sub-pixel B emit light of different colors, mainly, different materials of their light emitting layers.

At high temperature, the lifetime decay of the red sub-pixel is much greater than that of the blue and green sub-pixels, referring to a comparison graph of lifetime decay of the red sub-pixel at normal temperature (25 ℃) and high temperature (70 ℃) shown in fig. 5, the abscissa represents Time (Time) in hours (hrs) and the ordinate represents luminance percentage (LT%); at normal temperature, the service life of the red sub-pixel is longer when the brightness of the red sub-pixel is reduced to 95%; at high temperatures, the luminance of the red subpixel decays very quickly. Referring to a graph showing the life decay comparison of the green sub-pixel at normal temperature (25 ℃) and at high temperature (70 ℃), the green sub-pixel has a longer life when the brightness decays to 95% at normal temperature; at high temperatures, the luminance of the green sub-pixel decays relatively slowly. Referring to a graph showing the decay of lifetime of the blue sub-pixel at normal temperature (25 ℃) and at high temperature (70 ℃), the lifetime of the blue sub-pixel is longer when the luminance of the blue sub-pixel decays to 95% at normal temperature; at high temperatures, the luminance of the blue sub-pixel decays faster.

A table showing the lifetime decay comparison of the red and green sub-pixels is shown in table one.

Watch 1

LT95(hrs)	25℃	75℃
			R(LT1)	1004	240
G(LT2)	1084	650

LT95 indicates a lifetime in hours (hrs) for luminance decay to 95%. Under the condition of normal temperature (25 ℃), the service life of the red sub-pixel is about 1004 hours, and the service life of the green sub-pixel is about 1084 hours, which are not different; therefore, in the normal temperature design, the area of the red sub-pixel is substantially the same as the area of the green sub-pixel. At high temperatures (75 c), the lifetime LT1 of the red sub-pixel is approximately 240 hours, and the lifetime LT2 of the green sub-pixel is approximately 650 hours, which is approximately 2.7 times the lifetime of the red sub-pixel. Therefore, the lifetime of the red sub-pixel at high temperature is increased to the same level as that of the green sub-pixel, the area of the red sub-pixel needs to be increased, the current density flowing into the red sub-pixel at high temperature is reduced under the condition of constant current, and J1/J2 is approximately equal to 1.7/1 according to the current density (J1/J2). Lambda.1.75-LT 2/LT 1. Therefore, the area of the red sub-pixel at high temperature is 1.7 times of the area of the red sub-pixel at normal temperature; since both the second sub-pixel R2 and the first sub-pixel R1 are lit at a high temperature and only the first sub-pixel R1 is lit at a low temperature, the ratio of the area of the light-emitting layer group 12 of the second sub-pixel R2 to the area of the light-emitting layer group 12 of the first sub-pixel R1 is approximately 0.7: 1.

Of course, in the case where the material of the light emitting layer of the red sub-pixel is different, the ratio of the area of the light emitting layer group 12 of the second sub-pixel R2 to the area of the light emitting layer group 12 of the first sub-pixel R1 may not be 0.7: 1. The area of the light emitting layer group 12 of the second sub-pixel R2 is generally smaller than the area of the light emitting layer group 12 of the first sub-pixel R1.

In the case where the material selection of the light-emitting layer is different, the light-emitting color of the first sub-pixel R1 and the light-emitting color of the second sub-pixel R2 may be different colors, and may be blue or green, for example. The light-emitting areas of the sub-pixels mentioned above are areas parallel to the surface of the base substrate close to or far from the light-shielding layer, or areas of orthographic projections of the light-emitting layer group 12 of each sub-pixel on the base substrate. Since the light emitting layer group of the first sub-pixel R1 and the light emitting layer group 12 of the second sub-pixel R2 are formed through the same patterning process, the thickness of the light emitting layer group 12 of the first sub-pixel R1 and the thickness of the light emitting layer group 12 of the second sub-pixel R2 may be the same.

In addition, the first driving circuit Q1 may be the same as the third driving circuit Q3 and the fourth driving circuit Q4, and therefore, taking the first driving circuit Q1 as an example, the first driving circuit Q1 may not be provided with the thermistor Rr with respect to the second driving circuit Q2 shown in fig. 3, that is, the control terminal of the first switching transistor KT1 may be directly electrically connected to the SCAN line SCAN; the first driving circuit Q1 may not have the thermistor Rr with respect to the second driving circuit Q2 shown in fig. 4, i.e., the control terminal of the first transistor T1 is directly electrically connected to the SCAN line SCAN. The connection relationship of other transistors is the same, and the description is omitted here.

Referring to a schematic diagram of Color locus comparison of white balance CIE (Commission Internationale de l' Eclairage) of the display panel of the present disclosure in the prior art shown in fig. 8, an abscissa Wx represents a white balance abscissa, an ordinate Wy represents a white balance ordinate, in the diagram, a smallest elliptical circle represents 3.0JNCD (Just not able Color Difference, limit of distinction of human ability), a largest elliptical circle represents 5.2JNCD, a middle elliptical circle represents 4.5JNCD, and a smaller elliptical circle represents better white balance effect; the long straight line represents the white balance effect of the display panel in the prior art, the short straight line represents the white balance effect of the display panel disclosed by the invention, and the white balance is greatly deviated after the display panel works for a period of time in the prior art; when the second sub-pixel is enabled, namely the display panel of the present disclosure operates for the same time, the white balance is substantially at the origin position.

Referring to fig. 9, a schematic diagram of a time-dependent CIEY (CIE spectral stimulus value Y) curve of a display panel of the present disclosure and a prior art display panel is shown, where L1 represents a curve of a display panel of the prior art, and L2 represents a curve of a display panel of the present disclosure, it can be obtained that a change range of the CIEY of the display panel (provided with the second sub-pixel) of the present disclosure along with an operating time of the display panel is much smaller than that of the display panel of the prior art.

Based on the same inventive concept, the disclosed example embodiments provide a display device, which may include the display panel shown in any one of the above. The detailed structure of the display panel has already been described above, and therefore, the detailed description thereof is omitted here.

The specific type of the display device is not particularly limited, and any display device commonly used in the art may be used, specifically, for example, a mobile device such as a mobile phone, a wearable device such as a watch, a VR device, and the like.

It should be noted that the display device includes other necessary components and components besides the display panel, for example, a display, such as a housing, a circuit board, etc., and those skilled in the art can supplement the display device accordingly according to the specific use requirement of the display device, and the description thereof is omitted.

Compared with the prior art, the beneficial effects of the display device provided by the exemplary embodiment of the present invention are the same as those of the display panel provided by the above exemplary embodiment, and are not described herein again.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

Claims

1. A display panel, comprising:

2. The display panel according to claim 1, wherein the second driver circuit comprises:

3. The display panel according to claim 2, wherein the transistors are provided in two, respectively, as a first switching transistor and a driving transistor; the control end of the first switching transistor is electrically connected to the second connecting end of the thermistor, and the first end of the first switching transistor is electrically connected to a data line; the control end of the driving transistor is electrically connected to the second end of the first switching transistor, the first end of the driving transistor is electrically connected to a power line, and the second end of the driving transistor is electrically connected to the second sub-pixel;

the second drive circuit further includes:

4. The display panel according to claim 2, wherein the transistors are provided in three, which are a first switching transistor, a second switching thin film transistor, and a driving transistor; the control end of the first switch thin film transistor is electrically connected to the second connecting end of the thermistor, and the first end of the first switch thin film transistor is electrically connected to the data line; the control end of the second switch thin film transistor is electrically connected to the scanning line, and the first end of the second switch thin film transistor is electrically connected to the second end of the first switch thin film transistor; the control end of the driving thin film transistor is electrically connected to the second end of the second switch thin film transistor, the first end of the driving thin film transistor is electrically connected to a power line, and the second end of the driving thin film transistor is electrically connected to the second sub-pixel;

the second drive circuit further includes:

5. The display panel according to claim 3 or 4, wherein the thermistor is a negative temperature coefficient thermistor, and the first switching transistor is an N-type transistor; or, the thermistor is a positive temperature coefficient thermistor, and the first switching transistor is a P-type transistor.

6. The display panel according to claim 2, wherein the number of the transistors is seven, and the second connection terminal of the thermistor is electrically connected to one or both of a control terminal of the first transistor and a control terminal of the third transistor.

7. The display panel according to claim 6, wherein the thermistor is a negative temperature coefficient thermistor, and one or both of the first transistor and the third transistor are N-type transistors; or, the thermistor is a positive temperature coefficient thermistor, and one or two of the first transistor and the third transistor are P-type transistors.

8. The display panel according to claim 1, wherein the second driver circuit comprises:

and the grid material of the driving transistor is a thermistor material.

9. The display panel according to claim 1, wherein the emission color of the first sub-pixel and the emission color of the second sub-pixel are both red.

10. The display panel according to claim 1, wherein an area of the light emitting layer group of the second sub-pixel is smaller than an area of the light emitting layer group of the first sub-pixel.

11. The display panel according to claim 10, wherein a ratio of an area of the light-emitting layer group of the second subpixel to an area of the light-emitting layer group of the first subpixel is 0.7: 1.

12. The display panel according to claim 10, wherein the first sub-pixel and the second sub-pixel each include:

13. The display panel according to claim 1, wherein the first subpixel is disposed adjacent to the second subpixel.

14. The display panel of claim 1, wherein the driving backplane further comprises: a third driving circuit and a fourth driving circuit; the display panel further includes:

15. A display device, comprising: a display panel according to any one of claims 1 to 14.