CN114413941A

CN114413941A - Photocell detection system, code control method, processing chip, device, and medium

Info

Publication number: CN114413941A
Application number: CN202111644202.6A
Authority: CN
Inventors: 王书朋
Original assignee: Goertek Optical Technology Co Ltd
Current assignee: Goertek Techology Co Ltd
Priority date: 2021-12-29
Filing date: 2021-12-29
Publication date: 2022-04-29

Abstract

The invention discloses a photocell detection system, a coding control method, a processing chip, processing equipment and a computer readable storage medium, wherein the photocell detection system comprises a photocell array; a light source for transmitting a pulsed light signal to the array of photocells; the input end of the signal conditioning circuit is connected with the photocell pixels of the photocell array, and the signal conditioning circuit corresponds to the photocell pixels one by one; and the acquisition FPGA is connected with the output end of the signal conditioning circuit and is used for acquiring the time width of the output signal of the signal conditioning circuit and coding the output signal when the time width meets the condition. The invention aims to achieve the effect of reducing the production cost of the photocell detection system.

Description

Photocell detection system, code control method, processing chip, device, and medium

Technical Field

The present invention relates to the field of photoelectric technologies, and in particular, to a photoelectric cell detection system, a code control method, a processing chip, a processing device, and a computer-readable storage medium.

Background

In photoelectric detection application, each battery unit of each photoelectric cell is equivalent to a photoelectric signal detection pixel, each pixel can sense laser irradiation to generate parallel electric signals, and a plurality of arrayed photoelectric cells can form a two-dimensional coordinate for measuring the track and the speed of a two-dimensional moving object.

In the related art, when photoelectric detection is performed, AD (analog-digital) acquisition and quantization are performed on an electric signal subjected to photoelectric conversion to obtain a digital signal, so that coding calculation is performed, and in application of a photovoltaic cell array, each battery unit exists in parallel, and the photovoltaic cell array needs to detect each battery unit, so that an AD acquisition circuit is difficult to control, and the cost is high.

The above is only for the purpose of assisting understanding of the technical aspects of the present invention, and does not represent an admission that the above is prior art.

Disclosure of Invention

The invention mainly aims to provide a photocell detection system, a coding control method, a processing chip, processing equipment and a computer readable storage medium, and aims to solve the technical problems that an AD acquisition circuit of a related photocell detection system is difficult to control and the cost is high.

To achieve the above object, the present invention provides a photocell detection system comprising:

an array of photovoltaic cells;

a light source for transmitting a pulsed light signal to the array of photocells;

the input end of the signal conditioning circuit is connected with the photocell pixels of the photocell array, and the signal conditioning circuit corresponds to the photocell pixels one by one;

and the acquisition FPGA is connected with the output end of the signal conditioning circuit and is used for acquiring the time width of the output signal of the signal conditioning circuit and coding the output signal when the time width meets the condition.

Optionally, the signal conditioning circuit comprises:

the amplifying module is used for converting the current signal output by the photocell pixel into a voltage signal and amplifying the voltage signal;

the triangular wave conversion module is used for converting the voltage signal output by the amplification module into a constant-amplitude triangular wave signal;

and the comparison module is used for converting the triangular wave signal output by the triangular wave conversion module into a square wave signal and taking the square wave signal as the output signal.

Optionally, the logic IO port of the acquisition FPGA is connected to the output terminal of the signal conditioning circuit.

Optionally, the photocell detection system further comprises:

the main control FPGA is in communication connection with the acquisition FPGA and is used for summarizing the encoding result of the acquisition FPGA;

the acquisition FPGA and the master control FPGA communicate based on an RS485 protocol.

Optionally, the main control FPGA further comprises a USB interface, a wifi interface, a bluetooth interface and/or a wireless radio frequency interface, and the main control FPGA is in communication connection with other terminals through the USB interface, the wifi interface, the bluetooth interface and/or the wireless radio frequency interface.

The invention also provides a coding control method, which is applied to the photocell detection system and comprises the following steps:

when the FPGA detects the rising edge of the square wave signal, starting a counter;

when the falling edge of the square wave signal is detected, controlling the counter to stop counting, and acquiring the current count value of the counter;

and when the count value is greater than a preset threshold value, encoding the square wave signal.

Optionally, after the step of encoding the square wave signal, the method further includes:

and sending the coding result to a master control FPGA, wherein when receiving the coding result sent by the acquisition FPGA, the master control FPGA determines position information and time information corresponding to the coding result, generates a data frame according to the time information and the position information, and sends the data frame to other terminals.

The present invention also provides a processing chip, comprising: the encoding control method comprises a storage unit, a processing unit and an encoding program which is stored on the storage unit and can run on the processing unit, wherein the encoding program realizes the steps of the encoding control method when being executed by the processing unit.

The present invention also provides a processing apparatus, comprising:

the acquisition module is used for acquiring the rising edge of the square wave signal detected by the FPGA and starting a counter;

the acquisition module is used for controlling the counter to stop counting when the falling edge of the square wave signal is detected, and acquiring the current count value of the counter;

and the coding module is used for coding the square wave signal when the counting value is greater than a preset threshold value.

In the photocell detection system, a light source is set into a pulse type light beam, signals after conditioning are quantized by a comparator, signal edge collection is realized by matching with an FPGA, signal light intensity is calculated according to signal time information, and useful signals are judged. The acquired signals can be coded and overlapped with other information according to the needs, and the method improves the detection precision, expands the information breadth and saves the cost at the same time.

Drawings

FIG. 1 is an architectural diagram of a photocell detection system according to an embodiment of the present invention;

FIG. 2 is a block diagram of a signal conditioning circuit according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of the relationship of signals to clock cycles according to an embodiment of the present invention;

FIG. 4 is a graph of signal intensity versus time according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of a terminal structure of a hardware operating environment according to an embodiment of the present invention;

FIG. 6 is a flowchart illustrating an encoding control method according to an embodiment of the present invention;

fig. 7 is an analog-to-digital sampling circuit according to the related art;

fig. 8 is a schematic block diagram of a processing apparatus according to an embodiment of the present invention.

The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.

Detailed Description

It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

The photoelectric cell is a semiconductor element for converting light energy into electric energy, and the application of the current photoelectric cell relates to the fields of mechanical instruments, automatic remote measurement, remote control, photoelectric detection and the like. And the photovoltaic cell array integrates a plurality of cells on the panel. In photoelectric detection application, each battery unit of the integrated panel is equivalent to a photoelectric signal detection pixel, each pixel can sense laser irradiation to generate parallel electric signals, and a plurality of arrayed photocells can form a two-dimensional coordinate for measuring the track and the speed of a two-dimensional moving object. The traditional photoelectric detection method is to perform AD acquisition and quantization on the electric signal after photoelectric conversion into a digital signal so as to perform coding calculation. But because in photovoltaic cell array applications, each cell exists in parallel. Therefore, the conventional AD acquisition quantification method needs to detect each battery unit. And the AD acquisition circuit is difficult to control and has higher cost.

For example, referring to fig. 7, when sampling an optical signal based on an ADC (analog to digital converter), an ADC sampling module corresponding to each pixel needs to be provided. And the digital signal output by the ADC sampling module needs to be programmed according to the control command, and the I2C communication interface has limited resources, which makes the sampling mode difficult to control, and needs to use a plurality of ADCs to meet the sampling requirement, resulting in high cost.

Therefore, in order to solve the above-mentioned drawbacks of the related art and achieve the effect of reducing the equipment cost, the present invention provides a method for quantizing a waveform signal. The light source is set to be a pulse type light beam, the conditioned signal is quantized by the comparator, signal edge collection is realized by matching with an FPGA (Field Programmable Gate Array), and then the signal light intensity is calculated according to the signal time information to judge a useful signal.

In addition, in the invention, the acquired signals can be coded and overlapped with other information according to the needs, and the method improves the detection precision, expands the information breadth and saves the cost.

In order to make the protection scope of the claims of the present invention better understood, the photocell detection system proposed by the present invention is further explained below with the attached drawings. It is to be understood that the following is not intended to limit the invention.

Referring to fig. 1, the photocell detection system includes a light source 100, a photocell array 210, a signal conditioning circuit 220, a collection FPGA230 and a main control FPGA 240.

The photovoltaic cell array 210 includes a plurality of photovoltaic cell pixels 211. The output end of each photocell pixel 211 is connected to the input end of the corresponding signal conditioning circuit 220. The output end of each signal conditioning circuit 220 is connected with the input end of the acquisition FPGA 230. The output end of the acquisition FPGA230 is connected with the input end of the main control FPGA 240.

The light source 100 is configured as a laser light source 100. for example, the light source 100 can be configured as a pulse laser beam emitter that alternately emits a laser beam that impinges on the surface of the photocell pixel 211 to generate a pulsed current signal.

Optionally, referring to fig. 2, as an alternative embodiment, the signal conditioning circuit 220 includes: an amplifying module 221, a triangular wave converting module 222, and a comparing module 223. The photoelectric conversion device comprises an amplifying module 221, a triangular wave converting module 222 and a comparing module 223, wherein the amplifying module 221 is used for converting a current signal output by a photocell pixel 211 into a voltage signal and amplifying the voltage signal, the triangular wave converting module 222 is used for converting the voltage signal output by the amplifying module 221 into a constant-amplitude triangular wave signal, and the comparing module 223 is used for converting the triangular wave signal output by the triangular wave converting module 222 into a square wave signal and taking the square wave signal as an output signal.

Illustratively, the photovoltaic cell 211 converts light into a current signal, and the current signal is used as an input of the amplifying module 221, and the amplifying module 221 performs current-voltage conversion on the input current signal and amplifies the current signal into a square wave type electric signal with a duty ratio of 50%. The square wave voltage signal obtained by the conversion is input into the triangular wave conversion module 222, and the square wave voltage signal is converted into a triangular wave signal with a constant amplitude value after passing through the triangular wave conversion module 222. The triangular wave signal is then input to the comparison module 223 and converted into square wave signals of different duty ratios.

It should be noted that, in this embodiment, the threshold voltage of the comparing module 223 can be adjusted, and the threshold can be set according to specific needs. Therefore, a beam of laser light spot is irradiated on the surface of the detector, the detector senses that the amplitude of the electric signal with different brightness can change, and the square wave signals with different duty ratios are obtained after quantization by the comparator.

It will be appreciated that the photocell array 210 comprises a plurality of photocell cells 211, and that the photocell detection system is provided with the signal conditioning circuit 220 connected to each of the photocell cells 211.

Further, the output end of the signal conditioning circuit 220 is connected to a logic IO port of the acquisition FPGA 230. The acquisition FPGA230 is connected to an output end of the signal conditioning circuit 220, and is configured to acquire a time width of an output signal of the signal conditioning circuit 220, and encode the output signal when the time width satisfies a condition. It will be appreciated that each photocell 211 may correspond to a different pin of the acquisition FPGA230, such that when the acquisition FPGA230 receives an output signal from one of the signal conditioning circuits 220, it can determine from which photocell 211 the signal originated.

Illustratively, each photocell pixel 211 corresponds to a separate signal conditioning circuit 220, the signal is connected to a logic IO port of the acquisition FPGA230 via the conditioning circuit, and the internal logic of the FPGA detects a rising edge of the square wave signal to start counting and detects a falling edge of the square wave signal to stop counting. This results in the time width of the signal (as shown in fig. 3), which is determined to be a valid signal when the clock count value reaches the designed count threshold, and then the signal is encoded. Each photocell pixel 211 can be used as a coordinate in an array, and can also be superimposed with time information or other useful information, and the encoded signals are summarized by the main control FPGA240 and then sent to an interactive interface or other terminal 260 (for example, an upper computer or a display) through a transmission medium for processing. Because each acquisition FPGA230 needs an external clock, if the space is enough, all the acquisition FPGAs 230 can use the same external crystal oscillator, and if the space is limited and a back plate is needed, each acquisition FPGA230 system can be connected to the main control FPGA240, and the second pulse signal of the main control FPGA240 is received to perform time counting synchronization. Optionally, in some embodiments, the Beidou chip 250 may also be used for time width calculation. Wherein, when being provided with big dipper chip 250, big dipper chip 250 can also include mushroom antenna 251.

As an exemplary embodiment, the light source 100 may be configured as a 2kHz pulsed laser emitting a beam of pulses for a period of 500 mS. As shown in fig. 4, T0 is 500 ms. Vref is the set comparator threshold voltage and t0 is the collection of the conditioned pulse signal time interval collected by FPGA 230. V is the voltage after the conversion of the light intensity to be measured, and is based on the following formula:

the light intensity is quantized to a time measure of the pulse signal.

The scheme provided by the embodiment is suitable for signal quantization acquisition of the photovoltaic cell array 210 and other pixel-independent photoelectric detection array devices, compared with the method for acquiring quantized photoelectric signals by adopting AD (analog-digital), the method is easy to control and saves cost, the quantization precision of the method mainly depends on the sampling capability of the acquisition FPGA230, and when the clock of the acquisition FPGA230 is 50MHz, the sampling precision is 20 ns. If higher precision is needed, the PLL inside the acquisition FPGA230 can divide the frequency of the clock to obtain finer sampling precision, and the acquisition FPGA230 operates in parallel and is favorable for various communication logic programs, so that each communication interface is favorable for operation.

Optionally, in an exemplary embodiment, the signaling protocol for communication between the acquisition FPGA230 and the master FPGA240 may be customized, including handshaking information, location information, time information, or other useful information. For example, serial communication may be adopted and an RS485 transceiver is changed into differential signal transmission, so that the interference resistance in the signal transmission process is stronger, when the light source 100 irradiates one photocell pixel 211 of one photocell array 210, if the main control FPGA240 receives the signal that is determined by the acquisition FPGA230 to be a useful signal, the position information of the photocell pixel 211 may be recorded, and then time information is superimposed. The time can be generated by internal logic counting of the main control FPGA240 or by an external Beidou chip. The signal with the time information superimposed thereon is then encoded, so that the encoded frame data can be transmitted to other terminals 260 (for example, an upper computer or a display) through a USB, a network port, a wifi & BT (bluetooth) or an RF (radio frequency) transceiver for the other terminals to process.

Referring to fig. 5, the present invention further provides a chip, which may be an FPGA. The chip may include, inside, a processing unit 1001, an interface 1003, a storage unit 1004, and a communication bus 1002. Wherein a communication bus 1002 is used to enable connective communication between these components. The interface 1003 is provided in communication with other devices or with other components. The storage unit 1004 may also be a storage device independent of the aforementioned processing unit 1001.

Those skilled in the art will appreciate that the termination structure shown in fig. 5 does not constitute a limitation on the chip, and may include more or fewer components than those shown, or some components may be combined, or a different arrangement of components.

As shown in fig. 5, the storage unit 1004 may include therein a control system, an interface module, and a coding program. In the chip shown in fig. 5, the processing unit 1001 may be configured to call up the coding program stored in the storage unit 1004 and perform the following operations:

Optionally, in some embodiments, the processing unit 1001 may be further configured to call the coding program stored in the storage unit 1004 and perform the following operations:

Optionally, referring to fig. 6, an embodiment of the present invention further provides a coding control method, where the coding control method includes the following steps:

step S10: when the FPGA detects the rising edge of the square wave signal, starting a counter;

step S20: when the falling edge of the square wave signal is detected, controlling the counter to stop counting, and acquiring the current count value of the counter;

step S30: and when the count value is greater than a preset threshold value, encoding the square wave signal.

In this embodiment, the code control method may be implemented by the acquisition FPGA of the photocell detection system described in the above embodiments.

In the photocell detection system, when laser emitted by a light source irradiates on photocell pixels, the photocell pixels generate current, and after the current signals are input into a signal conditioning circuit, the signal conditioning circuit converts the current signals into square wave type voltage signals with different duty ratios.

After the acquisition FPGA receives the square wave type voltage signal, rising edge detection can be carried out on the square wave type voltage. When a rising edge is detected, a counter is started to start counting. When the falling edge is detected, the counter is controlled to stop counting.

It should be noted that the counter is driven by a clock signal, and thus the count value of the counter represents the number of cycles of the clock signal in the counting stage. Since the period duration of the clock signal is a known constant value. The count value thus characterizes a time information.

Further, after the counter stops counting, the current count value of the counter may be acquired. When the count value is greater than the preset threshold value, it is indicated that the time width corresponding to the square wave type voltage signal (described as the input signal below) is greater than the preset width. Therefore, the input signal can be determined to be a useful signal. And then encodes the input signal.

Optionally, after the encoding is completed, the acquisition FPGA may send the encoding result to the master FPGA. When the main control FPGA receives the coding result, the main control FPGA can judge that the corresponding photocell signal detects a useful signal. Therefore, the position information and the time information corresponding to the encoding result can be determined, a data frame is generated according to the time information and the position information, and the data frame is sent to other terminals.

In the technical scheme disclosed in this embodiment, when the acquisition FPGA detects a rising edge of a square wave signal, the counter is started, when a falling edge of the square wave signal is detected, the counter is controlled to stop counting, a current count value of the counter is obtained, and when the count value is greater than a preset threshold value, the square wave signal is encoded. The detection of the light intensity signal can be converted into the quantification of pulse time information, so that the FPGA can directly collect and extract effective information of the signal conveniently, and the signal quantification has strong real-time performance.

Referring to fig. 8, the present invention further provides a processing apparatus 10, where the processing apparatus 10 includes:

the acquisition module 11 is used for acquiring that when the FPGA detects the rising edge of the square wave signal, a counter is started;

the obtaining module 12 is configured to control the counter to stop counting when the falling edge of the square wave signal is detected, and obtain a current count value of the counter;

and the encoding module 13 is configured to encode the square wave signal when the count value is greater than a preset threshold value.

Optionally, after the encoding the square wave signal, the method further includes:

The present invention also provides a computer-readable storage medium having stored thereon an encoding program which, when executed by a processing unit, implements the steps of the encoding control method as described above.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.

The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.

Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on this understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) as described above and includes instructions for causing a device to execute the methods according to the embodiments of the present invention.

The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims

1. A photocell detection system, comprising:

an array of photovoltaic cells;

2. The photocell detection system of claim 1, wherein the signal conditioning circuit comprises:

3. The photocell detection system according to claim 1, wherein the acquisition FPGA has a logic IO port connected to an output of the signal conditioning circuit.

4. The photocell detection system according to claim 1, further comprising:

5. The photocell detection system according to claim 1, wherein the master FPGA further comprises a USB interface, a wifi interface, a bluetooth interface and/or a wireless radio frequency interface, and the master FPGA is communicatively connected to other terminals through the USB interface, the wifi interface, the bluetooth interface and/or the wireless radio frequency interface.

6. A code control method applied to the photocell detection system according to any one of claims 1 to 5, the code control method comprising:

7. The encoding control method of claim 6, wherein said step of encoding said square wave signal is followed by further comprising:

8. A processing chip, comprising: a storage unit, a processing unit and a coding program stored on the storage unit and executable on the processing unit, the coding program implementing the steps of the coding control method according to claim 6 or 7 when executed by the processing unit.

9. A processing device, characterized in that the processing device comprises:

10. A computer-readable storage medium, characterized in that the computer-readable storage medium has stored thereon a code program which, when executed by a processing unit, implements the steps of the code control method according to claim 6 or 7.