CN114390210A

CN114390210A - Image processing method, system, electronic equipment and storage medium

Info

Publication number: CN114390210A
Application number: CN202210289733.6A
Authority: CN
Inventors: 谢虹波; 费强; 王芳; 林坚创; 孙景旭; 任建岳
Original assignee: Individual
Current assignee: Individual
Priority date: 2022-03-23
Filing date: 2022-03-23
Publication date: 2022-04-22
Anticipated expiration: 2042-03-23
Also published as: CN114390210B

Abstract

The application provides an image processing method, an image processing system, electronic equipment and a storage medium, which relate to the technical field of image processing and have the technical scheme that: the method comprises the following steps: carrying out delay adjustment on data; sampling the data subjected to delay adjustment to obtain the state distribution of a sampling result; determining an optimal sampling position according to the state distribution of the sampling result; and acquiring the image according to the optimal sampling position. The image processing method, the image processing system, the electronic equipment and the storage medium have the advantages of stably processing high-speed image data with high quality.

Description

Image processing method, system, electronic equipment and storage medium

Technical Field

The present application relates to the field of image processing technologies, and in particular, to an image processing method, an image processing system, an electronic device, and a storage medium.

Background

In recent years, to meet the increasing demands of national defense, ground survey, industrial exploration and artificial intelligence, image sensors have been developed explosively, and among them, space remote sensing cameras are being developed toward large-width, high-resolution and miniaturization. The image sensor is used as a core component of a remote sensing camera, and the development of the image sensor tends to the aspects of large area array, small pixel, low power consumption, high quantum efficiency and the like. The image sensor based on the CMOS process is the mainstream research direction at present by virtue of the advantages of mature process technology, low power consumption, easy integration, etc. CMOS sensors typically integrate a photosensing unit, a pixel shift, a front-end amplifier, an analog-to-digital conversion circuit, and an auxiliary timing control unit. At present, pixels of an industrial camera are approximately in the million orders, pixels of a large-sized wide-area array detector are in the million orders, and reading and collecting of massive pixel data is a key technology for development of the large-sized wide detector.

In many applications, it is often desirable to achieve high frame rates and large widths. The current single-chip CMOS image sensor of the remote sensing camera has hundreds of millions of pixels, and the frame frequency can reach dozens of frames, so that the data rate with high bandwidth is a huge challenge for a rear-end data receiving system. At present, a plurality of parallel channels are generally adopted for outputting large-area array pixels, how to acquire and receive multi-channel high-speed data is a key problem in the design of a detector drive, because the data of each channel is transmitted in a serial transmission mode, because a detector clock and the data are respectively output by adopting independent serial channels and then are designed on a board level, and finally reach a receiving system, at a receiving end, the time delay of the channels may not be consistent, and the phases between the data channels and between the clock and the data have various conditions.

In view of the above problems, improvements are needed.

Disclosure of Invention

An object of the present application is to provide an image processing method, system, electronic device, and storage medium having advantages of stably and high-quality processing of high-speed image data.

In a first aspect, the present application provides an image processing method, which includes:

the method comprises the following steps:

carrying out delay adjustment on the specified data;

sampling the data subjected to delay adjustment to obtain the state distribution of a sampling result;

determining an optimal sampling position according to the state distribution of the sampling result;

and acquiring image data according to the optimal sampling position.

Because the relative phase position of the data of each channel and the sampling clock is an unknown state, the specified data is subjected to delay adjustment, the delayed data is acquired to obtain the state distribution of the sampling result, then the optimal sampling position is determined according to the state distribution of the sampling result, the sampling stability can be ensured by acquiring the image data at the optimal sampling position, the introduction of error codes is avoided, the quality of image processing can be effectively improved, and the method has the advantages of stably and high-quality processing of high-speed image data.

Further, in the present application, the step of adjusting the delay of the data includes:

obtaining a symbol width of the data;

configuring an adjustable delay time interval according to the code element width to enable the adjustable delay time interval to be larger than or equal to the code element width;

determining the maximum delay adjustment step number according to the adjustable delay time interval and a preset delay adjustment step length;

and carrying out delay adjustment on the data according to the delay adjustment step length and the maximum delay adjustment step number.

According to the above steps, it is possible to implement a traversal of the entire data width to determine the boundaries of the state distribution of the sampling result.

Further, in this application, the step of sampling the data after delay adjustment to obtain the state distribution of the sampling result includes:

keeping a sampling clock unchanged, and repeatedly sampling the data subjected to delay adjustment each time;

after repeated sampling, marking the interval with the sampling result stabilized as 0 or stabilized as 1 as a stable state, and marking the interval with the sampling result having 0 and 1 as a metastable state;

because the relative phase of the input data and the sampling clock is unknown, the data is subjected to time delay adjustment for multiple times, and then the steady-state and metastable-state distribution is obtained according to the sampling result through large-scale sampling.

And keeping the sampling clock unchanged, carrying out time delay and phase shift on the data, and then carrying out a large amount of sampling to obtain the steady-state and metastable-state distribution of the sampling result for determining the optimal sampling position.

Further, in the present application, the step of determining an optimal sampling position according to the state distribution of the sampling result includes:

selecting the interval with the maximum steady-state range as a sampling interval;

and taking the middle sampling position of the sampling interval as an optimal sampling position.

Further, in the present application, the method further includes:

acquiring an instruction for executing image data acquisition;

sending initialization data according to the instruction for executing image data acquisition; the data for performing the delay adjustment is the initialization data.

Further, in the present application, the method further includes:

establishing a query form according to the initialization data;

and inquiring the initialization data transmitted by each channel according to the inquiry form, and aligning the initialization data transmitted by each channel.

In a second aspect, the present application further provides an image processing system comprising:

the acquisition processing module is used for finding out an optimal sampling position and acquiring image data according to the optimal sampling position;

the pixel recombination module is used for receiving the image data acquired by the acquisition processing module and recombining the image data to form combined data;

the cache module is used for caching the combined data;

and the packet sending module is used for carrying out packet sending on the combined data according to an output protocol.

Further, in the present application, the acquisition processing module includes:

the delay unit is used for carrying out delay adjustment on the data;

the first acquisition unit is used for sampling the data subjected to delay adjustment to obtain the state distribution of a sampling result;

the processing unit is used for determining the optimal sampling position according to the state distribution of the sampling result;

and the second acquisition unit is used for sampling the image according to the optimal sampling position.

In a third aspect, the present application further provides an electronic device, comprising a processor and a memory, where the memory stores computer readable instructions, and the computer readable instructions, when executed by the processor, perform the steps of the method according to any one of the above.

In a fourth aspect, the present application also provides a storage medium having a computer program stored thereon, which, when executed by a processor, performs the steps of the method according to any one of the above.

Therefore, according to the image processing method, the image processing system, the electronic device and the storage medium, the data are subjected to delay adjustment, the state distribution of the sampling result is obtained by collecting the data after different delays, the optimal sampling position is determined according to the state distribution of the sampling result, the stability of sampling can be guaranteed by sampling the image at the optimal sampling position, the introduction of error codes is avoided, the quality of image processing can be effectively improved, and the beneficial effects of stably and high-quality processing of high-speed image data are achieved.

Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

Fig. 1 is a flowchart of an image processing method provided in the present application.

Fig. 2 is a schematic structural diagram of an image processing system according to the present application.

Fig. 3 is a schematic structural diagram of an acquisition processing module provided in the present application.

Fig. 4 is a schematic structural diagram of an acquisition processing module provided in the present application.

Fig. 5 is a schematic diagram of block output of image sensor data.

FIG. 6 is a diagram illustrating the phase relationship between multi-channel data and a sampling clock.

Fig. 7 is a schematic diagram of an optimal sampling position provided by the present application.

Fig. 8 is a schematic diagram of an optimal sampling position provided by the present application.

Fig. 9 is a schematic diagram of an optimal sampling position provided by the present application.

Fig. 10 is a schematic diagram of a splicing situation of data after serial-parallel conversion.

Fig. 11 is a schematic view of an electronic device provided in the present application.

In the figure: 100. an acquisition processing module; 200. a pixel recombination module; 300. a cache module; 400. a package sending module; 500. a control module; 110. a delay unit; 120. a first acquisition unit; 130. a processing unit; 140. a second acquisition unit; 150. a judgment element; 160. a word alignment element; 170. a multiplexer unit; 180. a serial-to-parallel conversion unit; 190. a differential-to-single-ended unit; 1100. a delay control unit; 610. a memory; 620. a processor; 001. an image sensor.

Detailed Description

The technical solutions in the present application will be described clearly and completely with reference to the drawings in the present application, and it should be understood that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. The components of the present application, as generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.

When a large-area array image sensor transmits data, as shown in fig. 5, the entire width is usually divided into multiple regions and output through multiple parallel channels, in the figure, CH0 and CH1_n-1Representing n channels, the data of each channel is transmitted in a serial transmission manner, as shown in fig. 6, the image sensor will emit a sampling clock, i.e. CLK, which is the same as the data, however, since the data is output by using independent serial channels and then passes through a board level design, the delays of different channels will be different, as shown in fig. 6, the delays of CH0 and CH1 are

The actual situation of the phase between the sampling clock and the data may be in various situations, because the phase situation becomes unknown, if the sampling edge of the sampling clock just corresponds to the transition edge of the data, the data sampled at this time may be 0 or 1, so the sampling result becomes unstable, and an error code is easily introduced, which causes an undesirable image processing effect, and therefore, how to acquire stable data in the image processing becomes a key.

In view of the above, referring to fig. 1, the present application provides an image processing method, which specifically includes:

s110, carrying out delay adjustment on the specified data;

s120, sampling the data subjected to delay adjustment to obtain the state distribution of a sampling result;

s130, determining an optimal sampling position according to the state distribution of the sampling result;

and S140, acquiring image data according to the optimal sampling position.

Through the technical scheme, because the relative phase of the data of each channel and the sampling clock is in an unknown state, the specified data is subjected to delay adjustment, the data after delay is collected to obtain the state distribution of the sampling result, then the optimal sampling position is determined according to the state distribution of the sampling result, the sampling stability can be ensured by collecting the image data at the optimal sampling position, the introduction of error codes is avoided, the quality of image processing can be effectively improved, and the beneficial effect of stably and high-quality processing of high-speed image data is achieved.

Further, in some embodiments, the step of adjusting the delay of the data comprises:

obtaining the code element width of data;

wherein the symbol width may be determined according to the size of the serial data rate.

Through the technical scheme, the adjustable delay time interval is configured according to the code element width, so that the adjustable delay time interval is larger than or equal to the code element width, and the purpose is to traverse the whole data width to determine the boundary of the state distribution of the sampling result.

Specifically, the maximum number of delay adjustment steps can be expressed as:

；

wherein the content of the first and second substances,

indicating the maximum number of steps of the delay adjustment,

indicates an adjustable delay time interval,

The step size of the delay adjustment is indicated,

the value of (b) is generally determined by hardware, and there are usually different gear options available.

Further, in some embodiments, the step of sampling the delay-adjusted data to obtain the state distribution of the sampling result includes:

keeping the sampling clock unchanged, and repeatedly sampling the data subjected to delay adjustment each time;

and after the data is subjected to time delay adjustment for multiple times, the steady-state and metastable-state distribution of the sampling result is obtained.

Wherein the distribution of the steady-state and the metastable-state can be represented by means of forming an eye diagram, as shown in fig. 7 to 9.

Through the technical scheme, the sampling clock is kept unchanged, the data is sampled, because the relative phase of the input data and the sampling clock is unknown, if the sampling edge of the sampling clock just corresponds to the transition edge of the data, the sampled data can be 0 or 1, the data acquisition result becomes uncertain, namely the sampled data is in a metastable state, and the steady state refers to the stable state of the data corresponding to the sampling clock, so that the sampled data is stable, and is either 0 or 1. Because the relative phase of the input data and the sampling clock is unknown, the initial phase position of the sampling clock and the data can be influenced by the difference of components, the difference of the wiring length of the circuit board and the like, so that the sampling clock is kept unchanged, the data is subjected to time delay and phase shift, and then a large amount of sampling is carried out, so that the steady-state and metastable-state distribution of the sampling result is obtained and the optimal sampling position is determined.

Specifically, when the adjustable delay time interval is greater than or equal to the symbol width, a delay adjustment step length is set for scanning, whether a sampling result is stable or not is counted at each scanning point, specifically, a sensor working mode is set, so that the image sensor outputs a repeated sequence, data is repeated at intervals, for example, 12' h98E is output, that is, data including 12 bits is output, if the current sampling position belongs to a steady-state interval, the sampling data at every 12 bits is the same, and if the sampling data after 12 bits are different, the current sampling position is considered to be in a metastable state, the steady-state interval and the metastable-state interval are scanned in this way, and then the state distributions of the steady state and the metastable state are obtained.

Further, as shown in fig. 7 to 9, in some embodiments, the step of determining the optimal sampling position according to the state distribution of the sampling result includes:

and taking the middle sampling position of the sampling interval as the optimal sampling position.

By the technical scheme, the sampling result within the steady-state range is stable, namely 0 or 1, the situation that the sampling is 0 and 1 next time does not occur, the sampling at the sampling position can ensure the stability of the sampling result, the introduction of error codes is effectively reduced, the larger the steady-state range is, the smaller the probability of sampling errors is, and therefore, the sampling is performed within the interval with the largest steady-state range, and the quality of image processing is further improved. However, this is not enough, because when the sampling edge of the sampling clock corresponds to the transition edge of the data, the sampling result may be 1 or 0, and even though a large number of samples are taken, the boundary position between the steady state and the metastable state still has the same sampling result after a plurality of times of sampling, that is, the section originally in the metastable state is regarded as the steady state, and therefore, it is not enough to take the sampling only in the steady state section, and therefore, taking the middle sampling position of the sampling section as the optimal sampling position, and taking the image sampling according to the optimal sampling position can ensure the stability of the sampling.

Specifically, in some embodiments, there are three situations of steady-state distribution and metastable-state distribution obtained according to the sampling result in practical application.

The first case is shown in FIG. 7, where the steady state interval is

And

in this case, comparison is made

And

the interval size of (2) is selected as the sampling interval with a large interval range, as shown in fig. 7,

is greater than

And thus will be

As a sampling interval, and

as the optimal sampling position.

The second case is shown in FIG. 8, where the steady state interval is

In this case, the steady-state interval is only

Thus can be directly connected with

As the optimal sampling position.

In the third situation, as shown in fig. 9, the scanning interval spans three steady-state intervals, and at this time, only four sampling points may be obtained, and the steady-state interval is determined to be

And

then compare

And

the interval size of (a) is selected to be a sampling interval with a large interval range, as shown in the figure,

is greater than

And thus will be

As a sampling interval, and

as the optimal sampling position. In addition, six sampling points can be obtained, the size of each steady-state interval is judged, and then a sampling interval and an optimal sampling position are selected.

Further, in some of the embodiments, the method further comprises:

acquiring an instruction for executing image acquisition;

and sending initialization data according to an instruction for executing image acquisition, wherein the data for performing delay adjustment is the initialization data. The data for performing the delay adjustment referred to herein is the above-mentioned designated data.

According to the technical scheme, after the instruction for executing image acquisition is obtained, the preset initialization data is sent, then the preset initialization data is subjected to delay adjustment, and the optimal sampling position is found through the initialization data.

Specifically, in some embodiments, a single channel is sampled at a time by using initialization data, an optimal sampling position of the channel is found, and after the optimal sampling position of the channel is determined, the optimal sampling positions of other channels are determined in turn.

Since the image data is transmitted in a serial manner by a single bit, the receiving end usually cannot determine the start bit of the image data, as shown in fig. 10, when transmitting a data with 12 bits, there may occur 12 kinds of splicing situations, that is, some bits of the previous pixel and some bits of the next pixel are spliced together after serial-to-parallel conversion, so that the bits are dislocated, which may cause image confusion and errors.

In this regard, in some embodiments, the method further comprises:

establishing a query form according to the initialization data;

Through the technical scheme, the initialization data transmitted by each channel can be shifted by utilizing the query form, the shifting number of the data of each channel can be known through the query form because the initialization data is known in advance, the initialization data can be accurately acquired by each channel through manual shifting, namely, the word alignment of each channel is completed, and the stability of data transmission is ensured.

In addition, after word alignment of each channel is completed, pixel delay may occur between different channels, and at this time, channel alignment needs to be performed according to a frame header before an effective pixel.

In a second aspect, as shown in fig. 2, the present application further provides an image processing system, comprising:

an acquisition processing module 100, configured to find an optimal sampling position and acquire image data according to the optimal sampling position;

the pixel recombination module 200 is configured to receive the image data acquired by the acquisition processing module 100, and recombine the image data to form combined data;

a caching module 300 for caching the combined data;

a packet sending module 400, configured to send the combined data in packets according to the output protocol.

Through the technical scheme, the optimal sampling positions of all channels are found by using the acquisition processing module 100, then the image data are acquired according to the optimal sampling positions, so that the stability of the acquired image data is ensured, the introduction of error codes is reduced as much as possible, a foundation is laid for high-quality image processing, after the image data are acquired, the image data need to be recombined, because the number of pixels is large when the width is large, the number of the pixels can reach the trillion level, under the condition, the pixels output by the image sensor 001 are partitioned, each block of pixels are independently output, the rear-end image display equipment is usually in a standard format and needs continuous pixel output, and therefore the image data need to be recombined into combined data.

Because the peak rate of the acquisition is too fast, the buffer module 300 needs to be equipped for buffering to match the problem of rate mismatch between the image data end and the forwarding interface, and in addition, the frame rate can be improved through buffering.

Specifically, in some embodiments, the cache module 300 may include two sets of DDRs, and the ping-pong operation of the two sets of DDRs is utilized to realize the continuous reading of the data.

In addition, for DDR, the bit width of the image data is usually a multiple of a byte, in this case, in order to improve the efficiency of DDR, the bit width of the image data is usually required to be adjusted, and this part of the work is completed in the pixel reorganization module 200.

The data output from the cache module 300 is input to the package sending module 400, the package sending module 400 correspondingly packages the data according to a specific protocol determined by actual needs, and finally sends the data to the back-end device, so that the image processing is realized, and stable and efficient processing is performed on the data acquired and sent by the image sensor 001 at a high speed, so that a stable and high-quality image picture is finally formed.

In some embodiments, the system further includes a control module 500, where the control module 500 sends a control instruction to control the acquisition and processing module 100, the pixel reorganization module 200, the buffer module 300, and the group packet sending module 400 to perform related operations.

Further, as shown in fig. 3, in some embodiments, the acquisition processing module 100 includes:

the delay unit 110 is configured to perform delay adjustment on data;

the first acquisition unit 120 is configured to sample the delay-adjusted data to obtain a state distribution of a sampling result;

a processing unit 130, configured to determine an optimal sampling position according to the state distribution of the sampling result;

and a second acquisition unit 140 for sampling the image according to the optimal sampling position.

According to the technical scheme, the data are subjected to delay adjustment by using the delay unit 110, then the first acquisition unit 120 acquires the data subjected to different delays to obtain the state distribution of the sampling result, the processing unit 130 determines the optimal sampling position according to the state distribution of the sampling result, the second acquisition unit 140 can ensure the sampling stability by sampling the image at the optimal sampling position, the introduction of error codes is avoided, the quality of image processing can be effectively improved, and therefore the beneficial effects of stably and high-quality processing of high-speed image data are achieved.

Wherein the second acquisition unit 140 may be the same unit as the first acquisition unit 120.

Specifically, as shown in fig. 4, in some embodiments, the acquisition processing module 100 is a module formed based on an FPGA, and specifically includes a differential-to-single-ended unit 190, where the differential-to-single-ended unit 190 is configured to receive image data output from the image sensor 001 and convert the image data into a single-ended signal;

the differential-to-single-ended converter further comprises a delay unit 110, wherein the delay unit 110 receives the single-ended signal converted by the differential-to-single-ended unit 190 and delays the signal;

the device also comprises a serial-parallel conversion unit 180, wherein the serial-parallel conversion unit 180 receives the data delayed by the delay unit 110 and converts the data into parallel data;

the device also comprises a multiplexer unit 170, wherein the multiplexer unit 170 receives the plurality of parallel data converted by the serial-parallel conversion unit 180, and in addition, after the confirmation of the optimal sampling position of one channel is completed, the multiplexer unit 170 selects and sequentially determines the optimal sampling positions of other channels;

the image processing device further comprises a judging element 150, wherein the judging element 150 comprises a first acquisition unit 120, a processing unit 130 and a second acquisition unit 140, the first acquisition unit 120 acquires data input by the multiplexer unit 170, and obtains state distribution of a sampling result according to the data, the processing unit 130 determines an optimal sampling position according to the state distribution of the sampling result, and the second acquisition unit 140 acquires image data according to the optimal sampling position, wherein the first acquisition unit 120 and the second acquisition unit 140 can be the same unit;

a word alignment element 160 is also included, the word alignment element 160 aligning the data transmitted by each channel according to a predetermined lookup table.

In some embodiments, a delay control unit 1100 is further included, and the delay control unit 1100 is configured to control the delay action of the delay unit 110.

In other preferred embodiments, an image processing system is provided for performing any one of the steps of the image processing method.

The image processing system provided by the application can be realized based on a Field Programmable Gate Array (FPGA), namely the FPGA which has an Iodelay function, wherein the Iodelay is a delay adjustable primitive.

The image processing method can be completely embedded and combined in an FPGA (field programmable gate array) to realize, the whole closed-loop process is automatically completed, the optimal sampling position of each channel is obtained to determine the Iodelay delay amount of the corresponding channel, and in the initialization process of each system, the training is carried out once to determine that the data is correctly received. The core algorithm for determining the optimal sampling position is how to search a stable sampling interval, the whole closed-loop calculation process is realized in the FPGA, the time sequence is stable, the logic is clear, the method can be automatically completed, the method is completely realized in a logic level, the defects of hardware design can be overcome, and the anti-interference performance and the robustness of the system are greatly improved.

In a third aspect, as shown in fig. 11, the present application further provides an electronic device, which includes a processor 620 and a memory 610, where the memory 610 stores computer-readable instructions, and when the computer-readable instructions are executed by the processor 620, the steps in the above method are executed.

By the above technical solution, the processor 620 and the memory 610 are interconnected and communicate with each other through a communication bus and/or other form of connection mechanism (not shown), the memory 610 stores a computer program executable by the processor 620, and when the computing device runs, the processor 620 executes the computer program to execute the method in any optional implementation manner of the foregoing embodiment to implement the following functions: carrying out delay adjustment on the specified data; sampling the data subjected to delay adjustment to obtain the state distribution of a sampling result; determining an optimal sampling position according to the state distribution of the sampling result; and acquiring the image according to the optimal sampling position.

In a fourth aspect, the present application also provides a storage medium having a computer program stored thereon, where the computer program is executed by a processor to perform the steps of the above method.

Through the technical scheme, when being executed by a processor, the computer program executes the method in any optional implementation manner of the embodiment to realize the following functions: carrying out delay adjustment on data; sampling the data subjected to delay adjustment to obtain the state distribution of a sampling result; determining an optimal sampling position according to the state distribution of the sampling result; and acquiring the image according to the optimal sampling position.

The storage medium may be implemented by any type of volatile or nonvolatile storage device or combination thereof, such as a Static Random Access Memory (SRAM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), an Erasable Programmable Read-Only Memory (EPROM), a Programmable Read-Only Memory (PROM), a Read-Only Memory (ROM), a magnetic Memory, a flash Memory, a magnetic disk, or an optical disk.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.

In addition, units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

Furthermore, the functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. An image processing method, comprising:

carrying out delay adjustment on the specified data;

and acquiring image data according to the optimal sampling position.

2. The image processing method according to claim 1, wherein the step of adjusting the delay of the designated data comprises:

obtaining a symbol width of the data;

3. The image processing method according to claim 1, wherein the step of sampling the data after delay adjustment to obtain the state distribution of the sampling result comprises:

4. An image processing method according to claim 3, wherein the step of determining an optimal sampling position based on the state distribution of the sampling results comprises:

5. An image processing method according to claim 1, further comprising:

acquiring an instruction for executing image data acquisition;

6. An image processing method according to claim 5, further comprising:

establishing a query form according to the initialization data;

7. An image processing system, comprising:

the cache module is used for caching the combined data;

8. An image processing system according to claim 7, wherein the acquisition processing module comprises:

the delay unit is used for carrying out delay adjustment on the data;

9. An electronic device comprising a processor and a memory, said memory storing computer readable instructions which, when executed by said processor, perform the steps of the method according to any one of claims 1 to 6.

10. A storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, performs the steps of the method according to any of claims 1-6.