CN114374505A

CN114374505A - Ciphertext generating method, device, server, medium and product

Info

Publication number: CN114374505A
Application number: CN202111406803.3A
Authority: CN
Inventors: 王公桃; 叶雪峰; 李理; 孙波; 吕鹏; 张峤
Original assignee: Bank of China Ltd
Current assignee: Bank of China Ltd
Priority date: 2021-11-24
Filing date: 2021-11-24
Publication date: 2022-04-19

Abstract

The application discloses a ciphertext generation method, a ciphertext generation device, a server, a medium and a product, which can be applied to the field of block chains or the field of finance. Encrypting input information to obtain a first ciphertext, performing bit complement expansion on the first ciphertext to obtain a first message, dividing the first message into a plurality of data blocks, obtaining 80 sub-data blocks for each data block, and dividing 16 adjacent sub-data blocks of the 80 sub-data blocks into the same set to obtain five sets; for each set, performing logical operation on 16 sub-data blocks contained in the set to obtain logical sub-data blocks with 32 bits, so as to obtain five logical sub-data blocks; the 80 sub-data blocks are used for carrying out logic operation on 80 constants obtained subsequently so as to reassign the 80 constants; the 5 logic sub data blocks are used for reassigning the identifier of the buffer area, namely, the embodiment of the application carries out encryption for three times, so that the second ciphertext is safer.

Description

Ciphertext generating method, device, server, medium and product

Technical Field

The present application relates to the field of block chaining technologies, and in particular, to a ciphertext generation method, apparatus, server, medium, and product.

Background

SHA-1(Secure Hash Algorithm 1) is a function for generating 160-bit ciphertext and is widely applied in the prior art, but with the continuous development of computer computing capacity, security personnel have successfully broken the SHA-1 Algorithm.

Therefore, how to strengthen the existing SHA-1 is a necessary requirement for the technical development.

Disclosure of Invention

In view of the above, the present application provides a ciphertext generation method, apparatus, server, medium, and product.

In order to achieve the above purpose, the present application provides the following technical solutions:

according to a first aspect of the embodiments of the present disclosure, there is provided a ciphertext generation method, including:

acquiring input information to be stored to a block chain;

converting the input information into decimal numeric values to obtain a first character string consisting of the decimal numeric values;

obtaining a plurality of first coordinates X based on the first character string_i(i，x_i) The abscissa i of the first coordinate is the position in the first character string, and the ordinate x of the first coordinate is_iIs a character located at the position i;

setting i to 1;

for a first coordinate X_i(i，x_i) The following operations are performed: calculating the first coordinate X by the following formula_i(i，x_i) Velocity V of movement_i；

V_i＝ω×V_i+c₁×rand()×dist(pbest_i-X_i)+c₂×rand()×dist(gbest-X_i) Where ω is the inertia factor, C₁、C₂Respectively, a preset value, rand () is a random perturbation function,the gbest is a first coordinate with the largest ordinate in the plurality of first coordinates; pbest_iIs a horizontal coordinate and a first coordinate X_iHas the first coordinate of the largest ordinate among the first coordinates within the first distance; dist () represents the euclidean distance;

setting x_i＝Round(x_i+V_i) To obtain a second coordinate X_i(i，x_i) Round () is a function that rounds the decimal after the decimal point to an integer;

setting i to i +1, and returning to the step for the first coordinate X_i(i，x_i) Executing the following operations until i is larger than M, wherein M is the number of characters contained in the first character string;

obtaining a numerical value consisting of the vertical coordinates of a plurality of second coordinates, and converting the numerical value into a hexadecimal numerical value to obtain a first ciphertext;

expanding the length complementary bit of the first ciphertext into 512 bits x Q to obtain a first message, wherein Q is any integer greater than or equal to 1;

dividing the first message into Q data blocks, wherein the number of bits of the data blocks is 512 bits;

setting the initial value of G to be 1;

the following operations are performed for the G-th data block:

dividing the data block into 16 target sub data blocks, wherein the number of bits of the target sub data blocks is 32;

performing operation on the 16 target sub data blocks to obtain 64 operation sub data blocks to obtain 80 sub data blocks Q (t), wherein the bit number of the operation sub data blocks is 32 bits, the 80 sub data blocks comprise the 16 target sub data blocks and the 64 operation sub data blocks, and the value of t is 0, 1, 2, … and 79;

dividing every adjacent 16 sub-data blocks in the 80 sub-data blocks into the same set to obtain five sets;

for each set, performing logical operation on 16 sub-data blocks contained in the set to obtain a logical sub-data block with a bit number of 32 bits to obtain five logical sub-data blocks, wherein the five logical sub-data blocks are respectively a first logical sub-data block, a second logical sub-data block, a third logical sub-data block, a fourth logical sub-data block and a fifth logical sub-data block;

obtaining preset 80 constants K_t(ii) a t takes the values of 0, 1, 2, … and 79;

for each constant Kt, assigning a value obtained by performing logic operation on the constant Kt and a sub-data block Q (t) to the constant Kt;

obtaining an identity of a buffer H₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄An initial value of (1);

h is to be₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄Respectively assigning the initial values to a first parameter, a second parameter, a third parameter, a fourth parameter and a fifth parameter;

setting the initial value of P to be 0;

for t ═ P, the following calculation is performed:

TEMP＝S₅(H₀)+f_t(H₁,H₂,H₃)+H₄+Q(t)+K_t；H₄＝H₃；H₃＝H₂；H₂＝S₃₀(H₁)；H₁＝H₀；H₀TEMP; wherein f is_t(H₁,H₂,H₃) Is a preset function; s₅(H₀) Means that H is₀Left shift by 5; s₃₀(H₁) Means that H is₁Left shift by 30;

setting P +1, returning to the step for t P, the following calculation is performed until P equals 80 to obtain the identification H of the buffer area₀Value of (A), H₁Value of (A), H₂Value of (A), H₃Value of (A), H₄A value of (d);

let H₀Value of (1 ═ H₀Value of + first parameter, H₁Value of (1 ═ H₁Value of + second parameter, H₂Value of (1 ═ H₂Value of + third parameter, H₃Value of (1 ═ H₃Value of + third parameter, H₄Value of (1 ═ H₄The value of + the fourth parameter;

let H₀Final value of ═ H₀Is logically operated with the first logical sub-data block, H₁Final value of ═ H₁Is logically operated with the second logical sub-data block, H₂Final value of ═ H₂Is logically operated with the third logical sub-data block, H₃Final value of ═ H₃Is logically operated with the fourth logical sub-data block, H₄Final value of ═ H₄Performing logical operation on the value of the first logical sub-data block and the fifth logical sub-data block;

subjecting said H to₀Final value of (1), H₁Final value of (1), H₂Final value of (1), H₃Final value of (1), H₄Respectively as the mark H of the buffer corresponding to the G +1 th data block₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄An initial value of (1);

setting G to G +1, and returning to the step to execute the following operations on the G-th data block until G is larger than Q;

according to H₀、H₁、H₂、H₃、H₄In the order of (A) and (B), is₀Final value of (1), H₁Final value of (1), H₂Final value of (1), H₃Final value of (1), H₄The 160-bit hash value composed of the final values of the first ciphertext and the second ciphertext is determined as the second ciphertext;

storing the second ciphertext to a blockchain.

According to a second aspect of the embodiments of the present disclosure, there is provided a ciphertext generating apparatus, including:

the first acquisition module is used for acquiring input information to be stored to the block chain;

the first conversion module is used for converting the input information into decimal numeric values to obtain a first character string consisting of the decimal numeric values;

a second obtaining module for obtaining a plurality of first coordinates X based on the first character string_i(i，x_i) The abscissa i of the first coordinate is the position in the first character string, and the ordinate x of the first coordinate is_iIs a character located at the position i;

the first assignment module is used for setting i to be 1;

a first calculation module for calculating a first coordinate X_i(i，x_i) The following operations are performed: calculating the first coordinate X by the following formula_i(i，x_i) Velocity V of movement_i：

V_i＝ω×V_i+c₁×rand()×dist(pbest_i-X_i)+c₂×rand()×dist(gbest-X_i) Where ω is the inertia factor, C₁、C₂Respectively are preset values, rand () is a random disturbance function, and gbest is a first coordinate with the maximum ordinate in the plurality of first coordinates; pbest_iIs a horizontal coordinate and a first coordinate X_iHas the first coordinate of the largest ordinate among the first coordinates within the first distance; dist () represents the euclidean distance;

a third obtaining module for setting x_i＝Round(x_i+V_i) To obtain a second coordinate X_i(i，x_i) Round () is a function that rounds the decimal after the decimal point to an integer;

a second assignment module, configured to set i +1, and return to the step for the first coordinate X_i(i，x_i) Executing the following operations until i is larger than M, wherein M is the number of characters contained in the first character string;

the fourth obtaining module is used for obtaining a value formed by vertical coordinates of a plurality of second coordinates and converting the value into a hexadecimal value so as to obtain a first ciphertext;

an extended bit-complementing module, configured to extend a length bit-complementing of the first ciphertext to 512 bits × Q to obtain a first packet, where Q is any integer greater than or equal to 1;

the first dividing module is used for dividing the first message into Q data blocks, and the bit number of each data block is 512 bits;

the third assignment module is used for setting the initial value of G to be 1;

a second partitioning module, configured to perform the following operations for a G-th data block: dividing the data block into 16 target sub data blocks, wherein the number of bits of the target sub data blocks is 32;

a second calculating module, configured to perform an operation on the 16 target sub data blocks to obtain 64 operation sub data blocks, so as to obtain 80 sub data blocks q (t), where a bit number of the operation sub data blocks is 32 bits, the 80 sub data blocks include 16 target sub data blocks and 64 operation sub data blocks, and a value of t is 0, 1, 2, …, and 79;

a third dividing module, configured to divide every 16 adjacent sub-data blocks of the 80 sub-data blocks into a same set, so as to obtain five sets;

a third calculation module, configured to perform logical operation on the 16 sub-data blocks included in each set to obtain a logical sub-data block with a bit number of 32 bits, so as to obtain five logical sub-data blocks, where the five logical sub-data blocks are a first logical sub-data block, a second logical sub-data block, a third logical sub-data block, a fourth logical sub-data block, and a fifth logical sub-data block, respectively;

a fifth obtaining module, configured to obtain preset 80 constants K_t(ii) a t takes the values of 0, 1, 2, … and 79;

the fourth calculation module is used for assigning the value of each constant Kt after the constant Kt and the sub-data block Q (t) are subjected to logic operation to the constant Kt;

a sixth obtaining module, configured to obtain an identifier H of the buffer₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄An initial value of (1);

a fourth assignment module to assign H₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄Respectively assigning the initial values to a first parameter, a second parameter, a third parameter, a fourth parameter and a fifth parameter;

the fifth assignment module is used for setting the initial value of P to be 0;

a fifth calculation module, configured to perform the following calculation for t ═ P:

a sixth assignment module, configured to set P +1, and return to the step of performing the following calculation for t equal to P until P equals 80, so as to obtain the identifier H of the buffer area₀Value of (A), H₁Value of (A), H₂Value of (A), H₃Value of (A), H₄A value of (d);

a seventh assignment module for ordering H₀Value of (1 ═ H₀Value of + first parameter, H₁Value of (1 ═ H₁Value of + second parameter, H₂Value of (1 ═ H₂Value of + third parameter, H₃Value of (1 ═ H₃Value of + third parameter, H₄Value of (1 ═ H₄The value of + the fourth parameter;

an eighth assignment module for ordering H₀Final value of ═ H₀Is logically operated with the first logical sub-data block, H₁Final value of ═ H₁Is logically operated with the second logical sub-data block, H₂Final value of ═ H₂Is logically operated with the third logical sub-data block, H₃Final value of ═ H₃Is logically operated with the fourth logical sub-data block, H₄Final value of ═ H₄Performing logical operation on the value of the first logical sub-data block and the fifth logical sub-data block;

a ninth assignment module to assign H to₀Final value of (1), H₁Final value of (1), H₂Final value of (1), H₃Final value of (1), H₄Respectively as the mark H of the buffer corresponding to the G +1 th data block₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄An initial value of (1);

the tenth assignment module is used for setting G +1, and returning to the step to execute the following operations on the G-th data block until G is larger than Q;

a determination module for following H₀、H₁、H₂、H₃、H₄In the order of (A) and (B), is₀Final value of (1), H₁Final value of (1), H₂Final value of (1), H₃Final value of (1), H₄The 160-bit hash value composed of the final values of the first ciphertext and the second ciphertext is determined as the second ciphertext;

and the storage module is used for storing the second ciphertext to the block chain.

According to a third aspect of the embodiments of the present disclosure, there is provided a server, including:

a processor;

a memory for storing the processor-executable instructions;

wherein the processor is configured to execute the instructions to implement the ciphertext generation method of the first aspect.

According to a fourth aspect of embodiments of the present disclosure, there is provided a computer-readable storage medium in which instructions, when executed by a processor of a server, enable the server to perform the ciphertext generation method of the first aspect.

According to a fifth aspect of the embodiments of the present disclosure, there is provided a computer program product directly loadable into an internal memory of a computer, wherein the memory is included in the server shown in the third aspect and contains software codes, and the computer program can be loaded into and executed by the computer to implement the ciphertext generation method according to the first aspect.

According to the technical scheme, the ciphertext generation method provided by the application can encrypt the input information to obtain a first ciphertext, complement the first ciphertext to obtain a first message, the first message can be divided into a plurality of data blocks, 80 sub-data blocks can be obtained for each data block, and every 16 adjacent sub-data blocks of the 80 sub-data blocks are divided into the same set to obtain five sets; for each set, performing logical operation on 16 sub-data blocks contained in the set to obtain logical sub-data blocks with 32 bits, so as to obtain five logical sub-data blocks; the 80 sub-data blocks are used for carrying out logic operation on 80 constants obtained subsequently so as to reassign the 80 constants; the 5 logic sub-data blocks are used for reassigning the obtained identifier of the buffer area, that is, in the process of executing the SHA-1 algorithm, the third encryption is performed in the embodiment of the application, so that the obtained second ciphertext is safer. If the second ciphertext needs to be cracked violently, the number of the divided data blocks of the first message needs to be cracked, the process of encrypting the input information into the first ciphertext, the result of performing logic operation on 80 sub-data blocks and the subsequently obtained 80 constants, and the result of performing logic operation on 5 logic sub-data blocks and the identifier of the buffer area need to be performed, so that the cracking difficulty is greatly increased, and the safety of the second ciphertext is improved.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.

Fig. 1 is a block chain apparatus according to an embodiment of the present disclosure;

fig. 2 is a block chain structure diagram provided in an embodiment of the present application;

fig. 3 is a flowchart of a ciphertext generation method according to an embodiment of the present application;

fig. 4a to 4c are schematic diagrams illustrating the input information bit complement expansion provided in the embodiment of the present application;

FIG. 5 is a schematic diagram of the data block being divided into 16 target sub data blocks;

fig. 6 is a structural diagram of a ciphertext generating apparatus according to an embodiment of the present application;

FIG. 7 is a block diagram illustrating an apparatus for a server in accordance with an example embodiment.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The embodiment of the application provides a ciphertext generation method, a ciphertext generation device, a server, a medium and a product, and before introducing the technical scheme provided by the embodiment of the application, an application environment related to the embodiment of the application is explained.

Fig. 1 is a block chain apparatus according to an embodiment of the present disclosure.

The blockchain apparatus comprises a plurality of nodes 11, which may be electronic devices or servers.

For example, the electronic device may be any electronic product that can interact with a user through one or more ways such as a keyboard, a touch PAD, a touch screen, a remote controller, a voice interaction device, or a handwriting device, for example, a mobile phone, a notebook computer, a tablet computer, a palm computer, a personal computer, a wearable device, a smart television, a PAD, and the like.

The server may be, for example, one server, a server cluster composed of a plurality of servers, or a cloud computing server center. The server may include a processor, memory, and a network interface, among others.

The plurality of nodes included in the block chain device respectively store one same block chain.

For any node in the plurality of nodes, the node stores the node identifiers of other nodes in the blockchain device, so that the generated block is broadcasted to other nodes in the blockchain device according to the other node identifiers.

In order to make the embodiments of the present application more understandable to those skilled in the art, the structure of the blockchain is described in detail below.

As shown in fig. 2, the blockchain is composed of a plurality of blocks. The starting block comprises a block head and a block main body, wherein the block head stores an input information characteristic value, a version number, a timestamp and a difficulty value, and the block main body stores input information; the next block of the starting block takes the starting block as a parent block, the next block also comprises a block head and a block main body, the block head stores the input information characteristic value of the current block, the block head characteristic value of the parent block, the version number, the timestamp and the difficulty value, and the like, so that the block data stored in each block in the block chain is associated with the block data stored in the parent block, and the safety of the input information in the block is ensured.

When each block in the block chain is generated, when the node where the block chain is located receives input information, the SHA-1 algorithm needs to be carried out on the input information for calculation, and the obtained 160-bit ciphertext is used as a characteristic value of the input information and is stored to the head of the block. And after obtaining the block main body and the block head, obtaining the current block, then respectively sending the newly generated blocks to other nodes by the node where the block chain is located according to the node identifications of the other nodes, verifying the newly generated blocks by the other nodes, and adding the newly generated blocks to the block chain stored in the newly generated blocks after the verification is finished.

With the continuous development of computer computing power and the continuous accumulation of collision cipher libraries in the application process of the SHA-1 algorithm, the ciphertext generated by the SHA-1 algorithm has the possibility of being cracked violently. If the SHA-1 algorithm is replaced by other algorithms, for example, the SHA-2 algorithm, to prevent the ciphertext generated by the SHA-1 algorithm from being violently cracked, but the SHA-2 algorithm generates 256-bit ciphertext, that is, the length of the ciphertext is different from the length of 160-bit ciphertext generated by the SHA-1 algorithm, the improvement will affect the interface and the message format, improve the transformation cost, and have high difficulty.

The embodiment of the application provides an improved method for SHA-1, so that the length of a ciphertext obtained by an improved SHA-1 algorithm is still 160 bits, an interface and a message format do not need to be improved, and the reconstruction cost is reduced.

The ciphertext generating method provided by the embodiment of the application can be applied to any application scene using SHA-1, for example, a calculation scene of a characteristic value of transaction data of a bank. The input information is different in different application scenes, such as in a calculation scene of a characteristic value of transaction data of a bank, and the input information is the transaction data.

The ciphertext generating method provided by the embodiment of the present application is explained below.

As shown in fig. 3, a flowchart of a ciphertext generating method provided in an embodiment of the present application includes the following steps S301 to S328.

Step S301: input information to be stored to a blockchain is obtained.

For example, the input information may be transaction data. Such as transfer transaction data.

Step S302: the input information is converted into decimal values to obtain a first character string consisting of the decimal values.

Illustratively, the input information is converted to a decimal value in ASCII code.

Step S303: obtaining a plurality of first coordinates X based on the first character string_i(i，x_i) The abscissa i of the first coordinate is the position in the first character string, and the ordinate x of the first coordinate is_iIs the character located at said position i.

Assuming that the first character string is { J1, J2, J3, J4, J5, J6}, 6 first coordinates can be obtained, and the 6 first coordinates are X respectively₁(1，J1)、X₂(2，J2)、X₃(3，J3)、X₄(4，J4)、X₅(5，J5)、X₆(6，J6)。

Step S304: set i to 1.

Step S305: for a first coordinate X_i(i，x_i) The following operations are performed: by passingThe first coordinate X is calculated by the following formula_i(i，x_i) Velocity V of movement_i。

V_i＝ω×V_i+c₁×rand()×dist(pbest_i-X_i)+c₂×rand()×dist(gbest-X_i) Where ω is the inertia factor, C₁、C₂Respectively are preset values, rand () is a random disturbance function, and gbest is a first coordinate with the maximum ordinate in the plurality of first coordinates; pbest_iIs a horizontal coordinate and a first coordinate X_iHas the first coordinate of the largest ordinate among the first coordinates within the first distance; dist () represents the euclidean distance.

Assuming that J4 is the largest among the 6 first coordinates, gbest is the first coordinate X₄(4，J4)。

Assuming that the first distance is 2, the abscissa and the first coordinate X₂A first coordinate of the abscissa of (2, J2) within the first distance is: (1, J1), (3, J3), (4, J4), then pbest_iIs the first coordinate (4, J4).

Illustratively, gbest may be the same as pbest_iThe same coordinate or different coordinates.

Illustratively, ω ═ ω (ω ═ ω)_ini-ω_end)(G_k-g)/G_k+ω_endWherein G is_kIndicating the number of characters included in the first character string, G ═ G_k/2；ω_iniIs an initial inertia weight, omega_endThe inertia weight when iterating to the maximum evolution algebra. Illustratively, ω may be set_ini＝0.95；ω_end＝0.32。

Step S306: setting x_i＝Round(x_i+V_i) To obtain a second coordinate X_i(i，x_i) Round () is a function that rounds the decimal fraction after the decimal fraction to an integer.

For example, if x_i+V_i1.6, then Round (x)_i+V_i) 2; if x_i+V_i1.3, then Round (x)_i+V_i)＝1。

Step S307: setting i to i +1, and returning to step S305 until i is greater than M, where M is the number of characters included in the first character string.

Step S308: and obtaining a value consisting of the vertical coordinates of the plurality of second coordinates, and converting the value into a hexadecimal value to obtain a first ciphertext.

Illustratively, the first ciphertext is { x }₁x₂x₃…x_M}。

Step S309: and expanding the length complementary bits of the first ciphertext into 512 bits x Q to obtain a first message, wherein Q is any integer greater than or equal to 1.

The bit-filling expansion method provided by the embodiment of the present application has various types, but the embodiment of the present application provides, but is not limited to, the following three types.

The first implementation of step S309 includes steps a11 through a 14.

Step A11: and complementing one 1 at the tail end of the first ciphertext.

Illustratively, the first ciphertext is binary data.

For example, if the length of the first ciphertext is an integer multiple of 512, the padding expansion operation may not be required, and if the length of the first ciphertext is not an integer multiple of 512, the padding expansion operation may be required.

Step A12: and supplementing 0 after 1 of the complement bit of the first ciphertext until the length of the second message after the complement bit is 448 after the modulus of 512.

For example, if the length of the first ciphertext is 448 modulo 512, the remainder may not perform steps a11 through a 12. If the remainder of the length of the first ciphertext modulo 512 is not 448, steps a11 through a12 may be performed.

Step A13: and supplementing one 1 at the tail of the second message.

Step A14: and supplementing 63 0 s after 1 of the complementary bit of the second message to obtain the first message.

In order to make the implementation of the first step S309 more understood by those skilled in the art, the following description is made.

Fig. 4a is a schematic diagram of the first ciphertext complement expansion according to the embodiment of the disclosure.

Assuming that the length of the first ciphertext is 600 bits, the remainder of the first ciphertext modulo 512 is 88, and a1 and 359 0 s are added after the first ciphertext to obtain the second message. After the second message is supplemented with one 1 and 63 0's, the first message is obtained.

The second implementation of step S309 includes steps a21 through a 23.

Step A21: and complementing one 1 at the tail end of the first ciphertext.

Illustratively, the first ciphertext is binary data.

Step A22: and supplementing 0 after 1 of the complement bit of the first ciphertext until the length of the second message after the complement bit is 448 after the modulus of 512.

For example, if the length of the first ciphertext is 448 modulo 512, the remainder may not perform steps a21 through a 22. If the remainder of the length of the first ciphertext modulo 512 is not 448, steps a21 through a22 may be performed.

Step A23: and padding 64 bits of 1 at the tail of the second message to obtain the first message.

In order to make the implementation of the second step S309 more understood by those skilled in the art, the following description is made.

Fig. 4b is a schematic diagram of the first ciphertext complement expansion according to the embodiment of the disclosure.

Assuming that the length of the first ciphertext is 600 bits, the remainder of the first ciphertext modulo 512 is 88, and a1 and 359 0 s are added after the first ciphertext to obtain the second message. And supplementing 64 pieces of 1 after the second message to obtain the first message.

The third implementation of step S309 includes steps a31 through a 32.

Step A31: and complementing one 1 at the tail end of the first ciphertext.

Illustratively, the first ciphertext is binary data.

Step A32: and supplementing 0 after 1 of the complement bit of the first ciphertext until the remainder is 0 after the length of the first message after the complement bit is modulo 512, so as to obtain the first message.

In order to make the implementation of the third step S309 more understood by those skilled in the art, the following description is made.

Fig. 4c is a schematic diagram of the first ciphertext complement expansion according to the embodiment of the disclosure.

Assuming that the length of the first ciphertext is 600 bits, the remainder of the first ciphertext modulo 512 is 88, 1 is added after the first ciphertext, and 423 0 s are added to obtain the first message.

Step S310: and dividing the first message into Q data blocks, wherein the bit number of the data blocks is 512 bits.

Taking fig. 4a to 4c as an example, Q is 2.

For example, in this embodiment of the present application, the first packet is divided into Q data blocks, and one data block is obtained every time 512 bits of data are obtained from the head of the first packet.

Step S311: the initial value of G is set to 1.

Step S312: the following operations are performed for the G-th data block: and dividing the data block into 16 target sub data blocks, wherein the number of bits of the target sub data blocks is 32.

Step S313: and performing operation on the 16 target sub data blocks to obtain 64 operation sub data blocks so as to obtain 80 sub data blocks Q (t), wherein the bit number of the operation sub data blocks is 32 bits, and the 80 sub data blocks comprise 16 target sub data blocks and 64 operation sub data blocks.

For example, 80 sub-data blocks sequentially include: 16 target sub-data blocks and 64 operation sub-data blocks.

Wherein, the sequence of the 16 target sub-data blocks is as follows: and sequencing according to the sequence of dividing the data block to obtain the target sub data block.

FIG. 5 is a schematic diagram showing the data block being divided into 16 target sub data blocks.

From the head of the data block, each time a target sub-data block is obtained by extracting 32 bits of data, a target sub-data block 1, a target sub-data block 2, a target sub-data block 3, a target sub-data block 4, …, and a target sub-data block 16 can be obtained in sequence. The sequence of the 16 target sub-data blocks is as follows: target sub data block 1, target sub data block 2, target sub data block 3, target sub data block 4, …, target sub data block 16.

In an alternative implementation manner, there are various implementation manners of step S313, and the present embodiment provides, but is not limited to, the following implementation manner, and the method includes step B11 to step B14.

Step B11: the initial value of R is set to 0.

Step B12: let t be R, perform the following operations:

step B13: q (t) ═ M_t(t is more than or equal to 0 and less than 16), wherein M_tThe target subdata block is the t +1 th subdata block; q (t) ═ S1 (W)_t-3 XOR W_t-14 XOR W_t-16) (16 is less than or equal to t is less than or equal to 79); wherein, S1 indicates a shift of 1 bit to the left.

Step B14: let R ═ R +1, return to step B12 until R equals 80.

Wherein, the 80 sub-data blocks are sequentially: q (0), Q (1), Q (2), Q (3), …, Q (79).

In an alternative implementation, at least one of the 16 target sub-data blocks may be logically operated to obtain 64 operation sub-data blocks. The exclusive or operation is not limited to the above.

Step S314: and dividing every adjacent 16 sub-data blocks in the 80 sub-data blocks into the same set to obtain five sets.

Wherein Q (0) to Q (15) are divided into set 1; dividing Q (16) to Q (31) into set 2; dividing Q (32) through Q (47) into set 3; dividing Q (48) to Q (63) into set 4; q (64) to Q (79) are divided into set 5.

Step S315: and for each set, performing logical operation on the 16 sub-data blocks contained in the set to obtain a logical sub-data block with the bit number of 32 bits to obtain five logical sub-data blocks, wherein the five logical sub-data blocks are respectively a first logical sub-data block, a second logical sub-data block, a third logical sub-data block, a fourth logical sub-data block and a fifth logical sub-data block.

Illustratively, the logical operation may be any one or more of an exclusive-or operation, an and operation, or an or operation.

Exemplarily, performing logical operation on 16 sub data blocks in the set 1 to obtain a first logical sub data block; performing logical operation on the 16 sub data blocks in the set 2 to obtain a second logical sub data block; performing logical operation on the 16 sub data blocks in the set 3 to obtain a third logical sub data block; performing logical operation on the 16 sub data blocks in the set 4 to obtain a fourth logical sub data block; and performing logical operation on the 16 sub data blocks in the set 5 to obtain a fifth logical sub data block.

Step S316: obtaining preset 80 constants K_t(ii) a t takes the

values

0, 1, 2, …, 79.

In an alternative implementation, the 80 constants are different.

In an alternative implementation, the values of the 80 constants are as follows:

K_tfirst preset value (0)<＝t<＝19)

K_tSecond predetermined value (20)<＝t<＝39)

K_tThird preset value (40)<＝t<＝59)

K_tFourth preset value (60)<＝t<＝79)。

In an alternative implementation manner, the 80 constants corresponding to different data blocks may be different, for example, the corresponding relationship between the 16 target sub data blocks obtained in step S316 and the 80 constants may be preset. I.e., 80 constants, vary from data block to data block.

In an alternative implementation, the 80 constants corresponding to different input information may be different, for example, the correspondence between the input information and the 80 constants may be preset. I.e., 80 constants, vary from input to input.

In an alternative implementation, the 80 constants corresponding to different data blocks may be the same.

In an alternative implementation, the first preset value is 0x5a827999, the second preset value is 0x6ED9EBA1, the third preset value is 0x8F1BBCDC, and the fourth preset value is 0xCA62C1D 6.

Step S317: and for each constant Kt, assigning a value obtained by performing logic operation on the constant Kt and the sub-data block Q (t) to the constant Kt.

Exemplary, logical operations include, but are not limited to: any one of an exclusive-or operation, an and operation, or an or operation.

Step S318: obtaining an identity of a buffer H₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄Is started.

In an alternative implementation manner, for the first data block, that is, when step S318 is performed for the first time, the preset identifier H of 16 sub data blocks and buffer areas may be used₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄In the corresponding relation of the initial values, the identifier H of the buffer area corresponding to the 16 target sub data blocks is searched₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄Is started.

I.e. H corresponding to different target sub-data blocks_iThe initial values of the target sub data blocks are different, because the target sub data blocks are related to the input information, the randomness and the brute force cracking resistance of the algorithm are increased, the performance consumption of the algorithm is low, and the algorithm can be transplanted and realized on different platforms and hardware equipment so as to meet the requirements of various use scenes of a block chain in a financial business system.

In an alternative implementation, the buffer { Hi } is initialized to the following values:

H₀＝0x67452301

H₁＝0xEFCDAB89

H₂＝0x98BADCFE

H₃＝0x10325476

H₄＝0xC3D2E1F0

step S319: h is to be₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄Respectively assigned to the first parameter, the second parameter, the third parameter, the fourth parameter and the fifth parameter.

Step S320: the initial value of P is set to 0.

Step S321: for t ═ P, the following calculation is performed:

TEMP＝S₅(H₀)+f_t(H₁,H₂,H₃)+H₄+Q(t)+K_t；H₄＝H₃；H₃＝H₂；H₂＝S₃₀(H₁)；H₁＝H₀；H₀TEMP; wherein f is_t(H₁,H₂,H₃) Is a preset function; s₅(H₀) Means that H is₀Left shift by 5; s₃₀(H₁) Means that H is₁Shifted 30 to the left.

Exemplary, f_t(H₁,H₂,H₃) Is preset with H₁,H₂,H₃As a function of the argument, e.g. a preset function f_t(H₁,H₂,H₃) The following were used:

f_t(H₁,H₂,H₃)＝(H₁ AND H₂)or((NOT H₁)AND H₃)(0<＝t<＝19)

f_t(H₁,H₂,H₃)＝H₁ XOR H₂ XOR H₃(20<＝t<＝39)

f_t(H₁,H₂,H₃)＝(H₁ AND H₂)or(H₁ AND H₃)or(H₂ AND H₃)(40<＝t<＝59)

f_t(H₁,H₂,H₃)＝H₁ XOR H₂ XOR H₃(60<＝t<＝79)。

in an alternative implementation, f_t(H₁,H₂,H₃) It may or may not be a piecewise function, and the above is only an example and is not for f_t(H₁,H₂,H₃) Resulting in a definition.

Step S322: setting P to P +1, return to step S321 until P equals 80 to obtain the identifier H of the buffer area₀Value of (A), H₁Value of (A), H₂Value of (A), H₃Value of (A), H₄The value of (c).

Step S323: let H₀Value of (1 ═ H₀Value of + first parameter, H₁Value of (1 ═ H₁Value of + second parameter, H₂Value of (1 ═ H₂Value of + third parameter, H₃Value of (1 ═ H₃Value of + third parameter, H₄Value of (1 ═ H₄The value of + the fourth parameter.

Step S324: let H₀Final value of ═ H₀Is logically operated with the first logical sub-data block, H₁Final value of ═ H₁Is logically operated with the second logical sub-data block, H₂Final value of ═ H₂Is logically operated with the third logical sub-data block, H₃Final value of ═ H₃Is logically operated with the fourth logical sub-data block, H₄Final value of ═ H₄And the value of (d) is logically operated with the fifth logical sub-data block.

Illustratively, the logical operation may be any one of an exclusive-or operation, an and operation, or operation.

The application introduces 80 sub data blocks Q (t) and 5 logic sub data blocks, and the solving difficulty of the second ciphertext is obviously improved.

Step S325: subjecting said H to₀Final value of (1), H₁Final value of (1), H₂Final value of (1), H₃Final value of (1), H₄Respectively as the mark H of the buffer corresponding to the G +1 th data block₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄Is started.

I.e. the obtained identification H of the buffer when step S318 is performed for the second time_iIs the initial value of (a) obtained when step S324 is executed for the first time_iThe final value of (c).

In the third execution of step S318, the obtained identifier H of the buffer area_iIs obtained when step S324 is executed for the second time_iThe final value of (c). And so on, will not be described again.

If the first packet is divided into a plurality of data blocks, multiple iterations may be required, and H obtained from the previous data block₀Final value of (1), H₁Final value of (1), H₂Final value of (1), H₃Final value of (1), H₄Is the final value of H for the next data block₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄The initial value of (2) so that the finally obtained ciphertext is related to the number of iterations, and the ciphertext is more difficult to crack.

Step S326: set G +1 and return to step S312 until G is greater than Q.

Step S327: according to H₀、H₁、H₂、H₃、H₄In the order of (A) and (B), is₀Final value of (1), H₁Final value of (1), H₂Final value of (1), H₃Final value of (1), H₄Is determined as the second ciphertext.

It is understood that H_iThe values of (a) are all 32 bits in length, so 5H_iConstituting a 160-bit hash value.

Step S328: storing the second ciphertext to a blockchain.

For example, the ciphertext may be stored as a feature value of the input information to a corresponding block in the blockchain.

According to the ciphertext generation method, input information is encrypted to obtain a first ciphertext, the first ciphertext can be subjected to bit complement expansion to obtain a first message, the first message can be divided into a plurality of data blocks, 80 sub-data blocks can be obtained for each data block, and 16 adjacent sub-data blocks in the 80 sub-data blocks are divided into the same set to obtain five sets; for each set, performing logical operation on 16 sub-data blocks contained in the set to obtain logical sub-data blocks with 32 bits, so as to obtain five logical sub-data blocks; the 80 sub-data blocks are used for carrying out logic operation on 80 constants obtained subsequently so as to reassign the 80 constants; the 5 logic sub-data blocks are used for reassigning the obtained identifier of the buffer area, that is, in the process of executing the SHA-1 algorithm, the third encryption is performed in the embodiment of the application, so that the obtained second ciphertext is safer. If the second ciphertext needs to be cracked violently, the number of the divided data blocks of the first message needs to be cracked, the process of encrypting the input information into the first ciphertext, the result of performing logic operation on 80 sub-data blocks and the subsequently obtained 80 constants, and the result of performing logic operation on 5 logic sub-data blocks and the identifier of the buffer area need to be performed, so that the cracking difficulty is greatly increased, and the safety of the second ciphertext is improved.

Because the SHA-1 algorithm is used for a long time, an attacker has accumulated a considerable number of dictionary libraries, and further reinforcement processing needs to be performed on the secure hash algorithm 1 in order to further enhance the security and improve the anti-dictionary attack cracking capability so as to adapt to the increasingly deteriorated security situation. After the secure hash algorithm 1 is further reinforced by the embodiment of the application, even if the hash value of the input information is leaked, the improved algorithm is invalid through the current dictionary base, the hash value cannot be reversely cracked, and the security of the block chain service is further enhanced.

By adopting the ciphertext generating method provided by the embodiment of the application, the safety of the characteristic value of the input information of the block chain is improved, an attacker cannot use the conventional SHA-1 dictionary library to reversely decrypt the characteristic value, and the possibility of brute force cracking is avoided.

The method is described in detail in the embodiments disclosed in the present application, and the method of the present application can be implemented by various types of apparatuses, so that an apparatus is also disclosed in the present application, and the following detailed description is given of specific embodiments.

As shown in fig. 6, a structure diagram of a ciphertext generating apparatus provided in an embodiment of the present application, the apparatus includes: a first obtaining module 601, a first converting module 602, a second obtaining module 603, a first assigning module 604, a first calculating module 605, a third obtaining module 606, a second assigning module 607, a fourth obtaining module 608, an extended padding module 609, a first dividing module 610, a third assigning module 611, a second dividing module 612, a second calculating module 613, a third dividing module 614, a third calculating module 615, a fifth obtaining module 616, a fourth calculating module 617, a sixth obtaining module 618, a fourth assigning module 619, a fifth assigning module 620, a fifth calculating module 621, a sixth assigning module 622, a seventh assigning module 623, an eighth assigning module 624, a ninth assigning module 625, a tenth assigning module 626, a determining module 627 and a storing module 628, wherein:

a first obtaining module 601, configured to obtain input information to be stored in a block chain;

a first conversion module 602, configured to convert the input information into decimal values to obtain a first character string composed of the decimal values;

a second obtaining module 603, configured to obtain a plurality of first coordinates X based on the first character string_i(i，x_i) The abscissa i of the first coordinate is the position in the first character string, and the ordinate x of the first coordinate is_iIs a character located at the position i;

a first assignment module 604, configured to set i equal to 1;

a first calculation module 605 for calculating a first coordinate X_i(i，x_i) The following operations are performed: calculating the first coordinate X by the following formula_i(i，x_i) Velocity V of movement_i：

a third obtaining module 606 for setting x_i＝Round(x_i+V_i) To obtain a second coordinate X_i(i，x_i) Round () is a function that rounds the decimal after the decimal point to an integer;

a second assignment module 607, configured to set i ═ i +1, and return to the second obtaining module until i is greater than M, where M is the number of characters included in the first character string;

a fourth obtaining module 608, configured to obtain a value formed by vertical coordinates of the plurality of second coordinates, and convert the value into a hexadecimal value, so as to obtain a first ciphertext;

an extended padding module 609, configured to extend the length padding of the first ciphertext to 512 bits × Q to obtain a first packet, where Q is any integer greater than or equal to 1;

a first dividing module 610, configured to divide the first packet into Q data blocks, where the number of bits of each data block is 512 bits;

a third assignment module 611, configured to set an initial value of G to 1;

a second dividing module 612, configured to perform the following operations for the G-th data block: dividing the data block into 16 target sub data blocks, wherein the number of bits of the target sub data blocks is 32;

a second calculating module 613, configured to perform an operation on the 16 target sub data blocks to obtain 64 operation sub data blocks, so as to obtain 80 sub data blocks q (t), where a bit number of the operation sub data block is 32 bits, the 80 sub data blocks include 16 target sub data blocks and 64 operation sub data blocks, and a value of t is 0, 1, 2, …, and 79;

a third dividing module 614, configured to divide every adjacent 16 sub-data blocks of the 80 sub-data blocks into the same set, so as to obtain five sets;

a third calculation module 615, configured to perform a logical operation on the 16 sub-data blocks included in each set to obtain a logical sub-data block with a bit number of 32 bits, so as to obtain five logical sub-data blocks, where the five logical sub-data blocks are a first logical sub-data block, a second logical sub-data block, a third logical sub-data block, a fourth logical sub-data block, and a fifth logical sub-data block, respectively;

a fifth obtaining module 616, configured to obtain preset 80 constants K_t(ii) a t takes the values of 0, 1, 2, … and 79;

a fourth calculating module 617, configured to assign, to each constant Kt, a value obtained by performing a logical operation on the constant Kt and the sub-data block q (t) to the constant Kt;

a sixth obtaining module 618 for obtaining the identifier H of the buffer₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄An initial value of (1);

a fourth assigning module 619 for assigning H₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄Respectively assigning the initial values to a first parameter, a second parameter, a third parameter, a fourth parameter and a fifth parameter;

a fifth assigning module 620, configured to set an initial value of P to 0;

a fifth calculating module 621, configured to perform the following calculation for t ═ P:

TEMP＝S₅(H₀)+f_t(H₁,H₂,H₃)+H₄+Q(t)+K_t；H₄＝H₃；H₃＝H₂；H₂＝S₃₀(H₁)；H₁＝H₀；H₀TEMP; wherein f is_t(H₁,H₂,H₃) Is presetA function; s₅(H₀) Means that H is₀Left shift by 5; s₃₀(H₁) Means that H is₁Left shift by 30;

a sixth assigning module 622, configured to set P +1, and return to the fifth calculating module until P equals 80, so as to obtain the identifier H of the buffer area₀Value of (A), H₁Value of (A), H₂Value of (A), H₃Value of (A), H₄A value of (d);

a seventh assignment module 623 for enabling H₀Value of (1 ═ H₀Value of + first parameter, H₁Value of (1 ═ H₁Value of + second parameter, H₂Value of (1 ═ H₂Value of + third parameter, H₃Value of (1 ═ H₃Value of + third parameter, H₄Value of (1 ═ H₄The value of + the fourth parameter;

an eighth valuation module 624 for enabling H₀Final value of ═ H₀Is logically operated with the first logical sub-data block, H₁Final value of ═ H₁Is logically operated with the second logical sub-data block, H₂Final value of ═ H₂Is logically operated with the third logical sub-data block, H₃Final value of ═ H₃Is logically operated with the fourth logical sub-data block, H₄Final value of ═ H₄Performing logical operation on the value of the first logical sub-data block and the fifth logical sub-data block;

a ninth assigning module 625 for assigning the H₀Final value of (1), H₁Final value of (1), H₂Final value of (1), H₃Final value of (1), H₄Respectively as the mark H of the buffer corresponding to the G +1 th data block₀Initial value of (1), H₁Initial value of (1), H₂Initial value of (1), H₃Initial value of (1), H₄An initial value of (1);

a tenth assignment module 626, configured to set G +1, and return to the second division module until G is greater than Q;

a determining module 627 for following H₀、H₁、H₂、H₃、H₄In the order of (A) and (B), is₀Final value of (1), H₁The final value of,H₂Final value of (1), H₃Final value of (1), H₄The 160-bit hash value composed of the final values of the first ciphertext and the second ciphertext is determined as the second ciphertext;

a storage module 628, configured to store the second ciphertext to the blockchain.

In an optional implementation, the extended padding module includes:

a first padding unit for padding a1 at the end of the first ciphertext;

a second bit complement unit, configured to complement 0 after 1 of the first ciphertext bit complement until a remainder of a length of the second ciphertext after bit complement modulo 512 is 448;

a third bit complementing unit, configured to complement a bit 1 at the end of the second packet;

a fourth bit complement unit, configured to complement 63 0 s after 1 of the bit complement of the second packet, so as to obtain the first packet.

In an alternative implementation form of the method,

a setting unit for setting an initial value of R to 0;

a calculating unit, configured to make t ═ R, perform the following operations:

Q(t)＝M_t(t is more than or equal to 0 and less than 16), wherein M_tThe target subdata block is the t +1 th subdata block;

Q(t)＝S1(W_t-3 XOR W_t-14 XOR W_t-16) (16 is less than or equal to t is less than or equal to 79); wherein, S1 indicates a shift of 1 bit to the left;

and the triggering unit is used for enabling R to be R +1 and triggering the calculating unit until R is equal to 80.

In an alternative implementation, the preset function f_t(H₁,H₂,H₃) The following were used:

f_t(H₁,H₂,H₃)＝(H₁ AND H₂)or((NOT H₁)AND H₃)(0<＝t<＝19)

f_t(H₁,H₂,H₃)＝H₁ XOR H₂ XOR H₃(20<＝t<＝39)

f_t(H₁,H₂,H₃)＝H₁ XOR H₂ XOR H₃(60<＝t<＝79)。

with regard to the apparatus in the above-described embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment related to the method, and will not be elaborated here.

Servers include, but are not limited to: a processor 71, a memory 72, a network interface 73, an I/O controller 74, and a communication bus 75.

It should be noted that the structure of the server shown in fig. 7 does not constitute a limitation of the server, and the server may include more or less components than those shown in fig. 7, or combine some components, or arrange different components, as will be understood by those skilled in the art.

The following describes each component of the server in detail with reference to fig. 7:

the processor 71 is a control center of the server, connects various parts of the entire server using various interfaces and lines, and performs various functions of the server and processes data by running or executing software programs and/or modules stored in the memory 72 and calling data stored in the memory 72, thereby performing overall monitoring of the server. Processor 71 may include one or more processing units; illustratively, the processor 71 may integrate an application processor, which primarily handles operating systems, user interfaces, applications, etc., and a modem processor, which primarily handles wireless communications. It will be appreciated that the modem processor described above may not be integrated into the processor 71.

Processor 71 may be a Central Processing Unit (CPU), or an application Specific Integrated circuit (asic), or one or more Integrated circuits configured to implement embodiments of the present invention, etc.;

the Memory 72 may include Memory, such as a Random-Access Memory (RAM) 721 and a Read-Only Memory (ROM) 722, and may also include a mass storage device 723, such as at least 1 disk storage. Of course, the server may also include hardware needed for other services.

The memory 72 is used for storing the executable instructions of the processor 71. The processor 71 has a function of a ciphertext generation method.

A wired or wireless network interface 73 is configured to connect the server to a network.

The processor 71, the memory 72, the network interface 73, and the I/O controller 74 may be connected to each other by a communication bus 75, which may be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, an EISA (Extended Industry Standard Architecture) bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc.

In an exemplary embodiment, the server may be implemented by one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, micro-controllers, microprocessors or other electronic components for performing the above-described ciphertext generation method.

In an exemplary embodiment, the disclosed embodiments provide a storage medium comprising instructions, such as a memory 72 comprising instructions, executable by a processor 71 of a server to perform the above-described method. Alternatively, the storage medium may be a non-transitory computer readable storage medium, which may be, for example, a ROM, a Random Access Memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical ciphertext generating apparatus, or the like.

In an exemplary embodiment, a computer-readable storage medium is also provided, which can be directly loaded into an internal memory of a computer, such as the memory 72, and contains software codes, and the computer program can be loaded into the computer and executed to implement the steps shown in any embodiment of the ciphertext generation method.

In an exemplary embodiment, a computer program product is further provided, which is directly loadable into an internal memory of a computer, for example, a memory included in the server, and contains software codes, and which, when loaded and executed by the computer, is capable of implementing the steps shown in any of the embodiments of the ciphertext generation method described above.

It should be noted that the ciphertext generation method, apparatus, server, medium, and product provided by the present invention may be used in the field of blockchains or in the field of finance. The above description is merely an example, and does not limit the application fields of the ciphertext generation method, apparatus, server, medium, and product provided by the present invention.

Note that the features described in the embodiments in the present specification may be replaced with or combined with each other. For the device or system type embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.

It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A ciphertext generation method, comprising:

acquiring input information to be stored to a block chain;

setting i to 1;

setting the initial value of G to be 1;

the following operations are performed for the G-th data block:

setting the initial value of P to be 0;

for t ═ P, the following calculation is performed:

let H₀Value of (1 ═ H₀Value of (A)+ first parameter, H₁Value of (1 ═ H₁Value of + second parameter, H₂Value of (1 ═ H₂Value of + third parameter, H₃Value of (1 ═ H₃Value of + third parameter, H₄Value of (1 ═ H₄The value of + the fourth parameter;

storing the second ciphertext to a blockchain.

2. The ciphertext generation method of claim 1, wherein the expanding the first ciphertext to have a length of 512 bits x Q to obtain the first message comprises:

padding one 1 at the end of the first ciphertext;

supplementing 0 after 1 of the complement bit of the first ciphertext until the length of the second message after the complement bit is 448 after modulus of 512;

padding one 1 at the tail of the second message;

and supplementing 63 0 s after 1 of the complementary bit of the second message to obtain the first message.

3. The ciphertext generation method according to any one of claims 1 to 2, wherein the step of performing the operation on the 16 target sub-data blocks to obtain 64 operation sub-data blocks comprises:

setting the initial value of R to be 0;

let t be R, perform the following operations:

let R ═ R +1, return to step let t ═ R, perform the following operations until R equals 80.

4. The ciphertext generation method according to any one of claims 1 to 2, wherein the preset function f is_t(H₁,H₂,H₃) The following were used:

f_t(H₁,H₂,H₃)＝(H₁ AND H₂)or((NOT H₁)AND H₃)(0<＝t<＝19)

f_t(H₁,H₂,H₃)＝H₁ XOR H₂ XOR H₃(20<＝t<＝39)

f_t(H₁,H₂,H₃)＝H₁ XOR H₂ XOR H₃(60<＝t<＝79)。

5. a ciphertext generation apparatus, comprising:

the first assignment module is used for setting i to be 1;

the second assignment module is used for setting i to i +1 and returning to the second acquisition module until i is larger than M, wherein M is the number of characters contained in the first character string;

the third assignment module is used for setting the initial value of G to be 1;

the fifth assignment module is used for setting the initial value of P to be 0;

a sixth assignment module, configured to set P +1, and return to the fifth calculation module until P equals 80, to obtain an identifier H of the buffer area₀Value of (A), H₁Value of (A), H₂Value of (A), H₃Value of (A), H₄A value of (d);

the tenth assignment module is used for setting G +1 and returning to the second division module until G is larger than Q;

6. The ciphertext generation apparatus of claim 5, wherein the extended padding module comprises:

a first padding unit for padding a1 at the end of the first ciphertext;

7. The ciphertext generation apparatus according to claim 5 or 6, wherein the second calculation module comprises:

a setting unit for setting an initial value of R to 0;

8. A server, comprising:

a processor;

a memory for storing the processor-executable instructions;

wherein the processor is configured to execute the instructions to implement the ciphertext generation method of any of claims 1 to 4.

9. A computer-readable storage medium in which instructions, when executed by a processor of a server, enable the server to perform the ciphertext generation method of any of claims 1 to 4.

10. A computer program product directly loadable into the internal memory of a computer, said memory being the memory comprised by the server according to claim 8 and containing software code, said computer program being loadable and executable by the computer to enable the ciphertext generating method according to any of the claims 1 to 4.