CN114124357B - Ciphertext generation method, server, medium and device based on Fourier series - Google Patents

Ciphertext generation method, server, medium and device based on Fourier series Download PDF

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CN114124357B
CN114124357B CN202111404963.4A CN202111404963A CN114124357B CN 114124357 B CN114124357 B CN 114124357B CN 202111404963 A CN202111404963 A CN 202111404963A CN 114124357 B CN114124357 B CN 114124357B
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value
initial value
values
data blocks
bit
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CN114124357A (en
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王公桃
叶雪峰
张峤
孙波
吕鹏
李理
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Bank of China Ltd
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Bank of China Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0643—Hash functions, e.g. MD5, SHA, HMAC or f9 MAC
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation

Abstract

The application discloses a ciphertext generation method, a server, a medium and a method based on Fourier seriesThe device can be applied to the blockchain field or the financial field. In the present application, if the input information is divided into a plurality of data blocks, in the process of calculating the next data block, the identifier H of the buffer area corresponding to the next data block 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 For the H obtained for the last data block 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 Final value of (2); further, since the spread values of the 80 fourier series are used instead of the preset 80 constants, the specific content of the 160-bit ciphertext obtained is related not only to the number of data blocks into which the input information is divided but also to the 80 spread values of the fourier series. If the violent cracking is performed, the number of data blocks into which the input information is divided and 80 expansion values of the Fourier series are required to be cracked, the violent cracking is more difficult, and the safety of the ciphertext is improved.

Description

Ciphertext generation method, server, medium and device based on Fourier series
Technical Field
The present application relates to the field of blockchain technologies, and in particular, to a method, a server, a medium, and a device for generating ciphertext based on fourier series.
Background
SHA-1 (Secure Hash Algorithm, secure hash algorithm 1) is a function that generates 160-bit ciphertext, which is widely used in the prior art, but with the continued development of computer computing power, security personnel have successfully broken the SHA-1 algorithm.
Therefore, how to strengthen the existing SHA-1 is a necessary requirement for technical development.
Disclosure of Invention
In view of this, the present application provides a ciphertext generating method, a server, a medium, and a device based on fourier series.
In order to achieve the above purpose, the present application provides the following technical solutions:
according to a first aspect of an embodiment of the present disclosure, there is provided a ciphertext generating method based on a fourier series, including:
acquiring input information to be stored in a block chain;
expanding the length complementary bit of the input information into 512 x Q bits to obtain a first message, wherein Q is any integer greater than or equal to 1;
dividing the first message into Q data blocks, wherein the bit number of each data block is 512;
setting the initial value of G to be 1;
The following is performed for the G-th data block:
dividing the data block into 16 target sub-data blocks, wherein the bit number of the target sub-data blocks is 32;
performing operation on 16 target sub-data blocks to obtain 64 operation sub-data blocks to obtain 80 sub-data blocks, wherein the number of bits of the operation sub-data blocks is 32 bits, and the 80 sub-data blocks comprise 16 target sub-data blocks and 64 operation sub-data blocks;
obtaining preset 80 constants, wherein the values of the 80 constants are as follows:
K t =first preset value, 0<＝t<＝19；
K t =second preset value, 20<＝t<＝39；
K t =third preset value, 40<＝t<＝59；
K t =fourth preset value, 60<＝t<＝79；
Will fourier seriesExpanding at x=i to obtain expanded values f (i), i having values of 1 to 80 in order to obtain 80 expanded values, wherein a 1 To a 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Constant of odd positions of b 1 To b 40 Sequentially taking the values of (a)The method comprises the following steps: k (K) 0 ,K 1 ,K 2 ,...,K 79 Is constant for even positions of (a); a, a 0 Is a preset value;
assigning f (i) to K i-1 ；
Acquiring the identity H of the buffer 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to an initial value of (1);
will H 0 Is equal to the initial value of H 1 Is equal to the initial value of H 2 Is equal to the initial value of H 3 Is equal to the initial value of H 4 The initial values of the parameters are respectively assigned to a first parameter, a second parameter, a third parameter, a fourth parameter and a fifth parameter;
setting the initial value of P to 0;
for t=p, the following calculation is performed:
TEMP＝S 5 (H 0 )+f t (H 1 ,H 2 ,H 3 )+H 4 +W t +K t ；H 4 ＝H 3 ；H 3 ＝H 2 ；H 2 ＝S 30 (H 1 )；H 1 ＝H 0 ；H 0 =temp; wherein W is t T+1th sub-block of 80 sub-blocks, f t (H 1 ,H 2 ,H 3 ) Is a preset function; s is S 5 (H 0 ) Refers to H 0 Shift left by 5 bits; s is S 30 (H 1 ) Refers to H 1 Left shift by 30 bits;
setting p=p+1, returning to perform the calculation step performed when t=p until P equals 80, to obtain the identity H of the buffer 0 Values of (H) 1 Values of (H) 2 Values of (H) 3 Values of (H) 4 Is a value of (2);
let H 0 Final value = H 0 Value of + first parameter, H 1 Final value = H 1 Value of + second parameter, H 2 Final value = H 2 Value of + third parameter, H 3 Final value = H 3 Value of + fourth parameter, H 4 Final value = H 4 The value of +fifth parameterA number;
the H is treated with 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 The final values of (2) are respectively used as the identification H of the buffer area corresponding to the G+1st data block 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to an initial value of (1);
setting g=g+1, and returning to execute the operation step executed for the G data block until G is greater than Q;
According to H 0 、H 1 、H 2 、H 3 、H 4 In the order of (2), H 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 A 160-bit digest of the final value of (2) to determine as ciphertext;
and storing the ciphertext into a blockchain.
According to a second aspect of the embodiments of the present disclosure, there is provided a ciphertext generating apparatus based on a fourier series, comprising:
the first acquisition module is used for acquiring input information to be stored in the blockchain;
the bit-filling expansion module is used for expanding the length bit filling of the input information into 512 x Q bits to obtain a first message, wherein Q is any integer greater than or equal to 1;
the first dividing module is used for dividing the first message into Q data blocks, and the bit number of the data blocks is 512;
a first setting module, configured to set an initial value of G to 1;
the following is performed for the G-th data block:
the second dividing module is used for dividing the data block into 16 target sub-data blocks, and the bit number of the target sub-data blocks is 32;
the operation module is used for carrying out operation on 16 target sub-data blocks to obtain 64 operation sub-data blocks so as to obtain 80 sub-data blocks, the number of bits of the operation sub-data blocks is 32, and the 80 sub-data blocks comprise 16 target sub-data blocks and 64 operation sub-data blocks;
The second obtaining module is used for obtaining 80 constants which are preset, and the values of the 80 constants are as follows:
K t =first preset value, 0<＝t<＝19；
K t =second preset value, 20<＝t<＝39；
K t =third preset value, 40<＝t<＝59；
K=fourth preset value, 60< =t < =79;
an unfolding module for carrying out Fourier seriesExpanding at x=i to obtain expanded values f (i), i having values of 1 to 80 in order to obtain 80 expanded values, wherein a 1 To a 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Constant of odd positions of b 1 To b 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Is constant for even positions of (a); a, a 0 Is a preset value;
a first assignment module for assigning f (i) to K i-1 ；
A third acquisition module for acquiring the identification H of the buffer area 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to an initial value of (1);
a second assignment module for assigning H 0 Is equal to the initial value of H 1 Is equal to the initial value of H 2 Is equal to the initial value of H 3 Is equal to the initial value of H 4 The initial values of the parameters are respectively assigned to a first parameter, a second parameter, a third parameter, a fourth parameter and a fifth parameter;
the third assignment module is used for setting the initial value of P to 0;
a calculation module for performing, for t=p, the following calculations:
TEMP＝S 5 (H 0 )+f t (H 1 ,H 2 ,H 3 )+H 4 +W t +K t ；H 4 ＝H 3 ；H 3 ＝H 2 ；H 2 ＝S 30 (H 1 )；H 1 ＝H 0 ；H 0 =temp; wherein W is t T+1th sub-block of 80 sub-blocks, f t (H 1 ,H 2 ,H 3 ) Is a preset function; s is S 5 (H 0 ) Refers to H 0 Shift left by 5 bits; s is S 30 (H 1 ) Refers to H 1 Left shift by 30 bits;
a first trigger module for setting p=p+1, and returning to the calculation module until P is equal to 80 to obtain the identifier H of the buffer area 0 Values of (H) 1 Values of (H) 2 Values of (H) 3 Values of (H) 4 Is a value of (2);
a fourth assignment module for letting H 0 Final value = H 0 Value of + first parameter, H 1 Final value = H 1 Value of + second parameter, H 2 Final value = H 2 Value of + third parameter, H 3 Final value = H 3 Value of + fourth parameter, H 4 Final value = H 4 A value of +fifth parameter;
a fifth assignment module for assigning the H 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 The final values of (2) are respectively used as the identification H of the buffer area corresponding to the G+1st data block 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to an initial value of (1);
the second triggering module is used for setting G=G+1, and returning to the second dividing module until G is larger than Q;
a determining module for according to H 0 、H 1 、H 2 、H 3 、H 4 In the order of (2), H 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 A 160-bit digest of the final value of (c), Determining the encrypted text;
and the storage module is used for storing the ciphertext into a blockchain.
According to a third aspect of embodiments of the present disclosure, there is provided a server comprising:
a processor;
a memory for storing the processor-executable instructions;
wherein the processor is configured to execute the instructions to implement the fourier series-based ciphertext generation method of the first aspect.
According to a fourth aspect of embodiments of the present disclosure, there is provided a computer readable storage medium, which when executed by a processor of a server, causes the server to perform the fourier series-based ciphertext generation method of the first aspect.
According to a fifth aspect of the embodiments of the present disclosure, there is provided a computer program product directly loadable into an internal memory of a computer, the memory being in a memory comprised by the server as described in the third aspect and containing software code, the computer program being capable of implementing the fourier series-based ciphertext generating method as described in the first aspect after being loaded and executed via the computer.
As can be seen from the above technical solution, in the ciphertext generating method based on fourier series provided by the present application, after obtaining 80 constants set in advance, the fourier series is expanded at x=i to obtain expanded values f (i), and the values of i are sequentially 1 to 80 to obtain 80 expanded values, where a 1 To a 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Constant of odd positions of b 1 To b 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Is constant for even positions of (a); f (1) to f (80) are used as 80 constants, and thus, H is obtained based on f (1) to f (80) as 80 constants 0 Values of (H) 1 Values of (H) 2 Values of (H) 3 Values of (H) 4 And H based on 80 constants set in advance 0 Values of (H) 1 Values of (H) 2 Values of (H) 3 Values of (H) 4 If the input information is divided into a plurality of data blocks, then in the process of calculating the next data block, the identifier H of the buffer corresponding to the next data block 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 For the H obtained for the last data block 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 The final value of (2), i.e., the specific content of the resulting 160-bit ciphertext, is related not only to the number of data blocks into which the input information is partitioned, but also to the 80 spread values of the fourier series. If the violent cracking is needed, the number of data blocks into which the input information is divided and 80 expansion values of the Fourier series are required to be cracked, and compared with the prior art, the violent cracking is more difficult, so that the safety of the ciphertext is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present application, and that other drawings may be obtained according to the provided drawings without inventive effort to a person skilled in the art.
FIG. 1 is a block chain device block diagram according to an embodiment of the present application;
FIG. 2 is a block chain block diagram provided in an embodiment of the present application;
fig. 3 is a flowchart of a ciphertext generating method based on fourier series according to an embodiment of the present application;
FIGS. 4 a-4 c are schematic diagrams illustrating bit-filling expansion of input information according to embodiments of the present application;
FIG. 5 is a schematic diagram of an ordering of data blocks divided into 16 target sub-data blocks;
fig. 6 is a block diagram of a ciphertext generating apparatus based on a fourier series according to an embodiment of the present application;
fig. 7 is a block diagram illustrating an apparatus for a server according to an exemplary embodiment.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
The embodiment of the application provides a ciphertext generating method, a device, a server, a medium and a product based on Fourier series, and before introducing the technical scheme provided by the embodiment of the application, the application environment related to the embodiment of the application is described.
As shown in fig. 1, a block chain device according to an embodiment of the present application is shown in a block chain structure.
The blockchain device includes a plurality of nodes 11, which may be electronic devices or servers.
By way of example, the electronic device may be any electronic product that can interact with a user by one or more of a keyboard, a touchpad, a touch screen, a remote control, a voice interaction, a handwriting device, etc., such as a mobile phone, a notebook computer, a tablet computer, a palm top computer, a personal computer, a wearable device, a smart television, a PAD, etc.
The server may be a server, a server cluster formed by a plurality of servers, or a cloud computing server center. The server may include a processor, memory, network interfaces, and the like.
The blockchain device comprises a plurality of nodes which respectively store the same blockchain.
For any one of the plurality of nodes, the node stores node identifications of other nodes in the blockchain device for subsequent broadcasting of the generated blocks to other nodes in the blockchain device based on the other node identifications.
In order to make the embodiments of the present application more understandable to those skilled in the art, the structure of the blockchain is described in detail below.
As shown in fig. 2, a blockchain is made up of a plurality of blocks. The starting block comprises a block head and a block main body, wherein the block head stores an input information characteristic value, a version number, a time stamp and a difficulty value, and the block main body stores input information; the next block of the starting block takes the starting block as a father block, the next block also comprises a block head and a block main body, the block head stores the input information characteristic value of the current block, the block head characteristic value of the father block, the version number, the timestamp and the difficulty value, and the like, so that the block data stored in each block in the block chain are associated with the block data stored in the father block, and the safety of the input information in the block is ensured.
When each block in the block chain is generated, when the node where the block chain is positioned receives input information, the input information needs to be calculated by an SHA-1 algorithm, and the obtained 160-bit ciphertext is used as a characteristic value of the input information and is stored in a block header. After the block main body and the block head are obtained, the current block is obtained, then the node where the block chain is located sends the newly generated block to other nodes according to the node identification of other nodes, the other nodes verify the newly generated block, and the newly generated block is added into the block chain stored in the block chain after the verification is completed.
With the continuous development of the computing power of the computer and the continuous accumulation of collision password libraries in the application process of the SHA-1 algorithm, the ciphertext generated by the SHA-1 algorithm is possibly cracked by violence. If the SHA-1 algorithm is replaced by other algorithms, for example, the SHA-2 algorithm, to prevent the ciphertext generated by the SHA-1 algorithm from being broken by violence, but the SHA-2 algorithm generates 256-bit ciphertext, that is, the length of the ciphertext is different from that of the 160-bit ciphertext generated by the SHA-1 algorithm, the improvement will affect the interface and the message format, increase the transformation cost and have great difficulty.
The embodiment of the application provides an improved method for SHA-1, so that the length of ciphertext obtained by an improved SHA-1 algorithm is 160 bits, an interface and a message format are not required to be improved, and the transformation cost is reduced.
The ciphertext generating method based on the Fourier series, provided by the embodiment of the application, can be applied to any application scene using SHA-1, for example, a calculation scene of the characteristic value of the transaction data of a bank. In the case that the input information is different in different application scenes, such as in the calculation scene of the characteristic value of the transaction data of the bank, the input information is the transaction data.
The following describes a ciphertext generating method based on fourier series provided in the embodiments of the present application.
As shown in fig. 3, a flowchart of a ciphertext generating method based on a fourier series according to an embodiment of the present application is provided, and the method includes the following steps S301 to S320.
Step S301: input information to be stored to the blockchain is obtained.
Illustratively, the input information may be transaction data. Such as transfer transaction data.
Step S302: and expanding the length complementary bit of the input information into 512 x Q bits to obtain a first message, wherein Q is any integer greater than or equal to 1.
The bit-filling expansion method provided in the embodiment of the present application is various, and the embodiment of the present application provides but is not limited to the following three methods.
The first implementation of step S302 includes steps a11 to a14.
Step A11: and a1 is complemented at the end of the input information.
Illustratively, the input information is binary data.
For example, if the length of the input information is an integer multiple of 512, the bit-fill expansion operation may not be required, and if the length of the input information is not an integer multiple of 512, the bit-fill expansion operation may be required.
Step A12: and supplementing 0 after 1 of the complementary bit of the input information until the remainder of the length of the second message after the complementary bit is modulo 512 is 448.
For example, if the remainder of modulo 512 of the length of the input information is 448, steps a11 to a12 may not be performed. If the remainder of the length of the input information modulo 512 is not 448, steps A11 through A12 may be performed.
Step A13: and supplementing a1 at the tail of the second message.
Step A14: and supplementing 63 0 s after the 1 s of the complementary bit of the second message to obtain the first message.
The following illustrates the implementation of the first step S302, for a person skilled in the art to understand more.
Fig. 4a is a schematic diagram of input information bit-filling expansion according to an embodiment of the present application.
Assuming that the length of the input information is 600 bits, the modulo remainder of the input information pair 512 is 88, and after 1 and 359 0 s are added to the input information, a second message is obtained. And supplementing 1 and 63 0 after the second message to obtain the first message.
The second implementation of step S302 includes steps a21 to a23.
Step A21: and a1 is complemented at the end of the input information.
Illustratively, the input information is binary data.
For example, if the length of the input information is an integer multiple of 512, the bit-fill expansion operation may not be required, and if the length of the input information is not an integer multiple of 512, the bit-fill expansion operation may be required.
Step A22: and supplementing 0 after 1 of the complementary bit of the input information until the remainder of the length of the second message after the complementary bit is modulo 512 is 448.
For example, if the remainder of the length of the input information modulo 512 is 448, steps a21 to a22 may not be performed. If the remainder of the length of the input information modulo 512 is not 448, steps A21 through A22 may be performed.
Step A23: and supplementing 64 1 s at the tail of the second message to obtain the first message.
The following illustrates the implementation of the second step S302 for a person skilled in the art to understand more.
Fig. 4b is a schematic diagram of input information bit-filling expansion according to an embodiment of the present application.
Assuming that the length of the input information is 600 bits, the modulo remainder of the input information pair 512 is 88, and after 1 and 359 0 s are added to the input information, a second message is obtained. And supplementing 64 1 s after the second message to obtain the first message.
The third implementation of step S302 includes steps a31 to a32.
Step A31: and a 1 is complemented at the end of the input information.
Illustratively, the input information is binary data.
For example, if the length of the input information is an integer multiple of 512, the bit-fill expansion operation may not be required, and if the length of the input information is not an integer multiple of 512, the bit-fill expansion operation may be required.
Step A32: and supplementing 0 after 1 of the input information bit, until the remainder of the length of the first message after bit supplementing after modulo 512 is 0, so as to obtain the first message.
The following illustrates the implementation of the third step S302, for a person skilled in the art to understand more.
Fig. 4c is a schematic diagram illustrating bit-filling expansion of input information according to an embodiment of the present application.
Assuming that the length of the input information is 600 bits, the modulo remainder of the input information pair 512 is 88, 1 is added after the input information, and 423 0 are added to obtain the first message.
Step S303: the first message is divided into Q data blocks, and the bit number of the data blocks is 512.
Taking fig. 4a to 4c as an example, q=2.
In an exemplary embodiment of the present application, the first packet is divided into Q data blocks, and each 512 bits of data are obtained from the header of the first packet, then one data block is obtained.
Step S304: the initial value of G is set to 1.
Step S305: the following is performed for the G-th data block:
step S306: the data block is divided into 16 target sub-data blocks, and the number of bits of the target sub-data blocks is 32 bits.
Step S307: and carrying out operation on the 16 target sub-data blocks to obtain 64 operation sub-data blocks so as to obtain 80 sub-data blocks, wherein the number of bits of the operation sub-data blocks is 32 bits, and the 80 sub-data blocks comprise 16 target sub-data blocks and 64 operation sub-data blocks.
Step S308: obtaining preset 80 constants, wherein the values of the 80 constants are as follows:
K t =first preset value, 0<＝t<＝19；
K t =second preset value, 20<＝t<＝39；
K t =third preset value, 40<＝t<＝59；
K t =fourth preset value, 60<＝t<＝79。
In an alternative implementation, the 80 constants corresponding to different data blocks may be different, for example, the correspondence between the 16 target sub-data blocks obtained in step S306 and the 80 constants may be preset. I.e. 80 constants vary from data block to data block.
In an alternative implementation, the 80 constants corresponding to different input information may be different, for example, the correspondence between the input information and the 80 constants may be preset. I.e. 80 constants, vary with the input information.
In an alternative implementation, the 80 constants corresponding to the different data blocks may be the same.
In an alternative implementation, the first preset value is 0x5a827999, the second preset value is 0x6ED9EBA1, the third preset value is 0x8F1BBCDC, and the fourth preset value is 0xCA62C1D6.
The 80 sub-data blocks, in turn, illustratively include: 16 said target sub-data blocks and 64 said operator sub-data blocks.
The sequence of the 16 target sub-data blocks is as follows: and sorting according to the sequence of dividing the data blocks to obtain target sub-data blocks.
As shown in fig. 5, an ordering diagram of a data block divided into 16 target sub-data blocks.
Each time 32 bits of data are extracted from the head of the data block to obtain a target sub-data block, then the target sub-data block 1, the target sub-data block 2, the target sub-data block 3, the target sub-data blocks 4 and … and the target sub-data block 16 can be sequentially obtained. The order of the 16 target sub-data blocks is as follows: target sub-data block 1, target sub-data block 2, target sub-data block 3, target sub-data blocks 4, …, target sub-data block 16.
In an alternative implementation, the implementation of step S307 is various, and embodiments of the present application provide, but are not limited to, the following implementation, and the method includes steps B11 to B14.
Step B11: the initial value of R is set to 0.
Step B12: let t=r, the following is performed:
step B13: w (W) t ＝M t (0.ltoreq.t < 16), where M t T+1st target sub-data block; w (W) t ＝S1(W t-3 XOR W t-14 XOR W t-16 ) (16.ltoreq.t.ltoreq.79); where S1 is the 1 bit shift to the left.
Step B14: let r=r+1, return to step B12 until R equals 80.
The 80 sub data blocks are sequentially: w (W) 0 、W 1 、W 2 、W 3 ，…，W 79 。
In an alternative implementation, at least one of the 16 target sub-data blocks may be logically operated on to obtain 64 operator sub-data blocks. The exclusive-or operation XOR described above is not limited.
Step S309: will fourier seriesExpanding at x=i to obtain expanded values f (i), i having values of 1 to 80 in order to obtain 80A spread value, wherein a 1 To a 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Constant of odd positions of b 1 To b 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Is constant for even positions of (c).
Wherein,
i.e. a 1 ＝K 0 、a 2 ＝K 2 、a 3 ＝K 4 、a 4 ＝K 6 、a 5 ＝K 8 、a 6 ＝K 10 、…；b 1 ＝K 1 、b 2 ＝K 3 、b 3 ＝K 5 、b 4 ＝K 7 、b 5 ＝K 9 、b 6 ＝K 11 、…。
Exemplary, a 0 May be a preset value.
Exemplary, a 0 May be a 1 To a 40 And b 1 To b 40 The sum of the values of (2).
It will be appreciated that the fourier series is extended at x=1 to obtain f (1), and the fourier series is extended at x=1 to x=80 to obtain a total of 80 extended values of f (1) to f (80).
In an alternative implementation, the 80 constants obtained in step S308 are different for different input information or data blocks, i.e. the parameter terms of the fourier series (i.e. a n And b n ) The randomness and the anti-riot cracking capability of the algorithm are improved, the algorithm performance consumption is small, and the method can be transplanted and realized on different platforms and hardware equipment to meet the requirements of various use scenes of the blockchain in the financial service system.
Step S310: assigning f (i) to K i-1 。
Wherein K is 0 ＝f(1)、K 1 ＝f(2)、K 2 ＝f(3)、…，K 79 ＝f(80)。
Step S311: acquiring the identity H of the buffer 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to be a constant value.
In an alternative implementation, for the first data block, i.e. when step S311 is performed for the first time, the identification H of the buffer and the 16 preset sub data blocks may be used 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Searching the identification H of the buffer area corresponding to the 16 target sub-data blocks in the corresponding relation of the initial values of the data blocks 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to be a constant value.
I.e. H corresponding to different target sub-data blocks i Since the target sub-data block is related to the input information, the H is obtained in the case of different plaintext inputs in the present application i Is different from the initial value of (a). Thereby increasing randomness and resistance to brute force cracking of the algorithm.
In an alternative implementation, the buffer { Hi } is initialized to the following values:
H 0 ＝0x67452301
H 1 ＝0xEFCDAB89
H 2 ＝0x98BADCFE
H 3 ＝0x10325476
H 4 ＝0xC3D2E1F0
step S312: will H 0 Is equal to the initial value of H 1 Is equal to the initial value of H 2 Is equal to the initial value of H 3 Is equal to the initial value of H 4 The initial values of (a) are assigned to the first parameter, the second parameter, the third parameter, the fourth parameter and the fifth parameter, respectively.
Step S313: the initial value of P is set to 0.
Step S314: for t=p, the following calculation is performed:
TEMP＝S 5 (H 0 )+f t (H 1 ,H 2 ,H 3 )+H 4 +W t +K t ；H 4 ＝H 3 ；H 3 ＝H 2 ；H 2 ＝S 30 (H 1 )；H 1 ＝
H 0 ；H 0 =temp; wherein W is t T+1th sub-block of 80 sub-blocks, f t (H 1 ,H 2 ,H 3 ) Is a preset function; s is S 5 (H 0 ) Refers to H 0 Shift left by 5 bits; s is S 30 (H 1 ) Refers to H 1 Left shift by 30 bits.
Exemplary, f t (H 1 ,H 2 ,H 3 ) Is preset to H 1 ,H 2 ,H 3 As a function of the argument, e.g. a preset function f t (H 1 ,H 2 ,H 3 ) The following are provided:
f t (H 1 ,H 2 ,H 3 )＝(H 1 AND H 2 )or((NOT H 1 )AND H 3 )，0<＝t<＝19；
f t (H 1 ,H 2 ,H 3 )＝H 1 XOR H 2 XOR H 3 ，20<＝t<＝39；
f t (H 1 ,H 2 ,H 3 )＝(H 1 AND H 2 )or(H 1 AND H 3 )or(H 2 AND H 3 )，40<＝t<＝59；
f t (H 1 ,H 2 ,H 3 )＝H 1 XOR H 2 XOR H 3 ，60<＝t<＝79。
in an alternative implementation, f t (H 1 ,H 2 ,H 3 ) Which may or may not be a piecewise function, this being merely an example and not for f t (H 1 ,H 2 ,H 3 ) Causing a limitation.
Step S315: setting p=p+1, returning to step S314 until P is equal to 80, to obtain the buffer identification H 0 Values of (H) 1 Values of (H) 2 Values of (H) 3 Values of (H) 4 Is a value of (2).
Step S316: let H 0 Final value = H 0 Value of + first parameter, H 1 Final value = H 1 Value of + second parameter, H 2 Final value = H 2 Value of + third parameter, H 3 Final value = H 3 Value of + fourth parameter, H 4 Final value = H 4 A value of +fifth parameter.
Step S317: the H is treated with 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 The final values of (2) are respectively used as the identification H of the buffer area corresponding to the G+1st data block 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to be a constant value.
I.e. the second execution of step S311, the obtained identification H of the buffer area i Initial value = H obtained when step S316 is first performed i Final value of (2).
At the third execution of step S311, the obtained buffer identification H i Initial value = H obtained when step S316 is performed the second time i Final value of (2). And so on, will not be described in detail.
If the first message is divided into a plurality of data blocks, multiple iterations may be required, and H is obtained from the previous data block 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 Is H of the next data block 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 The final ciphertext is related to the iteration number, making the ciphertext more difficult to crack.
Step S318: setting g=g+1, returning to step S305 until G is greater than Q.
Step S319: according to H 0 、H 1 、H 2 、H 3 、H 4 In the order of (2), H 0 Final value of (2)、H 1 Final value of H 2 Final value of H 3 Final value of H 4 160-bit digests of the final value composition of (c) are determined to be ciphertext.
It will be appreciated that H i The values of (2) are 32 bits long, so 5H i Constitutes 160-bit ciphertext.
Step S320: and storing the ciphertext into a blockchain.
For example, ciphertext may be stored as a characteristic value of the input information to a corresponding block in the blockchain.
After obtaining 80 constants set in advance, the ciphertext generating method based on the Fourier series expands the Fourier series at x=i to obtain an expanded value f (i), wherein the values of i are sequentially 1 to 80 to obtain 80 expanded values, and a is 1 To a 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Constant of odd positions of b 1 To b 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Is constant for even positions of (a); f (1) to f (80) are used as 80 constants, and thus, H is obtained based on f (1) to f (80) as 80 constants 0 Values of (H) 1 Values of (H) 2 Values of (H) 3 Values of (H) 4 And H based on 80 constants set in advance 0 Values of (H) 1 Values of (H) 2 Values of (H) 3 Values of (H) 4 If the input information is divided into a plurality of data blocks, then in the process of calculating the next data block, the identifier H of the buffer corresponding to the next data block 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 For the H obtained for the last data block 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 The final value of (2), i.e., the specific content of the resulting 160-bit ciphertext, is related not only to the number of data blocks into which the input information is partitioned, but also to the 80 spread values of the fourier series. If it is necessary to perform the riotForce cracking is required to try to crack the number of data blocks into which the input information is divided and crack 80 expansion values of the Fourier series, compared with the prior art, force cracking is more difficult, and therefore the safety of ciphertext is improved.
By adopting the ciphertext generation method based on the Fourier series, the safety of the characteristic value of the input information of the blockchain is improved, an attacker cannot use the current dictionary library of SHA-1 to reversely decrypt the characteristic value, and the possibility of violent cracking is avoided.
According to the embodiment of the application, the Fourier series and the characteristic value are organically fused, so that the encryption processing value is unique, when characters contained in input information are changed by one bit or more, at least 1/2 of 80 expansion values obtained by expansion of the introduced Fourier series are obviously changed, namely, the avalanche effect of an algorithm is obviously enhanced, further, password complexity is obviously enhanced, and storm cracking is almost impossible to realize under the existing operation capability, and the cost of the storm cracking is greatly increased.
The method is described in detail in the embodiments disclosed in the application, and the method can be implemented by using various devices, so that the application also discloses a device, and a specific embodiment is given in the following detailed description.
As shown in fig. 6, a block diagram of a ciphertext generating apparatus based on a fourier series according to an embodiment of the present application is provided, where the apparatus includes: the first obtaining module 601, the bit-filling expansion module 602, the first dividing module 603, the first setting module 604, the second dividing module 605, the operation module 606, the second obtaining module 607, the unfolding module 608, the first assignment module 609, the third obtaining module 610, the second assignment module 611, the third assignment module 612, the calculation module 613, the first triggering module 614, the fourth assignment module 615, the fifth assignment module 616, the second triggering module 617, the determining module 618 and the storage module 619, wherein:
a first obtaining module 601, configured to obtain input information to be stored in a blockchain;
the bit-filling expansion module 602 is configured to expand the length bit filling of the input information to 512×q bits, so as to obtain a first message, where Q is any integer greater than or equal to 1;
a first dividing module 603, configured to divide the first packet into Q data blocks, where the number of bits of the data blocks is 512 bits;
A first setting module 604, configured to set an initial value of G to 1;
the following is performed for the G-th data block:
a second dividing module 605, configured to divide the data block into 16 target sub-data blocks, where the number of bits of the target sub-data blocks is 32 bits;
the operation module 606 is configured to perform an operation on 16 target sub-data blocks to obtain 64 operation sub-data blocks, so as to obtain 80 sub-data blocks, where the number of bits of the operation sub-data blocks is 32, and the 80 sub-data blocks include 16 target sub-data blocks and 64 operation sub-data blocks;
the second obtaining module 607 is configured to obtain 80 constants that are set in advance, where values of the 80 constants are as follows:
K t =first preset value, 0<＝t<＝19；
K t =second preset value, 20<＝t<＝39；
K t =third preset value, 40<＝t<＝59；
K t =fourth preset value, 60<＝t<＝79；
An expansion module 608 for performing Fourier seriesExpanding at x=i to obtain expanded values f (i), i having values of 1 to 80 in order to obtain 80 expanded values, wherein a 1 To a 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Constant of odd positions of b 1 To b 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Is constant for even positions of (a); a, a 0 Is a preset value;
a first assignment module 609 for assigningAssignment of f (i) to K i-1 ；
A third obtaining module 610, configured to obtain the identifier H of the buffer 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to an initial value of (1);
a second assignment module 611 for assigning H 0 Is equal to the initial value of H 1 Is equal to the initial value of H 2 Is equal to the initial value of H 3 Is equal to the initial value of H 4 The initial values of the parameters are respectively assigned to a first parameter, a second parameter, a third parameter, a fourth parameter and a fifth parameter;
a third assignment module 612, configured to set an initial value of P to 0;
a calculating module 613, configured to perform, for t=p, the following calculation:
TEMP＝S 5 (H 0 )+f t (H 1 ,H 2 ,H 3 )+H 4 +W t +K t ；H 4 ＝H 3 ；H 3 ＝H 2 ；H 2 ＝S 30 (H 1 )；H 1 ＝H 0 ；H 0 =temp; wherein W is t T+1th sub-block of 80 sub-blocks, f t (H 1 ,H 2 ,H 3 ) Is a preset function; s is S 5 (H 0 ) Refers to H 0 Shift left by 5 bits; s is S 30 (H 1 ) Refers to H 1 Left shift by 30 bits;
a first trigger module 614 for setting p=p+1, and returning to the calculation module until P is equal to 80, so as to obtain the identifier H of the buffer 0 Values of (H) 1 Values of (H) 2 Values of (H) 3 Values of (H) 4 Is a value of (2);
a fourth assignment module 615 for letting H 0 Final value = H 0 Value of + first parameter, H 1 Final value = H 1 Value of + second parameter, H 2 Final value = H 2 Value of + third parameter, H 3 Final value = H 3 Value of + fourth parameter, H 4 Final value = H 4 A value of +fifth parameter;
a fifth assignment module 616 for assigning the H 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 The final values of (2) are respectively used as the identification H of the buffer area corresponding to the G+1st data block 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to an initial value of (1);
a second trigger module 617, configured to set g=g+1, and return to the second dividing module until G is greater than Q;
determination module 618 for following H 0 、H 1 、H 2 、H 3 、H 4 In the order of (2), H 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 A 160-bit digest of the final value of (2) to determine as ciphertext;
a storage module 619 for storing the ciphertext into the blockchain.
In an alternative implementation, the bit-filling expansion module includes:
a first bit-filling unit for filling a 1 at the end of the input information;
the second bit supplementing unit is used for supplementing 0 after 1 of the bit supplementing of the input information until the remainder of the length of the second message subjected to bit supplementing after modulo 512 is 448;
the third bit supplementing unit is used for supplementing one 1 at the tail end of the second message;
and the fourth bit supplementing unit is used for supplementing 63 0 s after the 1 s of the bit supplementing of the second message so as to obtain the first message.
In an alternative implementation, the first preset value is 0x5a827999, the second preset value is 0x6ED9EBA1, the third preset value is 0x8F1BBCDC, and the fourth preset value is 0xCA62C1D6.
In an alternative implementation, the function f is preset t (H 1 ,H 2 ,H 3 ) The following are provided:
f t (H 1 ,H 2 ,H 3 )＝(H 1 AND H 2 )or((NOT H 1 )AND H 3 )，0<＝t<＝19；
f t (H 1 ,H 2 ,H 3 )＝H 1 XOR H 2 XOR H 3 ，20<＝t<＝39；
f t (H 1 ,H 2 ,H 3 )＝(H 1 AND H 2 )or(H 1 AND H 3 )or(H 2 AND H 3 )，40<＝t<＝59；
f t (H 1 ,H 2 ,H 3 )＝H 1 XOR H 2 XOR H 3 ，60<＝t<＝79。
the specific manner in which the various modules perform the operations in the apparatus of the above embodiments have been described in detail in connection with the embodiments of the method, and will not be described in detail herein.
Fig. 7 is a block diagram illustrating an apparatus for a server according to an exemplary embodiment.
Servers include, but are not limited to: a processor 71, a memory 72, a network interface 73, an I/O controller 74, and a communication bus 75.
It should be noted that the structure of the server shown in fig. 7 is not limited to the server, and the server may include more or less components than those shown in fig. 7, or may combine some components, or may be arranged with different components, as will be understood by those skilled in the art.
The following describes the respective constituent elements of the server in detail with reference to fig. 7:
the processor 71 is a control center of the server, connects various parts of the entire server using various interfaces and lines, and performs various functions of the server and processes data by running or executing software programs and/or modules stored in the memory 72, and calling data stored in the memory 72, thereby performing overall monitoring of the server. Processor 71 may include one or more processing units; by way of example, the processor 71 may integrate an application processor that primarily handles operating systems, user interfaces, applications, etc., with a modem processor that primarily handles wireless communications. It will be appreciated that the modem processor described above may not be integrated into the processor 71.
Processor 71 may be a central processing unit (CentralProcessing Unit, CPU), or a specific integrated circuit ASIC (Application Specific Integrated Circuit), or one or more integrated circuits configured to implement embodiments of the present invention, etc.;
the Memory 72 may include a Memory such as a Random-Access Memory (RAM) 721 and a Read-Only Memory (ROM) 722, and may further include a mass storage device 723 such as at least 1 disk Memory and the like. Of course, the server may also include hardware required for other services.
The memory 72 is used for storing instructions executable by the processor 71. The processor 71 has a function of a ciphertext generating method based on a fourier series.
A wired or wireless network interface 73 is configured to connect the server to a network.
The processor 71, memory 72, network interface 73, and I/O controller 74 may be interconnected by a communication bus 75, which may be an ISA (Industry Standard Architecture ) bus, PCI (Peripheral Component Interconnect, peripheral component interconnect standard) bus, or EISA (Extended Industry Standard Architecture ) bus, among others. The buses may be classified as address buses, data buses, control buses, etc.
In an exemplary embodiment, the server may be implemented by one or more Application Specific Integrated Circuits (ASICs), digital Signal Processors (DSPs), digital Signal Processing Devices (DSPDs), programmable Logic Devices (PLDs), field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic elements for performing the above-described fourier series-based ciphertext generation method.
In an exemplary embodiment, the disclosed embodiments provide a storage medium including instructions, such as memory 72 including instructions, executable by processor 71 of a server to perform the above-described method. Alternatively, the storage medium may be a non-transitory computer readable storage medium, which may be, for example, ROM, random Access Memory (RAM), CD-ROM, magnetic tape, floppy disk, optical data storage device, and the like.
In an exemplary embodiment, a computer readable storage medium is also provided, which can be directly loaded into an internal memory of a computer, such as the memory 72, and contains software code, and the computer program can implement the steps shown in any embodiment of the above-mentioned ciphertext generating method based on fourier series after being loaded and executed by the computer.
In an exemplary embodiment, a computer program product is also provided, which can be directly loaded into an internal memory of a computer, for example, a memory contained in the server, and contains software codes, and the computer program can implement the steps shown in any embodiment of the ciphertext generating method based on fourier series after being loaded and executed by the computer.
It should be noted that the ciphertext generating method, the server, the medium and the device based on the fourier series provided by the invention can be used in the blockchain field or the finance field. The foregoing is merely an example, and is not intended to limit the application fields of the ciphertext generating method, the server, the medium, and the apparatus according to the present invention.
The features described in the respective embodiments in the present specification may be replaced with each other or combined with each other. For device or system class embodiments, the description is relatively simple as it is substantially similar to method embodiments, with reference to the description of method embodiments in part.
It is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (9)

1. A ciphertext generation method based on a fourier series, comprising:
acquiring input information to be stored in a block chain;
expanding the length complementary bit of the input information into 512 x Q bits to obtain a first message, wherein Q is any integer greater than or equal to 1;
Dividing the first message into Q data blocks, wherein the bit number of each data block is 512;
setting the initial value of G to be 1;
the following is performed for the G-th data block:
dividing the data block into 16 target sub-data blocks, wherein the bit number of the target sub-data blocks is 32;
performing operation on 16 target sub-data blocks to obtain 64 operation sub-data blocks to obtain 80 sub-data blocks, wherein the number of bits of the operation sub-data blocks is 32 bits, and the 80 sub-data blocks comprise 16 target sub-data blocks and 64 operation sub-data blocks;
obtaining preset 80 constants, wherein the values of the 80 constants are as follows:
K t =first preset value, 0<＝t<＝19；
K t =second preset value, 20<＝t<＝39；
K t =third preset value, 40<＝t<＝59；
K t =fourth preset value, 60<＝t<＝79；
Will fourier seriesExpanding at x=i to obtain expanded values f (i), i having values of 1 to 80 in order to obtain 80 expanded values, wherein a 1 To a 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Constant of odd positions of b 1 To b 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Is constant for even positions of (a); a, a 0 Is a preset value;
assigning f (i) to K i-1 ；
Acquiring the identity H of the buffer 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to an initial value of (1);
will H 0 Is equal to the initial value of H 1 Is equal to the initial value of H 2 Is equal to the initial value of H 3 Is equal to the initial value of H 4 Is described in (2)The initial values are respectively assigned to the first parameter, the second parameter, the third parameter, the fourth parameter and the fifth parameter;
setting the initial value of P to 0;
for t=p, the following calculation is performed:
TEMP＝S 5 (H 0 )+f t (H 1 ,H 2 ,H 3 )+H 4 +W t +K t ；H 4 ＝H 3 ；H 3 ＝H 2 ；H 2 ＝S 30 (H 1 )；H 1 ＝
H 0 ；H 0 =temp; wherein W is t T+1th sub-block of 80 sub-blocks, f t (H 1 ,H 2 ,H 3 ) Is a preset function; s is S 5 (H 0 ) Refers to H 0 Shift left by 5 bits; s is S 30 (H 1 ) Refers to H 1 Left shift by 30 bits;
setting p=p+1, returning to perform the calculation step performed when t=p until P equals 80, to obtain the identity H of the buffer 0 Values of (H) 1 Values of (H) 2 Values of (H) 3 Values of (H) 4 Is a value of (2);
let H 0 Final value = H 0 Value of + first parameter, H 1 Final value = H 1 Value of + second parameter, H 2 Final value = H 2 Value of + third parameter, H 3 Final value = H 3 Value of + fourth parameter, H 4 Final value = H 4 A value of +fifth parameter;
the H is treated with 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 The final values of (2) are respectively used as the identification H of the buffer area corresponding to the G+1st data block 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to an initial value of (1);
setting g=g+1, and returning to execute the operation step executed for the G data block until G is greater than Q;
according to H 0 、H 1 、H 2 、H 3 、H 4 In the order of (2), H 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 A 160-bit digest of the final value of (2) to determine as ciphertext;
and storing the ciphertext into a blockchain.
2. The method of generating ciphertext based on a fourier series of claim 1, wherein the expanding the length of the input information to 512 x q bits to obtain the first message comprises:
a 1 is complemented at the tail of the input information;
supplementing 0 after 1 of the input information bit, until the remainder of the length of the second message after bit supplementing modulo 512 is 448;
supplementing a 1 at the tail of the second message;
and supplementing 63 0 s after the 1 s of the complementary bit of the second message to obtain the first message.
3. The method of generating ciphertext based on a fourier series according to claim 1 or 2, wherein the step of performing an operation on 16 target sub-data blocks to obtain 64 operation sub-data blocks comprises:
setting the initial value of R to 0;
let t=r, the following is performed:
W t ＝M t T is more than or equal to 0 and less than 16, wherein M t T+1st target sub-data block;
W t ＝S1(W t-3 XOR W t-14 XOR W t-16 ) T is more than or equal to 16 and less than or equal to 79; wherein S1 is a left-pointing shift of 1 bit;
let r=r+1, return to perform the operation steps performed when t=r until R equals 80.
4. The method of claim 1, wherein the first predetermined value is 0x5a827999, the second predetermined value is 0x6ED9EBA1, the third predetermined value is 0x8F1BBCDC, and the fourth predetermined value is 0xCA62C1D6.
5. The ciphertext generating method based on a fourier series as recited in claim 1, wherein a function f is set in advance t (H 1 ,H 2 ,H 3 ) The following are provided:
f t (H 1 ,H 2 ,H 3 )＝(H 1 AND H 2 )or((NOT H 1 )AND H 3 )，0<＝t<＝19；
f t (H 1 ,H 2 ,H 3 )＝H 1 XOR H 2 XOR H 3 ，20<＝t<＝39；
f t (H 1 ,H 2 ,H 3 )＝(H 1 AND H 2 )or(H 1 AND H 3 )or(H 2 AND H 3 )，40<＝t<＝59；
f t (H 1 ,H 2 ,H 3 )＝H 1 XOR H 2 XOR H 3 ，60<＝t<＝79。
6. a ciphertext generating apparatus based on a fourier series, comprising:
the first acquisition module is used for acquiring input information to be stored in the blockchain;
the bit-filling expansion module is used for expanding the length bit filling of the input information into 512 x Q bits to obtain a first message, wherein Q is any integer greater than or equal to 1;
the first dividing module is used for dividing the first message into Q data blocks, and the bit number of the data blocks is 512;
a first setting module, configured to set an initial value of G to 1;
The following is performed for the G-th data block:
the second dividing module is used for dividing the data block into 16 target sub-data blocks, and the bit number of the target sub-data blocks is 32;
the operation module is used for carrying out operation on 16 target sub-data blocks to obtain 64 operation sub-data blocks so as to obtain 80 sub-data blocks, the number of bits of the operation sub-data blocks is 32, and the 80 sub-data blocks comprise 16 target sub-data blocks and 64 operation sub-data blocks;
the second obtaining module is used for obtaining 80 constants which are preset, and the values of the 80 constants are as follows:
K t =first preset value, 0<＝t<＝19；
K t =second preset value, 20<＝t<＝39；
K t =third preset value, 40<＝t<＝59；
K t =fourth preset value, 60<＝t<＝79；
An unfolding module for carrying out Fourier seriesExpanding at x=i to obtain expanded values f (i), i having values of 1 to 80 in order to obtain 80 expanded values, wherein a 1 To a 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 Constant of odd bits, b 1 To b 40 The values of (a) are as follows: k (K) 0 ,K 1 ,K 2 ,...,K 79 A constant of even bits of (a); a, a 0 Is a preset value;
a first assignment module for assigning f (i) to K i-1 ；
A third acquisition module for acquiring the identification H of the buffer area 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to an initial value of (1);
a second assignment module for assigning H 0 Is equal to the initial value of H 1 Is equal to the initial value of H 2 Is equal to the initial value of H 3 Is equal to the initial value of H 4 The initial values are respectively assigned to a first parameter, a second parameter and a third parameterA fourth parameter and a fifth parameter;
the third assignment module is used for setting the initial value of P to 0;
a calculation module for performing, for t=p, the following calculations:
TEMP＝S 5 (H 0 )+f t (H 1 ,H 2 ,H 3 )+H 4 +W t +K t ；H 4 ＝H 3 ；H 3 ＝H 2 ；H 2 ＝S 30 (H 1 )；H 1 ＝H 0 ；H 0 =temp; wherein W is t T+1th sub-block of 80 sub-blocks, f t (H 1 ,H 2 ,H 3 ) Is a preset function; s is S 5 (H 0 ) Refers to H 0 Shift left by 5 bits; s is S 30 (H 1 ) Refers to H 1 Left shift by 30 bits;
a first trigger module for setting p=p+1, and returning to the calculation module until P is equal to 80 to obtain the identifier H of the buffer area 0 Values of (H) 1 Values of (H) 2 Values of (H) 3 Values of (H) 4 Is a value of (2);
a fourth assignment module for letting H 0 Final value = H 0 Value of + first parameter, H 1 Final value = H 1 Value of + second parameter, H 2 Final value = H 2 Value of + third parameter, H 3 Final value = H 3 Value of + fourth parameter, H 4 Final value = H 4 A value of +fifth parameter;
a fifth assignment module for assigning the H 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 The final values of (2) are respectively used as the identification H of the buffer area corresponding to the G+1st data block 0 Initial value of (H) 1 Initial value of (H) 2 Initial value of (H) 3 Initial value of (H) 4 Is set to an initial value of (1);
the second triggering module is used for setting G=G+1, and returning to the second dividing module until G is larger than Q;
a determining module for followingH 0 、H 1 、H 2 、H 3 、H 4 In the order of (2), H 0 Final value of H 1 Final value of H 2 Final value of H 3 Final value of H 4 A 160-bit digest of the final value of (2) to determine as ciphertext;
and the storage module is used for storing the ciphertext into a blockchain.
7. The fourier series-based ciphertext generating apparatus of claim 6, wherein the bit-filling expansion module comprises:
a first bit-filling unit for filling a 1 at the end of the input information;
the second bit supplementing unit is used for supplementing 0 after 1 of the bit supplementing of the input information until the remainder of the length of the second message subjected to bit supplementing after modulo 512 is 448;
the third bit supplementing unit is used for supplementing one 1 at the tail end of the second message;
and the fourth bit supplementing unit is used for supplementing 63 0 s after the 1 s of the bit supplementing of the second message so as to obtain the first message.
8. A server, comprising:
a processor;
a memory for storing the processor-executable instructions;
wherein the processor is configured to execute the instructions to implement the fourier series-based ciphertext generation method of any one of claims 1 to 5.
9. A computer readable storage medium, which when executed by a processor of a server, causes the server to perform the fourier series-based ciphertext generation method of any one of claims 1 to 5.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110503434A (en) * 2019-07-15 2019-11-26 平安普惠企业管理有限公司 Data verification method, device, equipment and storage medium based on hash algorithm
CN113688350A (en) * 2021-07-15 2021-11-23 千方捷通科技股份有限公司 Method, device, storage medium and terminal for predicting traffic flow based on Fourier function

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110503434A (en) * 2019-07-15 2019-11-26 平安普惠企业管理有限公司 Data verification method, device, equipment and storage medium based on hash algorithm
CN113688350A (en) * 2021-07-15 2021-11-23 千方捷通科技股份有限公司 Method, device, storage medium and terminal for predicting traffic flow based on Fourier function

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