CN114363771A - Audio processing device and system - Google Patents
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- H04R3/00—Circuits for transducers, loudspeakers or microphones
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
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Abstract
The invention relates to an audio processing device and system, comprising a serial-parallel conversion unit, a frequency band separation unit, a gain adjustment unit, a frequency band gating unit, a frequency band mixing unit and a channel integration unit, wherein after the serial-parallel conversion unit converts a serial input signal of an MIC into parallel signals, the frequency band separation unit respectively separates the parallel signals into corresponding frequency band signals, and the gain adjustment unit respectively adjusts the volume gain or volume attenuation of each frequency band signal to obtain an adjustment signal. Furthermore, the band gating unit gates or cuts off the adjusting signal to obtain a gating signal, the band mixing unit performs audio mixing or noise elimination on the gating signal to obtain a mixed signal, and the channel integration unit integrates and outputs the gating signal and the mixed signal. Based on the method, the audio signals are subjected to gain amplification processing in a digital processing mode, and the audio signals with different gain multiples are integrated through signal gating and integration, so that the cost, the power consumption and the size are reduced while the audio gain processing is realized.
Description
Technical Field
The present invention relates to the field of audio processing technologies, and in particular, to an audio processing apparatus and system.
Background
Audio, in the context of audio, is meant to generally describe devices and their actions within the audio range and in relation to sound. In various audio devices, sound is collected by an MIC to obtain an electrical signal, and the electrical signal is further subjected to audio processing to determine audio signal output. For example, in the field of video teaching, a sound of a teacher is collected by an MIC, and a collected signal is converted into an audio signal to be output.
In the process of audio processing, especially in the field of video teaching, gain amplification processing corresponding to different multiples of audio is often required. At present, the process of gain amplification processing of audio is mainly analog signal processing through an analog circuit, and the process needs a large number of analog circuit components and parts, so that cost control is not facilitated, and the volume and power consumption of the audio processing part are not controlled.
Disclosure of Invention
Therefore, it is necessary to provide an audio processing device and system aiming at the defects of high volume, power consumption, high cost and the like of an audio gain amplifying circuit built by analog circuit components.
An audio processing apparatus comprising:
a serial-to-parallel conversion unit for converting a serial input signal of an MIC into a parallel signal;
a band separating unit for separating the parallel signals into corresponding band signals, respectively;
the gain adjusting unit is used for respectively adjusting the volume gain or the volume attenuation of each frequency band signal to obtain an adjusting signal;
the frequency band gating unit is used for gating or cutting off the adjusting signal to obtain a gating signal;
a frequency band mixing unit for performing a sound mixing or noise removal operation on the gating signal to obtain a mixed signal;
and the channel integration unit is used for integrating and outputting the gating signal and the mixed signal.
The audio processing device comprises a serial-parallel conversion unit, a frequency band separation unit, a gain adjustment unit, a frequency band gating unit, a frequency band mixing unit and a channel integration unit, wherein after the serial-parallel conversion unit converts a serial input signal of an MIC into parallel signals, the frequency band separation unit separates the parallel signals into corresponding frequency band signals respectively, and the gain adjustment unit adjusts the volume gain or volume attenuation of each frequency band signal respectively to obtain an adjusted signal. Furthermore, the band gating unit gates or cuts off the adjusting signal to obtain a gating signal, the band mixing unit performs audio mixing or noise elimination on the gating signal to obtain a mixed signal, and the channel integration unit integrates and outputs the gating signal and the mixed signal. Based on the method, the audio signals are subjected to gain amplification processing in a digital processing mode, and the audio signals with different gain multiples are integrated through signal gating and integration, so that the cost, the power consumption and the size are reduced while the audio gain processing is realized.
In one embodiment, the serial-to-parallel conversion unit is used for performing serial-to-parallel conversion of PDM to PCM on a serial input signal of the MIC.
In one embodiment, the serial-to-parallel conversion unit comprises a multi-stage CIC decimation filter;
the CIC decimation filter is used for performing decimation compensation and direct current elimination operation so as to realize serial-parallel conversion from PDM to PCM.
In one embodiment, the band separating unit includes a low pass filtering unit and a high pass filtering unit.
In one embodiment, the channel integration unit is used for integrating and outputting the gating signal and the mixed signal in a time division multiplexing mode.
An audio processing system comprising:
the MIC is used for acquiring sound and acquiring an acquired signal;
the analog-to-digital conversion unit is used for converting the acquired signals into serial input signals;
an FPGA chip;
wherein, the FPGA chip includes:
the serial-parallel conversion unit is used for converting the serial input signal of the analog-digital conversion unit into a parallel signal;
a band separating unit for separating the parallel signals into corresponding band signals, respectively;
the gain adjusting unit is used for respectively adjusting the volume gain or the volume attenuation of each frequency band signal to obtain an adjusting signal;
the frequency band gating unit is used for gating or cutting off the adjusting signal to obtain a gating signal;
a frequency band mixing unit for performing a sound mixing or noise removal operation on the gating signal to obtain a mixed signal;
and the channel integration unit is used for integrating and outputting the gating signal and the mixed signal.
The audio processing system comprises the MIC, the analog-to-digital conversion unit and the FPGA chip, wherein the FPGA chip comprises a serial-parallel conversion unit, a frequency band separation unit, a gain adjustment unit, a frequency band gating unit, a frequency band mixing unit and a channel integration unit, after serial-parallel conversion units convert serial input signals of the MIC into parallel signals, the frequency band separation units respectively separate the parallel signals into corresponding frequency band signals, and the gain adjustment unit respectively adjusts volume gain or volume attenuation of each frequency band signal to obtain an adjustment signal. Furthermore, the band gating unit gates or cuts off the adjusting signal to obtain a gating signal, the band mixing unit performs audio mixing or noise elimination on the gating signal to obtain a mixed signal, and the channel integration unit integrates and outputs the gating signal and the mixed signal. Based on the method, the audio signals are subjected to gain amplification processing in a digital processing mode, and the audio signals with different gain multiples are integrated through signal gating and integration, so that the cost, the power consumption and the size are reduced while the audio gain processing is realized.
In one embodiment, the frequency response of the MIC ranges from 20Hz to 20 kHz.
In one embodiment, the analog-to-digital converter of the analog-to-digital conversion unit.
In one embodiment, the resolution of the analog-to-digital converter is greater than an 8-bit binary number.
In one embodiment, the system further comprises an I2S bus;
the I2S bus is used to transmit the integrated output signal of the channel integration unit.
Drawings
FIG. 1 is a block diagram of an audio processing apparatus according to an embodiment;
FIG. 2 is a block diagram of an audio processing apparatus according to another embodiment;
FIG. 3 is a block diagram of an audio processing system according to an embodiment.
Detailed Description
For better understanding of the objects, technical solutions and effects of the present invention, the present invention will be further explained with reference to the accompanying drawings and examples. Meanwhile, the following described examples are only for explaining the present invention, and are not intended to limit the present invention.
The embodiment of the invention provides an audio processing device.
Fig. 1 is a block diagram of an audio processing apparatus according to an embodiment, and as shown in fig. 1, the audio processing apparatus according to an embodiment includes a serial-to-parallel conversion unit 100, a frequency band separation unit 101, a gain adjustment unit 102, a frequency band gating unit 103, a frequency band mixing unit 104, and a channel integration unit 105:
a serial-to-parallel conversion unit 100 for converting a serial input signal of an MIC into a parallel signal;
a band separating unit 101 for separating the parallel signals into corresponding band signals, respectively;
a gain adjusting unit 102, configured to adjust a volume gain or a volume attenuation of each frequency band signal, respectively, to obtain an adjusted signal;
a band gating unit 103 for performing gating or cutoff operation on the adjustment signal to obtain a gating signal;
a band mixing unit 104 for performing a sound mixing or noise removal operation on the gating signal to obtain a mixed signal;
and a channel integration unit 105 for integrating and outputting the strobe signal and the mixed signal.
Wherein the serial-to-parallel conversion unit 100 is used to connect external MIC devices. The MIC apparatus performs sound collection to obtain an MIC signal, so that the MIC signal is input to the serial-to-parallel conversion unit 100 in a serial manner as a serial input signal acquired by the serial-to-parallel conversion unit 100. The serial-to-parallel conversion unit 100 converts a serial input signal into a parallel signal for subsequent signal frequency division processing.
In one embodiment, the serial-to-parallel conversion unit 100 includes a serial-to-parallel conversion circuit. Such as a serial-to-parallel conversion circuit based on high speed LVDS signals.
In one embodiment, the audio processing device is implemented in an FPGA (Field Programmable Gate Array), and each unit in the audio processing device is programmed with logic, and corresponding service function logic is implemented in the FPGA.
Based on this, in one embodiment, the serial-to-parallel conversion unit 100 is constructed by implementing a multi-way high-speed serial-to-parallel converter design through an FPGA. As a preferred embodiment, through the design of the FPGA, the serial-to-parallel conversion unit 100 performs serial-to-parallel conversion of a serial input signal of the MIC from PDM (Pulse Density Modulation Pulse time division multiplexing) to PCM (Pulse Code Modulation), and converts the PDM serial signal into a PCM parallel signal, so as to satisfy the subsequent audio protocol of the MIC signal and facilitate the subsequent signal parallel processing.
In one embodiment, the implementation process in the FPGA is based on the serial-parallel conversion unit 100. Fig. 2 is a block diagram of an audio processing apparatus according to another embodiment, and as shown in fig. 2, the serial-to-parallel conversion unit 100 includes a multi-stage CIC decimation filter 200;
the CIC decimation filter 200 is used to perform decimation compensation and dc cancellation operations to achieve PDM to PCM serial-to-parallel conversion.
Wherein the serial-to-parallel conversion unit 100 may be implemented by a CIC decimation filter, a half band filter, or a low pass filter. As a preferable mode, as shown in fig. 2, a CIC decimation filter 200 is selected and a multistage process is formed by a plurality of CIC decimation filters 200, and decimation compensation and dc removal operations are performed to realize serial-to-parallel conversion from PDM to PCM.
In one embodiment, as shown in fig. 2, the band separating unit 101 includes a low-pass filtering unit 201 and a high-pass filtering unit 202.
By the arrangement of the low-pass filtering unit 201 and the high-pass filtering unit 202, the parallel signal is separated into a plurality of band-pass signals, and a frequency band signal is obtained. As a preferred embodiment, as shown in fig. 2, the parallel signal samples are subjected to low-pass filtering, high-pass filtering, and model-specific frequency band separation to obtain the first frequency band, the second frequency band, the third frequency band, and the original audio signal data as frequency band signals.
In one embodiment, the frequency divider design is implemented by a digital filter of an FPGA, and the sub-band separation unit 101 is implemented.
Further, the gain adjustment unit 102 adjusts the volume gain or the volume attenuation of each frequency band signal, respectively, to obtain an adjusted signal. Wherein, the volume gain of each channel of frequency band signals is independently adjusted. Taking fig. 2 as an example, the volume gain of the signal of the first frequency band is 10 times, the volume gain of the signal of the second frequency band is 30 times, the volume gain of the signal of the third frequency band is 0.5 times (attenuation), and the original audio signal data is no gain or no attenuation. Taking this as an example, the gain adjusting unit 102 independently adjusts the volume gain or volume attenuation of each channel of frequency band signal, so as to output a rich volume type for the subsequent signal.
In one embodiment, the function of the gain adjustment unit 102 is implemented by the audio gain design of the FPGA. And the volume of each channel of frequency band signal is adjusted by a digital adjusting mode of the FPGA, so that the audio gain control is realized. In one embodiment, the adjustment of the volume of each channel of frequency band signal is realized by adjusting the duty ratio of the frequency band signal through the FPGA.
Further, each path of the adjustment signal is gated or cut off by the band gating unit 103 to control selective output of the adjustment signal.
In one embodiment, the band gating unit 103 performs gating or cutting operation on each path of adjusting signal through a band pass design of the FPGA.
Further, as shown in fig. 2, the gate signal is subjected to a mixing or noise canceling operation by the band mixing unit 104, and a mixed signal is obtained. The band mixing section 104 mixes the band gain-adjusted band, thereby emphasizing the desired band sound and attenuating the undesired band sound.
In one embodiment, the function of mixing or noise-canceling the gating signal by the band mixing unit 104 is realized by the mixing and noise-canceling design of the FPGA.
Finally, the strobe signal and the mixed signal are integrated and output by the channel integration unit 105. The output signals are analyzed by subsequent signals, so that a plurality of paths of audio signals which are subjected to gain differentiation and audio mixing difference can be obtained, and the requirements of different types of audio signals are met.
In one embodiment, the channel integration unit 105 integrates and outputs the strobe signal and the mixed signal in a time division multiplexing manner, so as to save link resources of the output signal, and implement the output function of multiple signals with one output.
In one embodiment, the function of the channel integration unit 105 is realized by an audio channel integration design of the FPGA.
The audio processing apparatus of any of the above embodiments includes a serial-to-parallel conversion unit 100, a frequency band separation unit 101, a gain adjustment unit 102, a frequency band gating unit 103, a frequency band mixing unit 104, and a channel integration unit 105, where after the serial-to-parallel conversion unit 100 converts a serial input signal of a MIC into parallel signals, the frequency band separation unit 101 separates the parallel signals into corresponding frequency band signals, and the gain adjustment unit 102 adjusts volume gains or volume attenuations of the frequency band signals, respectively, to obtain adjusted signals. Further, the band gating unit 103 performs gating or cutoff operation on the adjustment signal to obtain a gating signal, the band mixing unit 104 performs mixing or noise removal operation on the gating signal to obtain a mixed signal, and the gating signal and the mixed signal are integrated and output by the channel integration unit 105. Based on the method, the audio signals are subjected to gain amplification processing in a digital processing mode, and the audio signals with different gain multiples are integrated through signal gating and integration, so that the cost, the power consumption and the size are reduced while the audio gain processing is realized.
Based on this, in the application scene of the audio processing device, such as a classroom, there are many microphones and far-end sounds. By means of the audio processing device, the primary sound (e.g. the sound of the teacher's lecture) is amplified and the other secondary sounds are reduced to eliminate unnecessary noise.
The embodiment of the invention also provides an audio processing system.
Fig. 3 is a block diagram of an audio processing system according to an embodiment, and as shown in fig. 3, the audio processing system according to an embodiment includes:
the MIC is used for acquiring sound and acquiring an acquired signal;
the analog-to-digital conversion unit is used for converting the acquired signals into serial input signals;
an FPGA chip;
wherein, the FPGA chip includes:
a serial-to-parallel conversion unit 100 for converting a serial input signal of the analog-to-digital conversion unit into a parallel signal;
a band separating unit 101 for separating the parallel signals into corresponding band signals, respectively;
a gain adjusting unit 102, configured to adjust a volume gain or a volume attenuation of each frequency band signal, respectively, to obtain an adjusted signal;
a band gating unit 103 for performing gating or cutoff operation on the adjustment signal to obtain a gating signal;
a band mixing unit 104 for performing a sound mixing or noise removal operation on the gating signal to obtain a mixed signal;
and a channel integration unit 105 for integrating and outputting the strobe signal and the mixed signal.
The audio processing system comprises a MIC, an analog-to-digital conversion unit and an FPGA chip, wherein the FPGA chip comprises a serial-parallel conversion unit 100, a frequency band separation unit 101, a gain adjustment unit 102, a frequency band gating unit 103, a frequency band mixing unit 104 and a channel integration unit 105, after serial-parallel conversion unit 100 converts serial input signals of the MIC into parallel signals, frequency band separation unit 101 respectively separates the parallel signals into corresponding frequency band signals, and gain adjustment unit 102 respectively adjusts volume gain or volume attenuation of each frequency band signal to obtain adjustment signals. Further, the band gating unit 103 performs gating or cutoff operation on the adjustment signal to obtain a gating signal, the band mixing unit 104 performs mixing or noise removal operation on the gating signal to obtain a mixed signal, and the gating signal and the mixed signal are integrated and output by the channel integration unit 105. Based on the method, the audio signals are subjected to gain amplification processing in a digital processing mode, and the audio signals with different gain multiples are integrated through signal gating and integration, so that the cost, the power consumption and the size are reduced while the audio gain processing is realized.
The MIC outputs a collection signal in the form of an analog signal after collecting audio, the analog-to-digital conversion unit converts the collection signal into a serial input signal, and the serial input signal is output to the FPGA chip.
The FPGA realizes the functions of the serial-parallel conversion unit 100, the frequency band separation unit 101, the gain adjustment unit 102, the frequency band gating unit 103, the frequency band mixing unit 104, and the channel integration unit 105 through internal design and configuration.
In the method, according to an actual processing requirement of the FPGA for performing gain processing on the audio signal, a shift processing needs to be performed on a digital signal object subjected to the gain processing in the gain processing, for example, any one or more bits in the digital signal object are shifted to the left. Therefore, in order to meet the signal processing precision requirements of the serial-to-parallel conversion unit 100, the band separation unit 101, the gain adjustment unit 102, the band gating unit 103, the band mixing unit 104, and the channel integration unit 105 in the FPGA, a MIC and an analog-to-digital conversion unit meeting the precision requirements need to be selected. As a preferred embodiment, an MIC and an analog-to-digital conversion unit whose processing precision satisfies a preset precision range are selected.
In one embodiment, the frequency response of the MIC ranges from 20Hz to 20 kHz. By selecting the MIC with the frequency response range of 20Hz to 20kHz, the precision requirement of the FPGA on the MIC in signal processing is met.
In one embodiment, the analog-to-digital converter of the analog-to-digital conversion unit.
In one embodiment, the resolution of the analog-to-digital converter is greater than an 8-bit binary number. The requirement of precision on an analog-to-digital converter in signal processing of the FPGA is met by selecting the analog-to-digital converter with the resolution ratio larger than 8-bit binary number.
In one embodiment, the system further comprises an I2S bus;
the I2S bus is used to transmit the integrated output signal of the channel integration unit 105.
It should be noted that the integrated output signal of the transmission channel integration unit 105 may also be transmitted through other types of bus systems. And the I2S bus is selected to ensure the transmission precision requirement of the FPGA for signal processing.
The audio processing system of any of the above embodiments includes a MIC, an analog-to-digital conversion unit, and an FPGA chip, where the FPGA chip includes a serial-to-parallel conversion unit 100, a frequency band separation unit 101, a gain adjustment unit 102, a frequency band gating unit 103, a frequency band mixing unit 104, and a channel integration unit 105, after the serial-to-parallel conversion unit 100 converts a serial input signal of the MIC into parallel signals, the frequency band separation unit 101 separates the parallel signals into corresponding frequency band signals, and the gain adjustment unit 102 adjusts a volume gain or a volume attenuation of each frequency band signal, respectively, to obtain an adjustment signal. Further, the band gating unit 103 performs gating or cutoff operation on the adjustment signal to obtain a gating signal, the band mixing unit 104 performs mixing or noise removal operation on the gating signal to obtain a mixed signal, and the gating signal and the mixed signal are integrated and output by the channel integration unit 105. Based on the method, the audio signals are subjected to gain amplification processing in a digital processing mode, and the audio signals with different gain multiples are integrated through signal gating and integration, so that the cost, the power consumption and the size are reduced while the audio gain processing is realized.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above examples only show some embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. An audio processing apparatus, comprising:
a serial-to-parallel conversion unit for converting a serial input signal of an MIC into a parallel signal;
a band separating unit for separating the parallel signals into corresponding band signals, respectively;
the gain adjusting unit is used for respectively adjusting the volume gain or the volume attenuation of each frequency band signal to obtain an adjusting signal;
the frequency band gating unit is used for gating or cutting off the adjusting signal to obtain a gating signal;
a frequency band mixing unit, configured to perform a sound mixing or noise cancellation operation on the gating signal to obtain a mixed signal;
and the channel integration unit is used for integrating and outputting the gating signal and the mixed signal.
2. The audio processing apparatus according to claim 1, wherein the serial-to-parallel conversion unit is configured to perform PDM to PCM serial-to-parallel conversion of a serial input signal of the MIC.
3. The audio processing apparatus according to claim 2, wherein the serial-to-parallel conversion unit includes a multi-stage CIC decimation filter;
the CIC decimation filter is used for performing decimation compensation and direct current elimination operation so as to realize serial-parallel conversion from PDM to PCM.
4. The audio processing apparatus according to claim 1, wherein the band separating unit includes a low-pass filtering unit and a high-pass filtering unit.
5. The audio processing apparatus according to claim 1, wherein the channel integration unit is configured to integrate and output the strobe signal and the mix signal in a time division multiplexing manner.
6. An audio processing system, comprising:
the MIC is used for acquiring sound and acquiring an acquired signal;
the analog-to-digital conversion unit is used for converting the acquisition signal into a serial input signal;
an FPGA chip;
wherein, the FPGA chip includes:
the serial-parallel conversion unit is used for converting the serial input signal of the analog-digital conversion unit into a parallel signal;
a band separating unit for separating the parallel signals into corresponding band signals, respectively;
the gain adjusting unit is used for respectively adjusting the volume gain or the volume attenuation of each frequency band signal to obtain an adjusting signal;
the frequency band gating unit is used for gating or cutting off the adjusting signal to obtain a gating signal;
a frequency band mixing unit, configured to perform a sound mixing or noise cancellation operation on the gating signal to obtain a mixed signal;
and the channel integration unit is used for integrating and outputting the gating signal and the mixed signal.
7. The audio processing system of claim 6, wherein the frequency response of the MIC is in a range of 20Hz to 20 kHz.
8. The audio processing system of claim 6, characterized by an analog-to-digital converter of the analog-to-digital conversion unit.
9. The audio processing system of claim 8, wherein the analog-to-digital converter has a resolution greater than an 8-bit binary number.
10. The audio processing system of claim 8, further comprising an I2S bus;
the I2S bus is used to transmit the integrated output signal of the channel integration unit.
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