CN114362504B - Full-bridge inverter capable of inhibiting Miller effect - Google Patents
Full-bridge inverter capable of inhibiting Miller effect Download PDFInfo
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- CN114362504B CN114362504B CN202111661195.0A CN202111661195A CN114362504B CN 114362504 B CN114362504 B CN 114362504B CN 202111661195 A CN202111661195 A CN 202111661195A CN 114362504 B CN114362504 B CN 114362504B
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- 230000000694 effects Effects 0.000 title claims abstract description 47
- 230000002401 inhibitory effect Effects 0.000 title abstract description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 9
- 239000003990 capacitor Substances 0.000 claims description 19
- 238000001914 filtration Methods 0.000 claims description 18
- 230000001939 inductive effect Effects 0.000 claims description 6
- 230000002093 peripheral effect Effects 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 18
- 239000008186 active pharmaceutical agent Substances 0.000 abstract description 17
- 238000010438 heat treatment Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/38—Means for preventing simultaneous conduction of switches
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
- H02M7/53875—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The application belongs to the technical field of power electronics, in particular to a full-bridge inverter capable of inhibiting the Miller effect, which solves the problem that the Miller effect inherent in a semiconductor switching device causes the simultaneous conduction of an upper switching tube and a lower switching tube of a half bridge from the root of a main circuit, and the drain-source voltage V of the other switching tube of the same bridge arm is not influenced when the switching tube is turned on DS And gate-source voltage V GS Because the drain-source voltages in the switching-on and switching-off processes of the bridge arm switching tube are not mutually influenced, the Miller effect caused by the switching-on and switching-off processes of the bridge arm switching tube is restrained.
Description
Technical Field
The application belongs to the technical field of power electronics, and particularly relates to a full-bridge inverter capable of inhibiting a Miller effect.
Background
Conventional full-bridge inverters are one of the most widely used main circuit topologies in power electronics, and they mostly employ high-frequency power semiconductor switching devices (IGBTs or MOSFETs, etc.), which all have an inherent miller effect. The miller effect of the semiconductor switch can lead to the simultaneous conduction of the upper and lower switching tubes of the same bridge arm of the full-bridge inverter, thereby causing the problems of direct damage, heating of the switching tubes and secondary conduction and affecting the safety, reliability and universal application of the full-bridge inverter.
The problem that the miller effect causes the direct damage of the upper and lower switching tubes of the half bridge is the most serious, and the device is seriously damaged, thereby causing safety risk and economic loss.
Disclosure of Invention
The application aims to provide a full-bridge inverter capable of inhibiting the Miller effect, which solves the problem that the upper and lower switching tubes of a half bridge are simultaneously conducted due to the Miller effect inherent to a semiconductor switching device.
The technical scheme for realizing the purpose of the application comprises the following steps:
the embodiment of the application provides a full-bridge inverter capable of inhibiting the Miller effect, which comprises the following components: a power supply, a first switching tube, a second switching tube, a third switching tube, a fourth switching tube, a first diode, a second diode, a third diode, a fourth diode, a fifth diode, a sixth diode, a seventh diode and an eighth diode;
the positive output end of the power supply is connected with the first end of the first switching tube, the cathode of the first diode, the first end of the third switching tube and the cathode of the fifth diode;
the negative output end of the power supply is connected with the anode of the second diode, the second end of the second switching tube, the anode of the sixth diode and the second end of the fourth switching tube;
the second end of the first switching tube is connected with the cathode of the second diode and the anode of the third diode;
the anode of the first diode is connected with the cathode of the fourth diode and the first end of the second switch tube;
the cathode of the third diode is connected with the anode of the fourth diode and the first end of the load;
the second end of the third switching tube is connected with the cathode of the sixth diode and the anode of the seventh diode;
the anode of the fifth diode is connected with the first end of the fourth switching tube and the cathode of the eighth diode;
the cathode of the seventh diode is connected with the anode of the eighth diode and the second end of the load.
Optionally, the first switching tube and the second switching tube form a first half-bridge; the third switching tube and the fourth switching tube form a second half bridge.
Alternatively to this, the method may comprise,
the load is an inductive load, a resistive-capacitive load or a inductive-capacitive load;
the resistive load is a load formed by serially connecting a resistor and an inductor;
the resistance-capacitance load is formed by connecting a resistor and a capacitor in parallel and then connecting the resistor and the capacitor in series;
the resistance-inductance-capacitance load is formed by connecting a resistor and a capacitor in parallel, connecting the resistor and the capacitor in series and finally connecting the capacitor and the inductor in series;
the inductive-capacitive load is a load formed by connecting an inductor and a capacitor in series, or a load formed by connecting the inductor and the capacitor in parallel.
Alternatively to this, the method may comprise,
the first switching tube, the second switching tube, the third switching tube and the fourth switching tube are full-control type fast power semiconductor switching devices.
Alternatively to this, the method may comprise,
the power supply is a direct current power supply.
Optionally, the power supply includes: an alternating current power supply and a three-phase rectifying and filtering circuit;
the three-phase output end of the alternating current power supply is connected with the input end of the three-phase rectifying and filtering circuit;
the positive output end of the three-phase rectifying and filtering circuit is connected with the first end of the first switching tube, the cathode of the first diode, the first end of the third switching tube and the cathode of the fifth diode; and the negative output end of the three-phase rectifying and filtering circuit is connected with the anode of the second diode, the second end of the second switching tube, the anode of the sixth diode and the second end of the fourth switching tube.
Optionally, the power supply further includes: a high-frequency pulse width modulation rectification filter circuit;
the positive output end and the negative output end of the three-phase rectifying and filtering circuit are both connected with the input end of the high-frequency pulse width modulation rectifying and filtering circuit;
the positive output end of the high-frequency pulse width modulation rectification filter circuit is connected with the first end of the first switch tube, the cathode of the first diode, the first end of the third switch tube and the cathode of the fifth diode; and the negative output end of the high-frequency pulse width modulation rectification filter circuit is connected with the anode of the second diode, the second end of the second switching tube, the anode of the sixth diode and the second end of the fourth switching tube.
Optionally, the full-bridge inverter further includes: a control circuit and a four-way driving circuit;
the output end of the control circuit is connected with the input end of the four-way driving circuit;
four output ends of the four-way driving circuit are respectively connected with driving signal input ends of the first switching tube, the second switching tube, the third switching tube and the fourth switching tube;
the control circuit is used for outputting control signals to the input ends of the four-way driving circuit;
the four-way driving circuit is used for outputting four-way driving signals to the driving signal input end of the first switching tube, the driving signal input end of the second switching tube, the driving signal input end of the third switching tube and the driving signal input end of the fourth switching tube respectively so as to drive the first switching tube, the second switching tube, the third switching tube and the fourth switching tube to be turned on and off.
Alternatively to this, the method may comprise,
the four-way driving circuit is also used for electrically isolating and amplifying the four-way driving signals and outputting reverse voltage to drive the first switching tube, the second switching tube, the third switching tube and the fourth switching tube to be turned on and off.
Alternatively to this, the method may comprise,
the control circuit is a controller which is formed by taking an analog PWM chip, a microcontroller, an embedded processor, a digital signal processor and a programmable logic device as a core and matching with a peripheral circuit.
The beneficial technical effects of the application are as follows:
the embodiment of the application provides a full-bridge inverter capable of inhibiting the Miller effect, which solves the problem that the Miller effect inherent in a semiconductor switching device causes the upper switching tube and the lower switching tube of a half bridge to be simultaneously conducted from the root of a main circuit, and the drain-source voltage V of the other switching tube of the same bridge arm is not influenced when the switching tube is turned on DS And gate-source voltage V GS Because the drain-source voltages in the switching-on and switching-off processes of the bridge arm switching tube are not mutually influenced, the Miller effect caused by the switching-on and switching-off processes of the bridge arm switching tube is restrained.
Drawings
Fig. 1 is a circuit topology of a full-bridge inverter capable of suppressing miller effect according to an embodiment of the application;
FIGS. 2a-2e are circuit topologies of several loads in a full-bridge inverter capable of suppressing the Miller effect according to an embodiment of the present application;
FIG. 3 is a circuit topology of another full-bridge inverter capable of suppressing the Miller effect according to an embodiment of the application;
fig. 4 is a circuit topology of a full-bridge inverter capable of suppressing miller effect according to an embodiment of the application.
Detailed Description
In order to enable those skilled in the art to better understand the present application, a technical solution in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. It will be apparent that the embodiments described below are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by a person skilled in the art without any inventive effort, are within the scope of the present application based on the embodiments described herein.
At present, the method for solving the miller effect of the switching tube at home and abroad is mainly solved from a driving circuit, for example, patent 201620800660.2 'a driving structure for solving the miller effect of the half-bridge topology IGBT' is to reduce the miller effect of the switching tube by changing the driving structure, eliminate the influence of one IGBT tube in the circuit on the grid voltage of the other tube through parasitic miller capacitance at the moment of conducting, and avoid the direct damage of the upper switching tube and the lower switching tube of the half-bridge circuit. In addition, patent 201320634822.6 "an IGBT miller effect removing device" and patent 201721666961.1 "a circuit for reducing miller effect of a power tube" also reduce miller effect of a switching tube by changing the design of a driving circuit, so as to solve the problems of heating and secondary conduction of the switching tube.
The root of the effect of the switch Guan Mile is that the inherent parasitic capacitance of the switch tube is caused when the switch tube is conducted or the upper switch tube and the lower switch tube are alternately conducted in the half-bridge circuit, and the miller effect is reduced only through the design and improvement of the driving circuit, but the miller effect caused by the influence of the upper switch tube and the lower switch tube of the same bridge arm when the upper switch tube and the lower switch tube are alternately conducted cannot be radically treated from the source. In addition, for the switching tube with different power levels and the whole stray parameter of the main circuit, the intensity of the Miller effect is also different, the parameters such as the resistance and the capacitance of the driving circuit are changed accordingly, and the universality of application is affected. Furthermore, for the problem that the miller effect causes the direct damage of the upper and lower switching tubes of the half bridge, the problem is not solved from the root of the main circuit, but is passively solved from the perspective of the driving circuit.
Therefore, the embodiment of the application provides a full-bridge inverter capable of inhibiting the Miller effect, which solves the problem that the Miller effect inherent to a semiconductor switching device causes the upper switching tube and the lower switching tube of a half bridge to be simultaneously conducted from the root of a main circuit, and the switching tubes are turned onWill not affect the drain-source voltage V of the other switch tube of the same bridge arm DS And gate-source voltage V GS Because the drain-source voltages in the switching-on and switching-off processes of the bridge arm switching tube are not mutually influenced, the Miller effect caused by the switching-on and switching-off processes of the bridge arm switching tube is restrained.
Based on the foregoing, in order to clearly and specifically describe the above advantages of the present application, a specific embodiment of the present application will be described below with reference to the accompanying drawings.
Referring to fig. 1, the circuit topology of a full-bridge inverter capable of suppressing the miller effect is provided in an embodiment of the application.
The embodiment of the application provides a full-bridge inverter capable of inhibiting a Miller effect, which comprises: a power supply V, a first switching tube Q1, a second switching tube Q2, a third switching tube Q3, a fourth switching tube Q4, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, a seventh diode D7, and an eighth diode D8;
the positive output end of the power supply V is connected with the first end of the first switching tube Q1, the cathode of the first diode D1, the first end of the third switching tube D3 and the cathode of the fifth diode D5;
the negative output end of the power supply V is connected with the anode of the second diode D2, the second end of the second switching tube Q2, the anode of the sixth diode D6 and the second end of the fourth switching tube Q4;
the second end of the first switching tube Q1 is connected with the cathode of the second diode D2 and the anode of the third diode D3;
the anode of the first diode D1 is connected with the cathode of the fourth diode D4 and the first end of the second switching tube Q2;
the cathode of the third diode D3 is connected with the anode of the fourth diode D4 and the first end of the Load;
the second end of the third switching tube Q3 is connected with the cathode of the sixth diode D6 and the anode of the seventh diode D7;
the anode of the fifth diode D5 is connected with the first end of the fourth switching tube D4 and the cathode of the eighth diode D8;
the cathode of the seventh diode D7 is connected to the anode of the eighth diode D8 and the second terminal of the Load.
In some possible implementations of the embodiments of the present application, the first switching tube Q1 and the second switching tube Q2 form a first half bridge; the third switching tube Q3 and the fourth switching tube Q4 form a second half bridge.
It can be understood that, in the full-bridge inverter capable of suppressing the miller effect provided by the embodiment of the application, when in operation, the first switching tube Q1 and the fourth switching tube Q4 are turned on, and the second switching tube Q2 and the third switching tube Q3 are turned off; the first switching tube Q1 and the fourth switching tube Q4 are turned off, and the second switching tube Q2 and the third switching tube Q3 are turned on.
It should be noted that the working principle of the full-bridge inverter capable of inhibiting the miller effect provided by the embodiment of the application is that under the combined structure of the diode and the switching tube, when two switching tubes on the same half-bridge are switched on and off, the drain-source voltage V of each other is not affected DS And gate-source voltage V GS So that the two switching tubes on the same half bridge are not simultaneously opened, namely the first switching tube Q1 and the second switching tube Q2 do not affect each other in the process of opening and closing DS And gate-source voltage V GS The method comprises the steps of carrying out a first treatment on the surface of the The third switching tube Q3 and the fourth switching tube Q4 do not affect each other in the process of switching on and off DS And gate-source voltage V GS 。
Specifically, it is assumed that all switching tubes and diodes in the full-bridge inverter capable of suppressing the miller effect provided by the embodiment of the application are ideal switches, and the turn-on voltage is 0. In the control process, after the first switch tube Q1 is turned off, the drain-source junction capacitor of the first switch tube Q1 is charged, and the Load has an inductance, so that the second diode D2 is turned on in a freewheeling manner, and the drain-source voltage V of the first switch tube Q1 DS Is the voltage of the power supply V; after the second switch tube Q2 is turned off, the drain-source junction capacitor of the second switch tube Q2 is charged and the Load has an inductance, so that the first diode D1 is turned on in a freewheeling manner, and the drain-source voltage V of the second switch tube Q2 DS Is the voltage of the power supply V. The principle is similar when the third switching tube Q3 and the fourth switching tube Q4 are turned on.
After the first switching tube Q1 and the fourth switching tube Q4 are turned on, the third diode D3 is turned on, the cathode voltage amplitude of the third diode D3 is the voltage of the power supply V, and the second switching tube Q2 is turned off, so that the drain-source voltage V of the second switching tube Q2 DS The voltage of the power supply V is that the first switch tube Q1 is turned on and the drain-source voltage V of the second switch tube Q2 is not affected DS Drain-source voltage V of second switch tube Q2 DS No change occurs. In the dead zone, the first switching tube Q1 turns on the drain-source voltage V of the second switching tube Q2 DS The second switching tube Q2 is not turned on without charging. Similarly, the fourth switching tube Q4 turns on the drain-source voltage V of the third switching tube Q3 DS The third switching tube Q3 is not turned on without charging.
After the second switching tube Q2 and the third switching tube Q3 are turned on, the fourth diode D4 is turned on, the anode voltage amplitude of the fourth diode D4 is 0, and the drain-source voltage V of the first switching tube Q1 is due to the off state of the first switching tube Q1 DS The second switch tube Q2 is turned on to supply voltage V, and the drain-source voltage V of Q1 is not affected DS . At the dead zone, the second switching tube Q2 turns on the drain-source voltage V of the first switching tube Q1 DS The first switching tube Q1 is not turned on without charging. Similarly, the third switching tube Q3 is turned on, and the drain-source voltages V of the fourth switching tubes Q,4 DS The fourth switching transistor Q4 is not turned on without charging. Because the drain-source voltages in the switching-on and switching-off processes of the bridge arm switching tube are not mutually influenced, the Miller effect caused by the switching-on and switching-off processes of the bridge arm switching tube is restrained.
In some possible implementations of the embodiments of the present application, the Load is an inductive Load, a resistive-capacitive Load, or a inductive Load;
the inductive load is a load formed by an inductor;
the resistive load is a load formed by connecting a resistor R and an inductor L in series, as shown in figure 2 a;
the resistance-capacitance load is a load formed by connecting a resistor R and a capacitor C in parallel and connecting an inductor L in series, as shown in figure 2 b;
the load is formed by connecting a resistor R and a capacitor C1 in parallel, connecting a capacitor C2 in series and finally connecting an inductor L in series, as shown in figure 2C;
the inductive load is a load formed by connecting an inductance L and a capacitance C in series, or a load formed by connecting an inductance L and a capacitance C in parallel, as shown in fig. 2d and 2 e.
In specific implementation, the first switching tube Q1, the second switching tube Q2, the third switching tube Q3 and the fourth switching tube Q4 are full-control fast power semiconductor switching devices. Such as a power field effect transistor (MOSFET), an Insulated Gate Bipolar Transistor (IGBT), or a power transistor. The first diode D1, the second diode D2, the third diode D3, the fourth diode D4, the fifth diode D5, the sixth diode D6, the seventh diode D7, and the eighth diode D8 may be fast recovery diodes.
It should be noted that, the full-bridge inverter capable of suppressing the miller effect provided by the embodiment of the application can be applied to a DC-AC inverter, a DC-DC converter, and an IGBT and diode module package.
Specifically, in one example, the power source V is a dc power source.
In another example, as shown in fig. 3, the power source V may include: an ac power supply UVW and a three-phase rectifying and filtering circuit 100;
the three-phase output end of the alternating current power supply UVW is connected with the input end of the three-phase rectifying and filtering circuit 100;
the positive output end of the three-phase rectifying and filtering circuit 100 is connected with the first section of the first switching tube Q1, the cathode of the first diode D1, the first section of the third switching tube Q3 and the cathode of the fifth diode D5; the negative output end of the three-phase rectifying and filtering circuit 100 is connected to the anode of the second diode D2, the second end of the second switching tube Q2, the anode of the sixth diode D6 and the second end of the fourth switching tube Q4.
In some possible implementations of the embodiments of the present application, as shown in fig. 4, the power supply V further includes: a high-frequency pulse width modulation rectification filter circuit 200;
the positive output end and the negative output end of the three-phase rectifying and filtering circuit 100 are both connected with the input end of the high-frequency pulse width modulation rectifying and filtering circuit 200;
the positive output end of the high-frequency pulse width modulation rectification filter circuit 200 is connected with the first section of the first switching tube Q1, the cathode of the first diode D1, the first section of the third switching tube Q3 and the cathode of the fifth diode D5; the negative output end of the high-frequency pulse width modulation rectification filter circuit 200 is connected with the anode of the second diode D2, the second end of the second switching tube Q2, the anode of the sixth diode D6 and the second end of the fourth switching tube Q4.
In some possible implementations of the embodiments of the present application, as shown in fig. 1, the full-bridge inverter further includes: a control circuit 300 and a four-way drive circuit 400;
the output end of the control circuit 300 is connected with the input end of the four-way driving circuit 400;
the four output ends of the four-way driving circuit 400 are respectively connected with the driving signal input ends of the first switching tube Q1, the second switching tube Q2, the third switching tube Q3 and the fourth switching tube Q4;
a control circuit 300 for outputting a control signal to an input terminal of the four-way driving circuit 400;
the four-way driving circuit 400 is configured to output four-way driving signals to the driving signal input end of the first switching tube Q1, the driving signal input end of the second switching tube Q2, the driving signal input end of the third switching tube Q3, and the driving signal input end of the fourth switching tube Q4, respectively, so as to drive the first switching tube Q1, the second switching tube Q2, the third switching tube Q3, and the fourth switching tube Q4 to be turned on and off.
As an example, the four-way driving circuit 400 is further configured to electrically isolate and amplify the four-way driving signal, and output a reverse voltage to drive the first switching transistor Q1, the second switching transistor Q2, the third switching transistor Q3, and the fourth switching transistor Q4 to be turned on and off.
In practical applications, the control circuit 300 may be a controller with an analog PWM chip, a microcontroller MCU, an embedded processor ARM, a digital signal processor DSP, or a programmable logic device PLD as a core and a peripheral circuit.
The present application has been described in detail with reference to the drawings and the embodiments, but the present application is not limited to the embodiments described above, and various changes can be made within the knowledge of those skilled in the art without departing from the spirit of the present application. The application may be practiced otherwise than as specifically described.
Claims (9)
1. A full-bridge inverter capable of suppressing miller effect, the full-bridge inverter comprising: a power supply, a first switching tube, a second switching tube, a third switching tube, a fourth switching tube, a first diode, a second diode, a third diode, a fourth diode, a fifth diode, a sixth diode, a seventh diode and an eighth diode;
the positive output end of the power supply is connected with the first end of the first switching tube, the cathode of the first diode, the first end of the third switching tube and the cathode of the fifth diode;
the negative output end of the power supply is connected with the anode of the second diode, the second end of the second switching tube, the anode of the sixth diode and the second end of the fourth switching tube;
the second end of the first switching tube is connected with the cathode of the second diode and the anode of the third diode;
the anode of the first diode is connected with the cathode of the fourth diode and the first end of the second switch tube;
the cathode of the third diode is connected with the anode of the fourth diode and the first end of the load;
the second end of the third switching tube is connected with the cathode of the sixth diode and the anode of the seventh diode;
the anode of the fifth diode is connected with the first end of the fourth switching tube and the cathode of the eighth diode;
the cathode of the seventh diode is connected with the anode of the eighth diode and the second end of the load;
the first switching tube and the second switching tube form a first half-bridge; the third switching tube and the fourth switching tube form a second half bridge.
2. The full-bridge inverter of claim 1, wherein the miller effect is suppressed,
the load is an inductive load, a resistive-capacitive load or a inductive-capacitive load;
the resistive load is a load formed by serially connecting a resistor and an inductor;
the resistance-capacitance load is formed by connecting a resistor and a capacitor in parallel and then connecting the resistor and the capacitor in series;
the resistance-inductance-capacitance load is formed by connecting a resistor and a capacitor in parallel, connecting the resistor and the capacitor in series and finally connecting the capacitor and the inductor in series;
the inductive-capacitive load is a load formed by connecting an inductor and a capacitor in series, or a load formed by connecting the inductor and the capacitor in parallel.
3. The full-bridge inverter of claim 1, wherein the miller effect is suppressed,
the first switching tube, the second switching tube, the third switching tube and the fourth switching tube are full-control type fast power semiconductor switching devices.
4. The full-bridge inverter of claim 1, wherein the miller effect is suppressed,
the power supply is a direct current power supply.
5. The full-bridge inverter of claim 1, wherein the power supply comprises: an alternating current power supply and a three-phase rectifying and filtering circuit;
the three-phase output end of the alternating current power supply is connected with the input end of the three-phase rectifying and filtering circuit;
the positive output end of the three-phase rectifying and filtering circuit is connected with the first end of the first switching tube, the cathode of the first diode, the first end of the third switching tube and the cathode of the fifth diode; and the negative output end of the three-phase rectifying and filtering circuit is connected with the anode of the second diode, the second end of the second switching tube, the anode of the sixth diode and the second end of the fourth switching tube.
6. The full-bridge inverter of claim 5, wherein the power supply further comprises: a high-frequency pulse width modulation rectification filter circuit;
the positive output end and the negative output end of the three-phase rectifying and filtering circuit are both connected with the input end of the high-frequency pulse width modulation rectifying and filtering circuit;
the positive output end of the high-frequency pulse width modulation rectification filter circuit is connected with the first end of the first switch tube, the cathode of the first diode, the first end of the third switch tube and the cathode of the fifth diode; and the negative output end of the high-frequency pulse width modulation rectification filter circuit is connected with the anode of the second diode, the second end of the second switching tube, the anode of the sixth diode and the second end of the fourth switching tube.
7. The full-bridge inverter of claim 1, further comprising: a control circuit and a four-way driving circuit;
the output end of the control circuit is connected with the input end of the four-way driving circuit;
four output ends of the four-way driving circuit are respectively connected with driving signal input ends of the first switching tube, the second switching tube, the third switching tube and the fourth switching tube;
the control circuit is used for outputting control signals to the input ends of the four-way driving circuit;
the four-way driving circuit is used for outputting four-way driving signals to the driving signal input end of the first switching tube, the driving signal input end of the second switching tube, the driving signal input end of the third switching tube and the driving signal input end of the fourth switching tube respectively so as to drive the first switching tube, the second switching tube, the third switching tube and the fourth switching tube to be turned on and off.
8. The full-bridge inverter of claim 7, wherein the miller effect is suppressed,
the four-way driving circuit is also used for electrically isolating and amplifying the four-way driving signals and outputting reverse voltage to drive the first switching tube, the second switching tube, the third switching tube and the fourth switching tube to be turned on and off.
9. The full-bridge inverter of claim 7, wherein the miller effect is suppressed,
the control circuit is a controller which is formed by taking an analog PWM chip, a microcontroller, an embedded processor, a digital signal processor and a programmable logic device as a core and matching with a peripheral circuit.
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