CN114362504A - Full-bridge inverter capable of inhibiting Miller effect - Google Patents

Full-bridge inverter capable of inhibiting Miller effect Download PDF

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Publication number
CN114362504A
CN114362504A CN202111661195.0A CN202111661195A CN114362504A CN 114362504 A CN114362504 A CN 114362504A CN 202111661195 A CN202111661195 A CN 202111661195A CN 114362504 A CN114362504 A CN 114362504A
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diode
switching tube
tube
switching
anode
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CN114362504B (en
Inventor
李民久
姜亚南
贺岩斌
熊涛
黄雨
邵斌
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Zhonghe Tongchuang Chengdu Technology Co ltd
Southwestern Institute of Physics
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Zhonghe Tongchuang Chengdu Technology Co ltd
Southwestern Institute of Physics
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/38Means for preventing simultaneous conduction of switches
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/219Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53875Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention belongs to the technical field of power electronics, and particularly relates to a full-bridge inverter capable of inhibiting Miller effect, which solves the problem that the intrinsic Miller effect of a semiconductor switching device causes the simultaneous conduction of an upper switching tube and a lower switching tube of a half bridge from the root of a main circuit, and the drain-source voltage V of the other switching tube of the same bridge arm cannot be influenced when the switching tubes are switched onDSAnd gate source voltage VGSAnd because the drain-source voltages of the switching tubes of the same bridge arm in the switching-on and switching-off processes are not influenced mutually, the Miller effect caused by the switching-on and switching-off processes of the switching tubes of the same bridge arm is inhibited.

Description

Full-bridge inverter capable of inhibiting Miller effect
Technical Field
The application belongs to the technical field of power electronics, and particularly relates to a full-bridge inverter capable of inhibiting a Miller effect.
Background
The conventional full-bridge inverter is one of the most widely applied main circuit topologies in power electronic technology, and the full-bridge inverter mostly adopts high-frequency power semiconductor switching devices (such as Insulated Gate Bipolar Transistor (IGBT) or Metal Oxide Semiconductor Field Effect Transistor (MOSFET)) which have inherent miller effect. The miller effect of the semiconductor switch can cause the full-bridge inverter to be simultaneously conducted with the upper and lower switching tubes of the bridge arm, so that the problems of direct damage, heating of the switching tubes and secondary conduction are caused, and the safe, reliable and universal application of the full-bridge inverter can be influenced.
The miller effect causes the upper and lower switching tubes of the half-bridge to be conducted simultaneously, and among the three problems of direct damage, heating of the switching tubes and secondary conduction caused by the miller effect, the problem of direct damage of the upper and lower switching tubes of the half-bridge is the most serious, which can cause the equipment to be seriously damaged, and causes safety risk and economic loss.
Disclosure of Invention
The application aims to provide a full-bridge inverter capable of inhibiting the Miller effect, and solves the problem that the intrinsic Miller effect of a semiconductor switching device causes the simultaneous conduction of an upper switching tube and a lower switching tube of a half bridge.
The technical scheme for realizing the purpose of the application is as follows:
the embodiment of the application provides a full-bridge inverter that can restrain miller effect, full-bridge inverter includes: the power supply, the first switch tube, the second switch tube, the third switch tube, the fourth switch tube, the first diode, the second diode, the third diode, the fourth diode, the fifth diode, the sixth diode, the seventh diode and the eighth diode;
the positive output end of the power supply is connected with the first end of the first switching tube, the cathode of the first diode, the first end of the third switching tube and the cathode of the fifth diode;
the negative output end of the power supply is connected with the anode of the second diode, the second end of the second switching tube, the anode of the sixth diode and the second end of the fourth switching tube;
the second end of the first switching tube is connected with the cathode of the second diode and the anode of the third diode;
the anode of the first diode is connected with the cathode of the fourth diode and the first end of the second switching tube;
the cathode of the third diode is connected with the anode of the fourth diode and the first end of the load;
a second end of the third switching tube is connected with a cathode of the sixth switching tube and an anode of the seventh diode;
the anode of the fifth diode is connected with the first end of the fourth switching tube and the cathode of the eighth diode;
the cathode of the seventh diode is connected to the anode of the eighth diode and the second terminal of the load.
Optionally, the first switching tube and the second switching tube form a first half bridge; the third switching tube and the fourth switching tube form a second half bridge.
Alternatively to this, the first and second parts may,
the load is an inductive load, a resistance-inductance load, a resistance-capacitance load or a capacitance-inductance load;
the resistance-inductance load is formed by connecting a resistor and an inductor in series;
the resistance-inductance-capacitance load is formed by connecting a resistor and a capacitor in parallel and then connecting the resistor and the capacitor in series;
the resistance-inductance-capacitance load is formed by connecting a resistor and a capacitor in parallel, then connecting the resistor and the capacitor in series and finally connecting the resistor and the capacitor in series;
the inductance-capacitance load is formed by connecting an inductor and a capacitor in series or formed by connecting the inductor and the capacitor in parallel.
Alternatively to this, the first and second parts may,
the first switch tube, the second switch tube, the third switch tube and the fourth switch tube are all-control type fast power semiconductor switch devices.
Alternatively to this, the first and second parts may,
the power supply is a direct current power supply.
Optionally, the power supply includes: the device comprises an alternating current power supply and a three-phase rectification filter circuit;
the three-phase output end of the alternating current power supply is connected with the input end of the three-phase rectification filter circuit;
the positive output end of the three-phase rectification filter circuit is connected with the first end of the first switch tube, the cathode of the first diode, the first end of the third switch tube and the cathode of the fifth diode; and the negative output end of the three-phase rectification filter circuit is connected with the anode of the second diode, the second end of the second switch tube, the anode of the sixth diode and the second end of the fourth switch tube.
Optionally, the power supply further includes: a high-frequency pulse width modulation rectification filter circuit;
the positive output end and the negative output end of the three-phase rectification filter circuit are both connected with the input end of the high-frequency pulse width modulation rectification filter circuit;
the positive output end of the high-frequency pulse width modulation rectification filter circuit is connected with the first end of the first switching tube, the cathode of the first diode, the first end of the third switching tube and the cathode of the fifth diode; and the negative output end of the high-frequency pulse width modulation rectification filter circuit is connected with the anode of the second diode, the second end of the second switch tube, the anode of the sixth diode and the second end of the fourth switch tube.
Optionally, the full-bridge inverter further includes: a control circuit and a four-way driving circuit;
the output end of the control circuit is connected with the input ends of the four driving circuits;
the four output ends of the four-way driving circuit are respectively connected with the driving signal input ends of the first switching tube, the second switching tube, the third switching tube and the fourth switching tube;
the control circuit is used for outputting a control signal to the input end of the four-way driving circuit;
the four-path driving circuit is configured to output four paths of driving signals to a driving signal input end of the first switching tube, a driving signal input end of the second switching tube, a driving signal input end of the third switching tube, and a driving signal input end of the fourth switching tube, respectively, so as to drive the first switching tube, the second switching tube, the third switching tube, and the fourth switching tube to be turned on and off.
Alternatively to this, the first and second parts may,
the four-way driving circuit is further configured to electrically isolate and amplify the four-way driving signal, and output a reverse voltage to drive the first switching tube, the second switching tube, the third switching tube, and the fourth switching tube to be turned on and off.
Alternatively to this, the first and second parts may,
the control circuit is a controller which takes an analog PWM chip, a microcontroller, an embedded processor, a digital signal processor or a programmable logic device as a core and is matched with a peripheral circuit to form the control circuit.
The beneficial technical effect of this application lies in:
the embodiment of the application provides a full-bridge inverter capable of inhibiting the Miller effect, which solves the problem that the intrinsic Miller effect of a semiconductor switching device causes the simultaneous conduction of an upper switching tube and a lower switching tube of a half bridge from the root of a main circuit, and when the switching tubes are switched on, the drain-source voltage V of the other switching tube of the same bridge arm is not influencedDSAnd gate source voltage VGSAnd because the drain-source voltages of the switching tubes of the same bridge arm in the switching-on and switching-off processes are not influenced mutually, the Miller effect caused by the switching-on and switching-off processes of the switching tubes of the same bridge arm is inhibited.
Drawings
Fig. 1 is a circuit topology of a full-bridge inverter capable of suppressing the miller effect according to an embodiment of the present disclosure;
FIGS. 2a-2e are circuit topologies of several loads in a full-bridge inverter for suppressing the Miller effect according to an embodiment of the present application;
fig. 3 is a circuit topology of another full-bridge inverter capable of suppressing the miller effect according to an embodiment of the present disclosure;
fig. 4 is a circuit topology of another full-bridge inverter capable of suppressing the miller effect according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions in the embodiments of the present application more comprehensible to those skilled in the art, the following description will be made in detail and completely with reference to the accompanying drawings in the embodiments of the present application. It should be apparent that the embodiments described below are only some of the embodiments of the present application, and not all of them. All other embodiments that can be derived by a person skilled in the art from the embodiments described herein without inventive step are within the scope of the present application.
At present, the method for solving the miller effect of the switching tube at home and abroad is mainly based on a driving circuit, for example, in patent 201620800660.2, "a driving structure for solving the miller effect of a half-bridge topology IGBT" reduces the miller effect of the switching tube by changing the driving structure, eliminates the influence on the grid voltage of another tube by a parasitic miller capacitor at the moment of conducting one IGBT tube in the circuit, and avoids the direct damage of the upper and lower switching tubes of the half-bridge circuit. In addition, patent 201320634822.6, "an IGBT miller effect removing device" and patent 201721666961.1 "a circuit for reducing miller effect of power tube" also reduce miller effect of switching tube by changing design of driving circuit to solve the problems of heating and secondary conduction of switching tube.
The root of the miller effect of the switching tube is caused by the inherent parasitic capacitance of the switching tube when the switching tube is conducted or the upper and lower switching tubes in the half-bridge circuit are conducted alternately, the miller effect is reduced only by the design and improvement of the driving circuit, but the miller effect caused by the mutual influence of the upper and lower switching tubes of the same bridge arm when conducted alternately cannot be radically treated from the source. In addition, the stray parameters of the switching tubes with different power levels and the whole main circuit are different, so that the strength of the Miller effect is different, the parameters of the resistance, the capacitance and the like of the driving circuit are changed along with the change of the stray parameters, and the universality of the application is influenced. In addition, the problem that the upper and lower switching tubes of the half bridge are directly damaged due to the miller effect is passively solved from the perspective of the driving circuit rather than the source of the main circuit.
Therefore, the embodiment of the application provides a full-bridge inverter capable of inhibiting the miller effect, which solves the problem that the intrinsic miller effect of a semiconductor switching device causes the simultaneous conduction of the upper and lower switching tubes of a half bridge from the root of a main circuit, and the drain-source voltage V of the other switching tube of the same bridge arm will not be influenced when the switching tube is turned onDSAnd gate source voltage VGSAnd because the drain-source voltages of the switching tubes of the same bridge arm in the switching-on and switching-off processes are not influenced mutually, the Miller effect caused by the switching-on and switching-off processes of the switching tubes of the same bridge arm is inhibited.
Based on the above, in order to clearly and specifically explain the above advantages of the present application, the following description of the embodiments of the present application will be made with reference to the accompanying drawings.
Referring to fig. 1, a circuit topology of a full-bridge inverter capable of suppressing the miller effect is provided according to an embodiment of the present application.
The embodiment of the application provides a can restrain full bridge type inverter of miller effect includes: the power supply V, a first switch tube Q1, a second switch tube Q2, a third switch tube Q3, a fourth switch tube Q4, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, a seventh diode D7 and an eighth diode D8;
the positive output end of the power supply V is connected with the first end of the first switch tube Q1, the cathode of the first diode D1, the first end of the third switch tube D3 and the cathode of the fifth diode D5;
the negative output end of the power supply V is connected with the anode of the second diode D2, the second end of the second switching tube Q2, the anode of the sixth diode D6 and the second end of the fourth switching tube Q4;
a second end of the first switching tube Q1 is connected to the cathode of the second diode D2 and the anode of the third diode D3;
the anode of the first diode D1 is connected to the cathode of the fourth diode D4 and the first end of the second switch tube Q2;
the cathode of the third diode D3 is connected to the anode of the fourth diode D4 and the first end of the Load;
a second end of the third switching tube Q3 is connected to the cathode of the sixth switching tube D6 and the anode of the seventh diode D7;
an anode of the fifth diode D5 is connected to the first terminal of the fourth switching tube D4 and the cathode of the eighth diode D8;
a cathode of the seventh diode D7 is connected to an anode of the eighth diode D8 and the second terminal of the Load.
In some possible implementations of the embodiments of the present application, the first switching tube Q1 and the second switching tube Q2 form a first half bridge; the third switching tube Q3 and the fourth switching tube Q4 form a second half bridge.
It can be understood that, in the full-bridge inverter capable of suppressing the miller effect provided in the embodiments of the present application, in operation, the first switching tube Q1 and the fourth switching tube Q4 are turned on, and the second switching tube Q2 and the third switching tube Q3 are turned off; the first switch tube Q1 and the fourth switch tube Q4 are turned off, and the second switch tube Q2 and the third switch tube Q3 are turned on.
It should be noted that the operating principle of the full-bridge inverter capable of suppressing the miller effect provided by the embodiments of the present application is that a combined structure of a diode and a switching tube is adopted, so that when two switching tubes on the same half bridge are turned on and off, drain-source voltage V of each other is not affected by each otherDSAnd gate source voltage VGSSo that the two switching tubes on the same half-bridge are not turned on simultaneously, i.e. the first switching tube Q1 and the second switching tube Q2 do not affect the drain-source voltage V of each other during the turn-on and turn-off processesDSAnd gate source voltage VGS(ii) a The drain-source voltage V of the third switch tube Q3 and the drain-source voltage V of the fourth switch tube Q4 do not influence each other during the turn-on and turn-off processesDSAnd gate source voltage VGS
Specifically, it is assumed that all switching tubes and diodes in the full-bridge inverter capable of suppressing the miller effect provided by the embodiment of the present application are ideal switches, and the turn-on voltage is 0. In the control process, after the first switch tube Q1 is turned off, the first switch tube Q1 is turned offThe drain-source junction capacitor of the first switch tube Q1 is charged, and the Load has an inductance, so that the second diode D2 is conducted in a follow current manner, and the drain-source voltage V of the first switch tube Q1DSIs the voltage of the power supply V; after the second switch Q2 is turned off, the drain-source junction capacitor of the second switch Q2 is charged, and the Load has an inductance, so that the first diode D1 is turned on, and the drain-source voltage V2 of the second switch Q2 is turned onDSIs the voltage of the power supply V. The principle when the third switching tube Q3 and the fourth switching tube Q4 are on is similar.
When the first switch tube Q1 and the fourth switch tube Q4 are turned on, the third diode D3 is turned on, the amplitude of the cathode voltage of the third diode D3 is the voltage of the power supply V, and the drain-source voltage V of the second switch tube Q2 is the off state of the second switch tube Q2DSThe voltage of the power supply V is the first switch Q1, and the drain-source voltage V of the second switch Q2 is not affectedDSDrain-source voltage V of the second switching tube Q2DSNo change occurs. In the dead zone, the first switch tube Q1 turns on the drain-source voltage V of the second switch tube Q2DSThe second switch tube Q2 is not turned on due to no charging. Similarly, the fourth switch transistor Q4 turns on the drain-source voltage V of the third switch transistor Q3DSThe third switching tube Q3 is not turned on due to no charging.
When the second switch Q2 and the third switch Q3 are turned on, the fourth diode D4 is turned on, the amplitude of the anode voltage of the fourth diode D4 is 0, and the drain-source voltage V of the first switch Q1 is the off state of the first switch Q1DSThe voltage of the power supply V is, so the second switch tube Q2 is turned on, and the drain-source voltage V of the Q1 is not affectedDS. In the dead zone, the second switch tube Q2 turns on the drain-source voltage V of the first switch tube Q1DSThe first switch tube Q1 is not turned on due to no charging. Similarly, the third switch tube Q3 is turned on, and the drain-source voltage V of the fourth switch tube Q,4DSThe fourth switching tube Q4 is not turned on due to non-charging. As the drain-source voltages of the switching-on and switching-off processes of the same-bridge arm switching tube are not influenced, the Miller effect caused by the switching-on and switching-off processes of the same-bridge arm switching tube is inhibited.
In some possible implementation manners of the embodiment of the application, the Load is an inductive Load, a resistive-capacitive Load, or an inductive Load;
the inductive load is a load formed by an inductor;
the resistance-inductance load is a load formed by connecting a resistor R and an inductor L in series, as shown in FIG. 2 a;
the rc load is a load formed by connecting a resistor R and a capacitor C in parallel and then connecting an inductor L in series, as shown in fig. 2 b;
the rc-lc load is a load formed by connecting a resistor R in parallel with a capacitor C1, then connecting the resistor R in series with a capacitor C2, and finally connecting the resistor R in series with an inductor L, as shown in fig. 2C;
the inductive-capacitive load is a load formed by connecting an inductor L and a capacitor C in series, or a load formed by connecting an inductor L and a capacitor C in parallel, as shown in fig. 2d and 2 e.
In specific implementation, the first switch transistor Q1, the second switch transistor Q2, the third switch transistor Q3 and the fourth switch transistor Q4 are fully-controlled fast power semiconductor switching devices. Such as a power field effect transistor (MOSFET), an Insulated Gate Bipolar Transistor (IGBT), or a power transistor. The first diode D1, the second diode D2, the third diode D3, the fourth diode D4, the fifth diode D5, the sixth diode D6, the seventh diode D7, and the eighth diode D8 may each be a fast recovery diode.
The full-bridge inverter capable of suppressing the miller effect provided by the embodiment of the present application may be applied to a DC-AC inverter, a DC-DC converter, and an IGBT and diode module package.
Specifically, in one example, the power supply V is a dc power supply.
In another example, as shown in fig. 3, the power supply V may include: an alternating current power supply UVW and a three-phase rectification filter circuit 100;
the three-phase output end of the alternating current power supply UVW is connected with the input end of the three-phase rectification filter circuit 100;
the positive output end of the three-phase rectifying and filtering circuit 100 is connected with the first section of the first switch tube Q1, the cathode of the first diode D1, the first section of the third switch tube Q3 and the cathode of the fifth diode D5; the negative output end of the three-phase rectification filter circuit 100 is connected with the anode of the second diode D2, the second end of the second switch tube Q2, the anode of the sixth diode D6 and the second end of the fourth switch tube Q4.
In some possible implementations of the embodiment of the present application, as shown in fig. 4, the power supply V further includes: a high frequency pulse width modulation rectification filter circuit 200;
the positive output end and the negative output end of the three-phase rectification filter circuit 100 are both connected with the input end of the high-frequency pulse width modulation rectification filter circuit 200;
the positive output end of the high-frequency pulse width modulation rectifying and filtering circuit 200 is connected with the first section of the first switch tube Q1, the cathode of the first diode D1, the first section of the third switch tube Q3 and the cathode of the fifth diode D5; the negative output end of the high-frequency pulse width modulation rectifying and filtering circuit 200 is connected with the anode of the second diode D2, the second end of the second switch tube Q2, the anode of the sixth diode D6 and the second end of the fourth switch tube Q4.
In some possible implementations of the embodiment of the present application, as shown in fig. 1, the full-bridge inverter further includes: a control circuit 300 and a four-way drive circuit 400;
the output end of the control circuit 300 is connected with the input end of the four-way driving circuit 400;
the four output ends of the four-way driving circuit 400 are respectively connected with the driving signal input ends of a first switch tube Q1, a second switch tube Q2, a third switch tube Q3 and a fourth switch tube Q4;
a control circuit 300 for outputting a control signal to an input terminal of the four-way driving circuit 400;
and the four-way driving circuit 400 is used for outputting four-way driving signals to a driving signal input end of the first switching tube Q1, a driving signal input end of the second switching tube Q2, a driving signal input end of the third switching tube Q3 and a driving signal input end of the fourth switching tube Q4 respectively so as to drive the first switching tube Q1, the second switching tube Q2, the third switching tube Q3 and the fourth switching tube Q4 to be switched on and off.
As an example, the four-way driving circuit 400 is further configured to electrically isolate and amplify the four-way driving signal, and output a reverse voltage to drive the first switch transistor Q1, the second switch transistor Q2, the third switch transistor Q3, and the fourth switch transistor Q4 to turn on and off.
In practical applications, the control circuit 300 may be a controller formed by taking an analog PWM chip, a microcontroller MCU, an embedded processor ARM, a digital signal processor DSP, or a programmable logic device PLD as a core and matching peripheral circuits.
The present application has been described in detail with reference to the drawings and examples, but the present application is not limited to the above examples, and various changes can be made within the knowledge of those skilled in the art without departing from the spirit of the present application. The prior art can be used for all the matters not described in detail in this application.

Claims (10)

1. A full bridge inverter capable of suppressing miller effect, said full bridge inverter comprising: the power supply, the first switch tube, the second switch tube, the third switch tube, the fourth switch tube, the first diode, the second diode, the third diode, the fourth diode, the fifth diode, the sixth diode, the seventh diode and the eighth diode;
the positive output end of the power supply is connected with the first end of the first switching tube, the cathode of the first diode, the first end of the third switching tube and the cathode of the fifth diode;
the negative output end of the power supply is connected with the anode of the second diode, the second end of the second switching tube, the anode of the sixth diode and the second end of the fourth switching tube;
the second end of the first switching tube is connected with the cathode of the second diode and the anode of the third diode;
the anode of the first diode is connected with the cathode of the fourth diode and the first end of the second switching tube;
the cathode of the third diode is connected with the anode of the fourth diode and the first end of the load;
a second end of the third switching tube is connected with a cathode of the sixth switching tube and an anode of the seventh diode;
the anode of the fifth diode is connected with the first end of the fourth switching tube and the cathode of the eighth diode;
the cathode of the seventh diode is connected to the anode of the eighth diode and the second terminal of the load.
2. The full-bridge inverter according to claim 1, wherein the first switching tube and the second switching tube form a first half-bridge; the third switching tube and the fourth switching tube form a second half bridge.
3. The full-bridge inverter according to claim 1, wherein,
the load is an inductive load, a resistance-inductance load, a resistance-capacitance load or a capacitance-inductance load;
the resistance-inductance load is formed by connecting a resistor and an inductor in series;
the resistance-inductance-capacitance load is formed by connecting a resistor and a capacitor in parallel and then connecting the resistor and the capacitor in series;
the resistance-inductance-capacitance load is formed by connecting a resistor and a capacitor in parallel, then connecting the resistor and the capacitor in series and finally connecting the resistor and the capacitor in series;
the inductance-capacitance load is formed by connecting an inductor and a capacitor in series or formed by connecting the inductor and the capacitor in parallel.
4. The full-bridge inverter according to claim 1, wherein,
the first switch tube, the second switch tube, the third switch tube and the fourth switch tube are all-control type fast power semiconductor switch devices.
5. The full-bridge inverter according to claim 1, wherein,
the power supply is a direct current power supply.
6. The full-bridge inverter according to claim 1, wherein the power supply comprises: the device comprises an alternating current power supply and a three-phase rectification filter circuit;
the three-phase output end of the alternating current power supply is connected with the input end of the three-phase rectification filter circuit;
the positive output end of the three-phase rectification filter circuit is connected with the first end of the first switch tube, the cathode of the first diode, the first end of the third switch tube and the cathode of the fifth diode; and the negative output end of the three-phase rectification filter circuit is connected with the anode of the second diode, the second end of the second switch tube, the anode of the sixth diode and the second end of the fourth switch tube.
7. The full-bridge inverter according to claim 6, wherein the power supply further comprises: a high-frequency pulse width modulation rectification filter circuit;
the positive output end and the negative output end of the three-phase rectification filter circuit are both connected with the input end of the high-frequency pulse width modulation rectification filter circuit;
the positive output end of the high-frequency pulse width modulation rectification filter circuit is connected with the first end of the first switching tube, the cathode of the first diode, the first end of the third switching tube and the cathode of the fifth diode; and the negative output end of the high-frequency pulse width modulation rectification filter circuit is connected with the anode of the second diode, the second end of the second switch tube, the anode of the sixth diode and the second end of the fourth switch tube.
8. The full-bridge inverter according to claim 1, further comprising: a control circuit and a four-way driving circuit;
the output end of the control circuit is connected with the input ends of the four driving circuits;
the four output ends of the four-way driving circuit are respectively connected with the driving signal input ends of the first switching tube, the second switching tube, the third switching tube and the fourth switching tube;
the control circuit is used for outputting a control signal to the input end of the four-way driving circuit;
the four-path driving circuit is configured to output four paths of driving signals to a driving signal input end of the first switching tube, a driving signal input end of the second switching tube, a driving signal input end of the third switching tube, and a driving signal input end of the fourth switching tube, respectively, so as to drive the first switching tube, the second switching tube, the third switching tube, and the fourth switching tube to be turned on and off.
9. The full-bridge inverter according to claim 8, wherein the inverter further comprises a voltage divider circuit,
the four-way driving circuit is further configured to electrically isolate and amplify the four-way driving signal, and output a reverse voltage to drive the first switching tube, the second switching tube, the third switching tube, and the fourth switching tube to be turned on and off.
10. The full-bridge inverter according to claim 8, wherein the inverter further comprises a voltage divider circuit,
the control circuit is a controller which takes an analog PWM chip, a microcontroller, an embedded processor, a digital signal processor or a programmable logic device as a core and is matched with a peripheral circuit to form the control circuit.
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