CN114360448A - Light emitting circuit and display panel - Google Patents
Light emitting circuit and display panel Download PDFInfo
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- CN114360448A CN114360448A CN202210031439.5A CN202210031439A CN114360448A CN 114360448 A CN114360448 A CN 114360448A CN 202210031439 A CN202210031439 A CN 202210031439A CN 114360448 A CN114360448 A CN 114360448A
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Abstract
The application discloses a light-emitting circuit and a display panel. The display panel includes a driving transistor, a data writing module, a compensation module, a light emitting device, and a reset module. The driving transistor is a double-gate transistor. The compensation module is connected to the second scanning signal, the sensing signal, the reference signal and the first initial signal and is electrically connected to the main grid electrode and the auxiliary grid electrode of the driving transistor and the other one of the source electrode and the drain electrode of the driving transistor. The compensation module is used for regulating and controlling the threshold voltage of the driving transistor according to the potential of the auxiliary grid electrode of the driving transistor. According to the application, the threshold voltage of the double-gate type driving transistor can be regulated and controlled through the compensation module, the threshold voltage drift compensation of the driving transistor is realized, and the brightness uniformity of the display panel is improved.
Description
Technical Field
The application relates to the technical field of display, in particular to a light-emitting circuit and a display panel.
Background
Mini LED (Mini Light-Emitting Diode), Micro LED (Micro Light-Emitting Diode), which is collectively referred to as MLED, shows good display characteristics such as high contrast, high color gamut, high response speed, wide viewing angle, etc. as a new generation display technology. Therefore, MLEDs are widely used in the field of high performance displays. In the existing light emitting circuit, a current driving method is often used to drive the light emitting device to emit light. However, the above driving method is sensitive to the electrical variation of the driving transistor, and the shift of the threshold voltage Vth of the driving transistor affects the brightness uniformity of the image display.
Disclosure of Invention
The application provides a light-emitting circuit and a display panel, which are used for solving the technical problem that in the prior art, the threshold voltage Vth of a driving transistor in the light-emitting circuit drifts to influence the brightness uniformity of image display.
The present application provides a light emitting circuit, which includes:
a driving transistor which is a double-gate transistor, one of a source and a drain of the driving transistor being electrically connected to a first power supply signal;
the data writing module is accessed to a first scanning signal and a data signal and is electrically connected to the main grid electrode of the driving transistor, and the data writing module is used for writing the data signal into the main grid electrode of the driving transistor under the control of the first scanning signal;
the compensation module is connected with a second scanning signal, a sensing signal, a reference signal and a first initial signal and is electrically connected with the main grid electrode and the auxiliary grid electrode of the driving transistor and the other one of the source electrode and the drain electrode of the driving transistor, and the compensation module is used for regulating and controlling the threshold voltage of the driving transistor according to the potential of the auxiliary grid electrode of the driving transistor;
a light emitting device, a first pole of which is electrically connected to the other of the source and the drain of the driving transistor, and a second pole of which is electrically connected to a second power supply signal;
the reset module is connected to the first scanning signal and the second initial signal and is electrically connected to the other of the source and the drain of the driving transistor, and the reset module is used for resetting the potential of the other of the source and the drain of the driving transistor under the control of the first scanning signal.
Optionally, in some embodiments of the present application, the compensation module includes an initialization unit and a threshold voltage regulation unit;
the initialization unit is connected with the second scanning signal and the first initial signal and is electrically connected with the other one of the source electrode and the drain electrode of the driving transistor;
the threshold voltage regulation and control unit is connected to the sensing signal and the reference signal and is electrically connected to the main grid electrode and the auxiliary grid electrode of the driving transistor and the other one of the source electrode and the drain electrode of the driving transistor.
Optionally, in some embodiments of the present application, the initialization unit includes a first transistor;
the gate of the first transistor is connected to the second scan signal, one of the source and the drain of the first transistor is connected to the first initial signal, and the other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the driving transistor.
Optionally, in some embodiments of the present application, the threshold voltage adjusting and controlling unit includes a second transistor, a third transistor, a first capacitor, and a second capacitor;
the gate of the second transistor and the gate of the third transistor are both connected to the sensing signal, one of the source and the drain of the second transistor is connected to the reference signal, the other of the source and the drain of the second transistor and one end of the second capacitor are electrically connected to the auxiliary gate of the driving transistor, one of the source and the drain of the third transistor, one end of the first capacitor and the other end of the second capacitor are electrically connected to the other of the source and the drain of the driving transistor, and the other of the source and the drain of the third transistor and the other end of the first capacitor are electrically connected to the main gate of the driving transistor.
Optionally, in some embodiments of the present application, the reset module includes a fourth transistor;
the gate of the fourth transistor is connected to the first scanning signal, one of the source and the drain of the fourth transistor is connected to the second initial signal, and the other of the source and the drain of the fourth transistor is electrically connected to the other of the source and the drain of the driving transistor.
Optionally, in some embodiments of the present application, the data writing module includes a switching transistor;
the gate of the switching transistor is connected to the first scan signal, one of the source and the drain of the switching transistor is connected to the data signal, and the other of the source and the drain of the switching transistor is electrically connected to the main gate of the driving transistor.
Optionally, in some embodiments of the present application, the driving control timing of the light emitting circuit includes a reset phase, a compensation phase, a data writing phase, and a light emitting phase;
in the reset stage, the second scanning signal is at a high potential, the sensing signal is changed from a low potential to a high potential, and the first scanning signal is at a low potential;
in the compensation stage, the first scanning signal and the second scanning signal are both low potential, and the sensing signal is high potential;
in the data writing stage, the first scanning signal is at a high potential, and the second scanning signal and the sensing signal are both at a low potential;
in the light emitting stage, the first scan signal, the second scan signal and the sensing signal are all at a low potential.
Optionally, in some embodiments of the present application, before the data writing phase, the driving control timing of the light emitting circuit further includes a holding phase, and in the holding phase, the first scan signal, the second scan signal, and the sensing signal are all low potential.
Optionally, in some embodiments of the present application, a voltage value of the first initial signal is smaller than a voltage value of the reference signal.
Correspondingly, the present application further provides a display panel, where the display panel includes a plurality of pixel units arranged in an array, and each of the pixel units includes the light emitting circuit described in any one of the above.
The application provides a light-emitting circuit and a display panel. The display panel includes a driving transistor, a data writing module, a compensation module, a light emitting device, and a reset module. The driving transistor is a double-gate transistor. The compensation module is connected to the second scanning signal, the sensing signal, the reference signal and the first initial signal and is electrically connected to the main grid electrode and the auxiliary grid electrode of the driving transistor and the other one of the source electrode and the drain electrode of the driving transistor. According to the display panel and the driving method, the double-gate structure transistor is used as the driving transistor, then the threshold voltage of the driving transistor is regulated and controlled by the compensation module according to the potential of the auxiliary gate of the driving transistor and the voltage value of the reference signal, so that the current flowing through the light-emitting device is unrelated to the threshold voltage of the driving transistor, the threshold voltage drift compensation of the driving transistor can be realized, and the brightness uniformity of the display panel is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required to be used in the description of the embodiments are briefly introduced below, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic diagram of a first structure of a light emitting circuit provided in the present application;
fig. 2 is a schematic diagram of a second structure of a light emitting circuit provided in the present application;
FIG. 3 is a circuit schematic of a light emitting circuit provided herein;
FIG. 4 is a timing diagram of a light emitting circuit provided herein;
fig. 5 is a schematic structural diagram of a display panel provided in the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the described embodiments are merely a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Furthermore, the terms "first," "second," and the like in the description and in the claims of the present application are used for distinguishing between different objects and not for describing a particular order. The terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions.
The present application provides a light emitting circuit and a display panel, which are described in detail below. It should be noted that the following description of the embodiments is not intended to limit the preferred order of the embodiments of the present application.
Referring to fig. 1, fig. 1 is a schematic diagram of a first structure of a light emitting circuit provided in the present application. In the embodiment of the present application, the light emitting circuit 100 includes a driving transistor DT, a data writing module 101, a compensation module 102, a reset module 103, and a light emitting device D.
The driving transistor DT is a double-gate transistor. One of the source and the drain of the driving transistor DT is electrically connected to the first power signal VDD. The data writing module 101 receives the first scan signal Gn and the data signal Da, and is electrically connected to the main gate g of the driving transistor DT. The data writing module 101 is configured to write a data signal Da into the main gate g of the driving transistor DT under the control of the first scan signal Gn. The compensation module 102 is coupled to the second scan signal Gn-1, the sensing signal Se, the reference signal Vref, and the first initialization signal Vini2, and is electrically connected to the main gate g and the auxiliary gate b of the driving transistor DT and the other s of the source and the drain of the driving transistor DT. The compensation module 102 is used for regulating and controlling the threshold voltage Vth of the driving transistor DT according to the potential of the auxiliary gate b of the driving transistor DT. The first pole of the light emitting device D is electrically connected to the other one s of the source and the drain of the driving transistor DT. The second pole of the light emitting device D is electrically connected to the second power signal VSS. The reset module 103 receives the first scan signal Gn and the second initialization signal Vini1, and is electrically connected to the other s of the source and the drain of the driving transistor DT. The reset module 103 is configured to initialize a potential of the other one s of the source and the drain of the driving transistor DT under the control of the first scan signal Gn.
The embodiment of the present application uses a double-gate transistor as the driving transistor TD. In the process of studying the dual-gate driving transistor TD, it is found that the potential Vb of the auxiliary gate b of the driving transistor TD is in a linear relationship with the control of the threshold voltage Vth of the driving transistor TD. Specifically, the larger Vbs, the smaller the threshold voltage Vth of the driving transistor TD. The smaller Vbs, the larger the threshold voltage Vth of the driving transistor TD. Therefore, the threshold voltage Vth of the driving transistor TD can be adjusted by appropriately adjusting the potential Vb of the auxiliary gate b of the driving transistor TD and the voltage value of the reference signal Vref.
Therefore, the embodiment of the present application writes the reference voltage Vref to the auxiliary gate b of the driving transistor TD and writes the first initial voltage Vini2 to the other one s of the source and the drain of the driving transistor TD by providing the compensation module 102. Then, the threshold voltage Vth of the driving transistor DT is controlled according to the potential of the auxiliary gate b of the driving transistor TD and the voltage value of the reference signal Vref, so that the current flowing through the light emitting device D is independent of the threshold voltage Vth of the driving transistor DT, and the drift compensation of the threshold voltage Vth of the driving transistor DT is realized.
In addition, in the process of regulating and controlling the threshold voltage Vth of the driving transistor DT by the compensation module 102, due to differences in process procedures and the like, the initial threshold voltages of different driving transistors DT are different. Therefore, after the regulation, the potentials of the other one s of the source and the drain of the different driving transistors DT are not equal. At this time, even if the same data voltage Da is written to the main gates g of the plurality of driving transistors DT, the driving currents generated by the different driving transistors DT may be different, and the light emitting luminance of the light emitting device D may be different. In contrast, in the embodiment of the present application, by providing the reset module 103 to reset the potential of the other s of the source and the drain of the driving transistor DT, the luminance uniformity of the light emitting devices D in the plurality of light emitting circuits 100 can be further improved. And the data writing module 101 and the resetting module 103 are both controlled by the second scanning signal Gn, the wiring in the light emitting circuit 100 can be reduced.
In the embodiment of the present application, the light emitting device D may be provided as one or more. The plurality of light emitting devices D may be arranged in series or in parallel, so that the light emitting luminance may be improved. The light emitting device D may be a mini light emitting diode, a micro light emitting diode, or an organic light emitting diode. When the light emitting device D is the above-described light emitting diode, the first pole of the light emitting device D may be one of an anode or a cathode of the light emitting diode. The second pole of the light emitting device D may be the other of the anode or the cathode of the light emitting diode.
In some embodiments of the present application, the scan signal may be provided by a Gate Driver on Array (GOA) circuit or a Gate chip, and the multi-stage scan signal is output stage by stage. The first scanning signal Gn is an nth-level scanning signal, the second scanning signal Gn-1 is an nth-1-level scanning signal, and n is an integer greater than 1. In the progressive scanning process, the threshold voltage of the driving transistor DT can be regulated and controlled line by line along with the transmission of the scanning signal.
Further, please refer to fig. 1 and fig. 2, wherein fig. 2 is a second structural schematic diagram of the light emitting circuit provided in the present application. In the embodiment of the present application, the compensation module 102 includes an initialization unit 1021 and a threshold voltage regulation unit 1022.
The initialization unit 1021 receives the second scan signal Gn-1 and the first initialization signal Vini2, and is electrically connected to the other of the source and the drain of the driving transistor DT. The initialization unit 1021 is used to write the first initialization signal Vini2 into the other s of the source and the drain of the driving transistor TD under the control of the second scan signal Gn-1. The threshold voltage regulation unit 1022 receives the sensing signal Se and the reference signal Vref, and is electrically connected to the main gate g and the auxiliary gate b of the driving transistor DT and the other one s of the source and the drain of the driving transistor DT. The threshold voltage Vth regulating unit 1022 is configured to write a reference signal Vref into the auxiliary gate b of the driving transistor DT and regulate the threshold voltage Vth of the driving transistor DT under the control of the sensing signal Se.
Referring to fig. 3, fig. 3 is a circuit schematic diagram of a light emitting circuit provided in the present application. In some embodiments of the present application, the initialization unit 1021 includes a first transistor T1. The gate of the first transistor T1 is connected to the second scan signal Gn-1. One of a source and a drain of the first transistor T1 switches on the first initial signal Vini 2. The other of the source and the drain of the first transistor T1 is electrically connected to the other of the source and the drain s of the driving transistor DT. Of course, it is understood that the initialization unit 1021 may also be formed using a plurality of transistors connected in series.
In some embodiments of the present application, the threshold voltage adjusting unit 1022 includes a second transistor T2, a third transistor T3, a first capacitor C1, and a second capacitor C2.
The gate of the second transistor T2 is switched in the sense signal Se. One of the source and the drain of the second transistor T2 is switched in the reference signal Vref. The other of the source and the drain of the second transistor T2 and one end of the second capacitor C2 are electrically connected to the auxiliary gate b of the driving transistor DT. The gate of the third transistor T3 is switched on the sensing signal Se. One of a source and a drain of the third transistor T3, one end of the first capacitor C1, and the other end of the second capacitor C2 are electrically connected to the other one s of the source and the drain of the driving transistor DT. The other of the source and the drain of the third transistor T3 and the other end of the first capacitor C1 are electrically connected to the main gate g of the driving transistor DT.
In some embodiments of the present application, the reset module 103 includes a fourth transistor T4. The gate of the fourth transistor T4 is connected to the first scan signal Gn. One of a source and a drain of the fourth transistor T4 switches on the second initial signal Vini 1. The other of the source and the drain of the fourth transistor T4 is electrically connected to the other of the source and the drain s of the driving transistor DT. Of course, it is understood that the reset module 103 may also be formed using a plurality of transistors connected in series.
In some embodiments of the present application, the data writing module 101 includes a switching transistor T5. The gate of the switching transistor T5 is connected to the first scan signal Gn. One of the source and the drain of the switching transistor T5 switches in the data signal Da. The other of the source and the drain of the switching transistor T5 is electrically connected to the main gate g of the driving transistor DT. Of course, it is understood that the data writing module 101 may also be formed by connecting a plurality of transistors in series.
The light-emitting circuit 100 provided by the embodiment of the application adopts a circuit structure of 6T2C (6 transistors and 2 capacitors) to control the light-emitting device D, uses fewer components, and has a simple and stable structure, and the cost is saved.
It should be noted that the light emitting circuit 100 provided in the embodiment of the present application may include, but is not limited to, the functional modules described above. The light emitting circuit 100 provided by the embodiment of the present application may further include other functional modules. Such as: in order to further improve the control of the light emitting time of the light emitting device D, a transistor may be disposed between the first power signal VDD and the driving transistor DT, and/or a transistor may be disposed between the driving transistor DT and the light emitting device D, which is not described in detail herein.
The transistors used in the embodiments of the present application may be thin film transistors or field effect transistors or other devices with the same characteristics, and since the sources and drains of the transistors used herein are symmetric, the sources and drains may be interchanged. In the embodiment of the present application, to distinguish two poles of a transistor except for a gate, one of the two poles is referred to as a source, and the other pole is referred to as a drain. The form in the drawing provides that the middle end of the switching transistor is a grid, the signal input end is a source, and the output end is a drain. In addition, the transistors used in the embodiments of the present application may include a P-type transistor and/or an N-type transistor, where the P-type transistor is turned on when the gate is at a low level and turned off when the gate is at a high level, and the N-type transistor is turned on when the gate is at a high level and turned off when the gate is at a low level.
Further, the transistors in the light emitting circuit 100 provided in the embodiment of the present application may be set to be the same type of transistors, so as to avoid the influence on the light emitting circuit 100 caused by the difference between different types of transistors. In the following embodiments of the present application, each transistor is an N-type transistor as an example, but the present application is not limited thereto.
Referring to fig. 3 and fig. 4, fig. 4 is a timing diagram of a light emitting circuit according to the present application. The combination of the first scanning signal Gn, the second scanning signal Gn-1 and the sensing signal Se corresponds to the reset period t1, the compensation period t2, the data writing period t4 and the light emitting period t 5. That is, in one frame time, the driving control timing of the light emitting circuit 100 provided in the embodiment of the present application includes a reset phase t1, a compensation phase t2, a data writing phase t4, and a light emitting phase t 5.
In the reset period t1, the second scan signal Gn-1 is at a high level. The first transistor T1 is turned on. The second initialization signal Vini2 is written into the other one s of the source and the drain of the driving transistor DT through the first transistor T1. The sensing signal Se is changed from the low potential to the high potential, and both the second transistor T2 and the third transistor T3 are turned on. The reference signal Vref is written to the auxiliary gate b of the driving transistor DT through the second transistor T2. Since the third transistor T3 is turned on, the driving transistor DT forms a diode connection manner. The main gate g of the driving transistor DT is shorted together with the other s of the source and the drain of the driving transistor DT. Therefore, the potential of the main gate g of the driving transistor is also the second initialization signal Vini 2. That is, Vg is Vs-Vini 2, Vb is Vref, Vgs is 0, and Vbs is Vref-Vini 2.
Meanwhile, the first scan signal Gn is at a low potential. The switching transistor T5 is turned off. In addition, in the reset period t1, in order to prevent the light emitting device D from emitting light, the second power signal VSS may be set to be a high level signal, so that the light emitting device D is reversely biased to achieve the purpose of non-light emission.
During the compensation period t2, the sensing signal Se is continuously high. The second transistor T2 and the third transistor T3 maintain an open state. The potential of the auxiliary gate b of the driving transistor DT is maintained at Vb equal to Vref. As can be seen from the aforementioned bottom gate (auxiliary gate) voltage regulation and control principle, when the voltage value of the first initial signal Vini2 is less than the voltage value of the reference signal Vref, i.e., Vbs >0, the threshold voltage Vth of the driving transistor DT is modulated to be a negative value. Since Vgs is 0, the driving transistor DT is turned on. At this time, the first power supply signal VDD is a high level signal, and the first power supply signal VDD is charged to the other of the source and the drain of the driving transistor DT through the driving transistor DT, and the potential thereof is increased. According to the bottom gate voltage regulation principle, the threshold voltage Vth of the driving transistor DT gradually changes from a negative value to zero, and finally the driving transistor DT is turned off. The threshold voltage Vth of the driving transistor DT at this time is equal to a voltage difference between the main gate g and the other s of the source and drain of the driving transistor DT, that is, Vth is Vgs.
Meanwhile, the first scanning signal Gn and the second scanning signal Gn-1 are both at a low potential. The first transistor T1 and the switching transistor T5 are both turned off.
In the data writing phase t4, the first scan signal Gn is at a high potential. The switching transistor T5 is turned on, and the data signal Da is written to the main gate of the driving transistor TD through the switching transistor T5. The fourth transistor T4 is turned on and the second initialization signal Vini1 is written to the second pole of the light emitting device D through the fourth transistor T4. The second capacitor C2 keeps the voltage difference between its both ends constant, and keeps the threshold voltage Vth of the driving transistor DT equal to 0.
It will be appreciated from the above analysis that after the compensation phase t2, the potential of the other s of the source and drain of the different drive transistors DT may not be equal. At this time, the second initialization signal Vini1 resets the potential of the other s of the source and the drain of the driving transistor DT, so that the luminance uniformity of the light emitting devices D in the plurality of light emitting circuits 100 can be further improved.
Meanwhile, the second scan signal Gn-1 and the sense signal Se are both low. The first transistor T1, the second transistor T2, and the third transistor T3 are all turned off.
In the light emitting period t5, the first scan signal Gn, the second scan signal Gn-1 and the sensing signal Se are all low potential. The first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the switching transistor T5 are all turned off. The voltage value of the first power signal VDD is greater than that of the second power signal VSS, the driving transistor TD is turned on under the action of the data signal Da to generate a driving current, and the light emitting device DT emits light. In this process, the first capacitor C1 keeps the voltage difference between its two terminals unchanged, the second capacitor C2 keeps the voltage difference between its two terminals unchanged, and the threshold voltage Vth of the driving transistor DT is kept equal to 0.
It can be known that the saturation region current formula of the driving transistor DT is:
Ids＝K(Vg-Vs-Vth)2＝(Vdata-Vini1-Vth)2＝(Vdata-Vini1)2。
wherein the content of the first and second substances,
μ is the mobility of the driving transistor DT. W/L is the width-to-length ratio of the active layer of the driving transistor DT. Cox is the gate oxide capacitance per unit area. Vth is the regulated threshold voltage of the driving transistor DT.
Therefore, the value of the drive current flowing through the light emitting device D is independent of the threshold voltage of the drive transistor DT, eliminating the influence of the difference in the threshold voltage of the drive transistor DT on the display luminance unevenness.
Further, with reference to fig. 3 and fig. 4, in some embodiments of the present application, the driving control timing of the light emitting circuit 100 further includes a holding period t3 before the data writing period t 4. In the hold period t3, the first scan signal Gn, the second scan signal Gn-1, and the sensing signal Se are all low. In this process, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the switching transistor T5 are all turned off.
It is understood that the sensing signal Se has a certain falling edge due to RC delay or the like. When the sensing signal Se has not completely dropped to the low voltage, there is a possibility that the third transistor T3 is turned on. At this time, when the second scan signal Gn rises to the high level, the switching transistor T5 is turned on. The data signal Da is transmitted to the other one s of the source and the drain of the driving transistor DT through the switching transistor T5 and the second transistor T2, causing a signal transmission error, which affects the light emission of the light emitting device D. In this regard, in the embodiment of the present application, the holding period t3 is set, so that the sensing signal Se is completely changed from the high level to the low level, thereby avoiding the above problem and improving the operation stability of the light emitting circuit 100.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a display panel provided in the present application. The embodiment of the present application provides a display panel 200. The display panel 200 includes a plurality of pixel units 201 arranged in an array. Each pixel unit 201 includes the light emitting circuit 100 described above, and specific reference may be made to the description of the light emitting circuit 100, which is not repeated herein.
The display panel 200 may be a Mini LED display panel, a Micro LED display panel, or an OLED (Organic Light-Emitting Diode) display panel.
In the display panel 200 of the present application, a novel light emitting circuit 100 is designed for a pixel unit 201, a transistor with a dual gate structure is used as a driving transistor, and then a compensation module is used to regulate and control the threshold voltage Vth of the driving transistor according to the potential of an auxiliary gate of the driving transistor and the voltage value of a reference signal, so that the current flowing through the light emitting device is unrelated to the threshold voltage Vth of the driving transistor, and the drift compensation of the threshold voltage Vth of the driving transistor can be realized. Since each threshold voltage Vth of the light emitting circuit 100 corresponding to each pixel unit 201 is constantly zero after being regulated by the driving transistor, the function that the threshold voltages Vth of the driving transistors in the display panel 200 are constantly equal is realized, and the aim of improving the brightness uniformity of the display panel is realized.
Of course, the light emitting circuit 100 provided in the embodiment of the present application can also be applied to a backlight module to improve the uniformity of the light emitting brightness of the backlight module, which is not described herein again.
The embodiments of the present application are described in detail above. The principle and the implementation of the present application are explained by applying specific examples, and the above description of the embodiments is only used to help understand the method and the core idea of the present application, and not to limit the patent scope of the present application. All the equivalent structures or equivalent processes performed by using the contents of the specification and the drawings of the present application, or directly or indirectly applied to other related technical fields, are included in the scope of protection of the present application.
Claims (10)
1. A light emitting circuit, comprising:
a driving transistor which is a double-gate transistor, one of a source and a drain of the driving transistor being electrically connected to a first power supply signal;
the data writing module is accessed to a first scanning signal and a data signal and is electrically connected to the main grid electrode of the driving transistor, and the data writing module is used for writing the data signal into the main grid electrode of the driving transistor under the control of the first scanning signal;
the compensation module is connected with a second scanning signal, a sensing signal, a reference signal and a first initial signal and is electrically connected with the main grid electrode and the auxiliary grid electrode of the driving transistor and the other one of the source electrode and the drain electrode of the driving transistor, and the compensation module is used for regulating and controlling the threshold voltage of the driving transistor according to the potential of the auxiliary grid electrode of the driving transistor;
a light emitting device, a first pole of which is electrically connected to the other of the source and the drain of the driving transistor, and a second pole of which is electrically connected to a second power supply signal;
the reset module is connected to the first scanning signal and the second initial signal and is electrically connected to the other of the source and the drain of the driving transistor, and the reset module is used for resetting the potential of the other of the source and the drain of the driving transistor under the control of the first scanning signal.
2. The light emitting circuit of claim 1, wherein the compensation module comprises an initialization unit and a threshold voltage regulation unit;
the initialization unit is connected with the second scanning signal and the first initial signal and is electrically connected with the other one of the source electrode and the drain electrode of the driving transistor;
the threshold voltage regulation and control unit is connected to the sensing signal and the reference signal and is electrically connected to the main grid electrode and the auxiliary grid electrode of the driving transistor and the other one of the source electrode and the drain electrode of the driving transistor.
3. The light-emitting circuit according to claim 2, wherein the initialization unit includes a first transistor;
the gate of the first transistor is connected to the second scan signal, one of the source and the drain of the first transistor is connected to the first initial signal, and the other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the driving transistor.
4. The light-emitting circuit according to claim 2, wherein the threshold voltage control unit comprises a second transistor, a third transistor, a first capacitor, and a second capacitor;
the gate of the second transistor and the gate of the third transistor are both connected to the sensing signal, one of the source and the drain of the second transistor is connected to the reference signal, the other of the source and the drain of the second transistor and one end of the second capacitor are electrically connected to the auxiliary gate of the driving transistor, one of the source and the drain of the third transistor, one end of the first capacitor and the other end of the second capacitor are electrically connected to the other of the source and the drain of the driving transistor, and the other of the source and the drain of the third transistor and the other end of the first capacitor are electrically connected to the main gate of the driving transistor.
5. The light emitting circuit according to claim 1, wherein the reset module includes a fourth transistor;
the gate of the fourth transistor is connected to the first scanning signal, one of the source and the drain of the fourth transistor is connected to the second initial signal, and the other of the source and the drain of the fourth transistor is electrically connected to the other of the source and the drain of the driving transistor.
6. The light-emitting circuit according to claim 1, wherein the data writing module includes a switching transistor;
the gate of the switching transistor is connected to the first scan signal, one of the source and the drain of the switching transistor is connected to the data signal, and the other of the source and the drain of the switching transistor is electrically connected to the main gate of the driving transistor.
7. The light-emitting circuit according to claim 1, wherein a drive control timing of the light-emitting circuit includes a reset phase, a compensation phase, a data write phase, and a light-emitting phase;
in the reset stage, the second scanning signal is at a high potential, the sensing signal is changed from a low potential to a high potential, and the first scanning signal is at a low potential;
in the compensation stage, the first scanning signal and the second scanning signal are both low potential, and the sensing signal is high potential;
in the data writing stage, the first scanning signal is at a high potential, and the second scanning signal and the sensing signal are both at a low potential;
in the light emitting stage, the first scan signal, the second scan signal and the sensing signal are all at a low potential.
8. The light-emitting circuit according to claim 7, wherein a drive control timing of the light-emitting circuit before the data writing phase further includes a holding phase in which the first scan signal, the second scan signal, and the sense signal are all low potential.
9. The light emitting circuit of claim 1, wherein the voltage value of the first initialization signal is less than the voltage value of the reference signal.
10. A display panel comprising a plurality of pixel units arranged in an array, each of the pixel units comprising the light emitting circuit according to any one of claims 1 to 9.
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