CN114356145A

CN114356145A - Touch detection circuit, touch device and electronic equipment

Info

Publication number: CN114356145A
Application number: CN202111683139.7A
Authority: CN
Inventors: 王洁; 陈曦
Original assignee: Shenzhen Xihua Technology Co Ltd
Current assignee: Shenzhen Xihua Technology Co Ltd
Priority date: 2021-04-27
Filing date: 2021-12-31
Publication date: 2022-04-15

Abstract

The embodiment of the application provides a touch detection circuit, a touch device and electronic equipment, the circuit includes: the delay locked loop comprises a first delay unit, a delay locked loop unit and a detection unit; the delay phase-locked loop unit comprises a phase discrimination module and a second delay module; the first delay unit generates a first clock signal according to the reference clock signal and the capacitor to be detected; the second delay module generates a second clock signal according to the reference clock signal and the variable capacitor; the phase discrimination module is suitable for receiving the first clock signal and the second clock signal and generating a corresponding output signal according to the relation between the first delay time of the first clock signal and the second delay time of the second clock signal until the delay phase-locked loop unit reaches a locked state; the detection unit is suitable for determining whether touch occurs according to the output signal of the phase discrimination module. According to the scheme, the touch detection precision can be improved.

Description

Touch detection circuit, touch device and electronic equipment

Technical Field

The present application relates to the field of circuits, and in particular, to a touch detection circuit, a touch device, and an electronic apparatus.

Background

The touch sensor may detect the presence and location of a touch and the proximity of an object (e.g., a user's finger or a stylus) within a touch sensitive area of the touch sensor overlying the display screen. In touch sensitive display applications, touch sensors may enable a user to interact directly with content displayed on a screen, rather than indirectly with a mouse or touchpad. The touch sensor may be attached to or provided as part of a desktop computer, laptop computer, tablet computer, Personal Digital Assistant (PDA), smart phone, satellite navigation device, portable media player, portable gaming console, kiosk computer, point of sale device, or other suitable device. A control panel on a home or other appliance may include touch sensors.

Capacitive touch devices are widely used in electronic devices, for example, as input devices to provide input information, such as position, motion, force, and duration. The core of a capacitive touch device is a capacitance detection circuit. In the related technology of capacitance detection, time domain-based capacitance detection is a mainstream detection method, and is specifically implemented by charging a capacitor to be detected, converting the charge amount of the capacitor to be detected into a voltage, or converting the variation of the charge charged by the capacitor to be detected into a voltage, and further processing the voltage to determine the capacitance value of the capacitor to be detected.

However, the conventional touch detection circuit suffers from circuit noise and has a problem of detection accuracy.

Disclosure of Invention

The problem that this application was solved provides a touch detection circuit, can reduce circuit noise to detect the precision.

In order to solve the above problem, an embodiment of the present application provides a touch detection circuit, where the touch detection circuit includes a first delay unit, a delay locked loop unit, and a detection unit, which are coupled in sequence; the delay phase-locked loop unit comprises a phase discrimination module and a second delay module; the phase discrimination module comprises a first input end, a second input end and an output end; a first input end of the phase detection module is coupled to an output end of the first delay unit, a second input end of the phase detection module is coupled to an output end of the second delay module, and an output end of the phase detection module is coupled to the second delay module and the detection unit;

the first delay unit is suitable for generating a first clock signal according to a reference clock signal and the capacitor to be detected; the first clock signal has a first delay time compared to the reference clock signal;

the second delay module is suitable for generating a second clock signal according to the reference clock signal and the variable capacitor; the second clock signal has a second delay time compared to the reference clock signal;

the phase demodulation module is suitable for receiving the first clock signal and the second clock signal, generating corresponding output signals according to the relationship between the first delay time of the first clock signal and the second delay time of the second clock signal, and adjusting the capacitance value of the variable capacitor so as to adjust the second delay time corresponding to the second clock signal output by the second delay module until the delay phase-locked loop unit reaches a locked state;

the detection unit is suitable for determining whether touch occurs according to the output signal of the phase discrimination module.

Optionally, the first delay unit includes a first inverter, a second inverter, and the capacitor to be measured;

the input end of the first phase inverter is used for receiving the reference clock signal, and the output end of the first phase inverter is coupled with the first end of the capacitor to be tested and the input end of the second phase inverter; the second end of the capacitor to be tested is grounded; the output end of the second inverter is used as the output end of the first delay unit or is coupled with the output end of the first delay unit.

Optionally, the second delay module comprises a third inverter, a fourth inverter and the variable capacitance;

an input end of the third inverter is used for receiving the reference clock signal, and an output end of the third inverter is coupled with the first end of the variable capacitor and an input end of the fourth inverter; the second end of the variable capacitor is grounded; the control end of the variable capacitor is coupled with the output end of the phase discrimination module; an output of the fourth inverter is used as an output of the second delay module or is coupled to an output of the second delay module.

Optionally, the phase detection module is adapted to reduce a capacitance value of the variable capacitor when it is determined that a first delay time corresponding to the first clock signal is less than a second delay time corresponding to the second clock signal; and when the first delay time corresponding to the first clock signal is determined to be greater than the second delay time corresponding to the second clock signal, increasing the capacitance value of the variable capacitor.

Optionally, the phase detection module includes a phase frequency detector, a charge pump, and a charge-discharge module that are coupled in sequence;

the phase frequency detector is provided with a first input end, a second input end, a first output end and a second output end; the charge pump is provided with a first control end, a second control end and an output end; a first input end of the phase frequency detector serves as a first input end of the phase detection module or is coupled with the first input end of the phase detection module, a second input end of the phase frequency detector serves as a second input end of the phase detection module or is coupled with the second input end of the phase detection module, a first output end of the phase frequency detector is coupled with a first control end of the charge pump, a second output end of the phase frequency detector is coupled with a second control end of the charge pump, and an output end of the charge pump is coupled with the charge and discharge module; the charge-discharge module is also coupled with the detection unit;

the phase frequency detector is suitable for receiving the first clock signal and the second clock signal and outputting a corresponding first control signal and a corresponding second control signal according to the relation between the first delay time of the first clock signal and the second delay time of the second clock signal;

the charge pump is suitable for receiving a first control signal and a second control signal output by the phase frequency detector, and charging or discharging the charge-discharge module according to the first control signal and the second control signal;

the detection unit is suitable for collecting analog voltage signals output by the output end of the charge-discharge module and determining whether touch occurs according to the collected analog voltage signals.

Optionally, the phase frequency detector is adapted to output a corresponding first control signal at a high level and a corresponding second control signal at a low level when a first delay time of the first clock signal is less than a second delay time of the second clock signal; when the first delay time of the first clock signal is greater than the second delay time of the second clock signal, outputting a corresponding first control signal as a low level and outputting a corresponding second control signal as a high level;

the charge pump unit is suitable for charging the charge-discharge module when the received first control signal is at a high level and the received second control signal is at a low level; when the received first control signal is at a low level and the second control signal is at a high level, discharging the charge-discharge module;

or the charge pump unit is adapted to discharge the charge-discharge module when the received first control signal is at a high level and the received second control signal is at a low level; and when the received first control signal is at a low level and the second control signal is at a high level, charging the charge-discharge module.

Optionally, the phase detection module further includes an analog-to-digital converter and a variable capacitance control module;

the analog-to-digital converter has an input end and an output end; the variable capacitance control module is provided with an input end and an output end; the input end of the analog-to-digital converter is coupled with the output end of the charge and discharge module, and the output end of the analog-to-digital converter is coupled with the input end of the variable capacitance control module and the detection unit respectively; the output end of the variable capacitor control module is coupled with the control end of the variable capacitor;

the analog-to-digital converter is suitable for converting the analog voltage signal output by the charging module into a corresponding digital signal;

the variable capacitor control module is suitable for receiving the digital signal output by the analog-to-digital converter and adjusting the capacitance value of the variable capacitor according to the received digital signal;

the detection unit is suitable for receiving the digital signal output by the analog-to-digital converter and determining whether touch occurs according to the received digital signal.

Optionally, the charge pump comprises a discharge submodule and a charge submodule;

the control end of the charging submodule is used for receiving a second control signal output by the charge pump, and the charging submodule is suitable for charging the charging and discharging module under the control of the second control signal;

the control end of the discharge submodule is used for receiving a first control signal output by the charge pump, and the discharge submodule is suitable for discharging the charge-discharge module under the control of the first control signal.

Optionally, the charging submodule comprises a discharge control switch and a first current source;

a first end of the discharge control switch is coupled with a first end of the first current source, a second end of the discharge control switch is coupled with the charge-discharge module, and a control end of the discharge control switch is coupled with a first output end of the phase frequency detector; the second terminal of the first current source is coupled to a predetermined power voltage.

Optionally, the discharge sub-module comprises a charge control switch and a second current source;

a first end of the charge control switch is coupled to a first end of the second current source, a second end of the charge control switch is coupled to the charge and discharge module, and a control end of the charge control switch is coupled to a second output end of the phase frequency detector; the second terminal of the second current source is grounded.

Optionally, the charging and discharging module comprises a capacitor; the first end of the capacitor is coupled with the output end of the charge pump, and the second end of the capacitor is grounded.

The embodiment of the application also provides a touch device, and the touch device comprises the touch detection circuit.

The embodiment of the application also provides electronic equipment, and the electronic equipment comprises the touch device.

Compared with the prior art, the technical scheme of the embodiment of the application has the following advantages:

according to the scheme, the first delay unit is adopted to generate a first clock signal according to a reference clock signal and a capacitor to be detected, the second delay module in the delay phase-locked loop unit is adopted to generate a second clock signal according to the reference clock signal and the variable capacitor, the phase demodulation module is adopted to receive the first clock signal and the second clock signal, a corresponding output signal is generated according to the relation between the first delay time of the first clock signal and the second delay time of the second clock signal, the capacitance value of the variable capacitor is adjusted to adjust the second delay time corresponding to the second clock signal output by the second delay module until the delay phase-locked loop unit reaches a locked state, the circuit has the advantage of simple structure, circuit noise can be remarkably reduced, and the touch detection precision can be improved.

Drawings

Fig. 1 is a schematic structural diagram of a touch detection circuit in an embodiment of the present application.

Fig. 2 is a schematic structural diagram of a phase detection module in an embodiment of the present application;

fig. 3 is a timing diagram of a related signal of a phase detection module in an embodiment of the present application;

fig. 4 is a timing diagram of another related signal of the phase detection module in the embodiment of the present application;

FIG. 5 is a flow chart of a touch detection method in an embodiment of the present application;

fig. 6 is a schematic structural diagram of an electronic device in an embodiment of the present application;

fig. 7 is a schematic structural diagram of a touch detection device in an embodiment of the present application.

Detailed Description

As can be seen from the background art, the conventional touch detection circuit has the problems of complicated structure and high circuit noise, and reduces the accuracy of touch detection.

In order to solve the above problem, an embodiment of the present application provides a capacitance detection circuit, which includes a first delay unit, a delay locked loop unit, and a detection unit, which are coupled in sequence; the delay phase-locked loop unit comprises a phase discrimination module and a second delay module; the phase discrimination module comprises a first input end, a second input end and an output end; a first input end of the phase detection module is coupled with an output end of the first delay unit, and a second input end of the phase detection module is coupled with an output end of the second delay module and an input end of the detection unit respectively; the first delay unit is suitable for generating a first clock signal according to a reference clock signal and the capacitor to be detected; the first clock signal has a first delay time compared to the reference clock signal; the second delay module is suitable for generating a second clock signal according to the reference clock signal and the variable capacitor; the second clock signal has a second delay time compared to the reference clock signal; the phase demodulation module is suitable for receiving the first clock signal and the second clock signal, generating a corresponding output signal according to a relation between a first delay time of the first clock signal and a second delay time of the second clock signal, and adjusting a capacitance value of the variable capacitor so as to adjust a second delay time corresponding to the second clock signal output by the second delay module until the delay phase-locked loop unit reaches a locked state; the detection unit is suitable for determining whether touch occurs according to the output signal of the phase discrimination module.

The capacitance detection circuit provided in the embodiment of the application has the advantage of simple circuit structure, can obviously reduce circuit noise, and improves the precision of touch detection.

The capacitance detection circuit in the embodiment of the present application will be described in further detail with reference to the accompanying drawings.

Fig. 1 shows a schematic frame structure of a capacitance detection circuit in an embodiment of the present application. Referring to fig. 1, a capacitance detection circuit in an embodiment of the present application includes a first delay unit 11, a delay locked loop unit 12, and a detection unit 13.

The first delay cell 11 has an input and an output. The input end of the first delay unit 11 is coupled to receive a reference clock signal CLK, and the output end of the first delay unit 11 is coupled to the delay locked loop unit 12. The first delay unit 11 can generate a first clock signal D1 according to the reference clock signal CLK and the capacitance to be tested Cx; the first clock signal D1 has a first delay time, denoted as Δ t1, compared to the reference clock signal CLK.

The delay-locked loop unit 12 includes a second delay module 121 and a phase detection module 122. The phase detection module 122 has a first input terminal, a second input terminal, and an output terminal; a first input terminal of the phase detection module 122 is coupled to an output terminal of the first delay unit 11, and a second input terminal of the phase detection module 122 is coupled to an output terminal of the second delay module 121 and an input terminal of the detection unit 13, respectively.

In this embodiment, the first delay unit 11 includes a first inverter CV1, a second inverter CV2, and a capacitor Cx to be measured. Wherein an input terminal of a first inverter CV1 is used as an input terminal of the first delay cell 11 or coupled to an input terminal of the first delay cell 11, and is used for receiving the reference clock signal CLK, and an output terminal of the first inverter CV1 is coupled to a first terminal of the capacitor Cx to be tested and an input terminal of a second inverter CV 2; the second end of the capacitor Cx to be tested is grounded; the output of the second inverter CV2 is used as the output of the first delay unit 11 or coupled to the output of the first delay unit 11, and coupled to the first input of the phase detection module 122.

The second delay module 121 has an input and an output. Wherein an input of the second delay module 121 is coupled to the reference clock signal CLK, and an output of the second delay module 121 is coupled to a second input of the phase detection module 122. The second delay module 121 may generate a second clock signal D2 according to the reference clock signal CLK and the variable capacitor Cc; the second clock signal D2 has a second delay time, denoted as Δ t2, compared to the reference clock signal CLK.

In this embodiment, the second delay module 121 includes a third inverter CV3, a fourth inverter CV4, and a variable capacitor Cc. Wherein an input terminal of the third inverter CV3 is coupled as or to the input terminal of the second delay module 121 for receiving the reference clock signal CLK, and an output terminal of the third inverter CV3 is coupled to the first terminal of the variable capacitor Cc and the input terminal of the fourth inverter CV 4; the second end of the variable capacitor Cc is grounded; the output of the fourth inverter CV4 is used as the output of the second delay module 121 or is coupled to the output of the second delay module 121 and is coupled to the second input of the phase detection module 122.

In the embodiment of the present application, the reference clock signal CLK may be generated by a reference clock source with low noise, so as to reduce the circuit noise of the touch detection circuit of the present application. The implementation manner of the reference clock source may refer to related implementations in the prior art, which is not limited herein.

The above description has been given taking as an example that the first delay unit 11 and the second delay module 121 each include two inverters. It is understood that the first delay unit 11 and the second delay unit 121 may further include more than two inverters respectively, or may also adopt other structures, and those skilled in the art can set the number according to actual needs, and the configuration is not limited herein. Of course, the more inverters, the longer the time.

The phase detection module 122 has a first input terminal, a second input terminal, and an output terminal. A first input terminal of the phase detection module 122 is coupled to the output terminal of the first delay unit 11, a second input terminal of the phase detection module 122 is coupled to the output terminal of the second delay module 121, and an output terminal of the phase detection module 122 is coupled to the detection unit 13 and the variable capacitor Cc of the second delay module 121. The phase detecting module 122 may receive the first clock signal D1 and the second clock signal D2, and adjust a capacitance value of the variable capacitor Cc according to a relationship between a first delay time Δ t1 corresponding to the first clock signal D1 and a second delay time Δ t2 corresponding to the second clock signal D2, so as to adjust the second clock signal D2 output by the second delay module 121 until the delay-locked loop unit 12 reaches a locked state.

Specifically, the phase detection module 122 may decrease the capacitance value of the variable capacitor Cc when determining that the first delay time Δ t1 corresponding to the first clock signal D1 is less than the second delay time Δ t2 corresponding to the second clock signal D2; when it is determined that the first delay time Δ t1 corresponding to the first clock signal D1 is greater than the second delay time Δ t2 corresponding to the second clock signal D2, the capacitance value of the variable capacitance Cc is increased.

The phase detection module 122 includes a phase frequency detector PFD, a charge pump CP, a charge-discharge module 1221, an analog-to-digital converter ADC, and a variable capacitance control module 1222, which are coupled in sequence, for example, but the present application is not limited thereto, and the phase detection module 122 may also adopt other structures.

In particular, the phase frequency detector PFD has a first input, a second input, a first output and a second output. The first input terminal of the phase frequency detector PFD is used as the first input terminal of the phase detection module 122 or coupled to the first input terminal of the phase detection module 122, and coupled to the output terminal of the first delay unit 11, the second input terminal of the phase frequency detector PFD is used as the second input terminal of the phase detection module 122 or coupled to the second input terminal of the phase detection module 122, and coupled to the output terminal of the second delay module 121, the first output terminal of the phase frequency detector PFD is coupled to the first input terminal of the charge pump CP, and the second output terminal of the phase frequency detector PFD is coupled to the second input terminal of the charge pump CP.

The phase frequency detector PFD may receive the first clock signal D1 output by the first delay unit 11 and the second clock signal D2 output by the second delay module 121, and output a corresponding first control signal and a corresponding second control signal according to a relationship between a first delay time Δ t1 corresponding to the first clock signal D1 and a second delay time Δ t2 corresponding to the second clock signal.

The charge pump CP has a first input, a second input and an output. A first input terminal of the charge pump CP is coupled to a first output terminal of the phase frequency detector PFD, a second input terminal of the charge pump CP is coupled to a second output terminal of the phase frequency detector PFD, and an output terminal of the charge pump CP is coupled to the charge and discharge module 1221.

The charge pump CP may receive the first control signal and the second control signal output by the phase frequency detector PFD, and charge or discharge the charge-discharge module 1221 according to the first control signal and the second control signal.

Specifically, the charge pump CP may charge the charge-discharge module 1221 when the received first control signal is at a high level and the received second control signal is at a low level; when the received first control signal is at a low level and the second control signal is at a high level, the charge-discharge module 1221 is discharged.

However, the present application is not limited thereto, and in other embodiments, the charge pump CP may also be configured to discharge the charge-discharge module 1221 when the received first control signal is at a high level and the received second control signal is at a low level; when the received first control signal is at a low level and the second control signal is at a high level, the charge-discharge module 1221 is charged.

It can be understood that when the charge pump CP performs the charge and discharge operation on the charge and discharge module 1221, the analog voltage signal output by the subsequent charge and discharge module 1221 changes accordingly, and the detection unit 13 performing the touch detection and the variable capacitance control module 1222 performing the variable capacitance control depending on the analog voltage signal output by the charge and discharge module 1221 also need to perform adaptive changes, for example, perform the touch detection and the variable capacitance control by using opposite logic operation methods.

Referring to fig. 2, the charge pump CP includes a charging submodule 201 and a discharging submodule 202 as an example, but the present application is not limited thereto, and the charge pump CP may have other structures.

The charging submodule 201 has an input and an output. The input terminal of the charging sub-module 201 is used as the first input terminal of the charge pump CP or coupled to the first input terminal of the charge pump CP, and is coupled to the first output terminal of the phase frequency detector PFD, and the output terminals of the charging sub-module 201 are coupled to the output terminal of the charge pump CP and the charging and discharging module 1221, respectively. The charging submodule 201 may charge the charging and discharging module 1221 under the control of receiving the first control signal QA output from the first output terminal of the phase frequency detector PFD, so as to increase the voltage at the charging and discharging module 1221.

In this embodiment, the charging submodule 201 includes a charging control switch S1 and a first current source I1. A first terminal of the charge control switch S1 is coupled to the first terminal of the first current source I1, a second terminal of the charge control switch S1 is coupled to the charge/discharge module 1221, and a control terminal of the charge control switch S1 is coupled to the first output terminal of the phase frequency detector PFD; a second terminal of the first current source I1 is coupled to a supply voltage VDD. In other embodiments, the charging submodule 201 may also adopt other structures, which is not limited herein.

The discharge sub-module 202 has an input and an output. The input terminal of the discharging submodule 202 serves as the second input terminal of the charge pump CP or is coupled to the second input terminal of the charge pump CP, and is coupled to the second output terminal of the phase frequency detector PFD, and the output terminals of the discharging submodule 202 are coupled to the output terminal of the charge pump CP and the charging and discharging module 1221, respectively. The discharging sub-module 202 may discharge the charge and discharge module 1221 under the control of receiving the second control signal QB output by the second output terminal of the phase frequency detector PFD, so that the voltage at the charge and discharge module 1221 is decreased.

In this embodiment, the discharging submodule 202 includes a discharging control switch S2 and a second current source I2. A first terminal of the discharge control switch S2 is coupled to the first terminal of the second current source I2, a second terminal of the discharge control switch S1 is coupled to the charge/discharge module 1221, and a control terminal of the discharge control switch S2 is coupled to the second output terminal of the phase frequency detector PFD; the second terminal of the second current source I2 is grounded. In other embodiments, the discharge sub-module 202 may also have other structures, which are not limited herein.

In this embodiment, the charging and discharging module 1221 includes a capacitor C. The first end of the capacitor C is used as the output end of the charge and discharge module 1221 or coupled to the output end of the charge and discharge module 1221, and is further coupled to the output end of the charge pump CP and the input end of the analog-to-digital converter ADC, respectively, and the second end of the capacitor C is grounded. In other embodiments, the charge and discharge module 1221 may also adopt other structures, which is not limited herein.

The analog-to-digital converter ADC has an input and an output. The input terminal of the analog-to-digital converter ADC is coupled to the charging and discharging module 1221, and the output terminal of the analog-to-digital converter ADC is coupled to the input terminal of the variable capacitance control module 1222 and the input terminal of the detecting unit 13, respectively. The ADC may collect an analog voltage signal at the charging and discharging module 1221, and convert the collected analog voltage signal into a corresponding digital signal. However, the present application is not limited thereto, and the analog-to-digital converter ADC may also be implemented by using other components capable of converting an analog signal into a digital signal, such as a single chip, and the like, which is not limited herein.

The variable capacitance control module 1222 has an input and an output. An input of the variable capacitance control module 1222 is coupled to an output of the analog-to-digital converter ADC, and an output of the variable capacitance control module 1222 is coupled to the second delay module 121. The variable capacitance control module 1222 may receive the digital signal output by the ADC, and increase or decrease the capacitance value of the variable capacitance Cc in the second delay module 121 to the capacitance value corresponding to the received digital signal according to the correspondence between the digital signal and the variable capacitance value.

In practical applications, the variable capacitance control module 1222 may be implemented by a control chip or a controller (e.g., PLC), etc., without limitation.

The detection unit 13 may determine whether a touch occurs according to the digital signal output by the analog-to-digital converter ADC. Specifically, the detection unit 13 may process the digital signal and determine whether a touch occurs according to a corresponding processing result. In some embodiments, the processing operation performed by the detection unit 13 on the digital signal may include, but is not limited to, at least one of an integration process, an enlargement or reduction process, and a filtering process.

The phase detection module 122 is described above by taking the example that the phase detection module 122 includes the phase frequency detector PFD, the charge pump CP, the charge and discharge module 1221, the analog-to-digital converter ADC, and the variable capacitance control module 1222. However, the invention is not limited thereto, and in other embodiments, the phase detection module 122 may have other structures.

For example, the phase detection module 122 may also include only the phase frequency detector PFD, the charge pump CP, the charge and discharge module 1221, and not include the analog-to-digital converter ADC and the variable capacitance control module 1222.

In other words, the analog voltage signal output by the charge/discharge module 1221 may be directly used as a control signal for adjusting the capacitance value of the variable capacitor Cc, and the detection unit 13 may also directly detect a touch according to the analog voltage signal output by the charge/discharge module 1221, which is not limited herein.

In a specific implementation, not only whether a touch operation is performed or not, but also other touch parameters can be detected, where the touch parameters may include at least one of the following: touch strength, touch frequency, etc., without limitation.

Optionally, the detecting the touch directly according to the analog voltage signal output by the charging and discharging module 1221 may include the following steps:

detecting whether the analog voltage signal is in a preset voltage range or not;

and determining that the touch operation exists when the analog voltage signal is in the preset voltage range.

Wherein, the preset voltage range can be preset or default to the system. The analog voltage signal may be an analog voltage signal at a time or an analog voltage signal over a period of time.

In the specific implementation, whether the analog voltage signal is in the preset voltage range or not is detected, and if the analog voltage signal is in the preset voltage range, the touch operation is determined to exist, otherwise, the touch operation does not exist.

Optionally, when the analog voltage signal includes a plurality of analog voltage signals, and each analog voltage signal corresponds to a touch time, the method may further include the following steps:

determining an absolute value of a difference value between two adjacent analog voltage signals in the plurality of analog voltage signals to obtain a plurality of absolute values;

determining target standard deviations of the plurality of absolute values, and determining a target stability coefficient according to the target standard deviations;

determining the duration between each touch moment in the plurality of touch moments and a preset moment to obtain a plurality of durations;

determining a plurality of weights according to the plurality of durations, wherein the shorter the duration is, the larger the weight is;

performing weighting operation according to the plurality of analog voltage signals and the plurality of weights to obtain a first analog voltage signal;

determining a second analog voltage signal according to the target stability coefficient and the first analog voltage signal;

and determining the touch force according to the second analog voltage signal.

In this embodiment of the application, the preset time may be a time at which the touch tends to be stable in the touch process or a current time, for example, M adjacent analog voltage signals may be obtained, and if a standard deviation of the M analog voltage signals is smaller than a set value, a time of one analog voltage signal of the M analog voltage signals is taken as the preset time, where M is an integer greater than 2. The set value may be preset or system default.

In specific implementation, the plurality of analog voltage signals can be arranged according to time sequence, the absolute value of the difference value between two adjacent analog voltage signals in the plurality of analog voltage signals can be determined, the plurality of absolute values are obtained, the two adjacent analog voltage signals reflect the change of the touch degree, and the touch is often a gradual and stable process by combining with practical life experience.

Furthermore, target standard deviations of a plurality of absolute values can be determined, and a target stability coefficient can be determined according to the target standard deviations, that is, in life, since touch is not stable and unchangeable in the touch process, for example, when a mobile phone is unlocked, the force is also changed, and certainly, the touch is also small first and then large, and is stable step by step and gradual. The standard deviation reflects the fluctuation condition in the touch process, the smaller the standard deviation is, the smaller the stability is, and the larger the standard deviation is, the worse the stability is. A mapping relationship between a preset standard deviation and a stability coefficient may be stored in advance, and a target stability coefficient corresponding to the target standard deviation may be determined based on the mapping relationship. The value range of the stability coefficient can be set to-0.2.

Furthermore, the duration between each touch moment in the multiple touch moments and the preset moment can be determined to obtain multiple durations, multiple weights are determined according to the multiple durations, the shorter the duration is, the larger the weight is, otherwise, the longer the duration is, the smaller the weight is, that is, the closer to the stable touch of the user is, the closer to the real situation is the analog voltage signal at the moment, and therefore, the larger weight can be adapted.

Furthermore, a weighting operation can be performed according to the plurality of analog voltage signals and the plurality of weights to obtain a first analog voltage signal, and a second analog voltage signal can be determined according to the target stability coefficient and the first analog voltage signal, specifically:

second analog voltage signal (1+ target stability factor) first analog voltage signal

And finally, determining the touch strength corresponding to the second analog voltage signal according to a pre-stored mapping relation between the preset analog voltage signal and the touch strength. Therefore, the touch force can be accurately determined based on the touch behavior of the user.

The touch detection circuit in the embodiment of the application has the advantages that the circuit structure is simple, no noise integral exists, and compared with the existing touch detection circuit with a complex structure, the circuit noise can be obviously reduced, and the touch detection precision is improved.

Meanwhile, the touch detection circuit in the embodiment of the present application implements a sigma-delta loop (sigmaldtaloop) function, and is composed of a subtractor composed of a phase frequency detector PFD, an integrator composed of a charge pump CP, an analog-to-digital converter ADC, and an analog-to-digital converter DAC composed of a variable capacitance control module 1222, and after shaping and filtering noise of the analog-to-digital converter ADC, circuit noise can be well suppressed. Meanwhile, noises of a subtracter formed by the phase frequency detector PFD, an integrator formed by the charge pump CP and an input reference clock signal CLK can be suppressed through low-pass filtering, so that circuit noise is further reduced, and the touch detection precision is improved.

Fig. 3 and 4 show timing diagrams of related signals of a touch detection circuit in an embodiment of the present application.

Referring to fig. 3 and 4 in conjunction with fig. 1 and 2, the first delayed signal D1 generated by the first delay unit 11 is output to a first input terminal of the delay-locked loop unit 12, and the second delayed signal D2 generated by the second delay module 121 in the delay-locked loop unit 12 is output to a second input terminal of the delay-locked loop unit 11.

Then, the dll unit 12 compares the received first delay signal D1 with the second delay signal D2 to determine a relationship between a first delay time Δ t1 corresponding to the first delay signal D1 output by the first delay unit 11 and a second delay time Δ t2 corresponding to the second delay signal D2 output by the second delay module 121, and outputs a corresponding output signal according to a relationship between the first delay time Δ t1 being less than the second delay time Δ t 2.

Specifically, when the first delay time Δ t1 is less than the second delay time Δ t2, in a time period corresponding to a time difference Δ Φ 1 between the second delay time Δ t2 and the first delay time Δ t1 (Δ t2- Δ t1), the first control signal QA corresponding to the first output terminal of the phase frequency detector PFD in the delay-locked loop unit 12 is a high level signal, and the second control signal QB output by the second output terminal of the phase frequency detector PFD is a low level signal, which is specifically shown in fig. 3.

When the first control signal QA is a high level signal and the second control signal QB is a low level signal, the charging submodule 201 in the charge pump CP is turned off, and the discharging submodule 202 is turned on.

When the charging submodule 201 is turned on, the charging control switch S1 is turned on, and the first current source I1 starts to charge the capacitor C, so that the voltage at the first end of the capacitor C continuously rises until the first control signal QA output by the first output terminal of the phase frequency detector PFD is the same as the second control signal QB output by the second output terminal of the phase frequency detector PFD, and the charging operation on the capacitor C is finished. That is, during the time period Δ Φ 1 ═ (Δ t2- Δ t1), the charging submodule 201 performs a charging operation on the capacitor C.

On the contrary, when the first delay time Δ t1 is greater than the second delay time Δ t2, in a time period corresponding to a time difference Δ Φ 2 between the first delay time Δ t1 and the second delay time Δ t2 (Δ t1- Δ t2), the first control signal QA output by the first output terminal of the phase frequency detector PFD in the delay-locked loop unit 12 is a low level signal, and the second control signal QB output by the second output terminal of the phase frequency detector PFD is a high level signal, which is specifically shown in fig. 4.

When the first control signal QA is a low level signal and the first control signal QB is a high level signal, the discharging submodule 201 in the charge pump CP is turned on, and the charging submodule 202 is turned off.

When the discharging submodule 201 is turned on, the discharging control switch S2 is closed, and the second current source I2 discharges the capacitor C, so that the voltage Vout at the first end of the capacitor C continuously drops until the first control signal QA output by the first output terminal of the phase frequency detector PFD is the same as the first control signal QB output by the first output terminal of the phase frequency detector PFD, and the discharging operation on the capacitor C is finished, that is, the discharging submodule 202 discharges the capacitor C within the time period Δ Φ 2 (Δ t1- Δ t 2).

In the above process, the analog-to-digital converter ADC collects the analog voltage signal Vout at the first end of the capacitor C, converts the collected analog voltage signal Vout into a corresponding digital signal, and outputs the digital signal to the variable capacitor control module 1222 and the detection unit 13.

The detection unit 13 may receive the digital signal output by the analog-to-digital converter ADC, process the received digital signal, and determine whether a touch occurs according to a corresponding processing result.

When receiving the digital signal output by the ADC, the variable capacitance control module 1222 determines the capacitance value of the variable capacitor corresponding to the digital signal according to the preset corresponding relationship between the digital signal and the capacitance value of the variable capacitor, and controls the capacitance value of the variable capacitor to increase or decrease to the capacitance value corresponding to the digital signal, so as to increase or decrease the second delay time Δ t2 corresponding to the second clock signal D2 output by the second delay module 121.

The above-described operations are repeated until the delay locked loop unit 12 reaches the locked state. When the phase detection module 122 determines that the first delay time Δ t1 corresponding to the first clock signal D1 output by the first delay unit 11 is greater than the second delay time Δ t2 corresponding to the second clock signal D2 output by the second delay module 121 at a certain time, the phase detection module 12 reaches the locked state, that is, the capacitance value of the variable capacitor Cc is increased to a corresponding capacitance value, and when the capacitance value of the variable capacitor Cc is increased to a corresponding capacitance value, it is found that the second delay time Δ t2 corresponding to the second clock signal D2 output by the second delay module 121 is conversely greater than the first delay time Δ t1 corresponding to the first clock signal D1 output by the first delay unit 11, and the capacitance value of the variable capacitor Cc needs to be decreased. This is repeated to indicate that the delay locked loop unit 12 has reached the locked state.

The operation method of the touch detection circuit in the embodiment of the present application is described above by taking an example in which the capacitor C is charged when the first delay time Δ t1 is smaller than the second delay time Δ t2, and the capacitor C is discharged when the first delay time Δ t1 is larger than the second delay time Δ t 2. In other embodiments, the capacitor C may be discharged when the first delay time Δ t1 is smaller than the second delay time Δ t2, and the capacitor C may be charged when the first delay time Δ t1 is greater than the second delay time Δ t2, which may be set by a person skilled in the art according to actual needs, and is not limited herein.

It is understood that, when the charge/discharge operation logic of the capacitor C is changed, the detection logic of the subsequent detection unit 13 and the control logic of the variable capacitance control module 1222 are also changed accordingly, please refer to the description of the corresponding parts, and will not be described again.

The application also provides a touch device which comprises the touch detection circuit. For the touch detection circuit, please refer to the media of the foregoing parts, which are not described in detail.

The touch device may be a capacitive touch device, such as a mutual capacitive touch device or a self capacitive touch device.

In a mutual capacitance-based touch system, a touch screen can include, for example, drive and sense regions, such as drive lines (or drive electrodes) and sense lines (or detection electrodes). As one example, the drive lines can form multiple rows and the sense lines can form multiple columns (e.g., orthogonal). Touch pixels can be disposed at intersections of rows and columns. During operation, the rows can be stimulated with an alternating current signal (AC) waveform, and mutual capacitances can be formed between rows and columns of the touch pixels. When an object is in proximity to the touch pixel, some of the charge coupled between the rows and columns of the touch pixel may instead be coupled to the object. This reduction in charge coupled onto the touch pixel can result in a net reduction in the mutual capacitance between rows and columns and a reduction in the AC waveform coupled onto the touch pixel. This reduction in the charge-coupled AC waveform can be detected and measured by a touch system to determine whether there is a touch, and the location of the object on the touch screen.

For the mutual capacitance type touch screen, the capacitance to be detected is formed by a detection electrode and a driving electrode on the mutual capacitance type touch screen.

In contrast, in a self-capacitance based touch system, each touch pixel can be formed by an individual electrode that forms a self-capacitance to ground. When an object is close to the touch pixel, another capacitance to ground (capacitance to ground) may be formed between the object and the touch pixel. The further capacitance to ground may result in a net increase in the self-capacitance experienced by the touch pixel. This increase in self-capacitance can be detected and measured by the touch system to determine whether there is a touch, and the location of the object when touching the touch screen. For the self-capacitance touch screen, the capacitance to be detected is formed by the detection electrode on the touch screen and the ground, or the capacitance to be detected is formed by the detection electrode on the touch screen and an external object. Such as, but not limited to, a conductive object such as a user's finger.

The touch panel of the touch device can be a touch screen externally hung above the display panel, and can also be integrated in the display panel (Incell), and the like, and the technical schemes are within the protection scope of the application.

The embodiment of the application also provides electronic equipment which can comprise the touch device.

Referring to fig. 5, fig. 5 is a schematic flow chart of a touch detection method according to an embodiment of the present disclosure, and as shown in the figure, the touch detection method is applied to an electronic device including the touch detection circuit or the touch device, and the touch detection method includes:

501. according to whether the analog voltage signal output by the charging and discharging module is in a preset voltage range or not;

502. and determining that the touch operation exists when the analog voltage signal is in the preset voltage range.

In the specific implementation, whether the analog voltage signal is in the preset voltage range or not is detected, and if the analog voltage signal is in the preset voltage range, the touch operation is determined to exist, otherwise, the touch operation does not exist. Of course, the function of preventing false touch can also be realized by setting the preset voltage range.

a1, determining the absolute value of the difference between two adjacent analog voltage signals in the plurality of analog voltage signals to obtain a plurality of absolute values;

a2, determining target standard deviations of the absolute values, and determining a target stability coefficient according to the target standard deviations;

a3, determining the duration between each touch moment in the multiple touch moments and a preset moment to obtain multiple durations;

a4, determining a plurality of weights according to the plurality of durations, wherein the shorter the duration is, the larger the weight is;

a5, performing weighting operation according to the analog voltage signals and the weights to obtain a first analog voltage signal;

a6, determining a second analog voltage signal according to the target stability coefficient and the first analog voltage signal;

and A7, determining the touch strength according to the second analog voltage signal.

According to the touch detection method described in the embodiment of the application, the touch operation is determined to exist according to whether the analog voltage signal output by the charge and discharge module is within the preset voltage range or not, and the touch operation can be realized and in addition, the false touch operation can be prevented.

In accordance with the foregoing embodiments, please refer to fig. 6, where fig. 6 is a schematic structural diagram of an electronic device provided in an embodiment of the present application, and as shown in the drawing, the electronic device includes a processor, a memory, a touch detection circuit, a communication interface, and one or more programs, and the one or more programs are applied to the electronic device, and the one or more programs are stored in the memory and configured to be executed by the processor, and in an embodiment of the present application, the programs include instructions for performing the following steps:

detecting whether the analog voltage signal output by the charge-discharge module is in a preset voltage range or not;

Optionally, when the analog voltage signal includes a plurality of analog voltage signals, and each analog voltage signal corresponds to a touch time, the program further includes instructions for executing the following steps:

and determining the touch force according to the second analog voltage signal.

The electronic equipment described in the embodiment of the application determines that touch operation exists according to whether the analog voltage signal output by the charging and discharging module is within the preset voltage range or not, and determines that touch operation exists when the analog voltage signal is within the preset voltage range, so that touch detection can be realized, and in addition, false touch operation can be prevented.

Fig. 7 is a block diagram of functional units of a touch detection device 700 according to an embodiment of the present application. The touch detection device 700 is applied to an electronic device, and the device 700 includes: a detection unit 701 and a determination unit 702, wherein,

the detection unit 701 is configured to detect whether an analog voltage signal output by the charge and discharge module is within a preset voltage range;

the determining unit 702 is configured to determine that a touch operation exists when the analog voltage signal is in the preset voltage range.

Optionally, when the analog voltage signal includes a plurality of analog voltage signals, and each analog voltage signal corresponds to a touch time, the apparatus 700 is specifically configured to:

and determining the touch force according to the second analog voltage signal.

The touch detection device described in the embodiment of the application determines that touch operation exists according to whether the analog voltage signal output by the charge and discharge module is within the preset voltage range or not, and determines that touch operation exists when the analog voltage signal is within the preset voltage range, so that touch detection can be realized, and in addition, false touch operation can be prevented.

It can be understood that the functions of each program module of the touch detection apparatus in this embodiment may be specifically implemented according to the method in the foregoing method embodiment, and the specific implementation process may refer to the related description of the foregoing method embodiment, which is not described herein again.

It should be understood that the electronic device of the embodiments of the present application may include, but is not limited to, a smart phone, a tablet, a computer, a laptop, a smart wearable device, a smart door lock, and the like. In order to realize the basic functions of the electronic device, the electronic device in the embodiments of the present application may include other necessary modules or components in addition to the modules or components illustrated above. Taking the electronic device as a smart phone as an example, it may further include a communication module, a speaker, a microphone, a battery, and the like.

The detection unit may be an integrated circuit chip having signal processing capability. In the implementation process, the steps performed by the detection unit may be implemented by hardware integrated logic circuits in the processor or instructions in the form of software. The detection unit may be a general-purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, a discrete Gate or transistor logic device, or a discrete hardware component. The various methods, steps, and logic blocks disclosed in the embodiments of the present application may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present application may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in a memory, and a processor reads information in the memory and completes the steps of the method in combination with hardware of the processor.

Although the present application is disclosed above, the present application is not limited thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present disclosure, and it is intended that the scope of the present disclosure be defined by the appended claims.

Embodiments of the present application also provide a computer storage medium, wherein the computer storage medium stores a computer program for electronic data exchange, the computer program enables a computer to execute part or all of the steps of any one of the methods described in the above method embodiments, and the computer includes an electronic device.

Embodiments of the present application also provide a computer program product comprising a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods as described in the above method embodiments. The computer program product may be a software installation package, the computer comprising electronic equipment.

It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the application. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required in this application.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the above-described division of the units is only one type of division of logical functions, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of some interfaces, devices or units, and may be an electric or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated unit may be stored in a computer readable memory if it is implemented in the form of a software functional unit and sold or used as a stand-alone product. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a memory, and including several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the above-mentioned method of the embodiments of the present application. And the aforementioned memory comprises: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.

Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by associated hardware instructed by a program, which may be stored in a computer-readable memory, which may include: flash Memory disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.

The foregoing detailed description of the embodiments of the present application has been presented to illustrate the principles and implementations of the present application, and the above description of the embodiments is only provided to help understand the method and the core concept of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims

1. A touch detection circuit is characterized by comprising a first delay unit, a delay phase-locked loop unit and a detection unit which are sequentially coupled; the delay phase-locked loop unit comprises a phase discrimination module and a second delay module; the phase discrimination module comprises a first input end, a second input end and an output end; a first input end of the phase detection module is coupled to an output end of the first delay unit, a second input end of the phase detection module is coupled to an output end of the second delay module, and an output end of the phase detection module is coupled to the second delay module and the detection unit;

2. The touch detection circuit of claim 1, wherein the first delay cell comprises a first inverter, a second inverter, and the capacitance under test;

3. The touch detection circuit of claim 1, wherein the second delay module comprises a third inverter, a fourth inverter, and the variable capacitance;

4. The touch detection circuit of claim 1,

the phase detection module is suitable for reducing the capacitance value of the variable capacitor when determining that the first delay time corresponding to the first clock signal is smaller than the second delay time corresponding to the second clock signal; and when the first delay time corresponding to the first clock signal is determined to be greater than the second delay time corresponding to the second clock signal, increasing the capacitance value of the variable capacitor.

5. The touch detection circuit of claim 1, wherein the phase detection module comprises a phase frequency detector, a charge pump, and a charge-discharge module coupled in sequence;

6. The touch detection circuit of claim 5,

the phase frequency detector is suitable for outputting a corresponding first control signal to be at a high level and a corresponding second control signal to be at a low level when the first delay time of the first clock signal is less than the second delay time of the second clock signal; when the first delay time of the first clock signal is greater than the second delay time of the second clock signal, outputting a corresponding first control signal as a low level and outputting a corresponding second control signal as a high level;

the charge pump is suitable for charging the charge-discharge module when the received first control signal is at a high level and the received second control signal is at a low level; when the received first control signal is at a low level and the second control signal is at a high level, discharging the charge-discharge module;

or the charge pump is suitable for discharging the charge-discharge module when the received first control signal is at a high level and the received second control signal is at a low level; and when the received first control signal is at a low level and the second control signal is at a high level, charging the charge-discharge module.

7. The touch detection circuit of claim 5, wherein the phase detection module further comprises an analog-to-digital converter and a variable capacitance control module;

8. The touch detection circuit of any of claims 5 to 7, wherein the charge pump comprises a discharge submodule and a charge submodule;

9. A touch device comprising a touch detection circuit according to any one of claims 1-8.

10. An electronic device characterized by comprising the touch device of claim 8.