CN114329108A - Production condition analysis method and system based on chip functional circuit simulation test - Google Patents
Production condition analysis method and system based on chip functional circuit simulation test Download PDFInfo
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Abstract
The application relates to a production condition analysis method and a system based on chip functional circuit simulation test, which relates to a chip test technology, wherein the production condition analysis method based on the chip functional circuit simulation test comprises the steps of obtaining a simulation test result and a simulation procedure comparison table; obtaining a specific fault procedure according to the simulation test result and the simulation procedure comparison table; judging a specific fault procedure to obtain a specific fault step; and analyzing the specific fault step to obtain an analysis result. The method has the effect of reflecting the problems in the chip production process.
Description
Technical Field
The application relates to a chip testing technology, which belongs to the field of electric digital data processing; in particular to a production condition analysis method and a system based on chip functional circuit simulation test.
Background
Chips are also referred to as integrated circuits, which are a way in electronics to miniaturize circuits and are often fabricated on a semiconductor wafer surface; the circuit typically includes electrical components such as semiconductor devices and passive components.
The manufacturing process of the chip is complex, generally a wafer silicon wafer is produced firstly, then photoetching and doping are carried out on the silicon wafer, and the characteristics of a silicon transistor are endowed through ion implantation; finally, packaging, and then testing the packaged chip; in the testing process, all functional modules on the chip are tested, and if the testing is successful, the chip can be directly packaged and sold.
In view of the above-mentioned related technologies, the inventors found that, after a test result is obtained by testing a chip, problems in the chip production process can be reflected by analyzing the test result.
Disclosure of Invention
The application provides a production condition analysis method and system based on chip functional circuit simulation test, which has the characteristic of reflecting problems in the chip production process.
The method aims to provide a production condition analysis method based on chip functional circuit simulation test.
The above object of the present application is achieved by the following technical solutions:
a production condition analysis method based on chip functional circuit simulation test comprises the following steps:
acquiring a simulation test result and a simulation procedure comparison table;
obtaining a specific fault procedure according to the simulation test result and the simulation procedure comparison table;
judging a specific fault procedure to obtain a specific fault step;
and analyzing the specific fault step to obtain an analysis result.
By adopting the technical scheme, the specific fault procedure is obtained according to the simulation test result, so that the problem of which procedure is generated in the chip manufacturing process can be obtained, the problem of which step is generated can be obtained after the specific fault procedure is judged, and the problem of which part of the chip production line is generated can be obtained after the step with the problem is analyzed, so that the problem in the chip production process is analyzed, the production quality and the production efficiency of the chip are improved, and the possibility of the error generation in the chip manufacturing process is reduced.
The present application may be further configured in a preferred example to: the step of obtaining the simulation test result comprises the step of obtaining big data of the simulation test result by using a crawler.
In a preferred example, the present application may be further configured to, before obtaining the simulation process comparison table, construct and store the simulation process comparison table, where the step of constructing and storing the simulation process comparison table includes:
obtaining each procedure in the chip production process;
obtaining functional information corresponding to each procedure according to each procedure;
the simulation test result comprises a function test result obtained after a plurality of function modules are tested, and the function modules comprise function information;
obtaining a corresponding relation between a function test result and a procedure according to the function information;
and constructing a simulation procedure comparison table according to the function test result, the procedure and the corresponding relation between the function test result and the procedure, and storing the constructed simulation procedure comparison table in a database.
In a preferred example, the step of obtaining the specific faulty process according to the simulation test result and the simulation process look-up table may further include:
obtaining a function test result according to the simulation test result;
judging the function test result to obtain a fault function test result corresponding to the fault function module;
and obtaining a specific fault procedure according to the fault function test result and the simulation procedure comparison table.
In a preferred example of the present application, the step of obtaining the specific failure step after determining the specific failure process includes:
a step comparison table of the working procedures is called;
and obtaining a plurality of specific fault steps according to the specific fault procedures and the procedure step comparison table.
In a preferred example, the step of analyzing the specific failure step to obtain an analysis result may further include:
classifying the specific fault steps and acquiring the quantity value of each type of specific fault step;
comparing the quantity value with a preset quantity threshold, and if the quantity value is smaller than the quantity threshold, removing the specific fault of the type corresponding to the quantity value;
if the quantity value is not less than the quantity threshold value, the specific fault step of the type corresponding to the quantity value is reserved.
In a preferred example, the step of analyzing the specific failure step to obtain the analysis result may further include comparing a number of types corresponding to the specific failure step with a preset alarm threshold, and outputting alarm information if the number is not less than the alarm threshold.
The second purpose of the application is to provide a production condition analysis system based on chip function circuit simulation test.
The second application object of the present application is achieved by the following technical scheme:
a production condition analysis system based on chip functional circuit simulation test comprises:
the calling module is used for acquiring a simulation test result and a simulation procedure comparison table;
the acquisition module is used for acquiring a specific fault procedure according to the simulation test result and the simulation procedure comparison table;
the judging module is used for judging a specific fault procedure to obtain a specific fault step;
and the analysis module is used for analyzing the specific fault steps to obtain an analysis result.
The third purpose of the application is to provide an intelligent terminal.
The third objective of the present application is achieved by the following technical solutions:
an intelligent terminal comprises a memory and a processor, wherein the memory stores computer program instructions of the production condition analysis method based on the chip functional circuit simulation test, which can be loaded and executed by the processor.
It is a fourth object of the present application to provide a computer medium capable of storing a corresponding program.
The fourth application purpose of the present application is achieved by the following technical solutions:
a computer-readable storage medium storing a computer program capable of being loaded by a processor and executing any of the above-described production condition analysis methods based on a chip function circuit simulation test.
In summary, the present application includes at least one of the following beneficial technical effects:
through the analysis and judgment of the simulation test result, which procedure has more problems in the chip production process can be obtained, and then the procedures are analyzed and judged, so that more problems in a specific step in the procedures can be obtained, and further, which part has greater influence on the quality of the chip in the chip manufacturing process can be analyzed; by the analysis processing in this way, the production quality and the production efficiency of the chip can be improved, and the possibility of occurrence of manufacturing errors of the chip can be reduced.
Drawings
Fig. 1 is a schematic flowchart of a method for analyzing a production condition based on a chip functional circuit simulation test in an embodiment of the present application.
Fig. 2 is a schematic structural diagram of a production condition analysis system based on a chip functional circuit simulation test in the embodiment of the present application.
Description of reference numerals: 1. a calling module; 2. an acquisition module; 3. a judgment module; 4. and an analysis module.
Detailed Description
The present embodiment is only for explaining the present application and is not limited to the present application, and those skilled in the art can make modifications without inventive contribution to the present embodiment as needed after reading the present specification, but all of them are protected by patent law within the scope of the claims of the present application.
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The embodiments of the present application will be described in further detail with reference to the drawings attached to the specification.
The application provides a production condition analysis method based on chip functional circuit simulation test, and the main flow of the method is described as follows.
As shown in fig. 1:
step S101: and acquiring a simulation test result and a simulation procedure comparison table.
Step S102: and obtaining a specific fault procedure according to the simulation test result and the simulation procedure comparison table.
Step S103: and judging the specific fault procedure to obtain the specific fault step.
Step S104: and analyzing the specific fault step to obtain an analysis result.
In the manufacturing process of the chip, a plurality of processing procedures are needed to be carried out, and each processing procedure comprises a plurality of processing steps; each processing procedure adds a part of functional modules on the chip, after the chip is manufactured, the chip needs to be subjected to simulation test to detect each function of the chip, and if each function of the chip is normal, the chip is packaged and then sold; however, if a problem occurs in a certain function of the chip, it indicates that the chip has a problem in the processing process, that is, a problem occurs in a certain processing procedure of the chip, and each processing procedure includes a plurality of processing steps; by analyzing and judging a plurality of simulation test results, the processing procedure with problems can be obtained, then further analyzing and judging can be carried out, the problem that some processing steps have problems in the chip production process can be analyzed, the processing steps are detected and processed, and through the mode, the production and processing quality and the production and processing efficiency of the chip can be improved.
If the effect is to be achieved, a simulation test result needs to be obtained first; in the embodiment of the application, the big data of the simulation test result is obtained through the crawler, and then the big data of the simulation test result is analyzed and processed; it is understood that, for the production and processing of chips, which are generally performed on a production line, the probability of problems occurring at each processing step of the chip is small, but the probability is gradually increased with the passage of time, so that analysis and judgment are required through a large number of simulation test results.
Generally, the simulation test result is a simulation waveform, and in the embodiment of the present application, the step of determining the simulation test result is to compare the simulation waveform with a preset standard waveform, so as to obtain a portion of the simulation test result where a problem occurs.
It can be understood that the standard waveform is a test result obtained after a standard chip is subjected to simulation test, and then the waveform of the simulation test result is compared with the standard waveform, so that a part with problems in the simulation test result can be judged; the process of comparing the two waveforms is a common technical means in the related art, and is not described herein again; the simulation test result is a result obtained after a simulation test is performed on the chip, and the purpose is to test each function of the chip, so that the simulation test result can be obtained and comprises a plurality of function test results; comparing the simulation test result with the standard waveform, and judging which function test result is a fault function test result; for example, the simulation test result and the standard waveform are both sine waves, but a third peak of the simulation test result is mutated, it is indicated that the function corresponding to the part is abnormal, that is, the function module corresponding to the part is a fault function module.
After the fault function test result is obtained, a prestored simulation procedure comparison table is called, and then a specific fault procedure can be obtained according to the fault function test result and the simulation procedure comparison table; the simulation procedure comparison table comprises function test results, procedures and corresponding relations between the function test results and the procedures.
It can be understood that the simulation procedure comparison table is pre-stored in the database, and when the simulation procedure comparison table needs to be used, the simulation procedure comparison table is directly called; before the simulation device is used, a simulation procedure storage table needs to be constructed; the simulation procedure storage table can be understood as a function corresponding to each processing procedure in the chip processing process; firstly, acquiring each procedure in the chip production process, and then obtaining functional information corresponding to each procedure according to each procedure; the simulation test result of the chip also comprises a plurality of function test results, each function test result corresponds to one function module, and each function module comprises function information, so that the function test results and the working procedures can be corresponded through the function information, the corresponding relation between the function test results and the working procedures is obtained, and finally, a simulation working procedure comparison table is constructed according to the function test results, the working procedures and the corresponding relation between the function test results and the working procedures, and finally, the table is stored in a database.
It should be noted that the functional modules mentioned in the above process are all virtual modules, i.e. represent a certain function on a chip, and are not specific structures.
After specific fault procedures are obtained according to the simulation test result and the simulation procedure comparison table, which processing procedure has a problem in the chip processing process can be judged, and then the processing procedures need to be further judged.
It can be understood that, in the process of processing the chip, the working personnel have already arranged the processing procedures and the processing steps in advance, and then in the actual processing process, the chip is processed according to the plan; in the embodiment of the present application, the plan is referred to as a process step comparison table, and the process step comparison table can be understood as including a chip processing procedure, a chip processing step, and a correspondence relationship between the processing procedure and the processing step; for example, the chip processing steps include 1, 2, 3 and 4, while processing step 1 includes processing step a and processing step C, processing step 2 includes processing step a and processing step B, processing step 3 includes processing step B and processing step D, and processing step 4 includes processing step C and processing step D; in the processing process of the chip, the processing steps are fixed, and each processing procedure corresponds to different functional modules, so that different processing steps are required.
Through the above process, it can be determined that there is a problem in the processing steps, and in the above example, if there is a problem in the processing steps 1 and 3, it represents that there is a problem in the processing step A, B, C, D; if there is a problem with process sequence 1 and process sequence 2, then this is indicative of a problem with process sequence A, B, B, C; from these two examples, it can be analyzed that when the problems occur in the processing steps 1 and 3, it represents that all the processing steps have problems, but from the practical operation point of view, such a situation is impossible and not practical, and therefore after obtaining a plurality of specific failure steps, further analysis needs to be performed on the specific failure steps.
In the embodiment of the present application, the step of analyzing the specific failure step to obtain the analysis result includes:
1. classifying the specific fault steps and acquiring the quantity value of each type of specific fault step;
2. comparing the quantity value with a preset quantity threshold, if the quantity value is smaller than the quantity threshold, removing the specific fault step of the type corresponding to the quantity value, and if the quantity value is not smaller than the quantity threshold, keeping the specific fault step of the type corresponding to the quantity value;
3. and comparing the number value of the type corresponding to the reserved specific fault step with a preset alarm threshold value, and outputting alarm information if the number value is not less than the alarm threshold value.
After obtaining a plurality of specific fault steps, classifying the plurality of specific fault steps, and then counting the specific fault steps of each type to obtain a quantity value, for example, the number of the steps a is 3, and the number of the steps B is 8; after the quantity value of each type of specific fault step is obtained, comparing the quantity value with a preset quantity threshold, and if the quantity value is smaller than the quantity threshold, removing the specific fault step of the type corresponding to the quantity value; for example, if the quantity threshold is 4, the number of steps A is 3, and the number of steps B is 5, then step A will be eliminated for all the particular failure steps.
It can be understood that, in the simulation test result in the embodiment of the present application, the number of samples is large according to the large data information obtained by the crawler, and then the number threshold is obtained according to the total number of samples, which means that if the number threshold is smaller than the number threshold, the data is abnormal data, which may be data abnormality caused by sudden abnormality in the processing or testing process, and such data does not have universality, so that a plurality of specific fault steps need to be screened to remove the abnormal data.
Then comparing the number value of the type corresponding to the reserved specific fault step with a preset alarm threshold value, and if the number value is not less than the alarm threshold value, alarming; for the specific remaining failure step, the number of types needs to be calculated, for example, the types of the processing step include 10 types such as A, B, C … …, and the alarm threshold is 5, which indicates that when the number of the types of the specific remaining failure step is calculated, if the number of the types of the specific remaining failure step is greater than or equal to 5, it indicates that a problem may occur in the production equipment that processes the chip, and then the processing equipment corresponding to the specific failure step needs to be checked to ensure the production and processing quality of the chip.
By the mode, the problems of the chip in the production and processing process can be reversely solved by analyzing and judging the simulation test result of the chip, the problems possibly existing in the production equipment for processing the chip can be analyzed, the production and processing quality and the production and processing efficiency of the chip are improved, and the possibility of chip manufacturing problems is reduced.
The application also provides a production condition analysis system based on the chip functional circuit simulation test, as shown in fig. 2, the production condition analysis system based on the chip functional circuit simulation test comprises a calling module 1, a simulation module and a simulation process comparison table, wherein the calling module 1 is used for obtaining a simulation test result and a simulation process comparison table; the acquisition module 2 is used for acquiring a specific fault procedure according to the simulation test result and the simulation procedure comparison table; the judging module 3 is used for judging a specific fault procedure to obtain a specific fault step; and the analysis module 4 is used for analyzing the specific fault steps to obtain an analysis result.
In order to better execute the program of the method, the application also provides an intelligent terminal which comprises a memory and a processor.
Wherein the memory is operable to store an instruction, a program, code, a set of codes, or a set of instructions. The memory may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function, instructions for implementing the above-described method for analyzing production conditions based on simulation testing of a functional circuit of a chip, and the like; the storage data area can store data and the like related to the production condition analysis method based on the chip functional circuit simulation test.
A processor may include one or more processing cores. The processor executes or executes the instructions, programs, code sets, or instruction sets stored in the memory, calls data stored in the memory, performs various functions of the present application, and processes the data. The processor may be at least one of an application specific integrated circuit, a digital signal processor, a digital signal processing device, a programmable logic device, a field programmable gate array, a central processing unit, a controller, a microcontroller, and a microprocessor. It is understood that the electronic devices for implementing the above processor functions may be other devices, and the embodiments of the present application are not limited in particular.
The present application also provides a computer-readable storage medium, for example, comprising: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk. The computer readable storage medium stores a computer program that can be loaded by a processor and executes the above-described production situation analysis method based on a chip function circuit simulation test.
The foregoing description is only exemplary of the preferred embodiments of the invention and is provided for the purpose of illustrating the general principles of the technology. It will be appreciated by those skilled in the art that the scope of the disclosure herein is not limited to the particular combination of features described above, but also encompasses other arrangements formed by any combination of the above features or their equivalents without departing from the spirit of the disclosure. For example, the above features may be replaced with (but not limited to) features having similar functions disclosed in the present application.
Claims (10)
1. A production condition analysis method based on chip functional circuit simulation test is characterized by comprising the following steps:
acquiring a simulation test result and a simulation procedure comparison table;
obtaining a specific fault procedure according to the simulation test result and the simulation procedure comparison table;
judging a specific fault procedure to obtain a specific fault step;
and analyzing the specific fault step to obtain an analysis result.
2. The method for analyzing production conditions based on chip functional circuit simulation test as claimed in claim 1, wherein the step of obtaining the simulation test results comprises obtaining the big data of the simulation test results by using a crawler.
3. The method of claim 1, wherein the step of constructing and storing the simulation process comparison table is required before the step of obtaining the simulation process comparison table, and the step of constructing and storing the simulation process comparison table comprises:
obtaining each procedure in the chip production process;
obtaining functional information corresponding to each procedure according to each procedure;
the simulation test result comprises a function test result obtained after a plurality of function modules are tested, and the function modules comprise function information;
obtaining a corresponding relation between a function test result and a procedure according to the function information;
and constructing a simulation procedure comparison table according to the function test result, the procedure and the corresponding relation between the function test result and the procedure, and storing the constructed simulation procedure comparison table in a database.
4. The method for analyzing the production condition based on the chip functional circuit simulation test as claimed in claim 3, wherein the step of obtaining the specific faulty process according to the simulation test result and the simulation process look-up table comprises:
obtaining a plurality of function test results according to the simulation test result;
screening out a fault function test result with an abnormal result from the plurality of function test results;
and obtaining a specific fault procedure according to the fault function test result and the simulation procedure comparison table.
5. The method for analyzing the production condition based on the chip functional circuit simulation test as claimed in claim 1, wherein the step of obtaining the specific fault step after judging the specific fault process comprises:
a step comparison table of the working procedures is called;
the process step comparison table comprises process information, step information and correlation information between the processes;
and obtaining a plurality of specific fault steps according to the specific fault procedures and the procedure step comparison table.
6. The method according to claim 5, wherein the step of analyzing the specific failure step to obtain an analysis result comprises:
classifying the specific fault steps and acquiring the quantity value of each type of specific fault step;
comparing the quantity value with a preset quantity threshold, and if the quantity value is smaller than the quantity threshold, removing the specific fault of the type corresponding to the quantity value;
if the quantity value is not less than the quantity threshold value, the specific fault step of the type corresponding to the quantity value is reserved.
7. The method according to claim 6, wherein the step of analyzing the specific failure step to obtain the analysis result comprises comparing the number of types corresponding to the specific failure step with a preset alarm threshold, and outputting alarm information if the number is not less than the alarm threshold.
8. A production condition analysis system based on chip function circuit simulation test is characterized by comprising:
the calling module (1) is used for acquiring a simulation test result and a simulation procedure comparison table;
the acquisition module (2) is used for acquiring a specific fault procedure according to the simulation test result and the simulation procedure comparison table;
the judging module (3) is used for judging a specific fault procedure to obtain a specific fault step;
and the analysis module (4) is used for analyzing the specific fault steps to obtain an analysis result.
9. An intelligent terminal, comprising a memory and a processor, the memory having stored thereon computer program instructions capable of being loaded by the processor and performing the method of any of claims 1-7.
10. A computer-readable storage medium, in which a computer program is stored which can be loaded by a processor and which executes the method according to any of claims 1-7.
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Inventor after: Hou Weibing Inventor after: Ye Yafei Inventor after: Zhou Libing Inventor before: Hou Weibing Inventor before: Lei Weilong |