CN114328138B - Data display method and device of server, server and storage medium - Google Patents

Data display method and device of server, server and storage medium Download PDF

Info

Publication number
CN114328138B
CN114328138B CN202111546038.5A CN202111546038A CN114328138B CN 114328138 B CN114328138 B CN 114328138B CN 202111546038 A CN202111546038 A CN 202111546038A CN 114328138 B CN114328138 B CN 114328138B
Authority
CN
China
Prior art keywords
server
data
management controller
bmc
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202111546038.5A
Other languages
Chinese (zh)
Other versions
CN114328138A (en
Inventor
林正伟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Inspur Intelligent Technology Co Ltd
Original Assignee
Suzhou Inspur Intelligent Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Inspur Intelligent Technology Co Ltd filed Critical Suzhou Inspur Intelligent Technology Co Ltd
Priority to CN202111546038.5A priority Critical patent/CN114328138B/en
Publication of CN114328138A publication Critical patent/CN114328138A/en
Application granted granted Critical
Publication of CN114328138B publication Critical patent/CN114328138B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The embodiment of the invention relates to a data display method and device of a server, the server and a storage medium, which are applied to the server, wherein the server at least comprises: PCIE multiplexer, BMC base plate management controller, FPGA chip; the output end of the PCIE multiplexer is respectively connected with the BMC baseboard management controller and the FPGA chip; the method comprises the following steps: acquiring the working state of the BMC substrate management controller; determining a data display strategy of the server based on the working state; according to the method, the FPGA chip and the BMC substrate management controller are added to serve as display output equipment together, when one equipment is in a problem, the other equipment can be started to ensure the display function of the server, and even when the BMC substrate management controller is reset, a manager and a maintenance engineer of the service can still use and manage the server, so that the service efficiency and the operation efficiency of the system are improved.

Description

Data display method and device of server, server and storage medium
Technical Field
The embodiment of the invention relates to the field of server control, in particular to a data display method and device of a server, the server and a storage medium.
Background
Nowadays, the server is widely applied to process various operations in the big data age and the artificial intelligence age, and the demands of the server in the market are increasing. The BMC baseboard management controller is an important unit for server management, and can monitor a plurality of sensors, for example: monitoring of temperature, supply voltage, power consumption and other sensors; events of the system may be logged for the server, for example: events such as fan error, power error, system error, etc.; and can manage the whole server, for example: fan management, system throttling control, and the like. An important function of the BMC baseboard management controller is to serve as a display function of the server, so that a manager and a maintenance engineer of the service can operate the server through a display interface.
At present, the display function of the server is to connect PCIE signals to the BMC baseboard management controller through the CPU, connect the function of the display chip inside the BMC baseboard management controller to the VGA display connector through VGA signals, and then use the VGA screen to display the system content on the VGA screen, or connect other computers to the BMC baseboard management controller through the network, and then connect to the remote desktop. The system architecture diagram shown in fig. 1 includes a CPU, a BMC baseboard management controller, a FGPA chip, and a VGA display connector, where a signal of BMC Watchdog exists between the BMC baseboard management controller and the FPGA chip, and the signal is sent to the FPGA chip when the BMC baseboard management controller is operating normally, the FPGA chip determines the operating state of the BMC baseboard management controller through the signal of BMC Watchdog, and when the BMC baseboard management controller cannot operate normally, the signal of BMC Watchdog continuously maintains a high level, and when the FPGA chip receives the signal of BMC Watchdog and is leveled, the FPGA chip determines that the BMC baseboard management controller is abnormal, and then the FPGA chip starts the function of resetting the BMC baseboard management controller, and resets the BMC baseboard management controller through the signal of BMC Reset, so that the BMC baseboard management controller can manage the whole server normally.
Therefore, when the BMC baseboard management controller is abnormal, the BMC baseboard management controller needs to be reset, the system service efficiency is reduced, and when the BMC baseboard management controller is reset, a manager and a maintenance engineer of the service cannot use and manage the server during the reset period of the BMC baseboard management controller, so that the operation efficiency is reduced.
Disclosure of Invention
In view of the above, in order to solve the above technical problems or some of the technical problems, embodiments of the present invention provide a data display method and apparatus for a server, and a storage medium.
In a first aspect, an embodiment of the present invention provides a data display method of a server, which is applied to a server, where the server at least includes: PCIE multiplexer, BMC base plate management controller, FPGA chip;
the output end of the PCIE multiplexer is respectively connected with the BMC baseboard management controller and the FPGA chip;
the method comprises the following steps:
acquiring the working state of the BMC substrate management controller;
determining a data display strategy of the server based on the working state;
and displaying the data to be displayed of the server based on the data display strategy.
In one possible embodiment, the method further comprises:
if the working state is normal, determining that the data display strategy of the server is to take the BMC substrate management controller as display output equipment;
and if the working state is abnormal, determining a data display strategy of the server to take the FPGA chip as display output equipment.
In one possible embodiment, the method further comprises:
if the data display strategy of the server is determined to be that the BMC baseboard management controller is used as a display output device, the PCIE multiplexer is controlled to transmit the data to be displayed to the BMC baseboard management controller, so that the BMC baseboard management controller transmits the data to be displayed to a display device for display;
and if the data display strategy of the server is determined to be that the FPGA chip is used as the display output equipment, controlling the PCIE multiplexer to transmit the data to be displayed to the FPGA chip, so that the FPGA chip transmits the data to be displayed to the display equipment for display.
In one possible embodiment, the method further comprises:
and when the working state of the BMC baseboard management controller is abnormal, controlling the BMC baseboard management controller to reset so as to recover the normal work of the BMC baseboard management controller.
In one possible embodiment, the method further comprises:
and after the BMC is successfully reset, continuing to use the BMC as display output equipment.
In one possible embodiment, the method further comprises:
and if the reset times of the BMC is greater than or equal to a preset reset times threshold, starting a reset failure alarm.
In one possible embodiment, the method further comprises:
acquiring attribute information of the data to be displayed;
and determining a target display output device through which the data to be displayed passes based on the attribute information.
In a second aspect, an embodiment of the present invention provides a data display apparatus of a server, including:
the acquisition module is used for acquiring the working state of the BMC baseboard management controller;
the determining module is used for determining a data display strategy of the server based on the working state;
and the display module is used for displaying the data to be displayed of the server based on the data display strategy.
In a third aspect, an embodiment of the present invention provides a server, including: the server comprises a processor and a memory, wherein the processor is used for executing a data display program of the server stored in the memory so as to realize the data display method of the server in the first aspect.
In a fourth aspect, an embodiment of the present invention provides a storage medium, including: the storage medium stores one or more programs executable by one or more processors to implement the data display method of the server described in the first aspect.
The data display scheme of the server provided by the embodiment of the invention is applied to the server, and the server at least comprises: PCIE multiplexer, BMC base plate management controller, FPGA chip; the output end of the PCIE multiplexer is respectively connected with the BMC baseboard management controller and the FPGA chip; acquiring the working state of the BMC baseboard management controller; determining a data display strategy of the server based on the working state; compared with the prior art that the to-be-displayed data of the server are displayed only through the BMC substrate management controller serving as the display output device, the to-be-displayed data of the server are displayed on the basis of the data display strategy, when the BMC substrate management controller is abnormal, the to-be-displayed data of the server are required to be reset, and when the BMC substrate management controller is reset, a service manager and a maintenance engineer cannot use and manage the server, so that the problem of system service efficiency and operation efficiency reduction is caused.
Drawings
FIG. 1 is a system architecture diagram of a prior art BMC baseboard management controller as a display function for a server;
fig. 2 is a flow chart of a data display method of a server according to an embodiment of the present invention;
fig. 3 is a system architecture diagram of a data display method of a server according to an embodiment of the present invention;
fig. 4 is a flowchart of another method for displaying data of a server according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a data display device of a server according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a server according to an embodiment of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
For the purpose of facilitating an understanding of the embodiments of the present invention, reference will now be made to the following description of specific embodiments, taken in conjunction with the accompanying drawings, which are not intended to limit the embodiments of the invention.
Fig. 2 is a flow chart of a method for displaying data of a server according to an embodiment of the present invention, as shown in fig. 2, where the method specifically includes:
s21, acquiring the working state of the BMC baseboard management controller.
The system architecture of the data display method of the server is shown in fig. 3, and the system architecture comprises a CPU (central processing unit), a PCIE (peripheral component interface express) multiplexer, a BMC (baseboard management controller), an FPGA (field programmable gate array) chip, a VGA (video graphics array) multiplexer and a VGA display connector of the server, wherein the input end of the PCIE multiplexer is connected with the CPU, the output end of the PCIE multiplexer is respectively connected with the input ends of the BMC baseboard management controller and the FPGA chip, the BMC baseboard management controller and the FPGA chip monitor working states mutually through a Watchdog signal, the output ends of the BMC baseboard management controller and the FPGA chip are connected with the VGA multiplexer, and the VGA multiplexer is connected with the VGA display connector.
In the embodiment of the invention, the BMC substrate management controller and the FPGA chip can monitor the working state mutually, the Watchdog signal can be a square wave with the frequency of 100 khz, and the FPGA chip can judge the working state of the BMC substrate management controller through the waveform of the Watchdog signal. Correspondingly, the BMC baseboard management controller can also judge the working state of the FPGA chip by judging the waveform of the Watchdog signal. The waveform of the Watchdog signal normally characterizes the normal working state of the equipment, and the waveform abnormality of the Watchdog signal characterizes the abnormal working state of the equipment.
S22, determining a data display strategy of the server based on the working state.
In the embodiment of the invention, a data display strategy of a server is preset, the data to be displayed is controlled according to the data display strategy, and the data display strategy which is met by the current working state is determined according to the acquired working state of the BMC substrate management controller.
And S23, displaying the data to be displayed of the server based on the data display strategy.
The displaying of the data to be displayed of the server based on the data displaying policy determined in S22, the specific data displaying policy and how to display the data to be displayed will be described in detail by the following examples, which will not be described in detail.
The data to be displayed can be information such as temperature, power supply voltage, power supply power consumption and the like of the server detected by the sensor such as temperature, power supply voltage, power supply power consumption and the like; events recorded to the server system may also be used, for example: events such as fan error, power error, system error, etc.; data may also be managed for the server whole machine, for example: fan management, system throttle control, etc.
The data display method of the server provided by the embodiment of the invention is applied to the server, and the server at least comprises the following steps: PCIE multiplexer, BMC base plate management controller, FPGA chip; the output end of the PCIE multiplexer is respectively connected with the BMC baseboard management controller and the FPGA chip; acquiring the working state of the BMC baseboard management controller; determining a data display strategy of the server based on the working state; compared with the prior art that the to-be-displayed data of the server are displayed only through the BMC baseboard management controller serving as the display output device, the method has the advantages that once the BMC baseboard management controller is abnormal, the to-be-displayed data of the server are required to be reset, and when the BMC baseboard management controller is reset, a service manager and a maintenance engineer cannot use and manage the server, so that the problem of system service efficiency and operation efficiency reduction is caused.
Fig. 4 is a flow chart of another method for displaying data of a server according to an embodiment of the present invention, as shown in fig. 4, where the method specifically includes:
s41, acquiring the working state of the BMC baseboard management controller.
The system architecture of the data display method of the server is shown in fig. 3, and the system architecture comprises a CPU (central processing unit), a PCIE (peripheral component interface express) multiplexer, a BMC (baseboard management controller), an FPGA (field programmable gate array) chip, a VGA (video graphics array) multiplexer and a VGA display connector of the server, wherein the input end of the PCIE multiplexer is connected with the CPU, the output end of the PCIE multiplexer is respectively connected with the input ends of the BMC baseboard management controller and the FPGA chip, the BMC baseboard management controller and the FPGA chip monitor working states mutually through a Watchdog signal, the output ends of the BMC baseboard management controller and the FPGA chip are connected with the VGA multiplexer, and the VGA multiplexer is connected with the VGA display connector.
In the embodiment of the invention, the BMC substrate management controller and the FPGA chip can monitor the working state mutually, the Watchdog signal can be a square wave with the frequency of 100 khz, and the FPGA chip can judge the working state of the BMC substrate management controller through the waveform of the Watchdog signal. Correspondingly, the BMC baseboard management controller can also judge the working state of the FPGA chip by judging the waveform of the Watchdog signal. The waveform of the Watchdog signal normally characterizes the normal working state of the equipment, and the waveform abnormality of the Watchdog signal characterizes the abnormal working state of the equipment.
And S42, if the working state is normal, determining that the data display strategy of the server is to take the BMC substrate management controller as display output equipment.
In the embodiment of the invention, the BMC baseboard management controller can be set as the preferred display output device by default, if the working state of the BMC baseboard management controller is normal, the BMC baseboard management controller can be characterized as the display output device normally, and the data display strategy of the server can be determined to be that the BMC baseboard management controller is taken as the display output device.
And S43, controlling the PCIE multiplexer to transmit the data to be displayed to the BMC baseboard management controller, so that the BMC baseboard management controller transmits the data to be displayed to a display device for displaying.
When the data display strategy of the server is determined to be that the BMC substrate management controller is used as the display output device, an instruction for taking the BMC substrate management controller as the display output device can be sent to the PCIE multiplexer, the PCIE multiplexer is controlled to transmit data to be displayed to the BMC substrate management controller, the BMC substrate management controller transmits the data to be displayed to the VGA multiplexer after receiving the data to be displayed, and then the data to be displayed is transmitted to the VGA display connector, and the VGA display connector displays the data to be displayed.
The data to be displayed can be information such as temperature, power supply voltage, power supply power consumption and the like of the server detected by the sensor such as temperature, power supply voltage, power supply power consumption and the like; events recorded to the server system may also be used, for example: events such as fan error, power error, system error, etc.; data may also be managed for the server whole machine, for example: fan management, system throttle control, etc.
And S44, if the working state is abnormal, determining a data display strategy of the server to take the FPGA chip as display output equipment.
In one possible implementation manner, if the working state of the BMC baseboard management controller is abnormal, the BMC baseboard management controller is characterized as not being able to be used as a display output device, and the data display policy of the server can be determined as taking the FPGA chip as the display output device.
S45, controlling the PCIE multiplexer to transmit the data to be displayed to the FPGA chip, so that the FPGA chip transmits the data to be displayed to display equipment for displaying.
When the data display strategy of the server is determined to be that the FPGA chip is used as the display output device, the FPGA chip can send a data request instruction to the PCIE multiplexer, so that the PCIE multiplexer transmits data to be displayed to the FPGA chip, and further the data to be displayed is transmitted to the VGA multiplexer, the VGA multiplexer transmits the data to be displayed to the VGA display connector, and the VGA display connector displays the data to be displayed.
Optionally, the FPGA chip may be actively connected to the PCIE multiplexer to obtain data to be displayed transmitted by the PCIE multiplexer, and further transmit the data to be displayed to the VGA multiplexer, where the VGA multiplexer transmits the data to be displayed to the VGA display connector, and the VGA display connector displays the data to be displayed.
And S46, when the working state of the BMC baseboard management controller is abnormal, controlling the BMC baseboard management controller to reset so as to recover the normal work of the BMC baseboard management controller.
When the working state of the BMC baseboard management controller is abnormal, the FPGA chip can control the Reset of the BMC baseboard management controller through a Reset signal, so that the BMC baseboard management controller can be restarted to recover the function of the normal management server.
And S47, after the BMC is successfully reset, continuing to use the BMC as a display output device.
In the embodiment of the invention, when the BMC baseboard management controller is reset, the reset state of the BMC baseboard management controller can be obtained in real time, after the BMC baseboard management controller is reset successfully, the FPGA chip can actively close the channel for obtaining the data to be displayed, and the PCIE multiplexer is controlled to transmit the data to be displayed to the BMC baseboard management controller, and the BMC baseboard management controller is continuously used as the display output device.
S48, if the reset times of the BMC is greater than or equal to a preset reset times threshold, starting a reset failure alarm.
In the embodiment of the invention, a reset frequency threshold (for example, 5 times) may be further set, if the reset frequency of the BMC baseboard management controller is greater than or equal to the reset frequency threshold, resetting the BMC baseboard management controller again is canceled, and a reset failure alarm is started to prompt a server manager or a maintenance engineer to repair the fault of the BMC baseboard management controller, wherein the alarm mode may be various modes such as light, sound, etc., and the invention is not limited in particular.
In an alternative scheme of the embodiment of the present invention, a corresponding display output device may be further set according to attribute information of data to be displayed, attribute information of the data to be displayed is first obtained, and a target display output device through which the data to be displayed passes is determined based on the attribute information. The attribute information may be server state data or server system event data, the server state data may be displayed and output by the BMC baseboard management controller, and the server system event data may be displayed and output by the FPGA chip, so as to avoid faults caused by instant receiving of huge data volume by a single display output device.
The data display method of the server provided by the embodiment of the invention is applied to the server, and the server at least comprises the following steps: PCIE multiplexer, BMC base plate management controller, FPGA chip; the output end of the PCIE multiplexer is respectively connected with the BMC baseboard management controller and the FPGA chip; acquiring the working state of the BMC baseboard management controller; determining a data display strategy of the server based on the working state; compared with the prior art that the to-be-displayed data of the server are displayed only through the BMC baseboard management controller serving as the display output device, the method has the advantages that once the BMC baseboard management controller is abnormal, the to-be-displayed data of the server are required to be reset, and when the BMC baseboard management controller is reset, a service manager and a maintenance engineer cannot use and manage the server, so that the problem of system service efficiency and operation efficiency reduction is caused.
Fig. 5 is a schematic structural diagram of a data display device of a server according to an embodiment of the present invention, which specifically includes:
an obtaining module 501, configured to obtain a working state of the BMC baseboard management controller;
a determining module 502, configured to determine a data display policy of a server based on the working state;
and the display module 503 is configured to display data to be displayed of the server based on the data display policy.
In one possible implementation manner, the obtaining module 501 is specifically configured to obtain attribute information of the data to be displayed.
In a possible implementation manner, the determining module 502 is specifically configured to determine that the data display policy of the server is to use the BMC baseboard management controller as a display output device if the working state is normal; and if the working state is abnormal, determining a data display strategy of the server to take the FPGA chip as display output equipment.
In a possible implementation manner, the determining module 502 is further configured to control the BMC baseboard management controller to reset when the working state of the BMC baseboard management controller is abnormal, so as to resume the normal operation of the BMC baseboard management controller.
In a possible implementation manner, the determining module 502 is further configured to continue to use the BMC baseboard management controller as the display output device after the BMC baseboard management controller is successfully reset.
In a possible implementation manner, the determining module 502 is further configured to turn on a reset failure alarm if the number of resets of the BMC baseboard management controller is greater than or equal to a preset number of resets threshold.
In a possible implementation manner, the determining module 502 is further configured to determine, based on the attribute information, a target display output device through which the data to be displayed passes.
In a possible implementation manner, the display module 503 is specifically configured to, if it is determined that the data display policy of the server is to use the BMC baseboard management controller as a display output device, control the PCIE multiplexer to transmit the data to be displayed to the BMC baseboard management controller, so that the BMC baseboard management controller transmits the data to be displayed to a display device for displaying; and if the data display strategy of the server is determined to be that the FPGA chip is used as the display output equipment, controlling the PCIE multiplexer to transmit the data to be displayed to the FPGA chip, so that the FPGA chip transmits the data to be displayed to the display equipment for display.
The data display device of the server provided in this embodiment may be the data display device of the server shown in fig. 5, and may perform all the steps of the data display method of the server shown in fig. 2 and 4, so as to achieve the technical effects of the data display method of the server shown in fig. 2 and 4, and the detailed description with reference to fig. 2 and 4 is omitted herein for brevity.
Fig. 6 is a schematic structural diagram of a server according to an embodiment of the present invention, and a server 600 shown in fig. 6 includes: at least one processor 601, memory 602, at least one network interface 604, and other user interfaces 603. The various components in server 600 are coupled together by a bus system 605. It is understood that the bus system 605 is used to enable connected communications between these components. The bus system 605 includes a power bus, a control bus, and a status signal bus in addition to a data bus. But for clarity of illustration the various buses are labeled as bus system 605 in fig. 6.
The user interface 603 may include, among other things, a display, a keyboard, or a pointing device (e.g., a mouse, a trackball, a touch pad, or a touch screen, etc.).
It is to be appreciated that the memory 602 in embodiments of the invention may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The nonvolatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable EPROM (EEPROM), or a flash Memory. The volatile memory may be random access memory (Random Access Memory, RAM) which acts as an external cache. By way of example, and not limitation, many forms of RAM are available, such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (Double Data Rate SDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), and Direct memory bus RAM (DRRAM). The memory 602 described herein is intended to comprise, without being limited to, these and any other suitable types of memory.
In some implementations, the memory 602 stores the following elements, executable units or data structures, or a subset thereof, or an extended set thereof: an operating system 6021 and application programs 6022.
The operating system 6021 includes various system programs, such as a framework layer, a core library layer, a driver layer, and the like, for implementing various basic services and processing hardware-based tasks. The application 6022 includes various application programs such as a Media Player (Media Player), a Browser (Browser), and the like for realizing various application services. The program for implementing the method of the embodiment of the present invention may be included in the application 6022.
In the embodiment of the present invention, the processor 601 is configured to execute the method steps provided by the method embodiments by calling a program or an instruction stored in the memory 602, specifically, a program or an instruction stored in the application 6022, for example, including:
acquiring the working state of the BMC substrate management controller; determining a data display strategy of the server based on the working state; and displaying the data to be displayed of the server based on the data display strategy.
In one possible implementation manner, if the working state is normal, determining that the data display policy of the server is to take the BMC baseboard management controller as a display output device; and if the working state is abnormal, determining a data display strategy of the server to take the FPGA chip as display output equipment.
In one possible implementation manner, if it is determined that the data display policy of the server is that the BMC baseboard management controller is used as a display output device, the PCIE multiplexer is controlled to transmit the data to be displayed to the BMC baseboard management controller, so that the BMC baseboard management controller transmits the data to be displayed to a display device for displaying; and if the data display strategy of the server is determined to be that the FPGA chip is used as the display output equipment, controlling the PCIE multiplexer to transmit the data to be displayed to the FPGA chip, so that the FPGA chip transmits the data to be displayed to the display equipment for display.
In one possible implementation manner, when the working state of the BMC baseboard management controller is abnormal, the BMC baseboard management controller is controlled to reset so as to resume the normal working of the BMC baseboard management controller.
In one possible implementation, after the BMC baseboard management controller is reset successfully, the BMC baseboard management controller is continued to be used as a display output device.
In one possible implementation manner, if the number of resets of the BMC baseboard management controller is greater than or equal to a preset number of resets threshold, a reset failure alarm is turned on.
In one possible implementation manner, acquiring attribute information of the data to be displayed; and determining a target display output device through which the data to be displayed passes based on the attribute information.
The method disclosed in the above embodiment of the present invention may be applied to the processor 601 or implemented by the processor 601. The processor 601 may be an integrated circuit chip with signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware in the processor 601 or instructions in the form of software. The processor 601 may be a general purpose processor, a digital signal processor (Digital Signal Processor, DSP), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), an off-the-shelf programmable gate array (Field Programmable Gate Array, FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components. The disclosed methods, steps, and logic blocks in the embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present invention may be embodied directly in the execution of a hardware decoding processor, or in the execution of a combination of hardware and software elements in a decoding processor. The software elements may be located in a random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, registers, etc. as well known in the art. The storage medium is located in a memory 602, and the processor 601 reads information in the memory 602 and performs the steps of the above method in combination with its hardware.
It is to be understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or a combination thereof. For a hardware implementation, the processing units may be implemented within one or more application specific integrated circuits (Application Specific Integrated Circuits, ASIC), digital signal processors (Digital Signal Processing, DSP), digital signal processing devices (dspev, DSPD), programmable logic devices (Programmable Logic Device, PLD), field programmable gate arrays (Field-Programmable Gate Array, FPGA), general purpose processors, controllers, micro-controllers, microprocessors, other electronic units designed to perform the functions described herein, or a combination thereof.
For a software implementation, the techniques described herein may be implemented by means of units that perform the functions described herein. The software codes may be stored in a memory and executed by a processor. The memory may be implemented within the processor or external to the processor.
The server provided in this embodiment may be a server as shown in fig. 6, and may perform all steps of the data display method of the server as shown in fig. 2 and 4, so as to achieve the technical effects of the data display method of the server as shown in fig. 2 and 4, and the detailed description with reference to fig. 2 and 4 is omitted herein for brevity.
The embodiment of the invention also provides a storage medium (computer readable storage medium). The storage medium here stores one or more programs. Wherein the storage medium may comprise volatile memory, such as random access memory; the memory may also include non-volatile memory, such as read-only memory, flash memory, hard disk, or solid state disk; the memory may also comprise a combination of the above types of memories.
When one or more programs in the storage medium are executable by one or more processors, the above-described data display method of the server executed on the server side is implemented.
The processor is configured to execute a data display program of a server stored in the memory, so as to implement the following steps of a data display method of the server executed on the server side:
acquiring the working state of the BMC substrate management controller; determining a data display strategy of the server based on the working state; and displaying the data to be displayed of the server based on the data display strategy.
In one possible implementation manner, if the working state is normal, determining that the data display policy of the server is to take the BMC baseboard management controller as a display output device; and if the working state is abnormal, determining a data display strategy of the server to take the FPGA chip as display output equipment.
In one possible implementation manner, if it is determined that the data display policy of the server is that the BMC baseboard management controller is used as a display output device, the PCIE multiplexer is controlled to transmit the data to be displayed to the BMC baseboard management controller, so that the BMC baseboard management controller transmits the data to be displayed to a display device for displaying; and if the data display strategy of the server is determined to be that the FPGA chip is used as the display output equipment, controlling the PCIE multiplexer to transmit the data to be displayed to the FPGA chip, so that the FPGA chip transmits the data to be displayed to the display equipment for display.
In one possible implementation manner, when the working state of the BMC baseboard management controller is abnormal, the BMC baseboard management controller is controlled to reset so as to resume the normal working of the BMC baseboard management controller.
In one possible implementation, after the BMC baseboard management controller is reset successfully, the BMC baseboard management controller is continued to be used as a display output device.
In one possible implementation manner, if the number of resets of the BMC baseboard management controller is greater than or equal to a preset number of resets threshold, a reset failure alarm is turned on.
In one possible implementation manner, acquiring attribute information of the data to be displayed; and determining a target display output device through which the data to be displayed passes based on the attribute information.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of function in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The foregoing description of the embodiments has been provided for the purpose of illustrating the general principles of the invention, and is not meant to limit the scope of the invention, but to limit the invention to the particular embodiments, and any modifications, equivalents, improvements, etc. that fall within the spirit and principles of the invention are intended to be included within the scope of the invention.

Claims (9)

1. A data display method of a server, which is applied to the server, wherein the server at least comprises: PCIE multiplexer, BMC base plate management controller, FPGA chip;
the output end of the PCIE multiplexer is respectively connected with the BMC baseboard management controller and the FPGA chip;
the method comprises the following steps:
acquiring the working state of the BMC substrate management controller;
determining a data display strategy of the server based on the working state;
the determining the data display policy of the server based on the working state comprises the following steps:
if the working state is normal, determining that the data display strategy of the server is to take the BMC substrate management controller as display output equipment;
if the working state is abnormal, determining a data display strategy of the server to take the FPGA chip as display output equipment;
and displaying the data to be displayed of the server based on the data display strategy.
2. The method of claim 1, wherein the displaying the data to be displayed of the server based on the data display policy comprises:
if the data display strategy of the server is determined to be that the BMC baseboard management controller is used as a display output device, the PCIE multiplexer is controlled to transmit the data to be displayed to the BMC baseboard management controller, so that the BMC baseboard management controller transmits the data to be displayed to a display device for display;
and if the data display strategy of the server is determined to be that the FPGA chip is used as the display output equipment, controlling the PCIE multiplexer to transmit the data to be displayed to the FPGA chip, so that the FPGA chip transmits the data to be displayed to the display equipment for display.
3. The method according to claim 2, wherein the method further comprises:
and when the working state of the BMC baseboard management controller is abnormal, controlling the BMC baseboard management controller to reset so as to recover the normal work of the BMC baseboard management controller.
4. A method according to claim 3, characterized in that the method further comprises:
and after the BMC is successfully reset, continuing to use the BMC as display output equipment.
5. A method according to claim 3, the method further comprising:
and if the reset times of the BMC is greater than or equal to a preset reset times threshold, starting a reset failure alarm.
6. The method according to claim 1, wherein the method further comprises:
acquiring attribute information of the data to be displayed;
and determining a target display output device through which the data to be displayed passes based on the attribute information.
7. A data display device of a server, comprising:
the acquisition module is used for acquiring the working state of the BMC baseboard management controller;
the determining module is used for determining a data display strategy of the server based on the working state; the determining the data display policy of the server based on the working state comprises the following steps: if the working state is normal, determining that the data display strategy of the server is to take the BMC substrate management controller as display output equipment; if the working state is abnormal, determining that the data display strategy of the server is to take the FPGA chip as display output equipment;
and the display module is used for displaying the data to be displayed of the server based on the data display strategy.
8. A server, comprising: the server comprises a processor and a memory, wherein the processor is used for executing a data display program of the server stored in the memory so as to realize the data display method of the server according to any one of claims 1-6.
9. A storage medium storing one or more programs executable by one or more processors to implement the method of displaying data of the server of any one of claims 1 to 6.
CN202111546038.5A 2021-12-16 2021-12-16 Data display method and device of server, server and storage medium Active CN114328138B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111546038.5A CN114328138B (en) 2021-12-16 2021-12-16 Data display method and device of server, server and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111546038.5A CN114328138B (en) 2021-12-16 2021-12-16 Data display method and device of server, server and storage medium

Publications (2)

Publication Number Publication Date
CN114328138A CN114328138A (en) 2022-04-12
CN114328138B true CN114328138B (en) 2024-01-16

Family

ID=81052083

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111546038.5A Active CN114328138B (en) 2021-12-16 2021-12-16 Data display method and device of server, server and storage medium

Country Status (1)

Country Link
CN (1) CN114328138B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105117317A (en) * 2015-08-17 2015-12-02 浪潮(北京)电子信息产业有限公司 Method and device for monitoring server performance
CN106407059A (en) * 2016-09-28 2017-02-15 郑州云海信息技术有限公司 Server node testing system and method
CN112416279A (en) * 2020-11-16 2021-02-26 新华三云计算技术有限公司 Server display method, device, equipment and storage medium

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11256314B2 (en) * 2019-08-09 2022-02-22 Dell Products L.P. System and method for power management of field-programmable gate arrays and load balancing of personality bitstreams from a baseboard management controller
US11099922B2 (en) * 2019-08-12 2021-08-24 Dell Products L.P. System and method for isolating a failed card

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105117317A (en) * 2015-08-17 2015-12-02 浪潮(北京)电子信息产业有限公司 Method and device for monitoring server performance
CN106407059A (en) * 2016-09-28 2017-02-15 郑州云海信息技术有限公司 Server node testing system and method
CN112416279A (en) * 2020-11-16 2021-02-26 新华三云计算技术有限公司 Server display method, device, equipment and storage medium

Also Published As

Publication number Publication date
CN114328138A (en) 2022-04-12

Similar Documents

Publication Publication Date Title
US7562362B1 (en) User control of task priority
US9946600B2 (en) Method of detecting power reset of a server, a baseboard management controller, and a server
US8538720B2 (en) Cold boot test system and method for electronic devices
US20070088988A1 (en) System and method for logging recoverable errors
JP2010086364A (en) Information processing device, operation state monitoring device and method
JP2006309760A (en) Monitoring logic and monitoring method for detecting abnormal operation of data processor
TW201415213A (en) Self-test system and method thereof
US11662803B2 (en) Control method, apparatus, and electronic device
JP2016085727A (en) Method and system of preventing device from turning power on after unrecoverable failure
WO2019156062A1 (en) Information processing system, information processing device, bios updating method for information processing device, and bios updating program for information processing device
KR20140125565A (en) Method for managing memory and an electronic device thereof
JP4836732B2 (en) Information processing device
JP4886558B2 (en) Information processing device
KR20180066073A (en) System and method for providing operating system independent error control in a computing device
TWI709039B (en) Server and method for controlling error event log recording
JP2009104412A (en) Storage apparatus and method controlling the same
CN114328138B (en) Data display method and device of server, server and storage medium
CN114443442B (en) Log storage method and electronic equipment
KR20130075807A (en) An atm with back-up hdd for booting and the booting method there of
JP2007172096A (en) Information processor and start control method
JP6911591B2 (en) Information processing device, control device and control method of information processing device
TWI789020B (en) Control system and control method of storage device
CN113821387B (en) KVM function keep-alive test method, device, equipment and medium
JP7054037B1 (en) Information processing equipment and programs
US20210121044A1 (en) Endoscope system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant