CN114303123A

CN114303123A - Data storage method and device of solid state disk and Solid State Disk (SSD)

Info

Publication number: CN114303123A
Application number: CN201980099647.5A
Authority: CN
Inventors: 黄恩走
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2019-08-27
Filing date: 2019-08-27
Publication date: 2022-04-08
Also published as: WO2021035555A1

Abstract

The embodiment of the application discloses a data storage method and device of a solid state disk and a Solid State Disk (SSD), which can effectively reduce the average read time delay of the SSD and improve the service performance of the SSD in a time delay sensitive scene on the basis of not increasing the cost of additional materials. The data storage method of the solid state disk can comprise the following steps: receiving data to be stored, and identifying first data matched with target data or first data containing a designated identifier in the data to be stored, wherein the target data is data with the reading frequency higher than a preset frequency threshold value from the SSD; selecting a first storage area matching the first data read delay from a plurality of storage areas of the SSD; and storing the first data into the first storage area. By implementing the embodiment of the application, the average read delay of the SSD can be effectively reduced.

Description

Data storage method and device of solid state disk and Solid State Disk (SSD)

Technical Field

The present application relates to the field of storage, and in particular, to a data storage method and apparatus for a solid state disk, and a solid state disk SSD.

Background

A Solid State Disk (SSD) is a widely used storage device, and mainly includes a control unit and a storage unit. The memory unit generally includes a plurality of Flash memory granules such as NAND Flash, each Flash memory granule includes one or more dies (die) therein, each die includes a plurality of physical blocks (blocks), a capacity size of the block is generally between several hundred KB and several MB, each block includes a plurality of pages (pages), and a capacity size of the page is generally a multiple of 4KB (e.g. 4KB or 16 KB). The SSD stores data on each NAND Flash by a Flash Translation Layer (FTL) in a uniformly distributed manner. Because the SSD has no mechanical structure and does not have a track seeking process, the read-write time delay of the SSD is as low as microsecond, and the read-write bandwidth is as high as GB/s (Gigabyte/Second).

In some scenarios, the read/write latency of the storage device has a large impact on the service performance of a specific Application (APP), such as a query operation in a relational database management system. Reducing the average read latency of a storage device (e.g., SSD) can greatly improve the service performance of this type of application. The SSD average read latency is mainly affected by the access latency of the NANDFlash media itself. In order to reduce the average read delay of the SSD, a cache module is generally designed inside the SSD to accelerate the processing of the read command, thereby reducing the average read delay of the SSD. In such a scheme, the SSD device includes a cache buffer storage area module in addition to the control unit and the storage unit. Generally, the buffer module utilizes the lower latency characteristics of Storage Class Memory (SCM) or Dynamic Random Access Memory (DRAM) to reduce the average read latency of the SSD. However, since media such as SCM and DRAM are expensive and have a small capacity, the SSD using this scheme has a high overall cost and high implementation complexity. Moreover, the effect of reducing the average read delay by the scheme is strongly related to the probability of directly acquiring the target data from the buffer storage area module. In particular, in practical products, due to the high cost of media such as SCM and the constraint of power down protection, the storage capacity of the buffer storage module is usually small compared to the NAND Flash storage capacity of SSD up to several hundred Gigabytes (GB) or even Terabytes (TB). Therefore, in practical applications, the probability that the read command directly acquires the target data from the buffer storage module is low, which results in high average SSD read latency.

Therefore, how to effectively reduce the average read latency of the SSD is an urgent problem to be solved by the present application.

Disclosure of Invention

The embodiment of the application provides a solid state disk storage method and device and a Solid State Disk (SSD), which can effectively reduce the average read delay of the SSD and improve the service performance of the SSD in a delay sensitive scene.

In a first aspect, an embodiment of the present application provides a data storage method for a solid state disk SSD, where the method may include: receiving data to be stored, and identifying first data in the data to be stored, wherein the first data is data matched with target data, and the target data is data with a reading frequency higher than a preset frequency threshold value from an SSD; selecting a first storage area matched with the first data reading time delay from a plurality of storage areas (taking a page unit as an example for explanation) of the SSD; and storing the first data in the first storage area.

According to the embodiment of the application, first data (the first data may be data which needs to be quickly read from the SSD, such as one or more of data which is read from the SSD and has a frequency higher than a preset frequency threshold, data containing a specified identifier, and data with a higher reading frequency from a data set, where the data set may include data which is received by the SSD from Host once or multiple times) are identified from received data to be stored, and the first data is stored in a first storage area matched with a reading delay of the first data, so that an average reading delay generated in the process of reading the first data is reduced, and service processing performance of a device configured with the SSD is improved. Compared with the prior art, the SSD controller needs multiple addressing processes to judge whether the read-write command hits the cache due to the fact that the cache module is arranged in the SSD; by implementing the embodiment of the application, the material cost (such as the cost of an SSD cache module) of production is reduced under the condition of meeting certain service requirements, and the increase of the processing load of the SSD controller due to secondary addressing is avoided; more importantly, the data are purposefully matched and stored based on the characteristics of the SSD storage medium, the complexity of scheme implementation is reduced, and the effect of reducing the average SSD read delay is obvious. It is to be understood that the read delay mentioned in the embodiments of the present application refers to the average read delay, and is not described in a distinguishing manner in the present application.

In a possible implementation manner, the target data is data with a frequency higher than a preset frequency threshold value read from the SSD in a preset historical time period; the identifying of the first data in the data to be stored includes: and identifying part or all of the data to be stored, which has the same content as the target data, as the first data. In the embodiment of the application, data with the same content as that of the target data in the preset historical time period in the data to be stored is screened (for example, the data is judged to be the same according to the conditions of consistent reading frequency, consistent data effective bits and the like), so that the first data can be stored in the storage area matched with the expected reading time delay conveniently.

In a possible implementation manner, the target data is data with a frequency higher than a preset frequency threshold value read from the SSD in a preset historical time period; the identifying of the first data in the data to be stored includes: and identifying part or all of the data to be stored, which has the same type as the target data, as first data. In the embodiment of the application, data of the same type as that of target data in a preset historical time period in the data to be stored is screened (for example, the data of the same type may include that part or all of the data in the data to be stored is the same as or similar to the data source of the target data, or that part or all of the data in the data to be stored and the target data belong to data required by the same link of business processing, or that a user (including a developer) has the same reading requirement on part or all of the data in the data to be stored and the target data, and the like), so that the first data is stored in a storage area matched with the expected reading delay later.

In one possible implementation, the foregoing method further includes: identifying second data in the data to be stored, wherein the second data is data which is read from the SSD and has lower frequency than the first data; selecting a second storage area matched with the second data read delay from a plurality of storage areas of the SSD, wherein the read delay of the second storage area is higher than that of the first storage area; and storing the second data in the second storage area. According to the embodiment of the application, the second data which is in accordance with the specific data characteristics and is different from the first data is identified (for example, the reading frequency is lower than that of the first data), and the second data is stored in the second storage area matched with the reading time delay, so that the data is classified and stored, the data is effectively stored based on the characteristics of the storage area, and the reading efficiency of the required data is improved. The second data corresponding to the specific data feature and the specific data feature are not particularly limited in the embodiments of the present application.

In one possible implementation, the foregoing method further includes: counting the reading frequency of reading data from the SSD in a preset historical time period; and determining the data with the reading frequency higher than the preset frequency threshold value in the SSD as the target data. According to the embodiment of the application, the reading frequency of the data in the SSD is counted regularly or irregularly, and the data in the SSD is determined as the target data according to the preset reading frequency threshold. And taking the determined target data as one of the identification standards of the first data in the subsequent data to be stored, wherein the target data and the preset frequency threshold value can be adjusted and updated according to the actual requirement and the actual use condition.

In one possible implementation manner, counting a reading frequency of reading data from the SSD in a preset historical time period includes: counting the historical reading times of data stored in each storage area of a plurality of storage areas of the SSD in a preset historical time period; and determining the reading frequency of the data stored in each storage area according to the historical reading times. According to the embodiment of the application, the reading frequency of the data stored in the solid state disk is calculated, so that the configuration condition of the storage area of the stored data is optimized, the data storage area is adjusted conveniently according to the actual data reading condition, the reading efficiency of the required data is improved, and the service processing performance of the main control equipment is improved.

In a possible implementation manner, the SSD further includes a buffer storage area; the aforementioned method further comprises: and caching the first data into the buffer memory area. In the embodiment of the present application, based on the embodiment of the first aspect, a buffer memory area may be added, and part of data may be stored in the buffer memory area; under the condition that the SSD is normally powered on to work, a main control (such as a processor or a server) can directly obtain required data from a buffer storage area with probability, the average read delay of the SSD is further reduced on the basis of the embodiment of the application, and the method is suitable for application scenarios with low cost requirements and high data reading efficiency requirements. It can be understood that, by combining the scheme in the present application and adding the buffer memory area, compared with the internal buffer memory area of the SSD in the prior art, the average read latency of the SSD can be reduced when the first addressing fails and the second addressing is required.

In a possible implementation manner, the caching the first data in the buffer storage area includes: and after receiving the write command of the first data, storing the first data into the buffer memory area according to the write command. According to the embodiment of the application, the first data are stored in the buffer memory area according to the received write command, and the data can be accurately stored.

In one possible implementation, the foregoing method further includes: when receiving the read command of the first data, the first data is preferentially read from the buffer memory area. According to the embodiment of the application, the first data are read from the buffer storage area according to the read command, so that the read time delay of the first data is further reduced and the processing speed of equipment is increased on occasions with specific requirements.

In one possible implementation, the foregoing method further includes: when the data volume of the first data is larger than the storage capacity of the first storage area, storing partial data in the first data into the second storage area; or storing partial data in the second data into the first storage area when the data amount of the second data is larger than the storage capacity of the second storage area. According to the embodiment of the application, data is stored according to the relation between the data volume and the storage capacity of the storage area, for example, when the second data volume is large, partial data is stored in the first storage area; the data are flexibly stored according to the actual data volume condition, the storage area is effectively utilized, and the average reading time delay is reduced on the whole.

In a second aspect, an embodiment of the present application provides a data storage method for a solid state disk SSD, where the method may include:

receiving data to be stored, and identifying first data in the data to be stored, wherein the first data is data containing a specified identifier, and the specified identifier is used for indicating the reading delay requirement of the first data; selecting a first storage area matched with the first data reading time delay from a plurality of storage areas of the SSD according to the appointed identification; and storing the first data into the first storage area.

According to the embodiment of the application, the first data is identified from the received data to be stored through the designated identification (such as a data number, a command or a field) and stored in the first storage area matched with the reading delay of the first data, so that the average reading delay generated in the process of reading the first data is reduced, and the service processing performance of the device configured with the SSD is improved. Compared with the prior art, the SSD controller needs multiple addressing processes to judge whether the read-write command hits the cache due to the fact that the cache module is arranged in the SSD; by implementing the embodiment of the application, the production cost is reduced under the condition of meeting a certain service requirement, and the increase of the processing load of the SSD controller due to secondary addressing is avoided; more importantly, the data are purposefully matched and stored based on the characteristics of the SSD storage medium, the complexity of scheme implementation is reduced, and the effect of reducing the average SSD read delay is obvious.

In one possible implementation, the foregoing method further includes: identifying second data in the data to be stored, wherein the second data is data which is read from the SSD and has lower frequency than the first data; selecting a second storage area matched with the second data read delay from a plurality of storage areas of the SSD, wherein the read delay of the second storage area is higher than that of the first storage area; and storing the second data in the second storage area. According to the embodiment of the application, the second data which is in accordance with the specific data characteristics and is different from the first data is identified (for example, the reading frequency is lower than that of the first data), and the second data is stored in the second storage area matched with the reading time delay, so that the data is classified and stored, the data is effectively stored based on the characteristics of the storage area, and the reading efficiency of the required data is improved.

In a possible implementation manner, the SSD further includes a buffer storage area; the aforementioned method further comprises: and caching the first data into the buffer memory area. In the embodiment of the present application, in combination with the embodiment in the second aspect, a buffer memory area may be added, and part of data may be stored in the buffer memory area; under the condition that the SSD is normally powered on to work, the main control can conveniently and directly obtain the required data from the buffer storage area with probability, the average reading time delay of the SSD is further reduced on the basis of the embodiment of the application, and the method is suitable for application scenes with low cost requirements and high data reading efficiency requirements. It can be understood that, by combining the scheme in the present application and adding the buffer memory area, compared with the internal buffer memory area of the SSD in the prior art, the average read latency of the SSD can be reduced when the first addressing fails and the second addressing is required.

In a possible implementation manner, the caching the first data into the buffer storage area includes: and after receiving the write command of the first data, storing the first data into the buffer memory area according to the write command. According to the embodiment of the application, the first data are stored in the buffer memory area according to the received write command, and the data can be accurately stored.

In one possible implementation, the foregoing method further includes: when receiving the read command of the first data, the first data is preferentially read from the buffer memory area. According to the embodiment of the application, the first data are read from the buffer storage area according to the read command, so that the average read time delay of the first data is further reduced and the processing speed of equipment is increased on occasions with specific requirements.

In one possible implementation, the foregoing method further includes: when the data volume of the first data is larger than the storage capacity of the first storage area, storing partial data in the first data into the second storage area; or storing partial data in the second data into the first storage area when the data amount of the second data is larger than the storage capacity of the second storage area. According to the embodiment of the application, data is stored according to the relation between the data volume and the storage capacity of the storage area, for example, when the second data volume is large, partial data is stored in the first storage area; the data are flexibly stored according to the actual data volume condition, the storage area is effectively utilized, and the average reading time delay of the SSD is reduced on the whole.

In a third aspect, an embodiment of the present application provides a solid state disk SSD, where the SSD may include a controller and a memory connected to the controller; the memory may include a plurality of different types of memory areas, and the read time delay of each type of memory area is different; the aforementioned controller is configured to: receiving data to be stored, and identifying first data in the data to be stored, wherein the first data is data matched with target data, and the target data is data with a reading frequency higher than a preset frequency threshold value from the SSD; selecting a first storage area matched with the first data reading time delay from the plurality of storage areas; storing the first data in the first storage area; the first storage area is used for storing the first data.

In a possible implementation manner, the controller is specifically configured to: and identifying part or all of the data to be stored, which has the same content as the target data, as the first data.

In a possible implementation manner, the controller is specifically configured to: and identifying part or all of the data to be stored, which has the same type as the target data, as the first data.

In a possible implementation manner, the controller is further configured to: identifying second data in the data to be stored, wherein the second data is data which is read from the SSD and has lower frequency than the first data; selecting a second storage area matched with the reading time delay of the second data from the plurality of storage areas, wherein the reading time delay of the second storage area is higher than that of the first storage area; storing the second data in the second storage area; the second storage area is used for storing the second data.

In a possible implementation manner, the controller is further configured to: counting the reading frequency of reading data from the SSD in a preset historical time period; and determining the data with the reading frequency higher than the preset frequency threshold value in the SSD as the target data.

In a possible implementation manner, the controller is specifically configured to: counting the historical reading times of the data stored in each storage area in the plurality of storage areas in a preset historical time period; and determining the reading frequency of the data stored in each storage area according to the historical reading times.

In a possible implementation manner, the SSD further includes a buffer storage area; the buffer memory area is connected with the controller; the aforementioned controller is further configured to: caching the first data to the buffer memory area; the buffer memory area is used for storing the first data.

In a possible implementation manner, the controller is specifically configured to: and after receiving the write command of the first data, storing the first data into the buffer memory area according to the write command.

In a possible implementation manner, the controller is further configured to: when receiving the read command of the first data, the first data is preferentially read from the buffer memory area.

In a possible implementation manner, the controller is further configured to: when the data volume of the first data is larger than the storage capacity of the first storage area, storing partial data in the first data into the second storage area; or storing partial data in the second data into the first storage area when the data amount of the second data is larger than the storage capacity of the second storage area.

In a fourth aspect, an embodiment of the present application provides a solid state disk SSD, which may include a controller, and a memory connected to the controller; the memory comprises a plurality of different types of memory areas, and the read time delay of each type of memory area is different; the aforementioned controller is configured to: receiving data to be stored, and identifying first data in the data to be stored, wherein the first data is data containing a specified identifier, and the specified identifier is used for indicating the reading delay requirement of the first data; selecting a first storage area matched with the first data reading time delay from the plurality of storage areas according to the appointed identification; storing the first data in the first storage area; the first storage area is used for storing the first data.

In a fifth aspect, an embodiment of the present application provides a data storage apparatus of a solid state disk SSD, where the apparatus may include: the first receiving unit is used for receiving data to be stored; the first identification unit is used for identifying first data in the data to be stored, wherein the first data is matched with target data, and the target data is data with the reading frequency higher than a preset frequency threshold value from the SSD; a first selecting unit configured to select a first storage area that matches the first data read latency from a plurality of storage areas of the SSD; a first storage unit for storing the first data in the first storage area.

In a possible implementation manner, the target data is data with a frequency higher than a preset frequency threshold value read from the SSD in a preset historical time period; the first identification unit is specifically configured to: and identifying part or all of the data to be stored, which has the same content as the target data, as the first data.

In a possible implementation manner, the target data is data with a frequency higher than a preset frequency threshold value read from the SSD in a preset historical time period; the first identification unit is specifically configured to: and identifying part or all of the data to be stored, which has the same type as the target data, as the first data.

In a possible implementation manner, the foregoing apparatus further includes a first storage area classification unit, configured to: identifying second data in the data to be stored, wherein the second data is data which is read from the SSD and has lower frequency than the first data; selecting a second storage area matched with the second data read delay from a plurality of storage areas of the SSD, wherein the read delay of the second storage area is higher than that of the first storage area; and storing the second data in the second storage area.

In a possible implementation manner, the foregoing apparatus further includes a target data determining unit, configured to: counting the reading frequency of reading data from the SSD in a preset historical time period; and determining the data with the reading frequency higher than the preset frequency threshold value in the SSD as the target data.

In a possible implementation manner, the target data determining unit is specifically configured to: counting the historical reading times of data stored in each of a plurality of storage areas of the SSD; and determining the reading frequency of the data stored in each storage area according to the historical reading times.

In a possible implementation manner, the SSD further includes a buffer storage area; the apparatus further includes a first buffer unit configured to: and caching the first data into the buffer memory area.

In a possible implementation manner, the first cache unit is specifically configured to: and after receiving the write command of the first data, storing the first data into the buffer memory area according to the write command.

In a possible implementation, the foregoing apparatus further includes a first reading unit configured to: when receiving the read command of the first data, the first data is preferentially read from the buffer memory area.

In a possible implementation manner, the foregoing apparatus further includes a first decision unit, configured to: when the data volume of the first data is larger than the storage capacity of the first storage area, storing partial data in the first data into the second storage area; or storing partial data in the second data into the first storage area when the data amount of the second data is larger than the storage capacity of the second storage area.

In a sixth aspect, an embodiment of the present application provides a data storage apparatus of a solid state disk SSD, where the apparatus may include: the second receiving unit is used for receiving data to be stored; a second identification unit, configured to identify first data in the data to be stored, where the first data is data including a specific identifier, and the specific identifier is used to indicate a read latency requirement of the first data; a second selecting unit, configured to select, from the plurality of storage areas of the SSD, a first storage area that matches the first data read latency according to the specified identifier; and a second storage unit for storing the first data in the first storage area.

In a possible implementation manner, the foregoing apparatus further includes a second storage area classification unit, configured to: identifying second data in the data to be stored, wherein the second data is data which is read from the SSD and has lower frequency than the first data; selecting a second storage area matched with the second data read delay from a plurality of storage areas of the SSD, wherein the read delay of the second storage area is higher than that of the first storage area; and storing the second data in the second storage area.

In a possible implementation manner, the SSD further includes a buffer storage area; the aforementioned apparatus further comprises a second cache unit configured to: and caching the first data into the buffer memory area.

In a possible implementation manner, the second cache unit is specifically configured to: and after receiving the write command of the first data, storing the first data into the buffer memory area according to the write command.

In a possible implementation, the foregoing apparatus further includes a second reading unit, configured to: when receiving the read command of the first data, the first data is preferentially read from the buffer memory area.

In a possible implementation manner, the foregoing apparatus further includes a second decision unit, configured to: when the data volume of the first data is larger than the storage capacity of the first storage area, storing partial data in the first data into the second storage area; or storing partial data in the second data into the first storage area when the data amount of the second data is larger than the storage capacity of the second storage area.

In a seventh aspect, an embodiment of the present application provides a chipset, where the chipset includes at least one processor, and is configured to support implementation of the functions related to the first aspect or the second aspect, for example, receive data to be stored, and identify first data in the data to be stored. In one possible design, the aforementioned chipset further includes at least one first memory and at least one second memory; the at least one first memory and the at least one processor are interconnected through a line, and instructions are stored in the first memory; when the instructions are executed by the processor, the method of any one of the first aspect or the second aspect is implemented; the at least one second memory and the at least one processor are interconnected by a line, and the second memory stores therein data to be stored in the method of any one of the first aspect and the second aspect. The chipset may be formed of a chip, or may include a chip and other discrete devices.

In an eighth aspect, the present application provides a computer-readable storage medium, in which a computer program is stored, and when the computer program is executed by a processor, the method described in any possible implementation manner of the first aspect or the second aspect is implemented.

In a ninth aspect, an embodiment of the present application provides a computer program, where the computer program includes instructions, and when the computer program is executed by a computer, the computer may execute a flow executed by the data storage method of the SSD in any one of the first aspect or the second aspect.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings used in the description of the embodiments will be briefly introduced below.

Fig. 1 is a schematic diagram of a data storage architecture of a solid state disk SSD according to an embodiment of the present application;

fig. 2 is a schematic diagram of a logic module of an SSD according to an embodiment of the present application;

fig. 3 is a schematic diagram of an SSD data interaction channel provided in an embodiment of the present application;

FIG. 4 is a schematic diagram illustrating a connection between an SSD and a Flash Die according to an embodiment of the present application;

fig. 5 is a schematic diagram of a data storage flow of an SSD according to an embodiment of the present application;

fig. 6 is a schematic diagram illustrating a data storage method of an SSD according to an embodiment of the present application;

FIG. 7 is a schematic diagram illustrating a data storage flow of another SSD according to an embodiment of the present application;

FIG. 8 is a schematic diagram illustrating a data storage flow of another SSD according to an embodiment of the present application;

fig. 9 is a schematic diagram illustrating an analysis of an average read latency of an SSD according to an embodiment of the present application;

FIG. 10 is a schematic diagram illustrating another SSD data storage method according to an embodiment of the present application;

FIG. 11 is a schematic diagram illustrating a data storage method of an SSD according to an embodiment of the present application;

FIG. 12 is a schematic structural diagram of a data storage device of an SSD according to an embodiment of the present application;

fig. 13 is a schematic structural diagram of another data storage device of an SSD according to an embodiment of the present application.

Detailed Description

The embodiments of the present application will be described below with reference to the drawings.

The terms "first," "second," "third," and "fourth," etc. in the description and claims of this application and in the accompanying drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.

As used in this specification, the terms "component," "module," "system," and the like are intended to refer to a computing device-related entity, either hardware, firmware, a combination of hardware and software, or software in execution. For example, a component may be, but is not limited to being, a process running on a processor, an object, an executable, a thread of execution, a program, and the like. By way of illustration, both an application running on a computing device and the computing device can be a component. One or more components may reside within a process or thread of execution and a component may be localized on one computing device or distributed between 2 or more computing devices. In addition, these components can execute from various computer readable media having various data structures stored thereon.

First, some terms in the present application are explained so as to be easily understood by those skilled in the art.

(1) A Solid State Drive (SSD), or Solid State disk, is a hard disk made of an array of Solid State electronic memory chips. The SSD consists of a control unit and a storage unit (a Flash chip and a DRAM chip), and the working temperature range of the chip is wide, so that the application field is wide. The storage media of the solid state disk are usually two types, one is to use a Flash memory (Flash chip) as the storage medium, and the other is to use a DRAM as the storage medium. The solid state disk related to the application is a solid state disk based on a Flash memory, namely an SSD (solid state disk) adopting a Flash chip as a storage medium. Its appearance can be made in a variety of patterns, for example: notebook hard disks, micro hard disks, memory cards, U disks and the like.

(2) NAND Flash (NAND Flash), is a non-volatile storage technology. The storage unit of the NAND Flash is divided into a cell, a die, a block, a page, a cell and the like. The cell is the smallest memory cell, and a plurality of cells form a page; a plurality of pages form a block; a plurality of blocks make up a die. The NAND Flash has the characteristics of being capable of storing data after power failure, and also has the following hardware characteristics: a memory cell can be changed from logic 1 to logic 0 by writing (program), but the cell can not be restored to logic 1 by writing any more, and can be restored to logic 1 by erasing (erase). The smallest unit of erase in a typical flash memory is called a block. The erase operation time is generally longer than the read and write operation times. Currently, most flash memory particles of SSDs are mainly divided into Single-Level cells (SLC), double-Level cells (MLC), triple-Level cells (TLC), and quad-Level cells (QLC), and even Multi-Level cells may occur; wherein, the TLC comprises 3D-TLC and 2D-TLC; 3D-TLC can be subdivided into 32-layer 3D-TLC, 64-layer 3D-TLC and 96-layer 3D-TLC. The scheme of each embodiment of the application is not only suitable for TLC with a 2D structure, but also suitable for TLC with a 3D structure; the application scope of the scheme of the application is not limited.

(3) A Logical Block Address (LBA) is a general mechanism for describing a location of data on a storage device, and is generally applied to an auxiliary memory device such as a hard disk. The LBA may refer to an address of a certain data block or a data block to which a certain address points. For example, LBA is equal to the house number that we use on average (e.g., Zhongshan Siway 26 in Guangzhou, Guangdong, China). A logical block is usually 512 or 1024 bytes in a computer. The standard CD of ISO-9660 format has 2048 bytes as one logical block size.

(4) Physical Block Address (PBA), relative to LBA, latitude and longitude as used for GPS positioning. For example, the longitude and latitude of the doorplate address are: the east longitude, 113 degrees, 16 '40.0621 degrees and the north latitude, 23 degrees, 07' 37.6129 degrees. On a mechanical hard disk HDD, since data of the HDD can be directly overwritten, the relationship between the LBA and the PBA is 1:1, that is, the LBA is PBA. However, on the SSD, the relationship of LBA and PBA is no longer fixed due to the characteristics of the NAND flash memory. Therefore, the SSD requires FTL for address translation to fit the existing file system. The controller of the SSD manages the flash memory using a mapping table of LBAs and PBAs. When data to be updated is to be written, the controller will write the new data into the empty flash space (erased state), and then update the mapping table data to point the LBA to the new PBA. The original PBA becomes invalid data, and the PBA needs to be erased first if the PBA needs to write data again.

(5) Flash Translation Layer (FTL), is an LBA to PBA mapping algorithm. The unit of reading and writing of flash memory is a page (the size of the page is generally a multiple of 4KB), but the reading and writing of data by the operating system is performed according to the sector size of HDD (512 bytes); in addition, the flash memory erase uses block as a unit, and the block cannot correctly store data without erasing, so that a file system commonly used by an operating system cannot manage the SSD. In order to solve the problem without burdening the operating system, the SSD virtualizes the operation of the flash memory as an independent sector operation of the disk in a software manner, and then the FTL is used. The FTL exists between the file system and the physical medium (flash memory), the operating system only needs to operate the LBA, and all the conversion work from the LBA to the PBA is handled by the FTL. Specifically, when the file system sends a command to write or update a specific logical page, the FTL actually writes data into a different free physical page and updates the mapping table (LBA and PBA associated data), and marks "old data" contained in the page as "invalid" (i.e. the updated data has been written into a new PBA, and the data of the old address naturally fails).

(6) The mapping Table (Map Table) is used for searching a Physical Page (Physical Page) corresponding to a certain user Page (Host Page) by the SSD when the user Page (Host Page) is read, and then accessing the Flash to read corresponding Host data. The Host Page is a basic unit for accessing the SSD by the Host; host accesses the SSD through LBAs, each LBA representing a Sector (typically 512B in size), and the operating system typically accesses the SSD in units of 4K. In the SSD, a Flash Page is used as a basic unit to access the Flash between the SSD controller (or referred to as SSD main control) and the Flash, wherein the Flash Page is referred to as Physical Page. When the Host writes one Host Page, the SSD master searches one Physical Page to write the Host data, and the SSD records the mapping (Map) at the same time. After the mapping relationship exists, the SSD knows from which position of Flash to read data when a Host needs to read a certain Host Page next time.

(7) The buffer area, or buffer storage area, is a part of the memory space, i.e. a certain storage space is reserved in the memory space for buffering the input or output data. The buffer area is divided into an input buffer area and an output buffer area according to whether the input device or the output device corresponds to the buffer area. The role of the buffer may include the following 2 points: 1. the data can be directly sent to the buffer area, and the high-speed equipment does not need to wait for the low-speed equipment, so that the equipment efficiency is improved. For example: by using the SSD to store data, part of the data can be directly sent to a buffer area of the SSD according to a write command. 2. The number of reads and writes of the storage medium can be reduced. Frequent small block write operations can exacerbate SSD lifetime loss to a large extent. In the process of writing data into the SSD, if the data is input into a buffer area, and the data is stored in the NAND Flash storage medium for a long time after the buffer area is full, the P/E (Program/Erase) times of the NAND Flash storage medium can be greatly reduced, and the function of protecting the SSD is achieved. In addition, the data is read from the storage device, and since part of the data is stored in the buffer area, the target data can be directly read from the buffer area, so that the reading speed can be improved to a certain extent. The buffer or data buffer mentioned in the embodiments of the present application refers to a buffer storage area.

(8) The Host interface, or data bus, may include SATA, SAS, PCIe, and the like. Serial Advanced Technology Attachment (Serial ATA) is a computer bus that is responsible for data transfer between a motherboard and mass storage devices (such as hard disks and optical disk drives), and is mainly used in personal computers; serial ATA is compatible with Serial Attached SCSI (SAS) bus, and SATA hard disk can be connected with SAS interface. Sas (serial Attached SCSI), which is a serial Attached SCSI interface, i.e., a serial Attached small computer system interface; as in the SATA hard disk, a serial technique is adopted to obtain a higher transfer speed, and an internal space is improved by shortening a connection line. SAS is a new interface developed after parallel SCSI interfaces, and provides compatibility with SATA hard disks in order to improve the performance, availability, and scalability of storage systems. The PCI Express bus (i.e., PCIe) is a high-speed serial replacement for the older PCI/PCI-X bus; PCI Express is based on a point-to-point topology, with a separate serial link connecting each device to the root system (host). Because of its shared bus topology, the PCI bus in a single direction can be arbitrated (in the case of multiple hosts) and limited to one host at a time; furthermore, PCI Express bus links support full duplex communication between any two endpoints, while concurrent access across multiple endpoints is not inherently limited.

(9) The garbage recycling mechanism has the basic principle that valid data (non-garbage data) in a plurality of blocks in an SSD are moved to a new block in a centralized mode, and then the blocks are erased to generate available blocks. Therefore, a new SSD that has just been purchased writes quickly because available blocks can always be found to write at the beginning. However, as the usage time or the number of times of usage of the SSD increases, its writing speed becomes slow. The reason is that after the SSD is full, when new data needs to be written, the garbage collection is often needed: moving valid data on several blocks to a block, then erasing the original block, and then writing the Host data again results in more time consuming than initially finding an available block to write.

(10) Wear Leveling (WL) is a mechanism inside the SSD that ensures balanced use of the block. The WL includes two algorithms: a dynamic WL algorithm and a static WL algorithm. Not using a WL, and which WL algorithm to use, has a large impact on the lifetime of the SSD. Flash is life-span, measured by P/E number (Program/Erase Count). If the SSD intensively erases a certain block, the blocks are exhausted in life quickly. For example, some data needs to be updated frequently, the blocks in which the data are located need to be erased frequently, and the life of the blocks may be exhausted quickly. On the contrary, some data users are updated rarely, such as some read-only files, and the block where the data is located has few times of erasing. With the use of SSDs by users, blocks with high PE numbers are formed, while blocks with low PE numbers are formed. It is expected that the number of PEs of all blocks should be about the same, i.e. the blocks are used equally.

(11) The I/O interface, or IO interface, may be a link for the control object to exchange information with the controlled object. The host exchanges data with the external device through the I/O interface. Currently, most I/O interfaces involve specific programs that are programmable, i.e., their mode of operation can be controlled by the program.

One of the system architectures on which the embodiments of the present application are based is described below. Referring to fig. 1, fig. 1 is a schematic diagram of a data storage architecture of a solid state disk SSD according to an embodiment of the present disclosure, and the architecture shown in fig. 1 mainly uses the solid state disk SSD as a main body, and is described from a data writing perspective. The data storage method of the solid state disk can be applied to the system architecture. The system architecture includes a Host10 (illustrated as including a processor 101) and a Solid State Disk (SSD) 20; fig. 1 illustrates an example that the controller 201 and the memory 202 are integrated inside the solid state disk 20, where the solid state disk 20 may include the controller 201 and the memory 202; alternatively, the controller 201 may be a processing device independent from the solid state disk 20, and performs operations such as data storage, data reading, and data modification by connecting with the memory 202 in the solid state disk 20; the memory 202 may also be a separate memory device, and will not be described herein. As shown in fig. 1, memory 202 may include a plurality of Flash storage areas, such as Flash0, Flash1, …, Flash N, and the like, N being an integer greater than 0. The plurality of Flash memory areas may include a plurality of memory areas with different read latencies, and a specific read latency of the memory area is not limited herein.

Specifically, when processor 101 processes the traffic, a write command of the target data is sent to SSD20, SSD20 is instructed by the write command to select a target storage area suitable for storing the target data according to a preset rule, and the data to be stored is stored in the target storage area. The operations of matching and storing the target storage area suitable for storing the target data and storing the target data may be performed simultaneously or in a reasonable order. The write command may include data instructing SSD20 to store a certain length or data amount in a specific storage area (i.e., a target storage area). For example, processor 101 sent write command a for data a to SSD20, which SSD20 received write command a and data a over the data bus. The controller 201 of the SSD20 analyzes the write command a to identify whether the data a is of the type of the first data (i.e., conforming to a frequently read characteristic or identified as frequently read data). After confirming that the data a is the first data, a storage area with a low read delay is selected from a plurality of storage areas in the memory 202 to store the data a. Optionally, the controller 201 of the SSD20 may autonomously perform reclassification recognition on data according to the reading frequency of the data to be stored during the storage area change process, and store data of different reading frequency categories into the storage area matching the data reading delay, for example, store the data to be stored into the storage area with lower reading delay when the historical reading frequency of the data to be stored is higher.

It can be understood that the solid state disk may be configured in different devices, and the different devices correspond to different master control forms, and the master control form in the embodiment of the present application is not limited, for example, a server or a personal computer.

When the solid state disk is configured in a personal computer (i.e., the main controller 10 is a computer), the solid state disk 20 performs data interaction with a central processing unit CPU of the computer through a data bus, for example, the computer sends a write command to the Solid State Disk (SSD)20 through the data bus to write specific data into the SSD.

When the solid state disk is configured in a server (i.e., the master 10 is a server that is a master of the entire server network and handles all transactions in the server network), the server communicates and processes data through Wi-Fi, a mobile network, or the like or through a wired connection, for example, the server sends a write command to the Solid State Disk (SSD)20 through a data bus to write specific data into the SSD 20. Other structures and functions are similar to those of the aforementioned electronic device, and the specific data storage scenario after the SSD is configured is also applicable to the application scenario illustrated in the embodiment of the present application, which is not described herein again.

With reference to the system architecture shown in fig. 1, an SSD data storage device diagram relating to Host interaction with an SSD is further provided in the embodiment of the present application, and may be applied to the system architecture shown in fig. 1, please refer to fig. 2, where fig. 2 is a schematic diagram of a logic module of an SSD according to the embodiment of the present application; as shown in fig. 2, the built-in logic module of the SSD in the embodiment of the present application may include: an Interface module (i.e., Interface203, also including the aforementioned data bus), a controller module (i.e., SSD controller 201, also the aforementioned controller 201), and a NAND Flash Array module (i.e., Flash Array 205, also the aforementioned memory 202). Wherein the content of the first and second substances,

an Interface module 203, which is used to connect with Host10 and undertake the functions of read-write command reception and data transmission; the Host, the processor included in the Host, and other contents in the Host are not limited in the embodiment of the present application, and therefore are not specifically described and identified in fig. 2.

A controller module 201, which is a control unit (i.e., a controller) of the SSD; it can be understood that the controller (or referred to as controller unit) is a brain of the SSD device, and takes over functions of SSD read/write command processing, data distribution management, NAND Flash management, and the like. Optionally, in the embodiment of the present application, a read attribute identification (read attribute identification) function module 2011 is designed in the controller module, and the function module is configured to identify an attribute of the data to be stored (which may be used to determine and identify the first data); for example, it may be determined whether the data is read attribute data rd _ attr _ data (i.e., the first data is identified from the data to be stored), and it may be determined whether the data is normal data comm _ data (i.e., the second data is identified from the data to be stored). As shown in fig. 2, LP and UP (in the embodiment of the present application, the read latency of LP and UP is lower than that of MP) store read attribute data, and MP stores normal data; it is to be understood that the read attribute data shown in fig. 2 and the general data are exemplary descriptions.

The NAND Flash Array module 202, which may include a NAND Flash media particle group of the SSD, is a physical carrier for the final storage of data. Specifically, the module may include a Low Page (LP) 2021, a Middle Page (MP) 2022, and a high Page (UP) 2023, which are illustrated, and the aforementioned Page units may correspond to Flash0-FlashN shown in fig. 1, where the specific correspondence relationship is combined with practical considerations and is not limited herein; the number of LP2021, MP2022 and UP2023 is not limited in the embodiments of the present application. It is understood that a typical SSD device may contain multiple NAND Flash particles; referring to the FTL of the SSD and other related modules or units, please refer to the following detailed description of related embodiments. The embodiment of the present application does not limit the connection relationship among the interface, the controller, and the flash memory array shown in the figure. It should be understood that, in the embodiment of the present application, the chinese translation names corresponding to LP, MP, and UP are not limited, and the things referred to by the english names are used as the standard.

For the convenience of understanding the embodiments of the present application, the basic principles of the SSD are described in conjunction with the logic modules and functional descriptions of the SSD in the embodiments of the present application, as follows:

from the viewpoint of composition, SSD20 may include SSD controller 201, memory (or Flash storage array) 202, and Host interface (e.g., SATA interface), wherein the SATA interface is not described in detail in fig. 3, please refer to the description of the following embodiments. SSD controller 201 operates multiple Flash particles in parallel through several channels (channels). Referring to fig. 3, fig. 3 is a schematic view of an SSD data interaction channel provided in the embodiment of the present application, and fig. 3 relates to a bidirectional transfer of data or information, and is described by taking an SSD as a main body, so that the related illustration and description of Host are not described in detail in the embodiment of the present application; as shown in fig. 3, for example, a SATA interface is connected to the SSD and the Host, and a Flash channel is connected to the SSD controller 201 and the memory 202 (including Flash Die), there are several channels between the SSD controller 201 and a plurality of Flash particles (i.e., a plurality of Flash Die), and each channel has one Flash particle mounted thereon. Taking 8 channels as an example, the controller is connected with 8 FlashDie through 8 channels; the Flash channels (including Flash channel 1, Flash channel 2, and Flash channel M) and the FlashDie (including FlashDie1, FlashDie2, and FlashDie M) in fig. 3 are exemplary descriptions.

Optionally, the SSD may further include an on-board DRAM, and the on-board DRAM may be connected to the controller 201 for storing the mapping table, so as to save space for the SSD to store data. Specifically, each time a Host writes to a Host Page, a new mapping is generated, which adds (writes for the first time) or changes (overwrites) the Map Table. For most SSDs, there is onboard DRAM, whose main role is to store a mapping Table (Map Table). There are exceptions, such as SSD based on Sandforce master, which does not support on-board DRAM, and it works with most of the mapping stored in Flash and some stored in on-chip RAM. When Host needs to read a piece of data, for an SSD with an onboard DRAM, only a mapping table in the DRAM is searched, and Flash is accessed after a physical address is obtained, so that Host data is obtained. Flash only needs to be accessed once during the period; for the SSD of Sandforce, first, it checks whether the mapping relationship corresponding to the Host Page is in the RAM, and if the mapping relationship exists in the RAM, directly reads Flash according to the mapping relationship; if the mapping relation is not in the RAM, the mapping relation is read from the Flash, and then Host data is read according to the mapping relation; this means that it needs to read Flash twice to read the Host data out compared to the SSD with DRAM. For Host random access, because the on-chip RAM is limited and the probability of the Cache hit of the mapping relation (the mapping relation is in the on-chip RAM) is very small, two times of Flash are required for the Host random access in each reading, and the SSD random access performance based on the Sandforce main control is not ideal.

Referring to fig. 4, fig. 4 is a schematic diagram illustrating a connection between an SSD and a Flash Die according to an embodiment of the present application; for ease of explanation, only one block per Die is shown in FIG. 4 by way of example, where each small square represents a page (assuming a size of 4 KB). Taking the example shown in fig. 4, each of the four blocks corresponding to Channel0-3 has 4KB of data written to it, for a total of 16KB of data. A blank area indicates that no data is written, and when all blocks on a Channel are full (i.e., there are no small blocks representing blank areas in fig. 4), SSD controller 201 will choose to continue writing other blocks in the same manner.

When the storage area of the entire SSD is full, new data is written subsequently, and then a part of the data in the SSD must be deleted to make room for storage space, which is convenient for subsequent data writing. During the process of deleting and writing data, the data inside some blocks can be rendered invalid or aged. It will be appreciated that data in the block is stale or invalid, meaning that no mappings point to them, they are replaced by new mappings, resulting in these Flash spaces not being accessed. For example, there is a Host Page A, which is initially stored in Flash space at X, with the mapping relationship A → X. Later, the Host overwrites the Host Page, because Flash cannot overwrite, the SSD needs to find a location which is not written to write new data, and if the location is Y, a new mapping relation A → Y is established, the previous mapping relation is released, and the data at the location X becomes old and invalid and becomes garbage data.

With the continuous writing of Host, the Flash storage space slowly becomes smaller until exhausted. If the garbage data is not cleared in time, the Host cannot write. The SSD internally generates a new available block, typically by a garbage collection mechanism. Meanwhile, the SSD also ensures that the blocks in the SSD memory are used in a balanced manner through a wear balance mechanism, so that the service life of the SSD is prolonged. It will be appreciated that there may also be a reserved space in the SSD that is not used to store data (e.g., the first data, the second data, etc.) written to the user. This part of space can be used not only for garbage collection, but also for some system data inside the SSD, a reserved space is also needed for storage, such as the aforementioned mapping Table (Map Table), such as the SSD firmware, and some other SSD system management data.

The basic principle of the SSD is described above, and the key process of the SSD processing the write command is described below, please refer to fig. 5, where fig. 5 is a schematic diagram of a data storage flow of the SSD according to an embodiment of the present application; as shown in fig. 5, the operational steps of the SSD may include a description of the following steps:

1. after the SSD is ready, the SSD receives a write command issued by the Host. The SSD ready may include powering on the SSD, initializing the SSD, and the like.

2. The SSD receives the write command, parses the write command through the controller, and identifies an attribute of data to be stored carried (or indicated) by the write command (the write command is generally used for storing target data). For example, the expected data attributes may include: reading, frequently updating, rarely updating, and the like, and the specific description may refer to the description of the predictable data attributes, which is not described herein again; the embodiments of the present application have been described in detail in the foregoing method embodiments, and are not described herein again.

3. And the SSD stores the data into a storage area matched with the SSD according to the attribute of the data to be stored obtained by judgment. Specifically, if the data is data of a read attribute (i.e., Y shown in the figure), the data is stored into a page unit with a low read delay as much as possible; if the data is not the data of the read attribute (i.e. the illustrated N), the data is stored in the page unit with the highest read delay as possible.

Alternatively, after storing data according to the write command, the process may be ended or the storage result may be fed back to the SSD control, and further, the storage result may be fed back to the Host.

Optionally, when the data is stored in the foregoing steps, a more flexible storage manner can be implemented. In consideration of the uncertainty of the capacity ratio of various attribute data, in the foregoing step, the data of the read attribute (i.e., the first data) may also be stored in the page unit with a high read delay, while the general data other than the first data or the data with a low read delay requirement may also be selectively stored in the page unit with a low read delay according to the actual situation. When the subsequent Host reads the data of the read attribute from the SSD, the completion time of the read command is low. In an actual service scene, by adopting the scheme of the embodiment of the application, the time for inquiring data by the APP can be effectively reduced.

The technical problems proposed in the present application are specifically analyzed and solved by combining the above system architecture and the data storage principle of the solid state disk provided in the present application.

Referring to fig. 6, fig. 6 is a schematic diagram of a data storage method of an SSD according to an embodiment of the present application, where the data storage method of a solid state disk is applied to a data storage system (including the system architecture) of the solid state disk. The data storage system of the solid state disk may include a master (e.g., a server or a processor of a computer) and a solid state disk SSD, where the SSD may include a controller and a memory therein. As will be described below with reference to fig. 6 from a single side of the controller in the solid state disk, the method may include the following steps S601 to S603.

Step S601: receiving data to be stored, and identifying first data in the data to be stored.

Specifically, the controller (or SSD controller)201 receives data to be stored from a device (e.g., a processor) connected to the solid state disk 20 through a data bus of the solid state disk. Then, the first data is identified from the data to be stored according to the data characteristics of the first data. The data characteristics may include that the reading frequency is higher than a preset frequency threshold, a specific identifier is included, and the reading frequency is ranked in the data set, and the like.

In a possible implementation manner, the target data is data with a frequency higher than a preset frequency threshold value read from the SSD in a preset historical time period; the identifying of the first data in the data to be stored includes: and identifying part or all of the data to be stored, which has the same content as the target data, as the first data. For example, the two are judged to be the same according to unique characteristics such as consistent reading frequency and consistent data valid bits.

In a possible implementation manner, the target data is data with a frequency higher than a preset frequency threshold value read from the SSD in a preset historical time period; the identifying of the first data in the data to be stored includes: and identifying part or all of the data to be stored, which has the same type as the target data, as first data. Wherein, the case of the same type may include: part or all of the data to be stored is the same as or similar to the data source of the target data; or, part or all of the data to be stored and the target data belong to data required by the same link of business processing; or the reading requirements of part or all of the data to be stored and the target data are the same by a user (including a developer), and the like. In order to facilitate understanding of the same type of the aforementioned cases, the following description will be made by way of example. In the process of storing a certain file content by a certain program (e.g. MySQL), part of data in the file (e.g. several GB of file data) may be stored in the SSD. When the part of data is stored in the SSD and is subsequently read frequently, the SSD controller determines that the part of data (for example, several hundred megabytes of data) is the first data (i.e., the data read at high frequency) according to a certain identification rule (for example, comparing the read frequency of the data with a preset frequency threshold). The key point is that the SSD controller not only identifies the part as the first data, but also can prejudge that the probability of the large probability of all data of the file to which the part of data belongs is the first data; when the SSD receives a write command of other data in the file, the SSD recognizes the data belonging to the file as first data according to the predetermined result, and stores the first data in a first storage area (i.e., a storage area with a low read delay). As another example, most data of a certain storage area in an SSD is often read in actual use; when the write command indicates that the SSD needs to store part or all of the data to be stored in the certain storage area, the SSD controller determines that the indicated storage area of the data to be stored is consistent with the certain storage area, and identifies the part or all of the data to be stored as the first data.

In the following, an explanation will be given on how to identify the first data with satisfactory read frequency among the received but not yet stored data. Identifying the first data with satisfactory reading frequency in the received but not stored data generally has two cases:

1. with successful matching of the target data, the historical frequency of the target data type can be referenced, for example, data a belongs to class a data, the historical frequency of class a data in the SSD exists, and the frequency of class a data can be referenced for how data a is stored. For example, the data type to which the data a (which may be understood as data belonging to the type a) belongs is often read by the master (which may be determined by analyzing the reading condition of the data a through the stored historical reading record to determine whether the data a is often read), and then the controller may determine the data a as the first data.

2. If the matching with the target data fails, so that no historical frequency can be referred to and subsequent storage operation is carried out, the data can be stored first and then the storage area of the data can be changed according to the data frequency. For example, part or all of the data to be stored, which cannot be immediately identified (may be due to a mismatch with the target data or may not be identified according to a judgment condition pre-stored in the SSD, etc.), is stored in the non-first storage area; calculating the frequency of reading part or all of the data from the SSD in a preset historical time period; and when the read frequency is higher than the preset frequency threshold, identifying the part or all of the data as the first data. And after the first data is identified, storing the first data into the first storage area, erasing the data in the original storage area, and reestablishing the data mapping relation in the mapping table. For another example, when the data B is a new type of data for the SSD and there is no historical read frequency that can be referred to, the data B may be stored randomly, and then the read frequency of the data B may be calculated according to the read condition in a subsequent period of time (the period of time may be selected autonomously or automatically according to a certain rule); and matching a proper storage area (such as a page unit or a page; in the embodiment of the application, the page or the page unit refers to the same) according to the reading frequency of the data B, so as to reduce the average reading delay of subsequently reading the data B in the SSD.

The data including the first data feature may be read attribute data, where the read attribute data may refer to data with a large influence on service performance from average delay of reading the data when the processor is running (e.g., when running APP), and the data is characterized by being often read, forming a service transaction by a plurality of read requests (specifically, multiple reads may be required for processing one service transaction on the SSD memory), and the like. The properties that can be expected may include: read, frequently updated, and rarely updated, etc. The reading is an operation of reading data from the SSD, and the reading may include reading critical data and reading frequent data, where the reading of the critical data generally has a higher requirement on a reading delay; for example, in the process of business processing, for the key data involved, it is required to acquire the key data quickly, and it is desirable that the lower the read delay is, the better the read delay is. Frequent data reads are typically read frequently for the desired data, with a high read frequency, but may not require a low read latency for a single read. An update is an operation of writing (or storing data) to an SSD, and the update may be written only without reading or may be read only a few times. Frequent updates correspond to infrequent updates, which are differentiated according to the frequency with which data is written.

For example, referring to fig. 2, SSD controller 201 receives data to be stored from a device (e.g., processor 101) connected to the solid state disk via interface203 of the solid state disk. Then, by reading the attribute identifying function 2011, the first data is identified from the data to be stored.

The first data may be data with a reading frequency higher than a preset frequency threshold from the SSD, or the first data may be data containing a designated identifier. The first data may be specifically data with a frequency higher than a preset frequency threshold value, which is read from the SSD within a preset historical time period, where the preset historical time period may include a time period before the data to be stored is received. For example, first, a fixed frequency threshold is preset according to an actual application scenario; then, in the process of storing the data, the data larger than the preset frequency threshold is identified as the first data by taking the preset frequency threshold as a standard.

Alternatively, the first data may be data whose reading frequency is higher in a received data set (the data set may include data received by the SSD from Host one or more times) (for example, data in the data set is sorted according to the reading frequency of the data, and data with the first three types of reading frequencies may be selected as the first data). In order to intuitively describe the foregoing first data, a specific description is provided below for an SSD device provided in the embodiments of the present application, in combination with the architecture and method of the embodiments of the present application.

Referring to fig. 7, fig. 7 is a schematic diagram illustrating a data storage flow of another SSD according to an embodiment of the present application; in the present application embodiment, SSD20 may include controller 201 and memory (i.e., flash array 202) therein; the SSD20 in this embodiment may further include an Interface (Interface, i.e., the aforementioned data bus or Interface module) 203, a controller 201 (i.e., SSD controller or controller module), and a Flash memory Array 202 (i.e., the aforementioned memory or NAND Flash Array module). Among other things, the controller 201 may include a Flash Translation Layer (FTL)2012 and a read attribute identification function 2011. The interface module 203 of SSD20 may provide an I/O interface (i.e., interface 203) to receive data; the module may be independent of the controller and the memory, or may be integrated with either or both of the controller and the memory, which is not limited in the embodiments of the present application; processor 101 of Host sends a write command to controller 201 of SSD20, and may include or indicate not only the storage location and data amount of the data to be stored, but also mark data attributes of the data to be stored, such as marking part of the data to be stored as the first data (e.g., data to be stored W1 and data to be stored W2 shown in fig. 7). For example, when the processor processes the service of the application, the running APP (application software) issues a write command to the SSD20 through the processor, and the attribute of the data to be written is marked in the write command. The SSD controller 203 can recognize not only the length of the data and determine the area required to be stored, but also the read attribute of the data (the data which has been marked as the data of the read attribute) through the interface and continue the operation of storing the data. The function of each module in the embodiment of the present application is not described again, please refer to the related description of the foregoing device embodiment or method embodiment; the embodiment of the present application does not limit the function and the specific structure of each module. With reference to fig. 7, the SSD working steps of the embodiment of the present application are described as follows:

1. the interface203 of the SSD provides the processor 101 of Host with an I/O interface (i.e., the interface 203) capable of receiving data for receiving data W to be stored, wherein the data W to be stored may be unmarked data that has not been sent to the SSD in the processor.

2. When the processor 101 runs the APP and issues a write command through the aforementioned I/O interface, attributes of data to be written are marked in the write command, such as marked W1 and W2, marked W1 is the first data, and marked W2 is the second data. As shown in fig. 7, W1 and W2 contained in the processor 101 are data that have been marked.

3. Read attribute identification function 2011 in SSD controller 201 identifies data attributes of the command, such as identifying and distinguishing W1 from W2, identifying W1 as first data, and identifying W2 as second data. Among them, W1 in fig. 7 may refer to the read attribute data in fig. 2, and W2 may refer to the normal data in fig. 2.

4. According to the identified data attributes, distributing and storing the data to be written to a NAND Flash medium through an FTL module 2012; if the data is attribute-read data, the data is stored into a Page unit with a low read delay as much as possible, for example, a Lower Page (corresponding to a storage area with a low read delay) is used to preferentially store W1 (the attribute-read data to be stored, i.e., the first data) in the figure, or a part W1 may be stored into UP according to actual situations; if the data is not the data with the read attribute, storing the data into a page unit with high read delay as much as possible. The embodiment of the present application does not limit the read delay matching relationship between specific data and a specific storage area. In the embodiment of the present application, it is assumed that the read time delay of LP and UP is lower than that of MP, but it should be understood that there is a difference in the read time delay intrinsic parameters of the storage areas of different brands and different products, and the read time delay intrinsic parameters may be adjusted according to the actual application situation on the basis of the embodiment of the present application.

It can be understood that, in the embodiment of the present application, the data size of the data to be stored is not limited, and the application scenario is not limited. In the embodiment of the present application, the APP writes the tag data to the SSD is an exemplary scenario description.

Alternatively, the first data may be data containing a specified identification for marking the first data; the designated mark can be set manually or marked intelligently according to a certain marking rule. When the first data is data including a designated identifier, the content of the designated identifier may further include a preset reading frequency or a reading priority of the identified data, and the specific content of the designated identifier is not limited in the embodiment of the present application. For example, if the read priority of the data corresponding to the identification mark is designated as high priority, then when the memory area corresponding to the data is selected, the memory area with low read delay is selected to store the data. For another example, if the preset reading frequency of the data corresponding to the identification mark is designated as high-frequency reading, when the storage area corresponding to the data is selected, the storage area with low reading delay is selected to store the data.

The SSD device provided in the above application embodiment needs to cooperate with the Host to complete data identification and storage; in order to intuitively describe the first data containing the identifier, the embodiment of the present application provides another different SSD device and implementation scheme, and the difference from the embodiment of the present application is that the embodiment of the present application relates to an SSD, which is provided with a read/write frequency statistic module without cooperating with Host, and can independently complete operations such as data identification and storage.

Referring to fig. 8, fig. 8 is a schematic diagram of a data storage flow of another SSD according to an embodiment of the present application. The SSD20 of the embodiment of the present application may include a controller 201 and a memory (i.e., a Flash memory Array 202), and specifically, may further include an Interface203 (i.e., the aforementioned data bus, or an Interface module), a controller 201, and a Flash memory Array 202 (i.e., the aforementioned memory, or a NAND Flash Array module); the SSD of the embodiment of the application may further include a Read attribute identification function module 2011 and a Read/Write frequency statistics (Read/Write frequency statistics) module 2013. The controller 201 may further include a memory translation layer (FTL) 2012. The function of each module in the embodiment of the present application is not described again, please refer to the related description of the foregoing device embodiment or method embodiment; the embodiment of the present application does not limit the function and the specific structure of each module.

Specifically, the SSD20 internally and intelligently identifies the attribute of the data to be persistently stored (e.g., the data W shown in fig. 8) through the controller 201, and then stores the identified different data (e.g., the data W1 and the data W2 shown in fig. 8, which are the data to be stored in the data W that are distinguished by the controller) into different page units. As shown in fig. 8, a read/write frequency statistic module 2013 designed inside the SSD may count the historical read/write times of each storage area and calculate the read/write frequency of each storage area. The granularity of division of the storage area may be varied, for example, by LBA. The read attribute identification function module 2011 determines the attribute of the data according to the information of the read-write frequency statistic module. It is to be understood that the Interface module 203 may be independent of the controller and the memory, or may be integrated with either or both of the controller and the memory, which is not limited in this embodiment. With reference to fig. 8, the SSD working steps of the embodiment of the present application are described as follows:

1. in the process of running the APP, the processor issues a write command to the SSD20 through the I/O interface, where the write command is used to instruct the SSD to receive and store part or all of the data W to be stored, where the data W to be stored may be data that is not marked in the processor.

2. The read attribute identification function module 2011 in the SSD controller 201 determines the attribute of the data W to be stored according to the read-write frequency statistic module 2013. As shown in fig. 8, in the controller, part of the data W may be identified as first data (e.g., data W1 to be stored) or part of the data W may be identified as second data (e.g., data W2 to be stored); it is understood that the determination of the first data and the second data may be re-determined and identified according to specific rules and the reading and writing conditions of the data, for example, data with a reading frequency higher than a preset reading frequency threshold is identified as the first data, or one or more data with a higher reading frequency in the data set is identified as the first data; the embodiments of the present application do not limit this.

3. According to the identified attribute of the data W, distributing and storing the data to be written (including the data to be stored W1 and the data to be stored W2) to the NAND Flash medium through the FTL module 2012; if the data is attribute-read data, the data is stored into a Page unit with a low read delay as much as possible, in the figure, a Lower Page (a corresponding storage area with a low read delay) is used to store W1 (attribute-read data to be stored, i.e. first data), and an MP stores data to be stored W2 as an example for explanation; if the data is not the data with the read attribute, storing the data into a page unit with high read delay as much as possible. In the application embodiment, it is assumed that the read time delay of LP and UP is lower than that of MP, but it should be understood that there is a difference in the read time delay intrinsic parameters of the storage areas of different brands and different products, and the read time delay intrinsic parameters may be adjusted according to the actual application condition on the basis of the application embodiment; the embodiment of the present application does not limit the read delay matching relationship between specific data and a specific storage area.

It can be understood that, in the SSD product in the current industry, the data issued by Host is generally uniformly stored in 3 page units of NAND Flash; the SSD average read latency is the sum of the average latency of 3 pages and the data transfer latency of the controller itself.

Referring to fig. 9, fig. 9 is a schematic diagram illustrating an SSD average read latency analysis according to an embodiment of the present application; as shown in fig. 9, the average read latency of a SSD product is 86us in total (denoted by and _ a in fig. 9), and as shown in part (a) in fig. 9, is the sum of the read latency average 66us (denoted by avg1 in fig. 9) of 3 pages (Lower Page, Middle Page and Upper Page) in NAND Flash and the latency average 20us (denoted by avg2 in fig. 9) of SSD controller data transfer (i.e., and _ a ═ avg1+ avg 2). According to any of the embodiments in this application, for the same aforementioned SSD product, read attribute data that is often read by APP is stored in LP and UP, and in the best case, as shown in part (B) of fig. 9, APP reads data from LP and UP, the average value of read latency is 59us (denoted as avg3 in fig. 9), and the average value of latency of SSD controller data transfer is 20us (denoted as avg4 in the figure), then the average value of read latency of SSD (denoted as and _ B in fig. 9) is

(i.e., and _ B ═ avg3+ avg4), the read latency is reduced by 8% compared with the SSD product not adopting the scheme. It can be understood that, in the embodiment of the present application, the data size of the data to be stored is not limited, and the application scenario is not limited. In the embodiment of the present application, the APP writes unmarked data to the SSD is an exemplary scenario description. It should be noted that, for the functions of the SSD described in the embodiment of the present application, reference may be made to the related description in the method embodiment described in fig. 6, fig. 10, and fig. 11, and details are not repeated herein.

Optionally, the foregoing first data classification (e.g., higher than a preset frequency threshold, including a specific identifier, etc.) may have a case of cross-classification, for example, initializing the identifier of the data a as the first data (i.e., including the specific identifier), but during actual writing, updating, reading, etc., it is calculated that the reading frequency of the data a is low, or the priority is lower than that of other types of data, or a low reading delay is not required, etc.; then data a may be re-classified as non-first data. For example, data B may be read with a low frequency in a certain service processing stage, but data B may need to be read with a high frequency in another service processing stage, and attributes of data B may be determined again, or a time-efficient designation flag may be added to data B. The classification and identification method of the first data is not particularly limited in the embodiments of the present application.

Optionally, the controller identifies a first data of the data to be stored while accepting the data to be stored.

It can be understood that the data size of the data to be stored received by the controller at one time is determined according to the size of the built-in storage module of the controller, and in general, the controller receives a write command in addition to the data to be stored, where the write command is used to instruct the controller to store the data to be stored with a certain length or data size to a specified area.

Step S602: selecting a first storage area matching the first data read latency from a plurality of storage areas of the SSD.

Specifically, the controller selects a first storage area in the memory that matches an expected read latency of the first data according to the first data, for example, according to a data characteristic of the first data (e.g., a read latency is required to be low due to frequent reading), and the read latency of the matched first storage area is relatively low or lowest among the read latencies of the plurality of storage areas of the SSD. The embodiment of the present application does not limit specific contents related to the expected read latency of the data. The first storage area may be one or several of Flash0-Flash N in fig. 1.

For example, referring to fig. 2, SSD controller 203 selects, according to the read attribute data, storage region 2021(LP) and storage region 2023(UP) in flash array 205 that match the desired read latency of the read attribute data.

Optionally, the first data may also be classified into first data with different priorities according to the importance and the reading frequency corresponding to the specific data, for example, the first data with the highest priority should generally be preferentially stored in a storage area with the lowest reading delay in the first storage area, and the first data with a lower priority may wait for the first data with the highest priority to be stored in the same storage area or a storage area with a reading delay that is slightly higher than the reading delay.

Alternatively, the plurality of storage areas of the SSD may be classified into a storage area with a low read latency, a storage area with a medium read latency, and a storage area with a high read latency. For example, most SSD products currently in the industry employ TLC type media. Information of 3 bits (bit) can be stored in one cell of the TLC NAND Flash. In the aspect of logic division, each bit in a cell belongs to a different Page, so the TLC NAND Flash may include 3 Page units, specifically, a Lower Page, a Middle Page, and an Upper Page; the names of these three page units are not necessarily linked to their short read times. Since the programming method principle of NAND Flash is not described in detail, and the programming difference, the storage characteristics of each page unit are different, especially the time delay of the read operation (or called read command), and the embodiment of the present application is not limited in particular. For example, the Lower Page read delay of Toshiba BiCS4TLC is about 60us, while Middle Page is about 80us and Upper Page is about 58 us. It can be appreciated that the read latency of the Middle Page is approximately 20% higher than the other two pages. The difference of the read time delay also exists on a QLC NAND Flash medium; it is understood that, in terms of the current prior art, the examples of the present application are relatively applicable to TLC and QLC, but the examples of the present application do not limit the media used in the various examples related to the present application.

Alternatively, different types of storage media will typically include pages of different classifications. The read delay difference of page is described below by taking MLC as an example. Each bit in a cell belongs to a different page; one cell of the MLC stores 2bit information, so the cell has 4 states (11, 10, 01, 00), and Flash represents the 4 cell states with 4 charge amounts. And judging the data stored in the current cell by the Flash through different reading voltages. For example, for a Lower Page, it can be determined whether the data of the Page is 0 or 1 by using only one read voltage, but for an Upper Page, it can be determined whether the Page is 0 or 1 by sequentially reading the cells for multiple times by using 3 read voltages. The reading process of the Upper Page costs more reading cost (such as reading time) than that of the Lower Page, so that the time delay of the reading operation is different. It can be understood that, due to the difference in access modes of NAND Flash, the reading cost of each page in Flash is different, so the time delay of the read operation is different. It can be understood that the NAND Flash media can be divided into 4 types, such as SLC, MLC, TLC and QLC, according to the amount of data stored in the cell, and the embodiment of the present application is more suitable for two NAND Flash media, namely TLC and QLC.

Step S603: storing the first data to the first storage area.

Specifically, the controller may store the first data to the first storage area in the memory directly through the received write command. Optionally, the controller receives the write command and analyzes the write command to obtain the task that the controller should perform. The controller directly stores the data obtained by the SSD through the data bus into the corresponding storage area according to the write command without passing through the controller. For example, referring to fig. 2, the SSD controller 203 stores read attribute data to the storage region 2021(LP) and the storage region 2023(UP) according to a write command.

According to the embodiment of the application, first data (the first data can be data needing to be quickly read from the SSD, such as one or more of data with a reading frequency higher than a preset frequency threshold value, data containing a specified identifier and data with a higher reading frequency in a data set, wherein the data set can comprise data received by the SSD from a Host once or multiple times) are identified from received data to be stored, and the first data are stored in a first storage area matched with the reading delay of the first data, so that the average reading delay generated in the process of reading the first data is reduced, and the service processing performance of a device configured with the SSD is improved. Compared with the prior art, the SSD controller needs multiple addressing processes to judge whether the read-write command hits the cache due to the fact that the cache module is arranged in the SSD; in the embodiment of the application, the cache module (or called data cache module) in the SSD can be removed, so that the production material cost is reduced under the condition of meeting a certain service requirement, and the phenomenon that the processing load of the SSD controller is increased due to the secondary addressing of the data cache module is avoided; more importantly, the data is purposefully and reasonably stored based on the characteristics of the SSD storage medium, the complexity of scheme implementation is reduced, and the effect of reducing the average SSD read delay is obvious.

Referring to fig. 10, fig. 10 is a schematic diagram of another data storage method of an SSD according to an embodiment of the present application, where the data storage method of a solid state disk is applied to a data storage system (including the system architecture) of the solid state disk. The data storage system of the solid state disk may include a master (e.g., a server or a processor of a computer) and a solid state disk SSD, where the SSD may include a controller and a memory therein. As will be described below with reference to the drawings from a single side of the controller in the solid state disk, the method may include the following steps S1001 to S1010, and the optional steps may further include the steps S1004 to S1010.

Step S1001: receiving data to be stored, and identifying first data in the data to be stored.

Specifically, please refer to the detailed description of step S601, which is not repeated herein.

In a possible implementation manner, the target data is data with a frequency higher than a preset frequency threshold value read from the SSD in a preset historical time period; the identifying of the first data in the data to be stored includes: and identifying part or all of the data to be stored, which has the same content as the target data, as the first data. For example, whether the two are identical is determined according to the conditions of whether the reading frequency is identical or not, whether the data valid bits are identical or not, and the like.

In a possible implementation manner, the target data is data with a frequency higher than a preset frequency threshold value read from the SSD in a preset historical time period; the identifying of the first data in the data to be stored includes: and identifying part or all of the data to be stored, which has the same type as the target data, as the first data. For example, whether the data source of part or all of the data to be stored is the same as or similar to the data source of the target data is judged; or whether the data belong to the data required by the same link of the business processing; or whether the reading requirements of part or all of the data to be stored and the target data are the same by a user (including a developer), and the like. The embodiment of the present application does not limit the specific recognition conditions.

In one possible implementation, the foregoing method further includes: counting the reading frequency of reading data from the SSD in a preset historical time period; and determining the data with the reading frequency higher than the preset frequency threshold value in the SSD as the target data. For example, the controller 201 determines the frequency of data read from the SSD within a preset historical period of time, and identifies data having a frequency higher than a preset frequency threshold as the target data. Wherein the target data may be data read from the SSD with a frequency higher than a preset frequency threshold. For example, in the case of reading user information (such as name, date of birth, transaction record, chat record, and the like) through the APP, the user information is data to be stored, and the content of the chat record, the name, and the like is each data in the data to be stored. The controller can calculate the historical reading frequency of the data according to the data type and the data object frequently called by the processor in the APP operation process. For example, the reading frequency corresponding to the chat record and the transaction record is higher than the preset frequency threshold, and these two types of data are data that are often read from the SSD, and can be identified (or determined) as the first data. Alternatively, the controller may perform a read frequency calculation for each time data in the data is received and stored for each copy of the data to be stored. Alternatively, the reading frequency of the history calculation may be kept for the same type or the same kind of data (for example, data such as a plurality of characters, pictures, and voices involved in the chat log), and then the data belonging to the chat log may be identified according to the reading frequency of the history calculation to determine whether the data is the first data. Alternatively, on the basis of the read frequency of the historical calculation, the read frequency of each type or kind of data may be updated in combination with the read frequency of the subsequent calculation.

Step S1002: selecting a first storage area matching the first data read latency from a plurality of storage areas of the SSD.

Specifically, please refer to the detailed description of step S602, which is not repeated herein.

Step S1003: storing the first data to the first storage area.

Specifically, please refer to the detailed description of step S603, which is not repeated herein.

Step S1004: and identifying second data in the data to be stored.

In particular, the second data may include data that is read from the SSD less frequently than the first data. For the process of specifically identifying the second data, reference may be made to the specific description of step S601, which is not described herein again.

Step S1005: selecting a second storage area matching the second data read latency from a plurality of storage areas of the SSD.

Specifically, the read time delay of the second memory area is higher than that of the first memory area. The specific process of selecting the second storage area may refer to the specific description of step S602, which is not described herein again.

Step S1006: storing the second data to the second storage area.

Specifically, the process of the controller 201 storing the second data in the second storage area may refer to the specific description of the foregoing step S603, and is not repeated herein.

Step S1007: and when the data volume of the first data is larger than the storage capacity of the first storage area, storing partial data in the first data into the second storage area.

Specifically, in the case that both the first data and the second data are stored in the data to be stored, when the data amount of the first data is larger than the storage capacity of the storage area capable of accommodating (or storing) the first data, the controller 201 stores a part of the first data (for example, the first data with a lower reading frequency in the first data) in the second storage area, so as to achieve flexible storage of the data. The partial data may comprise a portion of the first data that exceeds the storage capacity of the first storage area, e.g. where the portion of the first data has filled the first storage area, the portion of the first data that exceeds the storage capacity of the first storage area is stored to the second storage area. For another example, when the first storage area is not full of the first data, since the first data amount is larger than the capacity of the first storage area, the data therein may be sorted according to the read frequency, the data with the read frequency sorted earlier may be stored in the first storage area, and the remaining data may be selectively stored in the second storage area.

Optionally, the partial data may further include first data in other storage cases, for example, when the first storage area is not full of the first data, because the first data amount is greater than the capacity of the first storage area, the data in the first storage area may be sorted according to the reading frequency, the data with the reading frequency sorted earlier may be stored in the first storage area, and the remaining data may be selectively stored in the second storage area.

It should be understood that the scheme provided in the embodiment of the present application is a scheme for reducing the average read latency of the SSD, but when actual specific data is stored, a storage area may be flexibly matched for the data to be stored according to the data condition (such as data type, data amount, data length, and the like), so that not only is the storage of all data prevented from being lost, but also the read latency can be reduced to a certain extent.

Step S1008: and when the data volume of the second data is larger than the storage capacity of the second storage area, storing partial data in the second data into the first storage area.

Specifically, in the case that both the first data and the second data are stored in the data to be stored, when the data amount of the second data is larger than the storage capacity of the storage area capable of accommodating (or storing) the second data, the controller 201 stores a part of the second data in the first storage area, so as to achieve flexible storage of the data; furthermore, under the condition that the second data is high in proportion and the first storage area meets the requirement of first data storage, the first storage area is used for storing the second data, so that the requirement of fast reading of the first data can be met, the reading efficiency of the second data can be improved, and the reading time delay of the SSD is effectively reduced. The scheme provided by the embodiment of the application is a scheme for reducing the average read delay of the SSD, but when actual specific data is stored, it should be understood that a storage area is flexibly matched for the data to be stored according to the data condition (such as data type, data amount, data length, and the like), so that all data is stored to prevent loss, and the read delay can be reduced to a certain extent.

Step S1009: and caching the first data to the buffer storage area.

Specifically, in the acceleration scheme using step S1009, the subsequent controller 201 generally has the following two processing results for the received read command: (1) directly acquiring data from a buffer memory module, wherein the read delay is low under the operation; (2) acquiring data from the NAND Flash chip and synchronously storing the data in the buffer memory module, so that the time delay of a read command (namely the read time delay) is possibly higher than that of the result (1); therefore, the effect of reducing the read delay of the acceleration scheme is strongly related to the probability of directly acquiring data from the buffer storage area module. Although the above two processing cases are mentioned, the embodiment of the present application is explained on the premise of the second case. For example, the controller 201 of the SSD stores a part of the first data to the buffer memory area according to the write command; when the controller 201 receives the read command, the first data may be simultaneously queried and read from the buffer memory area and the memory 202, or the first data may be preferentially queried and read from the buffer memory area, and when the target first data fails to be searched in the buffer memory area, the target first data is then queried and read from the memory 202 of the SSD. The SSD may further include a buffer storage buffer; wherein the buffer memory area is used for storing the first data; the data caching (buffer storage area) module can be used for caching only data related to commands (which can comprise read commands and write commands) sent by the Host, and can also be used for caching metadata inside the SSD.

Optionally, after receiving the identified first data, the controller 201 stores the first data into the buffer storage area according to the identifier carried by the first data. According to the embodiment of the application, the first data can be identified by adopting the reading frequency of the statistical data inside the SSD (or the first data can be identified in other reasonable modes, which are not described herein any more), and the first data of the cache part of the buffer storage area of the SSD is combined on the basis of the scheme of identifying the first data and matching the corresponding storage area. For example, the identified first data portion is stored in a buffer memory area, while the same complete data is also backed up in a memory area where the memory 202 (i.e., NAND Flash media) matches. When the data needs to be read, the data may be read from the buffer storage area first. If the probability hits the required data during the first read, then no second addressing is needed. During the normal working process of the SSD after being electrified, the data can be directly read from the buffer storage area; even if the power is suddenly cut off, the data can be obtained from the memory for backup when the power is powered on for the next time, so that the average reading time delay is reduced, and the normal storage of the data is ensured.

Step S1010: and when a read command of the first data is received, preferentially reading the first data from the buffer storage area.

Specifically, SSD controller 201 preferentially reads a part or all of the first data of the storage buffer area from the buffer area according to a command of the first data (which may include a specific identifier of the first data or a storage area of the first data or a data amount of the first data); it will be appreciated that the preferential reading from the buffer memory area does not necessarily represent the first time the required data can be retrieved from the buffer memory area, since the required data may not be stored in the buffer memory area due to problems such as memory capacity.

In one possible implementation, SSD controller 201 identifies a read command from the received commands, preferentially processes the identified read command, and reads data matching the read command; furthermore, the embodiment of the application can be combined, so that the average read delay of the SSD is effectively reduced. Specifically, the SSD controller determines whether the command received or generated by the SSD controller is a read command; if the command is a read command, the SSD preferentially processes the read command and the related operations. The embodiment of the present application does not specifically describe and limit the processing manner of the read command (including the processing manner of the optimized read command).

Furthermore, the first data are identified according to the data characteristics of the first data from the data to be stored, so that the subsequent data classification storage is facilitated, and the first data are efficiently stored in the storage area matched with the reading time delay. The data characteristics may include that the reading frequency is higher than a preset frequency threshold, a specific identifier is included, the reading frequency is higher than a preset frequency threshold, and the like. Furthermore, the reading frequency of the data stored in the solid state disk is calculated, so that the optimization of the storage area of the stored data is facilitated, the data storage position can be adjusted according to the actual data reading condition, the data reading efficiency is improved, and the service processing performance of the main control equipment is further improved. Further, by identifying second data which accord with specific data characteristics (data characteristics different from the first data) and storing the second data in a second storage area matched with the reading time delay of the second data, the data is classified and stored, the data is effectively stored based on the characteristics of the storage area, and the data reading efficiency is improved. The second data corresponding to the specific data feature and the specific data feature are not limited in the embodiments of the present application.

Further, storing the data according to the relation between the data amount and the storage capacity of the storage area, such as storing part of the data to the first storage area when the second data amount is large; the data are flexibly stored according to the actual data volume condition, the storage area is effectively utilized, and the read time delay is reduced integrally.

Further, the buffer memory module may be newly added; storing a portion of the data via a buffer memory; under the condition that the SSD is normally powered on to work, a main control (such as a processor or a server) can directly obtain required data from a buffer storage area with probability, the average read delay of the SSD is further reduced on the basis of the embodiment of the application, and the method is suitable for application scenarios with low cost requirements and high data reading efficiency requirements. Compared with the built-in buffer storage area of the SSD in the prior art, the average read delay of the SSD can be reduced under the condition that the addressing fails for the first time and needs to be addressed for the second time.

Referring to fig. 11, fig. 11 is a schematic diagram of a data storage method of an SSD according to an embodiment of the present application, where the data storage method of a solid state disk is applied to a data storage system (including the system architecture) of the solid state disk. The data storage system of the solid state disk may include a master (e.g., a server or a processor of a computer) and a solid state disk SSD, where the SSD may include a controller and a memory therein. As will be described below with reference to fig. 11 from a single side of the controller in the solid state disk, the method may include the following steps S1101 to S1106, and the optional steps may further include steps S1104 to S1106.

Step S1101: receiving data to be stored, and identifying first data in the data to be stored.

Specifically, please refer to the detailed description of the step S601 corresponding to fig. 6, which is not repeated herein; the first data is data containing a designated identifier, and the designated identifier is used for indicating the reading delay requirement of the first data. For example, after the master identifies the data, the data has an identification of the first data. Or, the data a itself carries an identifier specifying the first data; the controller recognizes the data as the first data by the identification of the first data directly from the received data according to the write command.

Step S1102: and selecting a first storage area matched with the first data reading time delay from a plurality of storage areas of the SSD according to the specified identification.

Specifically, the specified identifier is used for indicating a read latency requirement of the first data; the first data is stored in a first storage area matching its expected read latency according to the content of the specified identifier (e.g. the specified identifier marks the specific read frequency or read priority of the first data, which can be considered to reflect the requirement of the read latency). For example, if the reading frequency of the first data is determined to be the highest from the identifier, the first data may be stored in a storage area with the smallest reading time delay in the SSD.

In a possible implementation manner, the data to be stored, which includes the specified identifier, is identified as the first data. For example, the controller 201 recognizes data carrying a specified identifier as the first data, where the data may be a field containing a fixed character at a position in the field of the data, or the data and the identifier may be bound together, but the identifier does not occupy the field of the data. For another example, the designated identifier may be an ID or a number corresponding to the data, taking number 1 as an example of the first data, and when it is recognized that the data number in the received command is 1, the corresponding data is stored in the first storage area. The specific form of the designated identifier and how the data comprises the designated identifier are not limited in the embodiments of the present application.

Step S1103: storing the first data to the first storage area.

Specifically, please refer to the detailed description of the step S603 corresponding to fig. 6, which is not repeated herein.

In one possible implementation, the method further includes: when the data volume of the first data is larger than the storage capacity of the first storage area, storing partial data in the first data into the second storage area; or when the data volume of the second data is larger than the storage capacity of the second storage area, storing partial data in the second data into the first storage area.

In one possible implementation, the SSD further includes a buffer storage area; the method further comprises the following steps: and caching the first data to the buffer storage area. Optionally, the caching the first data to the buffer storage area includes: and after receiving a write command of the first data, storing the first data into the buffer memory area according to the write command. Optionally, the method further comprises: and when a read command of the first data is received, preferentially reading the first data from the buffer storage area.

Step S1104: and identifying second data in the data to be stored.

Specifically, please refer to the detailed description of the foregoing step S1004 corresponding to fig. 10, which is not repeated herein; wherein the second data is data read from the SSD less frequently than the first data. For example, the specified identifier of the first data marks that the first data is high-frequency read data, and the read frequency of the second data should be lower than the read frequency of the first data within a certain interval, which is not inconsistent with other embodiments in the present application; for another example, the specific identification of the first data marks that the first data is low-frequency read data, and the read frequency of the second data should also be lower than the read frequency of the first data within a certain interval, and may even be similar to the read frequency of the first data.

In a possible implementation manner, data that does not include the identifier in the data to be stored is identified as second data, and the second data is stored in a storage area (such as the second storage area) with a higher read time delay, such as the non-first storage area.

In one possible implementation, the data identifier received by the SSD may also be used to mark the data as the first data, or mark the data as the second data. For example, the master marks the data C as high-frequency read data, and adds the field C when issuing a write command; when the SSD controller receives the command and the data through the interface, the SSD controller directly determines the data as first data (namely data read at high frequency) according to the field c, and then stores the first data into a first storage area with low read delay. Or, the master control marks the data C as low-frequency read data, and adds the field d when issuing a write command; when the SSD controller receives the command and the data through the interface, the SSD controller directly determines the data as second data (namely data read at low frequency) according to the field d and then stores the second data in a second storage area with high read delay. Optionally, the storage area can be changed according to the change situation of the reading frequency of the subsequent data; for example, data originally marked as high-frequency read data has a low read frequency in a subsequent period of time, and can be stored in other storage areas according to a certain rule, so that a storage space is vacated to facilitate writing of other high-frequency data; or, the data originally marked as low-frequency read data has a high read frequency in a subsequent period of time, and can be stored in the first storage area according to a certain rule, so that the data processing efficiency of the SSD can be improved, and the average read delay of the SSD is reduced.

Step S1105: selecting a second storage area matching the second data read latency from a plurality of storage areas of the SSD.

Specifically, please refer to the detailed description of the foregoing step S1005 corresponding to fig. 10, which is not repeated herein; wherein the read time delay of the second memory region is higher than that of the first memory region.

Step S1106: storing the second data to the second storage area.

Specifically, please refer to the detailed description of the step S1006 corresponding to fig. 10, which is not repeated herein.

Several embodiments of the method of the present application are set forth above in detail, and several related devices of the embodiments of the present application are provided below.

Referring to fig. 12, fig. 12 is a schematic structural diagram of a data storage device of an SSD according to an embodiment of the present application, where the data storage device 12 of the SSD includes a first receiving unit 1201, a first identifying unit 1202, a first selecting unit 1203, a first storage unit 1204, a first storage area classifying unit 1205, a first deciding unit 1206, a first buffering unit 1207, a first reading unit 1208, and a target data determining unit 1209, and optional units may include the first storage area classifying unit 1205, the first deciding unit 1206, the first buffering unit 1207, the first reading unit 1208, and the target data determining unit 1209. Wherein the content of the first and second substances,

a first receiving unit 1201, configured to receive data to be stored;

a first identifying unit 1202, configured to identify first data in the data to be stored, where the first data is data matched with target data, and the target data is data whose reading frequency from the SSD is higher than a preset frequency threshold;

a first selecting unit 1203, configured to select, from the multiple storage areas of the SSD, a first storage area that matches the first data read latency;

a first storage unit 1204, configured to store the first data in the first storage area.

In a possible implementation manner, the target data is data with a frequency higher than a preset frequency threshold value read from the SSD in a preset historical time period; the first identifying unit 1202 is specifically configured to: and identifying part or all of the data to be stored, which has the same content as the target data, as the first data.

In a possible implementation manner, the target data is data with a frequency higher than a preset frequency threshold value read from the SSD in a preset historical time period; the first identifying unit 1202 is specifically configured to: and identifying part or all of the data to be stored, which has the same type as the target data, as the first data.

In a possible implementation manner, the apparatus 12 further includes a first storage area classification unit 1205 configured to:

identifying second data in the data to be stored, wherein the second data is data which is read from the SSD at a lower frequency than the first data; it will be appreciated that the identification of the second data may also be handled by the aforementioned first identification unit 1202.

Selecting a second storage area matched with the second data read latency from a plurality of storage areas of the SSD, wherein the read latency of the second storage area is higher than that of the first storage area; it is understood that the primary function of the first storage region classification unit 1205 is to select an appropriate storage region according to storage data; for example, the storage units corresponding to the NAND Flash media in the memory are classified and managed according to characteristics such as read delay, for example, Lower pages with Lower read delay in all Flash particles are classified into a class of storage areas. The first storage area classifying unit 1205 may accept the call of the first storage unit 1204, that is, after the storage area selection is completed, the first storage unit 1204 may be used for storage.

Storing the second data to the second storage area. It is to be understood that the identifying, selecting (or matching), and storing functions of the first storage region classification unit 1205 mentioned in the embodiment of the present application are exemplary descriptions; the storage classifying unit may be combined with some other units, or may implement corresponding functions independently of other units, and therefore, the embodiment of the present application does not limit the specific functions of the storage classifying unit.

In a possible implementation manner, the foregoing apparatus further includes a target data determining unit 1209, configured to: counting the reading frequency of reading data from the SSD in a preset historical time period; and determining the data with the reading frequency higher than the preset frequency threshold value in the SSD as the target data.

In a possible implementation manner, the target data determining unit 1209 is specifically configured to:

counting the historical reading times of data stored in each of a plurality of storage areas of the SSD; and determining the reading frequency of the data stored in each storage area according to the historical reading times.

In one possible implementation, the SSD further includes a buffer storage area; the apparatus 12 further comprises a first buffer unit 1207 configured to: and caching the first data to the buffer storage area.

In a possible implementation manner, the first cache unit 1207 is specifically configured to:

and after receiving a write command of the first data, storing the first data into the buffer memory area according to the write command.

In a possible implementation manner, the apparatus 12 further includes a first reading unit 1208, configured to: and when a read command of the first data is received, preferentially reading the first data from the buffer storage area. Optionally, when the read command of the first data is received and the reading of the first data from the buffer memory area preferentially fails, the required data may also be read from the nand flash.

In a possible implementation manner, the apparatus 12 further includes a first decision unit 1206, configured to:

when the data volume of the first data is larger than the storage capacity of the first storage area, storing partial data in the first data into the second storage area; or when the data volume of the second data is larger than the storage capacity of the second storage area, storing partial data in the second data into the first storage area.

According to the embodiment of the application, the receiving unit is used for receiving the data to be stored, identifying the first data from the data, selecting a proper first storage area according to the selecting unit, and storing the first data to the first storage area matched with the reading delay of the first data based on the storage unit, so that the average reading delay generated in the process of reading the first data is reduced, and the service processing performance of the device configured with the SSD is improved. The first data may be data that needs to be quickly read from the SSD, such as one or more of data that is read from the SSD with a frequency higher than a preset frequency threshold, data that includes a designated identifier, and data that is read with a higher frequency from a data set, where the data set may include data that the SSD receives from Host one or more times. Compared with the prior art, the SSD controller needs multiple addressing processes to judge whether the read-write command hits the cache due to the fact that the cache module is arranged in the SSD; in the embodiment of the application, the cache module (or called data cache module) in the SSD can be removed, so that the production material cost is reduced under the condition of meeting a certain service requirement, and the phenomenon that the processing load of the SSD controller is increased due to the secondary addressing of the data cache module is avoided; more importantly, the data is purposefully and reasonably stored based on the characteristics of the SSD storage medium, the complexity of scheme implementation is reduced, and the effect of reducing the average SSD read delay is obvious.

Furthermore, the identification unit in the receiving unit identifies the first data from the data to be stored according to the data characteristics of the first data, which is beneficial to facilitating the subsequent data classification storage and efficiently storing the first data to the storage area matched with the reading time delay. The data characteristics may include that the reading frequency is higher than a preset frequency threshold, a specific identifier is included, the reading frequency is higher than a preset frequency threshold, and the like. Furthermore, the reading frequency of the data stored in the solid state disk is calculated through the identification unit, so that the optimization of the storage area of the stored data is facilitated, the data storage position can be adjusted according to the actual data reading condition, the data reading efficiency is improved, and the service processing performance of the main control device is further improved. Furthermore, second data which accords with specific data characteristics (data characteristics different from the first data) are identified through the storage area classification unit, the second data are stored in a second storage area which is matched with the reading time delay of the second data, the data are classified and stored, the data are effectively stored based on the characteristics of the storage area, and the data reading efficiency is improved. The second data corresponding to the specific data feature and the specific data feature are not limited in the embodiments of the present application. Further, storing the data according to the relation between the data amount and the storage capacity of the storage area through the decision unit, such as storing part of the data to the first storage area when the second data amount is large; the data are flexibly stored according to the actual data volume condition, the storage area is effectively utilized, and the read time delay is reduced integrally. Further, part of the data may be stored by an added buffer memory area; under the condition that the SSD is normally powered on to work, a main control (such as a processor or a server) can directly obtain required data from a buffer storage area with probability, the average read delay of the SSD is further reduced on the basis of the embodiment of the application, and the method is suitable for application scenarios with low cost requirements and high data reading efficiency requirements. Compared with the built-in buffer storage area of the SSD in the prior art, the average read delay of the SSD can be reduced under the condition that the addressing fails for the first time and needs to be addressed for the second time.

It should be noted that, for the data storage device of the solid state disk SSD described in the embodiment of the present application, reference may be made to the related description of the data storage method of the solid state disk SSD in the method embodiments described in fig. 6, fig. 10, and fig. 11, and details are not repeated herein. It can be understood that, in the embodiments of the present application, the functions of the units related to the data storage device of the solid state disk SSD are partial functions of the SSD controller, but do not include all functions of the SSD controller; for example, the data storage device mentioned in the embodiments of the present application does not include the description of the process of reading data and the related functions in general; however, in practical application scenarios, the device generally reads or writes data and performs related operations, which are not described in the embodiments of the present application.

Referring to fig. 13, fig. 13 is a schematic structural diagram of another SSD data storage device provided in this embodiment, where the data storage device 13 of the solid state disk SSD may include a second receiving unit 1301, a second identifying unit 1302, a second selecting unit 1303, a second storing unit 1304, a second storage area classifying unit 1305, a second deciding unit 1306, a second caching unit 1307, and a second reading unit 1308, and optional units may include the second storage area classifying unit 1305, the second deciding unit 1306, the second caching unit 1307, and the second reading unit 1308. Wherein the content of the first and second substances,

a second receiving unit 1301, configured to receive data to be stored;

a second identifying unit 1302, configured to identify first data in the data to be stored, where the first data is data including a specific identifier, and the specific identifier is used to indicate a read latency requirement of the first data;

a second selecting unit 1303, configured to select, from the multiple storage areas of the SSD, a first storage area matched with the first data read latency according to the specified identifier;

a second storage unit 1304 is used for storing the first data into the first storage area.

In a possible implementation manner, the foregoing apparatus further includes a second storage area classification unit 1305, configured to: identifying second data in the data to be stored, wherein the second data is data which is read from the SSD and has lower frequency than the first data; selecting a second storage area matched with the second data read delay from a plurality of storage areas of the SSD, wherein the read delay of the second storage area is higher than that of the first storage area; and storing the second data in the second storage area.

In a possible implementation manner, the SSD further includes a buffer storage area; the foregoing apparatus further includes a second buffering unit 1307, configured to: and caching the first data into the buffer memory area.

In a possible implementation manner, the second buffer unit 1307 is specifically configured to: and after receiving the write command of the first data, storing the first data into the buffer memory area according to the write command.

In a possible implementation manner, the foregoing apparatus further includes a second reading unit 1308 configured to: when receiving the read command of the first data, the first data is preferentially read from the buffer memory area.

In a possible implementation manner, the foregoing apparatus further includes a second decision unit 1306, configured to: when the data volume of the first data is larger than the storage capacity of the first storage area, storing partial data in the first data into the second storage area; or storing partial data in the second data into the first storage area when the data amount of the second data is larger than the storage capacity of the second storage area.

The embodiment of the present application further provides a computer storage medium, where the computer storage medium may store a program, and the program may execute some or all of the steps described in the method embodiments corresponding to fig. 6, fig. 10, and fig. 11.

Embodiments of the present application further provide a computer program, where the computer program includes instructions, and when the computer program is executed by a computer, the computer may perform part or all of the steps in any one of the method embodiments described in the above-described method embodiments corresponding to fig. 6, fig. 10, and fig. 11.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the application. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required in this application.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the above-described division of the units is only one type of division of logical functions, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of some interfaces, devices or units, and may be an electric or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated unit may be stored in a computer-readable storage medium if it is implemented in the form of a software functional unit and sold or used as a separate product. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed to by the prior art, or all or part of the technical solution may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, a network device, or the like, and may specifically be a processor in the computer device) to execute all or part of the steps of the above-described method of the embodiments of the present application. The storage medium may include: a U-disk, a removable hard disk, a magnetic disk, an optical disk, a Read-Only Memory (ROM) or a Random Access Memory (RAM), and the like.

The above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.

Claims

A data storage method of a Solid State Disk (SSD) is characterized by comprising the following steps:

receiving data to be stored, and identifying first data in the data to be stored, wherein the first data is matched with target data, and the target data is data with a reading frequency higher than a preset frequency threshold value from the SSD;

selecting a first storage area matched with the first data reading time delay from a plurality of storage areas of the SSD;

storing the first data to the first storage area.
The method of claim 1, wherein the target data is data read from the SSD with a frequency above a preset frequency threshold for a preset historical period of time; the identifying first data in the data to be stored includes:

and identifying part or all of the data which is the same as the target data in the data to be stored as the first data.
The method of claim 1, wherein the target data is data read from the SSD with a frequency above a preset frequency threshold for a preset historical period of time; the identifying first data in the data to be stored includes:

and identifying part or all of the data with the same type as the target data in the data to be stored as the first data.
The method according to any one of claims 1-3, further comprising:

identifying second data in the data to be stored, wherein the second data is data which is read from the SSD at a lower frequency than the first data;

selecting a second storage area matched with the second data read latency from a plurality of storage areas of the SSD, wherein the read latency of the second storage area is higher than that of the first storage area;

storing the second data to the second storage area.
The method of claim 1, further comprising:

counting the reading frequency of reading data from the SSD in a preset historical time period;

and determining the data with the reading frequency higher than the preset frequency threshold value in the SSD as the target data.
The method of any of claims 1-5, wherein the SSD further comprises a buffer storage area; the method further comprises the following steps:

and caching the first data to the buffer storage area.
The method of claim 6, further comprising:

and when a read command of the first data is received, preferentially reading the first data from the buffer storage area.
A data storage method of a Solid State Disk (SSD) is characterized by comprising the following steps:

receiving data to be stored, and identifying first data in the data to be stored, wherein the first data is data containing a specified identifier, and the specified identifier is used for indicating the reading delay requirement of the first data;

selecting a first storage area matched with the first data reading time delay from a plurality of storage areas of the SSD according to the appointed identification;

storing the first data to the first storage area.
The method of claim 8, further comprising:

identifying second data in the data to be stored, wherein the second data is data which is read from the SSD at a lower frequency than the first data;

selecting a second storage area matched with the second data read latency from a plurality of storage areas of the SSD, wherein the read latency of the second storage area is higher than that of the first storage area;

storing the second data to the second storage area.
The method of claim 8 or 9, wherein the SSD further comprises a buffer storage area; the method further comprises the following steps:

and caching the first data to the buffer storage area.
The method of claim 10, further comprising:

and when a read command of the first data is received, preferentially reading the first data from the buffer storage area.
A Solid State Disk (SSD) is characterized by comprising a controller and a memory connected with the controller; the memory comprises a plurality of different types of memory areas, and the read time delay of each type of memory area is different;

the controller is configured to:

receiving data to be stored, and identifying first data in the data to be stored, wherein the first data is matched with target data, and the target data is data with a reading frequency higher than a preset frequency threshold value from the SSD;

selecting a first storage area matched with the first data reading time delay from the plurality of storage areas;

storing the first data to the first storage area;

the first storage area is used for storing the first data.
The SSD according to claim 12, wherein the destination data is data read from the SSD more frequently than a preset frequency threshold over a preset historical period of time; the controller is specifically configured to:

and identifying part or all of the data which is the same as the target data in the data to be stored as the first data.
The SSD according to claim 12, wherein the destination data is data read from the SSD more frequently than a preset frequency threshold over a preset historical period of time; the controller is specifically configured to:

and identifying part or all of the data with the same type as the target data in the data to be stored as the first data.
The SSD according to any of claims 12-14, wherein the controller is further configured to:

identifying second data in the data to be stored, wherein the second data is data which is read from the SSD at a lower frequency than the first data;

selecting a second storage area matched with the second data read delay from the plurality of storage areas, wherein the read delay of the second storage area is higher than that of the first storage area;

storing the second data to the second storage area;

the second storage area is used for storing the second data.
The SSD of claim 12, wherein the controller is further configured to:

counting the reading frequency of reading data from the SSD in a preset historical time period;

and determining the data with the reading frequency higher than the preset frequency threshold value in the SSD as the target data.
The SSD according to any of claims 12-16, wherein the SSD further comprises a buffer storage area; the buffer memory area is connected with the controller;

the controller is further configured to: caching the first data to the buffer storage area;

the buffer memory area is used for storing the first data.
The SSD of claim 17, wherein the controller is further configured to:

and when a read command of the first data is received, preferentially reading the first data from the buffer storage area.
A Solid State Disk (SSD) is characterized by comprising a controller and a memory connected with the controller; the memory comprises a plurality of different types of memory areas, and the read time delay of each type of memory area is different;

the controller is configured to:

receiving data to be stored, and identifying first data in the data to be stored, wherein the first data is data containing a specified identifier, and the specified identifier is used for indicating the reading delay requirement of the first data;

selecting a first storage area matched with the first data reading time delay from the plurality of storage areas according to the specified identification;

storing the first data to the first storage area;

the first storage area is used for storing the first data.
The SSD of claim 19, wherein the controller is further configured to:

identifying second data in the data to be stored, wherein the second data is data which is read from the SSD at a lower frequency than the first data;

selecting a second storage area matched with the second data read delay from the plurality of storage areas, wherein the read delay of the second storage area is higher than that of the first storage area;

storing the second data to the second storage area;

the second storage area is used for storing the second data.
The SSD according to claim 19 or 20, wherein the SSD further comprises a buffer storage area; the buffer memory area is connected with the controller;

the controller is further configured to: caching the first data to the buffer storage area;

the buffer memory area is used for storing the first data.
The SSD of claim 21, wherein the controller is further configured to:

and when a read command of the first data is received, preferentially reading the first data from the buffer storage area.
A chipset comprising at least one processor, at least one first memory, and at least one second memory; wherein the at least one first memory and the at least one processor are interconnected by a line, the first memory having instructions stored therein; when the instructions are executed by the processor, the method of any one of claims 1-11 is implemented; the at least one second memory and the at least one processor are interconnected by a line, and the second memory stores data to be stored in the method of any one of claims 1 to 11.