CN114301397A - Single-channel power amplifier with out-of-band rejection and design method thereof - Google Patents
Single-channel power amplifier with out-of-band rejection and design method thereof Download PDFInfo
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- CN114301397A CN114301397A CN202111676442.4A CN202111676442A CN114301397A CN 114301397 A CN114301397 A CN 114301397A CN 202111676442 A CN202111676442 A CN 202111676442A CN 114301397 A CN114301397 A CN 114301397A
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Abstract
The invention discloses a design method of a single-channel power amplifier with out-of-band rejection, which comprises the following steps: the input end of the Mos tube is connected with a broadband impedance matching circuit, the input end of the broadband impedance matching circuit is used as the input end of the power amplifier, the output end of the Mos tube is connected with a three-frequency impedance matching circuit, the output end of the three-frequency impedance matching circuit is used as the output end of the power amplifier, and the single-channel power amplifier with out-of-band rejection is provided. The method for constructing the single-channel impedance matching circuit selects the out-of-band frequency to be suppressed for suppression, namely two out-of-band suppression frequencies can be selected. The size and the volume are small, the insertion loss is small, and the design method is simple.
Description
Technical Field
The invention relates to the technical field of electronics, in particular to a design method of a single-channel power amplifier with out-of-band rejection.
Background
Research shows that in the design of a single-channel power amplifier with harmonic wave suppression function, the method of directly connecting a band-pass filter with the output end of a power amplifier and the method of designing a harmonic wave control circuit both enable the circuit to have large volume and size, and are not beneficial to miniaturization design.
The method of connecting branch load lines in parallel in the matching circuit to generate transmission zero point may deteriorate the overall performance (efficiency, output power, etc.) of the power amplifier.
The method for designing the filter and the power amplifier in a fusion mode is complex, and the performance of the whole circuit is not good.
Therefore, the above design methods are difficult to achieve with small size and small insertion loss, while ensuring a certain out-of-band rejection, and the design methods are relatively simple.
Disclosure of Invention
The technical problem to be solved by the invention is that the prior art is difficult to realize small size and volume, has small insertion loss, has out-of-band rejection and simple design method, and aims to provide a design method of a single-channel power amplifier with out-of-band rejection.
The invention is realized by the following technical scheme:
a method of designing a single channel power amplifier with out-of-band rejection, comprising the steps of:
the input end of the Mos tube is connected with a broadband impedance matching circuit, the input end of the broadband impedance matching circuit is used as the input end of the power amplifier, the output end of the Mos tube is connected with a three-frequency impedance matching circuit, and the output end of the three-frequency impedance matching circuit is used as the output end of the power amplifier;
selecting three frequency points f1, f2 and f3 at the input end and the output end of the power amplifier, wherein f2 is the required frequency, and f1 and f3 are used as out-of-band rejection frequencies;
setting Zo1, Zo2 and Zo3 as maximum efficiency output impedances found out by load traction at three frequency points f1, f2 and f3 respectively, wherein Z1, Z2 and Z3 are impedances which need to be matched by a three-frequency impedance matching circuit at three frequency points f1, f2 and f 3;
matching the load to an impedance Z1 away from the center of a Smith's equivalent ratio circle at frequency f1, where Zo1 is the center of the Smith's equivalent ratio circle for load pulling at frequency f1, Zo1< Z1 or Zo1> Z1;
matching the load to an impedance Z3 away from the center of the Smith equivalent ratio circle at frequency f3, where Zo3 is the center of the Smith equivalent ratio circle that draws the load at frequency f3, Zo3< Z3 or Zo3> Z3.
In some embodiments, the tri-band impedance matching circuit comprises a Ya circuit and a Yb circuit, and parameters of microstrip lines in the circuit are parameters at a frequency f1, wherein a cross circuit of the Ya circuit mainly matches a load 50 Ω to real parts of complex impedances Z1, Z2 and Z3, and a Yb circuit compensates imaginary parts of Z1, Z2 and Z3.
In some embodiments, Y is Ya + Yb in the tri-band impedance matching circuit, and
in the frequency f1, 1/Z1 ═ G1+ j × B1;
in the frequency f2, 1/Z2 ═ G2+ j × B2;
in the frequency f3, 1/Z3 ═ G3+ j × B31+ j × B32;
where G1, G2, G3+ j B31 are admittances viewed from plane a to the right at frequencies f1, f2, f3, respectively, and j B1, j B2, jB32 are admittances viewed from plane B to the up at frequencies f1, f2, f3, respectively.
In some embodiments, the ABCD transmission matrix of the crossbar circuit is equal to the ABCD transmission matrix of the quarter-wavelength transmission line at frequencies f1, f2, wherein the ABCD transmission matrix of the crossbar circuit is:
in some embodiments, the ABCD transmission matrix of the quarter-wave transmission line is:
in some embodiments, at frequency f3, the ABCD transmission matrix at f3 viewed from the right at plane a is calculated:
and when the frequency is f3, there are:
in some embodiments of the present invention, the substrate is,
the YT1+ YT2 values at f1 and f2 were calculated, and at frequencies f1 and f 2:
wherein, thetaT2For a known parameter, ZT2，ZT3，θT3For unknown parameters, Z can be adjustedT2To calculate two other unknown parameters and also to optimize the circuit dimensions.
In some embodiments, where Z0 is the characteristic impedance of a quarter wave transmission line,
let a ═ D ═ 0, give:
substituting the above equation into B and C of the transmission matrix can result in:
Z0＝Zstanθs。
in some embodiments, the crossbar circuit has characteristic impedances at f1 and f 2:
Z01＝Zstanθs；
Z02＝Zstanmθs。
in some embodiments, where m is f2/f1, and since the admittance at f1 and f2 is G1 and G2, as viewed to the right at plane a, there are:
where GL is load impedance 50 Ω, Zs and θ s can be solved by solving the above 4 formulas in parallel.
Another object of the present invention is to provide a single-channel power amplifier with out-of-band rejection, so as to achieve a small size and a small insertion loss, and ensure that a certain out-of-band rejection includes:
an amplifier input provided with a 50 Ω load;
the input end of the broadband impedance matching circuit is connected to the input end of the amplifier;
the input end of the MOS tube is connected to the output end of the broadband impedance matching circuit;
the input end of the three-frequency impedance matching circuit is connected to the output end of the MOS tube;
the amplifier output end is provided with a 50 omega load and is connected to the output end of the three-frequency impedance matching circuit;
the grid bias circuit is connected to the input end of the MOS tube;
and the drain electrode deflection circuit is connected to the output end of the MOS tube.
Compared with the prior art, the invention has the following advantages and beneficial effects:
the invention discloses a method for constructing a single-channel impedance matching circuit, which combines a three-frequency impedance matching network and a power amplifier together, matches frequency points at two ends to a point far away from an optimal impedance matching point so as to form the single-channel impedance matching network with certain out-of-band rejection, and adopts a method for designing a circuit by using the three-frequency impedance matching. The method can be used as an output matching network of a single-channel power amplifier, and the single-channel power amplifier can have a certain out-of-band rejection degree. The size and the volume are small, the insertion loss is small, and the design method is simple.
Drawings
In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and that for those skilled in the art, other related drawings can be obtained from these drawings without inventive effort. In the drawings:
FIG. 1 is a schematic block diagram of a single channel power amplifier according to an embodiment of the present invention;
FIG. 2 is a three-frequency impedance matching circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a single channel power amplifier circuit according to an embodiment of the present invention;
FIG. 4a is a graph of power added efficiency according to an embodiment of the present invention;
FIG. 4b is a gain curve according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to examples and accompanying drawings, and the exemplary embodiments and descriptions thereof are only used for explaining the present invention and are not meant to limit the present invention.
A method of designing a single channel power amplifier with out-of-band rejection, comprising the steps of:
the input end of the Mos tube is connected with the broadband impedance matching circuit, the input end of the broadband impedance matching circuit is used as the input end of the power amplifier, the output end of the Mos tube is connected with the three-frequency impedance matching circuit, and the output end of the three-frequency impedance matching circuit is used as the output end of the power amplifier.
In this step, the Mos transistor, the broadband impedance matching circuit, and the triple-band impedance matching circuit are formed as part of an amplifier circuit, so that the amplifier can be calculated and adapted by using the broadband impedance matching circuit and the triple-band impedance matching circuit.
Three frequency points f1, f2 and f3 are selected at the input and output of the power amplifier, wherein f2 is the required frequency, and f1 and f3 are used as out-of-band rejection frequencies.
In this step, the effect is achieved by setting three bins at the input and output ends, respectively, and by setting f2 to a single channel frequency, and f1 and f3 to a suppression bin.
Setting Zo1, Zo2 and Zo3 as maximum efficiency output impedances found out by load pulling at three frequency points f1, f2 and f3, respectively, and setting Z1, Z2 and Z3 as impedances to be matched by the three-frequency impedance matching circuit at three frequency points f1, f2 and f 3.
In this step, by first setting the output impedance of the maximum efficiency at three frequency points, the impedance is formed in the three-frequency impedance matching circuit in accordance with the neglected impedance of the maximum efficiency.
Matching the load to an impedance Z1 away from the center of the Smith equivalent ratio circle at frequency f1, where Zo1 is the center of the Smith equivalent ratio circle that draws the load at frequency f1, Zo1< Z1 or Zo1> Z1. In order to ensure that the circuit has a good suppression degree under the frequency f1, the impedance Z1 is selected to deviate from the center Zo1 as much as possible; but limited by the tri-band impedance matching circuit, the impedance Z1 cannot be too far off center.
Matching the load to an impedance Z3 away from the center of the Smith equivalent ratio circle at frequency f3, where Zo3 is the center of the Smith equivalent ratio circle that draws the load at frequency f3, Zo3< Z3 or Zo3> Z3. In order to ensure that the circuit has a good suppression degree under the frequency f3, the impedance Z3 is selected to deviate from the center Zo3 as much as possible; but limited by the tri-band impedance matching circuit, the impedance Z3 cannot be too far off center.
In some embodiments, the tri-band impedance matching circuit includes a Ya and Yb two-part circuit, and parameters of microstrip lines in the circuit are parameters at a frequency f1, wherein a cross circuit of the Ya part circuit mainly matches a load 50 Ω to real parts of complex impedances Z1, Z2 and Z3, and the Yb part circuit compensates imaginary parts of Z1, Z2 and Z3.
In some embodiments, Y is Ya + Yb in the tri-band impedance matching circuit, and
in the frequency f1, 1/Z1 ═ G1+ j × B1;
in the frequency f2, 1/Z2 ═ G2+ j × B2;
in the frequency f3, 1/Z3 ═ G3+ j × B31+ j × B32;
where G1, G2, G3+ j B31 are admittances viewed from plane a to the right at frequencies f1, f2, f3, respectively, and j B1, j B2, jB32 are admittances viewed from plane B to the up at frequencies f1, f2, f3, respectively.
Further, the ABCD transmission matrix of the cross circuit is equal to the ABCD transmission matrix of the quarter-wavelength transmission line at frequencies f1, f2, wherein the ABCD transmission matrix of the cross circuit is:
in some embodiments, the ABCD transmission matrix of the quarter-wave transmission line is:
further, at frequency f3, the ABCD transmission matrix at f3 viewed from the right at plane a is calculated:
and when the frequency is f3, there are:
further, the air conditioner is provided with a fan,
the YT1+ YT2 values at f1 and f2 were calculated, and at frequencies f1 and f 2:
wherein, thetaT2For a known parameter, ZT2，ZT3，θT3For unknown parameters, Z can be adjustedT2To calculate two other unknown parameters and also to optimize the circuit dimensions.
Further, wherein Z0Is the characteristic impedance of a quarter-wavelength transmission line,
let a ═ D ═ 0, give:
substituting the above equation into B and C of the transmission matrix can result in:
Z0＝Zstanθs。
further, the cross circuit has characteristic impedances at f1 and f 2:
Z01＝Zstanθs；
Z02＝Zstanmθs。
further, since the admittance at f1 and f2 is G1 and G2 as viewed from the right at the plane a, where m is f2/f1, there are:
where GL is load impedance 50 Ω, Zs and θ s can be solved by solving the above 4 formulas in parallel.
A single channel power amplifier with out-of-band rejection, comprising:
and the input end of the amplifier is provided with a 50 omega load.
The whole amplifier needs signal input, namely, the signal input is carried out from the input end of the amplifier.
The input end of the broadband impedance matching circuit is connected with the input end of the amplifier.
And the input signal is correspondingly processed through a broadband impedance matching circuit.
And the input end of the MOS tube is connected with the output end of the broadband impedance matching circuit.
The MOS tube is a necessary component in the amplifier circuit and is used for signal amplification.
And the input end of the three-frequency impedance matching circuit is connected to the output end of the MOS tube.
As mentioned above, the design of the three-frequency impedance matching circuit is realized
The output end of the amplifier is provided with a 50 omega load and is connected with the output end of the three-frequency impedance matching circuit;
the grid bias circuit is connected to the input end of the MOS tube;
and the drain electrode biasing circuit is connected to the output end of the MOS tube.
The invention designs a single-channel power amplifier with 2.6GHz and enables the single-channel power amplifier to be restrained at 2GHz and 3GHz during implementation. The transistor of the amplifier adopts CGH40010-F of CREE company, and the output power of the transistor can reach 10W. As shown in fig. 3, the whole structure of the amplifier is implemented by microstrip lines, the input matching network is formed by connecting four microstrip lines in series, which are obtained by a commonly used broadband impedance matching algorithm, and the output matching network is implemented by a single-channel matching circuit provided by the invention (which is essentially a three-frequency impedance matching network, and the specific structure is shown in fig. 2).
Fig. 4 shows the design result of the single-channel power amplifier proposed by the present invention: when the input power is 28dBm, the power added efficiency of 2.6GHz is about 70%, the gain is greater than 12dB, and certain inhibition degrees are also arranged at the positions of 2GHz and 3GHz outside the band.
The method of the invention can be used for designing a single-channel power amplifier, a dual-band power amplifier and even a multi-band power amplifier, the principle is the same, for example, the dual-band power amplifier with out-of-band rejection is designed, a four-band impedance matching circuit can be selected as a matching circuit of the output end of the power amplifier, wherein the middle two frequencies are optimally matched in impedance, and the two frequencies at the two ends are matched to a certain impedance far away from the optimal impedance matching point, so that the purpose of out-of-band rejection is achieved.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are merely exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (10)
1. A method of designing a single channel power amplifier with out-of-band rejection, comprising the steps of:
the input end of the Mos tube is connected with a broadband impedance matching circuit, the input end of the broadband impedance matching circuit is used as the input end of the power amplifier, the output end of the Mos tube is connected with a three-frequency impedance matching circuit, and the output end of the three-frequency impedance matching circuit is used as the output end of the power amplifier;
selecting three frequency points f1, f2 and f3 at the input end and the output end of the power amplifier, wherein f2 is the required frequency, and f1 and f3 are used as out-of-band rejection frequencies;
setting Zo1, Zo2 and Zo3 as maximum efficiency output impedances found out by load traction at three frequency points f1, f2 and f3 respectively, wherein Z1, Z2 and Z3 are impedances which need to be matched by a three-frequency impedance matching circuit at three frequency points f1, f2 and f 3;
matching the load to an impedance Z1 away from the center of a Smith's equivalent ratio circle at frequency f1, where Zo1 is the center of the Smith's equivalent ratio circle for load pulling at frequency f1, Zo1< Z1 or Zo1> Z1;
matching the load to an impedance Z3 away from the center of the Smith equivalent ratio circle at frequency f3, where Zo3 is the center of the Smith equivalent ratio circle that draws the load at frequency f3, Zo3< Z3 or Zo3> Z3.
2. The method of claim 1, wherein the tri-band impedance matching circuit comprises Ya and Yb two-part circuits, and the parameters of microstrip lines in the Ya part circuit are all parameters at frequency f1, wherein the cross circuit of the Ya part circuit mainly matches load 50 Ω to real part of complex impedance Z1, Z2, Z3, and the Yb part circuit compensates for imaginary part of Z1, Z2, Z3.
3. The method of claim 2, wherein Y is Ya + Yb in the tri-band impedance matching circuit, and wherein Y is Ya + Yb
In the frequency f1, 1/Z1 ═ G1+ j × B1;
in the frequency f2, 1/Z2 ═ G2+ j × B2;
in the frequency f3, 1/Z3 ═ G3+ j × B31+ j × B32;
where G1, G2, G3+ j B31 are admittances viewed from plane a to the right at frequencies f1, f2, f3, respectively, and j B1, j B2, jB32 are admittances viewed from plane B to the up at frequencies f1, f2, f3, respectively.
4. The method of designing a single channel power amplifier with out-of-band rejection of claim 3, wherein the ABCD transmission matrix of the crossbar circuit is equal to the ABCD transmission matrix of a quarter-wavelength transmission line at frequencies f1, f2, wherein the ABCD transmission matrix of the crossbar circuit is:
5. the method of designing a single channel power amplifier with out-of-band rejection of claim 4, wherein the ABCD transmission matrix for the quarter-wave transmission line is:
6. the method of claim 5, wherein at frequency f3, the ABCD transmission matrix at f3 viewed from plane A to the right is calculated as:
and when the frequency is f3, there are:
7. the method of designing a single channel power amplifier with out-of-band rejection of claim 6,
y was calculated at f1 and f2T1+YT2Since at frequencies f1, f2, there are:
wherein, thetaT2For a known parameter, ZT2，ZT3，θT3For unknown parameters, Z can be adjustedT2To calculate two other unknown parameters and also to optimize the circuit dimensions.
8. The method of designing a single channel power amplifier with out-of-band rejection of claim 7, wherein the crossbar circuit has characteristic impedances at f1 and f 2:
Z01＝Zstanθs；
Z02＝Zstanmθs。
9. the method of claim 1, wherein m-f 2/f1, and because the admittance at f1 and f2, viewed from the right at plane a, is G1 and G2, then:
where GL is load impedance 50 Ω, Zs and θ s can be solved by solving the above 4 formulas in parallel.
10. A single channel power amplifier with out-of-band rejection, comprising:
an amplifier input provided with a 50 Ω load;
the input end of the broadband impedance matching circuit is connected to the input end of the amplifier;
the input end of the MOS tube is connected to the output end of the broadband impedance matching circuit;
the input end of the three-frequency impedance matching circuit is connected to the output end of the MOS tube;
the amplifier output end is provided with a 50 omega load and is connected to the output end of the three-frequency impedance matching circuit;
the grid bias circuit is connected to the input end of the MOS tube;
and the drain electrode deflection circuit is connected to the output end of the MOS tube.
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