CN114301322B - Seven-level MPUC inverter unit master-slave type RPWM selective harmonic elimination method - Google Patents

Seven-level MPUC inverter unit master-slave type RPWM selective harmonic elimination method Download PDF

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CN114301322B
CN114301322B CN202111669001.1A CN202111669001A CN114301322B CN 114301322 B CN114301322 B CN 114301322B CN 202111669001 A CN202111669001 A CN 202111669001A CN 114301322 B CN114301322 B CN 114301322B
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CN114301322A (en
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李国华
沈豪杰
柳广达
王良君
曹冬满
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Liaoning Technical University
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Abstract

The invention provides a master-slave type RPWM selective harmonic elimination method of a seven-level MPUC inverter unit, and relates to the technical field of single-phase inverter pulse width modulation. The method takes 1U-shaped unit in a seven-level MPUC inverter as 1 basic unit, divides the inverter into three basic units which are connected in series, determines a master unit and a slave unit, analyzes the relation between the total voltage harmonic of the inverter and the voltage harmonic of each unit aiming at a master-slave structure, and determines the feasibility of selectively eliminating the harmonic; the coordination control among the units is realized by utilizing a carrier lamination strategy, the functions of the master unit and the slave unit are determined by a unit master-slave carrier lamination RPWM selective harmonic elimination method, and the carrier and the modulation wave corresponding to the master unit and the slave unit are further obtained; the method can realize RPWM selective harmonic elimination and lower harmonic frequency elimination, and avoid the increase of current distortion rate and unnecessary level inversion in output voltage.

Description

Seven-level MPUC inverter unit master-slave type RPWM selective harmonic elimination method
Technical Field
The invention relates to the technical field of single-phase inverter pulse width modulation, in particular to a master-slave type RPWM selective harmonic elimination method of a seven-level MPUC inverter unit.
Background
The random pulse width modulation (Random Pulse Width Modulation, RPWM) strategy is an effective method to suppress the problems of electromagnetic interference and electromagnetic noise of power electronic converters. As shown in FIG. 1, the RPWM can be divided into: random lead-lag, random zero vector distribution modulation, random displacement of pulse centers, random pulse position modulation, random phase-shifting pulse width modulation, variable-delay random pulse width modulation, asymmetric carrier random pulse width modulation, independent random pulse position, fractal-based space vector modulation and the like. Conventional RPWMs are typically not capable of selectively eliminating specific subfrequency harmonics. For example, a specific subharmonic having a high hazard such as a resonance frequency of a load.
Currently, there are few literature on RPWM selective harmonic cancellation, which can be generalized to class 2 methods: firstly, in the RPWM random spread spectrum process, a digital filter is utilized to avoid a designated frequency range, but the method is relatively complex and has large calculated amount; and the harmonic power in the designated frequency range is not eliminated, but is not increased on the original basis. Secondly, specific frequency harmonic waves are eliminated through a calculation method, and compared with a digital filter method, the method has the advantages that the specific frequency harmonic waves can be completely eliminated theoretically, and the algorithm is simple; however, this method generally hardly eliminates the harmonic wave below 20kHz, and when the harmonic wave below 20kHz frequency is eliminated after optimization, the problem of the rise of the inverter output current distortion rate is easily caused.
In summary, the existing RPWM selective harmonic cancellation methods mainly have the following problems: (1) The existing methods are aimed at two-level single-phase or three-phase inverters and cannot be directly applied to multi-level inverters. Compared with a two-level inverter, the harmonic content of the output voltage of the multi-level inverter is lower, and the lower harmonic frequency f is allowed to be eliminated under the condition of the same current distortion rate 0 . (2) When the existing method eliminates the harmonic wave below 8kHZ, the inverter switching frequency is easy to be too low, and the current distortion rate is increased due to the fact that the same switching state lasts too long, so that the practical application value is low. (3) Because the selection of the effective random number has randomness, the prior method often causes unnecessary level inversion in the waveform of the output voltage of the inverter, thereby causing the increase of the content of the output harmonic of the inverter.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a seven-level MPUC inverter unit master-slave type RPWM selective harmonic elimination method, which realizes the selective elimination of specific subharmonics on the basis of realizing the basic function of a random RPWM strategy of a single-phase multi-level inverter and avoids the unnecessary overturn of an output level and the increase of a current distortion rate.
In order to solve the technical problems, the invention adopts the following technical scheme: a seven-level MPUC inverter unit master-slave type RPWM selective harmonic elimination method comprises the following steps:
step 1, taking 1U-shaped unit in a seven-level MPUC inverter as 1 basic unit, and carrying out unit division on the single-phase seven-level MPUC inverter;
taking 1U-shaped unit in a single-phase seven-level MPUC inverter as 1 basic unit, dividing the seven-level MPUC inverter into three basic units which are connected in series, and enabling the total output voltage of the inverter to be equal to the sum of the output voltages of all the units;
the single-phase seven-level inverter consists of 2 direct current power supplies with different voltage levels and 6 groups of power switching devices T 1 -T 6 Composition; dividing a single-phase seven-level MPUC inverter into 3 basic units connected in series; namely, the circuit structure corresponding to the power switch device is regarded as 3 groups of basic units which are connected in series and are respectively U 1 、U 2 、U 3 A unit; the output voltages of the units are u AD 、u DF And u FB The following formula is shown:
wherein S is 1 -S 6 Representing a power switching device T 1 -T 6 Is a switching state of (a);
at this time, the inverter outputs a total voltage u AB Equal to u AD 、u DF And u FB If each unit output voltage does not contain a specific subharmonic, then the total voltage after addition does not contain the subharmonic;
step 2, determining a master unit and a slave unit in each series unit of the seven-level MPUC inverter, analyzing the relation between the total voltage harmonic wave of the inverter and the voltage harmonic wave of each unit aiming at a master-slave structure, and determining the feasibility of selectively eliminating the harmonic wave;
in 3U-shaped series units, U is arranged 1 、U 3 The unit is set as a main unit, U is set as a main unit 2 The unit is set as a slave unit;
U 1 the expression of the nth period of the PWM voltage pulse output by the unit is shown in the following formula:
therefore, the expression of the PWM voltage pulse is as follows:
wherein g n (t) represents the PWM voltage pulse of the nth pulse period, g (t) represents the PWM voltage pulse, E represents the high level of the PWM voltage pulse, D n For the duty cycle of the nth pulse period, T n Is the period value of the nth pulse, t n 、t n+1 The starting time of the nth pulse period and the (n+1) th pulse period are respectively, and N is the period number of the PWM voltage pulse;
fourier transforming the expression of the PWM voltage pulse to obtain:
wherein G (f) is the Fourier transform of the pulse sequence G (t), f is the frequency, ω is the angular frequency, and j represents the imaginary part of the Fourier transform;
setting c (f) 0 ) In the general form of the real part and the imaginary part in the fourier transform, the following formula is shown:
wherein f 0 In order to eliminate the frequency of the harmonics,an initial phase angle of sine sin ();
substituting the expression of the PWM voltage pulse into c (f 0 ) The expression of (2) is:
wherein m is the sequence number of PWM voltage pulses;
the above-mentioned c (f) 0 ) On the basis of the expression, a random PWM selective harmonic elimination method is determined, which comprises the following specific steps:
using c (f) 0 ) A first summation component of an m+e term in the expression summation terms, and a second summation component of the m term is counteracted; canceling the second summation component of the m+1th term with the first summation component of the m+e+1th term; and so on;
by the method of the pair c (f 0 ) The calculation formula of (2) is simplified to obtain the following formula:
thereby obtaining the maximum value k of the random integer k max And a minimum value k min Each k is min ~k max Maximum value f of inverter instantaneous switching frequency corresponding to positive integer k within range kmax And a minimum value f kmin The following formula is shown:
based on formula (10), calculate U 1 Value T of switching period of unit n+1 I.e. at voltage u AD Middle elimination f 0 Frequency harmonic components; in formula (10), T n 、D n Respectively an nth pulse period value and a duty cycle; t (T) n+1 Is the n+1th pulse period value; k is a valid random number, and then according to T n+1 Duty ratio D calculated by instantaneous value of modulated wave at mid-period time n+1 The method comprises the steps of carrying out a first treatment on the surface of the Thereby generating a desired hysteretic PWM voltage pulse waveform; a plurality of random numbers k meeting the conditions are adopted, and the randomization of the switching period is realized through the random selection of k;
similarly, U is calculated using equation (10) 2 、U 3 Value T of switching period of unit n+1 In U 2 、U 3 Unit output voltage u DF And u FB Middle elimination f 0 Frequency harmonic components; if u is AD 、u DF And u FB Does not contain a particular subharmonic, then the total voltage u after addition AB Only on the basis of original subharmonics, amplitude change can occur, and new harmonic frequencies can not occur; i.e. seven-level MPUC inverter output voltage u obtained after addition AB Nor does it contain the particular subharmonic;
step 3, realizing coordination control among the units by utilizing a carrier lamination strategy, determining the functions of the master unit and the slave unit by a unit master-slave carrier lamination RPWM selective harmonic elimination method, and further obtaining the carrier waves and the modulation waves corresponding to the master unit and the slave unit;
each unit realizes the process of selectively eliminating harmonic waves, which is equivalent to the form of pulse width modulation of random triangular carrier waves and modulated waves, and realizes the coordination control among 3 series units through a carrier wave stacking strategy;
in the process of coordination control of each series unit, harmonic waves are selectively eliminated by a unit master-slave carrier lamination RPWM selective harmonic elimination method; i.e. the master unit is used for RPWM selective harmonic cancellation; the slave unit is used for controlling fundamental wave power output; according to the determined master-slave units, carrier signals of 3 units are obtained equivalently according to a method of a formula (10); the slave unit adopts a step wave modulation signal to approach the sine, the master unit adopts an RPWM modulation wave signal corresponding to the difference between a reference sine signal and the step wave, and the sum of the modulation waves of the 3 units is still the sine wave in the formula (13);
u r (ωt)=3EMsin(ωt)=u r1 (ωt)+u r2 (ωt)+u r3 (ωt) (13)
wherein u is r (ωt) is the total modulation wave of the inverter, E is the DC side voltage value, M is the modulation degree, u r1 、u r2 And u r3 Modulated waves corresponding to 3 series units respectively, as shown in formulas (14-16);
in u r1 、u r2 And u r3 Based on the above, applying the formula (10) to 3 series units in MPUC inverter to calculate the switching period value T of each unit n+1 And duty cycle D n+1 The method comprises the steps of carrying out a first treatment on the surface of the Switching period value T n+1 And duty cycle D n+1 Is equivalent to the form of 3 groups of random triangular carrier wave lamination, and is respectively connected with u r1 、u r2 And u r3 Comparing the three groups of modulated waves to generate a driving signal; at this time, the output voltages u of 3 series units AD 、u DF And u FB None of them contains a specific subharmonic f 0 Thus the total voltage u after superposition AB Nor does not contain harmonic f 0
The beneficial effects of adopting above-mentioned technical scheme to produce lie in: according to the seven-level MPUC inverter unit master-slave random RPWM selective harmonic elimination method provided by the invention, the MPUC topological structure is in a unit master-slave working mode, and the master unit is mainly used for RPWM selective harmonic elimination; the slave unit is mainly used for controlling fundamental wave power output and avoiding unnecessary turnover of the output level. And the coordination control among the units is realized by using a carrier wave stacking strategy, so that the output voltage of each unit does not contain specific subharmonic, and the total voltage after addition does not contain the subharmonic. The method can realize RPWM selective harmonic elimination and lower harmonic frequency f elimination 0 Avoiding the increase of current distortion rate and unnecessary level inversion in the output voltage.
Compared with a common MPUC inverter, the MPUC inverter based on the unit division thought can subdivide a topological structure, and harmonic elimination performance is improved through coordination control among units. Compared with a non-master-slave mode, the master-slave mode can avoid unnecessary inversion of the output level and reduce the output harmonic content. The method provides a new topology analysis idea for a single-phase multi-level MPUC inverter RPWM selective harmonic elimination method.
Drawings
FIG. 1 is a diagram showing a PWM classification of random pulse positions according to the background of the invention;
FIG. 2 is a flowchart of a method for master-slave random RPWM selective harmonic cancellation of a seven-level MPUC inverter unit provided by embodiments of the present invention;
fig. 3 is a topology diagram of a seven-level voltage type inverter according to an embodiment of the present invention;
fig. 4 is a block diagram of a seven-level voltage type MPUC inverter according to an embodiment of the present invention;
FIG. 5 is a PWM pulse sequence diagram provided by an embodiment of the present invention;
FIG. 6 is a flow chart of a master-slave RPWM selective harmonic cancellation provided by an embodiment of the present invention;
fig. 7 is a diagram of a simulation waveform of a voltage PSD of a seven-level MPUC inverter with cell division under different modulation strategies according to an embodiment of the present invention, wherein (a) is a conventional SPWM method and (b) is a carrier stacking method;
fig. 8 shows simulation and experimental waveforms of a non-master-slave carrier stacked RPWM selective harmonic cancellation method for m=0.7 according to an embodiment of the present invention, where (a) is output u AB And i AB Simulation waveform diagram, (b) is u AB And i AB Experimental waveform, (c) is voltage u AB PSD experimental waveform diagram of (2);
fig. 9 is a simulation waveform diagram of a master-slave carrier stacked RPWM selective harmonic cancellation method when m=0.7 according to an embodiment of the present invention, where (a) is output u AB And i AB Simulation waveform diagram, (b) is output u AB And i AB PSD simulation waveform diagram of (2);
FIG. 10 is a schematic diagram of a seven-level inverter output voltage u according to an embodiment of the present invention AB Experimental waveform diagrams;
fig. 11 shows a seven-level inverter output current i according to an embodiment of the present invention AB Experimental waveform diagrams;
FIG. 12 shows different M and f provided by an embodiment of the present invention 0 Time-voltage PSD experimental waveform diagram, wherein (a) is M=0.5, f 0 Voltage PSD waveform at=5, 7,9khz, (b) is m=0.7, f 0 Voltage PSD waveform at=5, 7,9khz, (c) is m=0.9, f 0 Voltage PSD waveforms at=5, 7,9 khz.
Detailed Description
The following describes in further detail the embodiments of the present invention with reference to the drawings and examples. The following examples are illustrative of the invention and are not intended to limit the scope of the invention.
In this embodiment, taking a voltage-type inverter experimental prototype system as an example, the seven-level MPUC inverter unit master-slave random RPWM selective harmonic elimination method of the invention is adopted to selectively eliminate the harmonic of the inverter.
In this embodiment, the master-slave RPWM selective harmonic cancellation method of the seven-level MPUC inverter unit, as shown in fig. 2, includes the following steps:
step 1, taking 1U-shaped unit in a seven-level MPUC inverter as 1 basic unit, and carrying out unit division on the single-phase seven-level MPUC inverter;
taking 1U-shaped unit in the seven-level MPUC inverter as 1 basic unit, dividing the seven-level MPUC inverter into a mode that a plurality of basic units are connected in series, and enabling the total output voltage of the inverter to be equal to the sum of the output voltages of all the units;
taking a single-phase seven-level MPUC inverter as shown in FIG. 3 as an example, the inverter consists of 2 direct current power supplies with different voltage levels and 6 groups of power switching devices; the switch state combinations are shown in Table 1, where S 1 ~S 6 Representing a power switching device T 1 ~T 6 U AB The inverter outputs total voltage, E is the voltage value of the direct current side; 1 represents on and 0 represents off. The inverter has 8 switching states in total; and seven levels of 3E, 2E, E, 0, -E, -2E, and-3E. Wherein the power switch device T 1 And T is 4 、T 2 And T is 5 、T 3 And T is 6 The on-off states of the two are complementary.
TABLE 1 switch state and output Voltage
Vector S 1 S 2 S 3 S 4 S 5 S 6 u AB
V 1 1 0 1 0 1 0 3E
V 2 1 0 0 0 1 1 2E
V 3 0 0 1 1 1 0 E
V 4 0 0 0 1 1 1 0
V 5 1 1 1 0 0 0 0
V 6 1 1 0 0 0 1 -E
V 7 0 1 1 1 0 0 -2E
V 8 0 1 0 1 0 1 -3E
In the embodiment, the single-phase seven-level MPUC inverter shown in FIG. 3 is divided into 3 basic units connected in series; namely, the circuit structure corresponding to the power switch device is regarded as 3 groups of basic units which are connected in series and are respectively U 1 、U 2 、U 3 A unit as shown in fig. 4; the output voltages of the units are u AD 、u DF And u FB The following formula is shown:
at this time, the inverter outputs a total voltage u AB Equal to u AD 、u DF And u FB If each cell output voltage does not contain a particular subharmonic, then the total voltage after addition does not contain that subharmonic.
Step 2, determining a master unit and a slave unit in each series unit of the seven-level MPUC inverter, analyzing the relation between the total voltage harmonic wave of the inverter and the voltage harmonic wave of each unit aiming at a master-slave structure, and determining the feasibility of selectively eliminating the harmonic wave;
in 3U-shaped series units, U is arranged 1 、U 3 The unit is set as a main unit, U is set as a main unit 2 The unit is set as a slave unit;
the PWM pulse is positioned at the rear side of the switching period, as shown in FIG. 5, U 1 The expression of the nth period of the PWM voltage pulse output by the unit is shown in the following formula:
therefore, the expression of the PWM voltage pulse is as follows:
wherein g n (t) represents the PWM voltage pulse of the nth pulse period, g (t) represents the PWM voltage pulse, E represents the high level of the PWM voltage pulse, D n For the duty cycle of the nth pulse period, T n Is the period value of the nth pulse, t n 、t n+1 The starting time of the nth pulse period and the (n+1) th pulse period are respectively, and N is the period number of the PWM voltage pulse;
fourier transforming the expression of the PWM voltage pulse to obtain:
wherein G (f) is the Fourier transform of the pulse sequence G (t), f is the frequency, ω is the angular frequency, and j represents the imaginary part of the Fourier transform;
setting c (f) 0 ) In the general form of the real part and the imaginary part in the fourier transform, the following formula is shown:
wherein f 0 In order to eliminate the frequency of the harmonics,an initial phase angle of sine sin ();
substituting the expression of the PWM voltage pulse into c (f 0 ) The expression of (2) is:
wherein m is the sequence number of PWM voltage pulses;
the above-mentioned c (f) 0 ) On the basis of the expression, a random PWM selective harmonic elimination method is determined, which comprises the following specific steps:
using c (f) 0 ) A first summation component of an m+e term in the expression summation terms, and a second summation component of the m term is counteracted; counteracting the second summation element of item m+1 with the first summation element of item m+e+1, and so on;
by the method of the pair c (f 0 ) The calculation formula of (2) is simplified to obtain the following formula:
thereby obtaining the maximum value k of the random integer k max And a minimum value k min Each k is min ~k max Maximum value f of inverter instantaneous switching frequency corresponding to positive integer k within range kmax And a minimum value f kmin The following formula is shown:
based on formula (10), calculate U 1 Value T of switching period of unit n+1 I.e. at voltage u AD Middle elimination f 0 Frequency harmonic components; in formula (10), T n 、D n Respectively an nth pulse period value and a duty cycle; t (T) n+1 Is the n+1th pulse period value; k is a valid random number, and then according to T n+1 Duty ratio D calculated by instantaneous value of modulated wave at mid-period time n+1 The method comprises the steps of carrying out a first treatment on the surface of the Thereby generating the required hysteretic PWM electricityA pressure pulse waveform; a plurality of random numbers k meeting the conditions are adopted, and the randomization of the switching period is realized through the random selection of k;
similarly, U is calculated using equation (10) 2 、U 3 Value T of switching period of unit n+1 In U 2 、U 3 Unit output voltage u DF And u FB Middle elimination f 0 Frequency harmonic components; if u is AD 、u DF And u FB Does not contain a particular subharmonic, then the total voltage u after addition AB Only on the basis of original subharmonics, amplitude change can occur, and new harmonic frequencies can not occur; i.e. seven-level MPUC inverter output voltage u obtained after addition AB Nor does it contain the particular subharmonic;
step 3, realizing coordination control among units by utilizing a carrier lamination strategy, determining the functions of each master-slave unit by a unit master-slave carrier lamination RPWM selective harmonic elimination method shown in fig. 6, and further obtaining carriers and modulation waves corresponding to the master unit and the slave unit;
each unit realizes the process of selectively eliminating harmonic waves, which is equivalent to the form of pulse width modulation of random triangular carrier waves and modulated waves, and realizes the coordination control among 3 series units through a carrier wave stacking strategy;
in the process of coordination control of each series unit, harmonic waves are selectively eliminated by a unit master-slave carrier lamination RPWM selective harmonic elimination method; i.e. the master unit is used for RPWM selective harmonic cancellation; the slave unit is mainly used for controlling fundamental wave power output, so that the problem that the output level of an inverter is unnecessarily turned over in the traditional method is solved, and the output harmonic content is reduced; according to the determined master-slave units, carrier signals of 3 units are obtained equivalently according to a method of a formula (10); the slave unit adopts a step wave modulation signal to approach sine, the master unit adopts an RPWM modulation wave signal corresponding to the difference between a reference sine signal and the step wave, and the sum of the modulation waves of the 3 units is the sine wave in the formula (13);
u r (ωt)=3EMsin(ωt)=u r1 (ωt)+u r2 (ωt)+u r3 (ωt) (13)
wherein u is r (ωt) is the total modulation wave of the inverter, E is the DC side voltage value, M is the modulation degree, u r1 、u r2 And u r3 Modulated waves corresponding to 3 series units respectively, as shown in formulas (14-16);
in u r1 、u r2 And u r3 Based on the above, applying the formula (10) to 3 series units in MPUC inverter to calculate the switching period value T of each unit n+1 And duty cycle D n+1 Thereby generating a PWM pulse waveform as shown in fig. 5. Switching period value T n+1 And duty cycle D n+1 Is equivalent to the form of 3 groups of random triangular carrier wave lamination, and is respectively connected with u r1 、u r2 And u r3 3 groups of modulation waves are compared to generate a driving signal; at this time, the output voltages u of 3 series units AD 、u DF And u FB None of them contains a specific subharmonic f 0 Thus the total voltage u after superposition AB Nor does not contain harmonic f 0
In the present embodiment, U is used 1 Unit is exemplified by, when u r1 ≥u c1 At the time, control T 1 Conduction, T 4 Turning off; when u is r1 <u c1 At the time, control T 4 Conduction, T 1 Turning off; u is obtainable by the same way 2 And U 3 A modulation method of the unit; by modulating the modulated wave u r The period value and the modulation ratio M of the MPUC inverter can be adjusted AB The period and the size of (2);
due to effective follow-up in each series unitThe selection of the number k has randomness, so the random number k and the switching period T between 3 groups of serial units n+1 And the output voltages are not identical, u is obtained by superposing the output voltages of the series units AB Seven level versions may be formed.
In the embodiment, the voltage type inverter experiment prototype system comprises a single-phase inverter, a driving circuit, a main control chip, an oscilloscope and an electric energy quality analyzer; the output end of the single-phase inverter is connected with a resistive load, and the inverter power switching device is an IGBT integrated anti-parallel freewheeling diode BSM50GB120DN2; the driving circuit adopts an IGBT integrated driving module DA962D6; the system main control chip adopts a 32-bit DSP TMS320F28335; the model of the oscilloscope is DS1052E; the electric energy quality analyzer is HIOKI PW3198; the single phase inverter parameters are shown in table 2.
Table 2 single-phase inverter parameter table
Parameters (parameters) Numerical value Parameters (parameters) Numerical value
To cancel the frequency f 0 /kHZ 5,7,9 Inverter resistive load/Ω 20
Upper limit of switching frequency/kHZ 8 Inverter inductive load/mH 10
Lower limit of switching frequency/kHZ 1.5 DC side voltage/V of inverter 48,24
In this embodiment, under different modulation strategies, a simulation waveform of the output voltage Power Spectrum (PSD) of the seven-level MPUC inverter employing cell division is shown in fig. 7. FIG. 7 (a) employs the SPWM method of conventional fixed switching frequency 3 kHz; it can be seen that there are significant spikes and harmonic power is concentrated mainly around 3 khz and its integer multiples. Fig. 7 (b) adopts the carrier stacking method of the present invention, compared with the method, the method can distribute harmonic power more uniformly, no obvious peak exists in the PSD diagram, and the randomness is better; the harmonics at 7 khz and integer multiples thereof can be significantly reduced.
When the modulation degree m=0.7, the frequency to be eliminated is still 7 khz, and the output voltage, current and voltage PSD simulation experiment waveforms of the non-master-slave carrier laminated RPWM selective harmonic elimination method are shown in fig. 8. As can be seen from fig. 8 (a), in this method, the inverter output voltage and current simulate waveforms with better sine, but multiple unnecessary level inversions occur in the output waveform diagram. Fig. 8 (b) shows experimental waveforms of output voltage and current, which are substantially identical to the simulation results, and the output waveform diagram also shows more unnecessary level inversion. FIG. 8 (c) is a waveform of a PSD experiment of voltage, as can be seen, at f 0 And its integer multiple frequency location points, a notch of about several hundred hertz appears in the PSD waveform because when f 0 When the harmonic power is completely eliminated, and f 0 The frequency of approach is also reduced by a certain magnitude; and distance f 0 The closer the more attenuated the amplitude. The characteristics can overcome the influence caused by phase errors such as system delay and the like.
Simulation of seven-level MPUC inverter unit master-slave carrier lamination RPWM selective harmonic elimination method by keeping modulation degree and frequency to be eliminated unchangedThe true waveform is shown in fig. 9. As can be seen from fig. 9 (a), the unnecessary level jump in the output voltage waveform is significantly reduced under the operation of the unit master-slave method, the output voltage waveform changes in a sine law, and the output current distortion rate is reduced from 9.17% to 4.60% under the same parameters. FIG. 9 (b) shows the output voltage u AB And i AB The unit master-slave method can still selectively eliminate specific subfrequency harmonics.
Meanwhile, under the method of the invention, the experimental waveforms of the output voltage and current of the seven-level MPUC inverter are shown in fig. 10 and 11; according to different modulation degrees M and frequencies f to be eliminated 0 The power spectral density experimental waveform diagram of the obtained output voltage is shown in fig. 12. Fig. 12 (a) is m=0.5, f 0 Voltage PSD waveform at=5, 7,9 khz; fig. 12 (b) is m=0.7, f 0 Voltage PSD waveform at=5, 7,9 khz; fig. 12 (c) is m=0.9, f 0 Voltage PSD waveform at=5, 7,9 khz. The graph shows that the method can uniformly distribute harmonic power and has good randomness; at f 0 Under the condition of 3 frequencies, the method can well reduce the harmonic wave at the specific secondary frequency; the harmonics at the specific sub-frequency can be reduced well in the case of different modulation ratios m=0.5, 0.7, 0.9.
The seven-level MPUC inverter unit master-slave random RPWM selective harmonic elimination method has the characteristics of strong control flexibility, simple algorithm and easy realization, can overcome the above 3 main problems existing in the existing RPWM selective harmonic elimination method, and is specifically as follows:
based on the inverter unit dividing thought, RPWM selective harmonic elimination of a seven-level MPUC inverter can be achieved.
And when the harmonic wave with the frequency below 8KHZ is selectively eliminated, the distortion rate of the output current of the inverter is obviously reduced from 9.17% to 4.60%.
According to the method, the inverter output voltage waveform is free from unnecessary level inversion, and the method is one of reasons for reducing the harmonic content of the output current.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced with equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions, which are defined by the scope of the appended claims.

Claims (1)

1. A seven-level MPUC inverter unit master-slave type RPWM selective harmonic elimination method is characterized in that: the method comprises the following steps:
step 1, taking 1U-shaped unit in a seven-level MPUC inverter as 1 basic unit, dividing the unit of the single-phase seven-level MPUC inverter, and dividing the seven-level MPUC inverter into three basic units connected in series;
taking 1U-shaped unit in a single-phase seven-level MPUC inverter as 1 basic unit, dividing the seven-level MPUC inverter into three basic units which are connected in series, and enabling the total output voltage of the inverter to be equal to the sum of the output voltages of all the units;
the single-phase seven-level MPUC inverter consists of 2 direct current power supplies with different voltage classes and 6 groups of power switching devices T 1 -T 6 Composition; dividing a single-phase seven-level MPUC inverter into 3 basic units connected in series; namely, the circuit structure corresponding to the power switch device is regarded as 3 groups of basic units which are connected in series and are respectively U 1 、U 2 、U 3 A unit; the output voltages of the units are u AD 、u DF And u FB The following formula is shown:
wherein S is 1 -S 6 Representing a power switching device T 1 -T 6 Is a switching state of (a);
at this time, the inverter outputs a total voltage u AB Equal to u AD 、u DF And u FB If each unit output voltage does not contain a specific subharmonic, then the total voltage after addition does not contain the subharmonic;
step 2, determining a master unit and a slave unit in each series unit of the seven-level MPUC inverter, analyzing the relation between the total voltage harmonic wave of the inverter and the voltage harmonic wave of each unit aiming at a master-slave structure, and determining the feasibility of selectively eliminating the harmonic wave;
in 3U-shaped series units, U is arranged 1 、U 3 The unit is set as a main unit, U is set as a main unit 2 The unit is set as a slave unit;
U 1 the expression of the nth period of the PWM voltage pulse output by the unit is shown in the following formula:
therefore, the expression of the PWM voltage pulse is as follows:
wherein g n (t) represents the PWM voltage pulse of the nth pulse period, g (t) represents the PWM voltage pulse, E represents the high level of the PWM voltage pulse, D n For the duty cycle of the nth pulse period, T n Is the period value of the nth pulse, t n 、t n+1 The start moments of the nth and n+1th pulse periods, respectivelyN is the number of periods of the PWM voltage pulse;
fourier transforming the expression of the PWM voltage pulse to obtain:
wherein G (f) is the Fourier transform of the pulse sequence G (t), f is the frequency, ω is the angular frequency, and j represents the imaginary part of the Fourier transform;
setting c (f) 0 ) In the general form of the real part and the imaginary part in the fourier transform, the following formula is shown:
wherein f 0 In order to eliminate the frequency of the harmonics,an initial phase angle of sine sin ();
substituting the expression of the PWM voltage pulse into c (f 0 ) The expression of (2) is:
wherein n is the number of sequences of PWM voltage pulses;
the above-mentioned c (f) 0 ) On the basis of the expression, a random PWM selective harmonic elimination method is determined, which comprises the following specific steps:
using c (f) 0 ) A first summation component of an n+e term in the expression summation terms, and a second summation component of the n term is counteracted; canceling the second summation component of the n+1th term with the first summation component of the n+e+1th term; and so on;
by the method of the pair c (f 0 ) The calculation formula of (2) is simplified to obtain the following formula:
thereby obtaining the maximum value k of the random integer k max And a minimum value k min Each k is min ~k max Maximum value f of inverter instantaneous switching frequency corresponding to positive integer k within range kmax And a minimum value f kmin The following formula is shown:
based on formula (10), calculate U 1 Value T of switching period of unit n+1 I.e. at voltage u AD Middle elimination f 0 Frequency harmonic components; in formula (10), T n 、D n Respectively an nth pulse period value and a duty cycle; t (T) n+1 Is the n+1th pulse period value; k is a valid random number, and then according to T n+1 Duty ratio D calculated by instantaneous value of modulated wave at mid-period time n+1 The method comprises the steps of carrying out a first treatment on the surface of the Thereby generating a desired hysteretic PWM voltage pulse waveform; a plurality of random numbers k meeting the conditions are adopted, and the randomization of the switching period is realized through the random selection of k; calculation of U using equation (10) 2 、U 3 Value T of switching period of unit n+1 In U 2 、U 3 Unit output voltage u DF And u FB Middle elimination f 0 Frequency harmonic components; if u is AD 、u DF And u FB Does not contain a particular subharmonic, then the total voltage u after addition AB In the prior art, only theOn the basis of subharmonic, amplitude change occurs, and new harmonic frequency can not occur; i.e. seven-level MPUC inverter output voltage u obtained after addition AB Nor does it contain the particular subharmonic;
step 3, realizing coordination control among the units by utilizing a carrier lamination strategy, determining the functions of the master unit and the slave unit by a unit master-slave carrier lamination RPWM selective harmonic elimination method, and further obtaining the carrier waves and the modulation waves corresponding to the master unit and the slave unit;
the process of selectively eliminating harmonic wave is realized by each unit, which is equivalent to the form of pulse width modulation of random triangular carrier wave and modulated wave, and coordination control among each serial unit is realized by carrier wave lamination strategy, and the specific method is as follows:
in the process of coordination control of each series unit, harmonic waves are selectively eliminated by a unit master-slave carrier lamination RPWM selective harmonic elimination method; i.e. the master unit is used for RPWM selective harmonic cancellation; the slave unit is used for controlling fundamental wave power output; according to the determined master-slave units, carrier signals of the 3 units are still obtained equivalently according to a formula (10); the slave unit adopts a step wave modulation signal to approach the sine, the master unit adopts an RPWM modulation wave signal corresponding to the difference between a reference sine signal and the step wave, and the sum of the modulation waves of the 3 units is still the sine wave in the formula (13);
u r (ωt)=3EMsin(ωt)=u r1 (ωt)+u r2 (ωt)+u r3 (ωt) (13)
wherein u is r (ωt) is the total modulation wave of the inverter, E is the DC side voltage value, M is the modulation degree, u r1 、u r2 And u r3 Modulated waves corresponding to 3 series units respectively, as shown in formulas (14-16);
in u r1 、u r2 And u r3 Based on the above, applying the formula (10) to 3 series units in MPUC inverter to calculate the switching period value T of each unit n+1 And duty cycle D n+1 The method comprises the steps of carrying out a first treatment on the surface of the Switching period value T n+1 And duty cycle D n+1 Is equivalent to the form of 3 groups of random triangular carrier wave lamination, and is respectively connected with u r1 、u r2 And u r3 Comparing the three groups of modulated waves to generate a driving signal; at this time, the output voltages u of 3 series units AD 、u DF And u FB None of them contains a specific subharmonic f 0 Thus the total voltage u after superposition AB Nor does not contain harmonic f 0
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