CN114301322A - Master-slave RPWM selective harmonic elimination method for seven-level MPUC inverter unit - Google Patents

Master-slave RPWM selective harmonic elimination method for seven-level MPUC inverter unit Download PDF

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CN114301322A
CN114301322A CN202111669001.1A CN202111669001A CN114301322A CN 114301322 A CN114301322 A CN 114301322A CN 202111669001 A CN202111669001 A CN 202111669001A CN 114301322 A CN114301322 A CN 114301322A
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CN114301322B (en
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李国华
沈豪杰
柳广达
王良君
曹冬满
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Liaoning Technical University
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Abstract

The invention provides a master-slave RPWM selective harmonic elimination method for a seven-level MPUC inverter unit, and relates to the technical field of pulse width modulation of single-phase inverters. The method comprises the steps that 1U-shaped unit in a seven-level MPUC inverter is used as 1 basic unit, the inverter is divided into three basic units which are connected in series, a main unit and a slave unit are determined, the relation between the total voltage harmonic of the inverter and the voltage harmonic of each unit is analyzed according to the main-slave structure, and the feasibility of selectively eliminating the harmonic is determined; the coordination control among all units is realized by utilizing a carrier stacking strategy, the functions of all master-slave units are determined by a unit master-slave carrier stacking RPWM selective harmonic elimination method, and carriers and modulation waves corresponding to the master unit and the slave unit are further obtained; the method can realize RPWM selective harmonic elimination, lower harmonic frequency elimination, and avoid current distortion rate increase and unnecessary level inversion in output voltage.

Description

Master-slave RPWM selective harmonic elimination method for seven-level MPUC inverter unit
Technical Field
The invention relates to the technical field of pulse width modulation of single-phase inverters, in particular to a master-slave RPWM selective harmonic elimination method for a seven-level MPUC inverter unit.
Background
The Random Pulse Width Modulation (RPWM) strategy is an effective method for suppressing problems such as electromagnetic interference and electromagnetic noise of a power electronic converter. As shown in fig. 1, RPWM can be classified according to the randomness of pulse positions: random lead-lag, random zero vector distribution modulation, random displacement of pulse center, random pulse position modulation, random phase shift pulse width modulation, variable delay random pulse width modulation, asymmetric carrier random pulse width modulation, single random pulse position, fractal space vector modulation and the like. Conventional RPWM generally cannot selectively eliminate specific sub-frequency harmonics. For example, a specific harmonic having a high hazard such as a resonance frequency of the load.
Currently, there is little literature on RPWM selective harmonic cancellation, which can be generalized to class 2 methods: firstly, in the RPWM random spread spectrum process, a digital filter is utilized to avoid a specified frequency range, but the method is relatively complex and has large calculated amount; and harmonic power in the specified frequency range is not eliminated, but is not increased on the original basis. Secondly, eliminating the specific frequency harmonic wave by a calculation method, compared with a digital filter method, the method has the advantages that the specific frequency harmonic wave can be completely eliminated theoretically, and the algorithm is simple; however, it is generally difficult to eliminate harmonics of 20kHz or less, and when the harmonics of 20kHz or less are eliminated after optimization, problems such as an increase in distortion of the inverter output current are likely to occur.
In summary, the conventional RPWM selective harmonic elimination method mainly has the following problems: (1) the existing methods are all directed to two-level single-phase or three-phase inverters and cannot be directly applied to multi-level inverters. Compared with a two-level inverter, the multi-level inverter has lower harmonic content of output voltage, and allows elimination of lower harmonic frequency f under the condition of the same current distortion rate0. (2) When the harmonic below 8kHZ is eliminated by the conventional method, the switching frequency of the inverter is easily too low, and the harmonic is removedThe duration of a switch state is too long, so that the current distortion rate is increased, and the practical application value is not large. (3) Due to the randomness of the selection of the effective random numbers, unnecessary level inversion often occurs in the output voltage waveform of the inverter in the existing method, and therefore the output harmonic content of the inverter is increased.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a method for selectively eliminating the harmonic of a master-slave RPWM of a seven-level MPUC inverter unit, which is to realize the selective elimination of specific subharmonics and avoid unnecessary inversion of output level and increase of current distortion rate on the basis of realizing the basic function of a random RPWM strategy of a single-phase multilevel inverter.
In order to solve the technical problems, the technical scheme adopted by the invention is as follows: a master-slave RPWM selective harmonic elimination method for a seven-level MPUC inverter unit comprises the following steps:
step 1, taking 1U-shaped unit in a seven-level MPUC inverter as 1 basic unit, and carrying out unit segmentation on a single-phase seven-level MPUC inverter;
1U-shaped unit in a single-phase seven-level MPUC inverter is taken as 1 basic unit, the seven-level MPUC inverter is divided into three basic units which are connected in series, and the total output voltage of the inverter is equal to the sum of the output voltages of the units;
the single-phase seven-level inverter consists of 2 direct-current power supplies with different voltage levels and 6 groups of power switching devices T1-T6Composition is carried out; dividing a single-phase seven-level MPUC inverter into 3 basic units connected in series; namely, the circuit structure corresponding to the power switch device is regarded as 3 groups of serial basic units, which are U respectively1、U2、U3A unit; the output voltage of each unit is uAD、uDFAnd uFBThe following formula shows:
Figure BDA0003448960480000021
Figure BDA0003448960480000022
Figure BDA0003448960480000023
wherein S is1-S6For power switching devices T1-T6The on-off state of (c);
at this time, the inverter outputs the total voltage uABIs equal to uAD、uDFAnd uFBSumming, if each cell output voltage does not contain a specific subharmonic, the summed total voltage does not contain the subharmonic either;
step 2, determining a main unit and a slave unit in each series unit of the seven-level MPUC inverter, analyzing the relation between the total voltage harmonic of the inverter and the voltage harmonic of each unit aiming at the main-slave structure, and determining the feasibility of selectively eliminating the harmonic;
in 3U-shaped series units, connect U1、U3The unit is set as a master unit, and U is set2The unit is set as a slave unit;
U1the expression of the nth period of the PWM voltage pulse output by the unit is shown as the following formula:
Figure BDA0003448960480000024
therefore, the expression of the PWM voltage pulse is as follows:
Figure BDA0003448960480000025
wherein, gn(t) represents PWM voltage pulses of the nth pulse period, g (t) represents PWM voltage pulses, E represents high level of PWM voltage pulses, DnDuty ratio of the nth pulse period, TnIs the value of the period of the nth pulse, tn、tn+1Respectively n andthe starting time of the (N + 1) th pulse period, wherein N is the period number of the PWM voltage pulse;
performing fourier transform on the expression of the PWM voltage pulse:
Figure BDA0003448960480000031
wherein G (f) is the Fourier transform of the pulse sequence g (t), f is the frequency, ω is the angular frequency, and j represents the imaginary part of the Fourier transform;
setting c (f)0) For the general form of the real and imaginary parts in the fourier transform described above, the following equation is shown:
Figure BDA0003448960480000032
wherein f is0For the frequency of the harmonics to be cancelled,
Figure BDA0003448960480000033
is the initial phase angle of sin ();
substituting the expression of PWM voltage pulse into c (f)0) The expression of (a) is given by:
Figure BDA0003448960480000034
wherein m is the sequence number of the PWM voltage pulse;
in the above-mentioned c (f)0) On the basis of an expression, a random PWM selective harmonic elimination method is determined, and specifically comprises the following steps:
using c (f)0) The first summation subentry of the m + e term in the expression summation terms offsets the second summation subentry of the m term; offsetting a second summation element of the m +1 term by using the first summation element of the m + e +1 term; and so on;
by the pair c (f)0) The calculation formula is simplified and calculated to obtain the following formula:
Figure BDA0003448960480000035
Figure BDA0003448960480000036
further obtaining the maximum value k of the random integer kmaxAnd the minimum value kminEach k ofmin～kmaxMaximum value f of instantaneous switching frequency of inverter corresponding to positive integer k within rangekmaxAnd minimum value fkminThe following formula shows:
Figure BDA0003448960480000037
Figure BDA0003448960480000041
on the basis of the formula (10), U is calculated1Switching period value T of unitn+1I.e. at voltage uADIn elimination of f0A frequency harmonic component; in the formula (10), Tn、DnRespectively the nth pulse period value and the duty ratio; t isn+1Is the n +1 pulse period value; k is a valid random number, and then according to the Tn+1Duty ratio D calculated from instantaneous value of modulation wave at middle point in cyclen+1(ii) a Thereby generating the required hysteresis-type PWM voltage pulse waveform; a plurality of random numbers k meeting the conditions are provided, and the switching period randomization is realized through the random selection of k;
similarly, U is calculated by formula (10)2、U3Switching period value T of unitn+1In U at2、U3Cell output voltage uDFAnd uFBIn elimination of f0A frequency harmonic component; if u isAD、uDFAnd uFBDo not contain a specific subharmonic, then the total voltage u after adding themABIn the middle, the amplitude can only be generated on the basis of the original harmonicsThe value changes, and no new harmonic frequency appears; i.e. the output voltage u of the seven-level MPUC inverter obtained after the additionABDoes not contain the specific subharmonic;
step 3, realizing coordination control among all units by utilizing a carrier stacking strategy, determining the functions of all master-slave units by a unit master-slave carrier stacking RPWM selective harmonic elimination method, and further obtaining carriers and modulation waves corresponding to the master unit and the slave unit;
each unit realizes the process of selectively eliminating harmonic waves, is equivalent to a mode of performing pulse width modulation on random triangular carrier waves and modulation waves, and realizes the coordination control among 3 series units through a carrier laminating strategy;
in the process of coordination control of each series unit, selectively eliminating harmonic waves by a unit master-slave carrier stacking RPWM selective harmonic wave elimination method; i.e. the master unit is used for RPWM selective harmonic cancellation; the slave unit is used for controlling fundamental wave power output; according to the determined master-slave unit, the carrier signals of the 3 units are still equivalently obtained according to the method of the formula (10); the slave unit adopts a step wave modulation signal to approach sine, the master unit adopts an RPWM modulation wave signal corresponding to the difference between a reference sine signal and the step wave, and the sum of the modulation waves of 3 units is still the sine wave in the formula (13);
ur(ωt)＝3EMsin(ωt)＝ur1(ωt)+ur2(ωt)+ur3(ωt) (13)
wherein u isr(ω t) is the total modulation wave of the inverter, E is the DC-side voltage value, M is the modulation degree, ur1、ur2And ur3Modulated waves corresponding to 3 series units respectively, as shown in formulas (14-16);
Figure BDA0003448960480000051
Figure BDA0003448960480000052
Figure BDA0003448960480000053
at ur1、ur2And ur3On the basis, the formula (10) is applied to 3 series units in the MPUC inverter, and the switching period value T of each unit is calculatedn+1And duty cycle Dn+1(ii) a Switch period value Tn+1And duty cycle Dn+1The calculation process of (a) is equivalent to a form of stacking 3 groups of random triangular carriers which are respectively connected with ur1、ur2And ur3Comparing the three groups of modulation waves to generate a driving signal; at this time, the output voltages u of the 3 series unitsAD、uDFAnd uFBNone of them contains specific subharmonic f0And thus the total voltage u after superpositionABDoes not contain harmonic wave f0；
Adopt the produced beneficial effect of above-mentioned technical scheme to lie in: the invention provides a seven-level MPUC inverter unit master-slave random RPWM selective harmonic elimination method.A MPUC topological structure is in a unit master-slave working mode, and a master unit is mainly used for RPWM selective harmonic elimination; the slave unit is mainly used for controlling fundamental wave power output and avoiding unnecessary turnover of output level. And realizing coordination control among the units by using a carrier laminating strategy, so that the output voltage of each unit does not contain a specific subharmonic, and the total voltage after addition does not contain the subharmonic. The method can realize RPWM selective harmonic elimination and eliminate lower harmonic frequency f0To avoid causing an increase in current distortion rate and unnecessary level inversion in the output voltage.
Compared with a common MPUC inverter, the MPUC inverter based on the unit division idea can subdivide a topological structure, and the harmonic wave elimination performance is adjusted and raised through coordination control among units. Compared with a non-master-slave mode working mode, the master-slave mode working mode can avoid unnecessary inversion of output level and reduce output harmonic content. The method provides a new topological analysis idea for the RPWM selective harmonic elimination method of the single-phase multi-level MPUC inverter.
Drawings
FIG. 1 is a diagram of the PWM classification of random pulse positions according to the background of the invention;
fig. 2 is a flowchart of a master-slave random RPWM selective harmonic elimination method for a seven-level MPUC inverter unit according to an embodiment of the present invention;
fig. 3 is a topology diagram of a seven-level voltage source inverter according to an embodiment of the present invention;
fig. 4 is a diagram illustrating a unit partition of a seven-level voltage-type MPUC inverter according to an embodiment of the present invention;
FIG. 5 is a PWM pulse sequence chart provided by the embodiment of the present invention;
FIG. 6 is a flow chart of a master-slave RPWM selective harmonic elimination provided by the present invention;
fig. 7 is a waveform diagram of a unit-divided seven-level MPUC inverter voltage PSD simulation under different modulation strategies according to an embodiment of the present invention, where (a) is a conventional SPWM method, and (b) is a carrier stacking method;
FIG. 8 shows simulated and experimental waveforms of the RPWM selective harmonic elimination method for 0.7-time M-0.7-time non-master-slave carrier stacking, where (a) is the output uABAnd iABA simulation oscillogram, (b) is uABAnd iABThe waveform of the experiment, (c) is the voltage uABPSD experiment oscillogram of (1);
fig. 9 is a simulated waveform diagram of the master-slave carrier stacking RPWM selective harmonic elimination method when M is 0.7 according to an embodiment of the present invention, where (a) is an output uABAnd iABSimulation oscillogram, (b) is output uABAnd iABPSD simulation oscillogram of (1);
FIG. 10 shows an output voltage u of a seven-level inverter according to an embodiment of the present inventionABAn experimental oscillogram;
FIG. 11 shows an output current i of a seven-level inverter according to an embodiment of the present inventionABAn experimental oscillogram;
FIG. 12 shows the differences M and f provided by an embodiment of the present invention0Time-voltage PSD experimental oscillogram, wherein (a) is M-0.5, f0Voltage PSD waveform when 5, 7, 9khz, M0.7, f0Voltage PSD waveform diagram when 5, 7, 9khz, M0.9, f (c)0Voltage PSD waveform diagrams at 5, 7, and 9 khz.
Detailed Description
The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples. The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.
In this embodiment, taking an experimental prototype system of a voltage-type inverter as an example, the harmonic of the inverter is selectively eliminated by using the master-slave random RPWM selective harmonic elimination method of the seven-level MPUC inverter unit of the present invention.
In this embodiment, the method for selectively eliminating harmonic in master-slave mode RPWM of a seven-level MPUC inverter unit, as shown in fig. 2, includes the following steps:
step 1, taking 1U-shaped unit in a seven-level MPUC inverter as 1 basic unit, and carrying out unit segmentation on a single-phase seven-level MPUC inverter;
1U-shaped unit in the seven-level MPUC inverter is taken as 1 basic unit, the seven-level MPUC inverter is divided into a plurality of basic units which are connected in series, and the total output voltage of the inverter is equal to the sum of the output voltages of the units;
the present embodiment takes a single-phase seven-level MPUC inverter as shown in fig. 3 as an example, and the inverter is composed of 2 dc power supplies with different voltage levels and 6 sets of power switching devices; the switch state combinations are shown in Table 1, where S1～S6For power switching devices T1～T6On/off state of uABThe inverter outputs the total voltage, and E is a direct-current side voltage value; 1 represents on and 0 represents off. The inverter has 8 switch states; and seven levels of 3E, 2E, E, 0, -E, -2E, and-3E. Wherein, the power switch device T1And T4、T2And T5、T3And T6The on-off states between are complementary.
TABLE 1 switching states and output voltages
Vector S1 S2 S3 S4 S5 S6 uAB
V1 1 0 1 0 1 0 3E
V
2 1 0 0 0 1 1 2E
V
3 0 0 1 1 1 0 E
V
4 0 0 0 1 1 1 0
V 5 1 1 1 0 0 0 0
V 6 1 1 0 0 0 1 -E
V
7 0 1 1 1 0 0 -2E
V
8 0 1 0 1 0 1 -3E
The embodiment divides the single-phase seven-level MPUC inverter shown in FIG. 3 into 3 basic units connected in series; namely, the circuit structure corresponding to the power switch device is regarded as 3 groups of serial basic units, which are U respectively1、U2、U3A unit, as shown in FIG. 4; the output voltage of each unit is uAD、uDFAnd uFBThe following formula shows:
Figure BDA0003448960480000071
Figure BDA0003448960480000072
Figure BDA0003448960480000073
at this time, the inverter outputs the total voltage uABIs equal to uAD、uDFAnd uFBAnd if each cell output voltage does not contain a specific subharmonic, the total voltage after addition does not contain the subharmonic.
Step 2, determining a main unit and a slave unit in each series unit of the seven-level MPUC inverter, analyzing the relation between the total voltage harmonic of the inverter and the voltage harmonic of each unit aiming at the main-slave structure, and determining the feasibility of selectively eliminating the harmonic;
in 3U-shaped series units, connect U1、U3The unit is set as a master unit, and U is set2The unit is set as a slave unit;
by positioning the PWM pulse at the rear of the switching period, as shown in FIG. 5, U is1The expression of the nth period of the PWM voltage pulse output by the unit is shown as the following formula:
Figure BDA0003448960480000081
therefore, the expression of the PWM voltage pulse is as follows:
Figure BDA0003448960480000082
wherein, gn(t) represents PWM voltage pulses of the nth pulse period, g (t) represents PWM voltage pulses, E represents high level of PWM voltage pulses, DnDuty ratio of the nth pulse period, TnIs the value of the period of the nth pulse, tn、tn+1Respectively the start time of the nth and the (N + 1) th pulse periods, wherein N is the period number of the PWM voltage pulse;
performing fourier transform on the expression of the PWM voltage pulse:
Figure BDA0003448960480000083
wherein G (f) is the Fourier transform of the pulse sequence g (t), f is the frequency, ω is the angular frequency, and j represents the imaginary part of the Fourier transform;
setting c (f)0) For the general form of the real and imaginary parts in the fourier transform described above, the following equation is shown:
Figure BDA0003448960480000084
wherein f is0For the frequency of the harmonics to be cancelled,
Figure BDA0003448960480000085
is the initial phase angle of sin ();
substituting the expression of PWM voltage pulse into c (f)0) The expression of (a) is given by:
Figure BDA0003448960480000086
wherein m is the sequence number of the PWM voltage pulse;
in the above-mentioned c (f)0) On the basis of an expression, a random PWM selective harmonic elimination method is determined, and specifically comprises the following steps:
using c (f)0) The first summation subentry of the m + e term in the expression summation terms offsets the second summation subentry of the m term; offsetting a second summation subentry of the m +1 th item by using the first summation subentry of the m + e +1 th item, and so on;
by the pair c (f)0) The calculation formula is simplified and calculated to obtain the following formula:
Figure BDA0003448960480000091
Figure BDA0003448960480000092
further obtaining the maximum value k of the random integer kmaxAnd the minimum value kminEach k ofmin～kmaxMaximum value f of instantaneous switching frequency of inverter corresponding to positive integer k within rangekmaxAnd minimum value fkminThe following formula shows:
Figure BDA0003448960480000093
Figure BDA0003448960480000094
on the basis of the formula (10), U is calculated1Switching period value T of unitn+1I.e. at voltage uADIn elimination of f0A frequency harmonic component; in the formula (10), Tn、DnRespectively the nth pulse period value and the duty ratio; t isn+1Is the n +1 pulse period value; k is a valid random number, and then according to the Tn+1Duty ratio D calculated from instantaneous value of modulation wave at middle point in cyclen+1(ii) a Thereby generating the required hysteresis-type PWM voltage pulse waveform; a plurality of random numbers k meeting the conditions are provided, and the switching period randomization is realized through the random selection of k;
similarly, U is calculated by formula (10)2、U3Switching period value T of unitn+1In U at2、U3Cell output voltage uDFAnd uFBIn elimination of f0A frequency harmonic component; if u isAD、uDFAnd uFBDo not contain a specific subharmonic, then the total voltage u after adding themABIn the method, amplitude change can only occur on the basis of the original harmonic waves, and new harmonic times cannot occur; i.e. the output voltage u of the seven-level MPUC inverter obtained after the additionABDoes not contain the specific subharmonic;
step 3, realizing coordination control among all units by utilizing a carrier stacking strategy, determining the functions of all master and slave units by a unit master-slave carrier stacking RPWM selective harmonic elimination method shown in figure 6, and further obtaining carriers and modulation waves corresponding to the master and slave units;
each unit realizes the process of selectively eliminating harmonic waves, is equivalent to a mode of performing pulse width modulation on random triangular carrier waves and modulation waves, and realizes the coordination control among 3 series units through a carrier laminating strategy;
in the process of coordination control of each series unit, selectively eliminating harmonic waves by a unit master-slave carrier stacking RPWM selective harmonic wave elimination method; i.e. the master unit is used for RPWM selective harmonic cancellation; the slave unit is mainly used for controlling fundamental wave power output, so that the problem that the output level of the inverter is unnecessarily inverted in the traditional method is solved, and the output harmonic content is reduced; according to the determined master-slave unit, the carrier signals of the 3 units are still equivalently obtained according to the method of the formula (10); the slave unit adopts a step wave modulation signal to approach sine, the master unit adopts an RPWM modulation wave signal corresponding to the difference between a reference sine signal and the step wave, and the sum of the modulation waves of 3 units is a sine wave in a formula (13);
ur(ωt)＝3EMsin(ωt)＝ur1(ωt)+ur2(ωt)+ur3(ωt) (13)
wherein u isr(ω t) is the total modulation wave of the inverter, E is the DC-side voltage value, M is the modulation degree, ur1、ur2And ur3Modulated waves corresponding to 3 series units respectively, as shown in formulas (14-16);
at ur1、ur2And ur3On the basis, the formula (10) is applied to 3 series units in the MPUC inverter, and the switching period value T of each unit is calculatedn+1And duty cycle Dn+1Thereby generating a PWM pulse waveform as shown in fig. 5. Switch period value Tn+1And duty cycle Dn+1The calculation process of (a) is equivalent to a form of stacking 3 groups of random triangular carriers which are respectively connected with ur1、ur2And ur3Comparing the 3 groups of modulation waves to generate a driving signal; at this time, the output voltages u of the 3 series unitsAD、uDFAnd uFBNone of them contains specific subharmonic f0And thus the total voltage u after superpositionABDoes not contain harmonic wave f0；
Figure BDA0003448960480000101
Figure BDA0003448960480000102
Figure BDA0003448960480000111
In this embodiment, U is used1Units are as an example, when ur1≥uc1Time, control T1Conduction, T4Turning off; when u isr1＜uc1Time, control T4Conduction, T1Turning off; can obtain U in the same way2And U3A modulation method of the cell; by modulating the modulated wave urThe period value and the modulation ratio M of the MPUC inverter can be adjusted, namely the output voltage u of the MPUC inverter is adjustedABThe period and size of (d);
the selection of the effective random number k in each series unit has randomness, so the random number k and the switching period T between 3 groups of series unitsn+1And u obtained by superposing the output voltages of the series units, the output voltages of the series units not being identicalABA seven-level version can be formed.
In the embodiment, the voltage-type inverter experimental prototype system comprises a single-phase inverter, a driving circuit, a main control chip, an oscilloscope and an electric energy quality analyzer; the output end of the single-phase inverter is connected with a resistance-inductance load, and the power switching device of the inverter is an IGBT integrated anti-parallel freewheeling diode BSM50GB120DN 2; the driving circuit adopts an IGBT integrated driving module DA962D 6; the system main control chip adopts 32-bit DSP TMS320F 28335; the oscilloscope model is DS 1052E; the electric energy quality analyzer is HIOKI PW 3198; the single phase inverter parameters are shown in table 2.
TABLE 2 parameter table of single-phase inverter
Parameter(s) Numerical value Parameter(s) Numerical value
Frequency f to be cancelled0/kHZ 5，7，9 Inverter resistive load/omega 20
Upper limit of switching frequency/kHZ 8 Inverter inductive load/mH 10
Lower limit of switching frequency/kHZ 1.5 DC side voltage/V of inverter 48，24
In this embodiment, under different modulation strategies, a simulation waveform of a Power Spectrum (PSD) of an output voltage of a seven-level MPUC inverter using unit division is shown in fig. 7. FIG. 7(a) employs a conventional SPWM method with a fixed switching frequency of 3k Hz; it can be seen from the figure that there are sharp peaks, and the harmonic power is mainly concentrated near 3k Hz and its integral multiple frequency. Fig. 7(b) illustrates the carrier stacking method of the present invention, which can distribute harmonic power more uniformly, and has no sharp peak and better randomness in the PSD diagram; the harmonic waves at 7k Hz and integral multiple frequencies thereof can be obviously reduced.
When the modulation degree M is 0.7, the frequency to be cancelled is still 7 khz, and the output voltage, current, and voltage PSD simulation experimental waveforms of the non-master-slave carrier stacking RPWM selective harmonic cancellation method are shown in fig. 8. As can be seen from FIG. 8(a), in this method, the sine of the simulation waveform of the inverter output voltage and current is relatively lowGood, but many unnecessary level flips appear in the output waveform diagram. Fig. 8(b) shows experimental waveforms of output voltage and current, which are substantially the same as the simulation result, and the output waveform shows many unnecessary level flips. FIG. 8(c) is a graph of the PSD experimental waveform of voltage, as can be seen at f0And its integer multiple frequency location points, notches of about several hundred hertz appear in the PSD waveform because when f is equal to0When the harmonic power is completely eliminated, and0the close frequency is reduced by a certain amplitude; and a distance f0The more recent, the greater the magnitude of the attenuation. Therefore, the influence caused by phase errors such as system delay can be overcome.
A simulation waveform diagram of the method for selectively eliminating harmonic by using the master-slave carrier stacking RPWM of the seven-level MPUC inverter unit while keeping the modulation degree and the frequency to be eliminated unchanged is shown in fig. 9. As can be seen from fig. 9(a), unnecessary level jumps in the output voltage waveform are significantly reduced when the unit master-slave method works, the output voltage waveform changes in a sinusoidal manner, and the distortion rate of the output current is reduced from 9.17% to 4.60% under the same parameters. FIG. 9(b) shows the output voltage uABAnd iABThe PSD simulation oscillogram and the unit master-slave mode method can still selectively eliminate specific sub-frequency harmonics.
Meanwhile, under the method of the present invention, the experimental waveforms of the output voltage and current of the seven-level MPUC inverter are shown in fig. 10 and 11; according to different modulation degrees M and frequency f to be eliminated0The power spectral density experimental waveform of the output voltage is shown in fig. 12. In FIG. 12(a), M is 0.5, f0Voltage PSD waveform diagrams at 5, 7, 9 kHZ; in FIG. 12(b), M is 0.7, f0Voltage PSD waveform diagrams at 5, 7, 9 kHZ; in FIG. 12(c), M is 0.9, f0Voltage PSD waveform at 5, 7, 9 kHZ. As can be seen from the figure, the method of the invention can distribute harmonic power more uniformly, and has better randomness; at f0Under the condition of 3 frequencies, the method can well reduce the harmonic waves at the specific frequency; when the modulation ratio M is 0.5, 0.7, or 0.9, the harmonics at the specific order frequency can be reduced.
The seven-level MPUC inverter unit master-slave random RPWM selective harmonic elimination method has the characteristics of strong control flexibility, simple algorithm and easy realization, and can overcome the 3 main problems in the conventional RPWM selective harmonic elimination method, and the method specifically comprises the following steps:
on the basis of an inverter unit division idea, RPWM selective harmonic elimination of a seven-level MPUC inverter can be realized.
When frequency harmonics below 8kHZ are selectively eliminated, the distortion rate of the output current of the inverter is obviously reduced from 9.17% to 4.60%.
According to the method, unnecessary level inversion does not occur to the output voltage waveform of the inverter any longer, and the method is also one of the reasons for reducing the harmonic content of the output current.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions and scope of the present invention as defined in the appended claims.

Claims (4)

1. A master-slave RPWM selective harmonic elimination method for a seven-level MPUC inverter unit is characterized by comprising the following steps: the method comprises the following steps:
step 1, taking 1U-shaped unit in a seven-level MPUC inverter as 1 basic unit, carrying out unit segmentation on a single-phase seven-level MPUC inverter, and segmenting the seven-level MPUC inverter into three basic units in series;
step 2, determining a main unit and a slave unit in each series unit of the seven-level MPUC inverter, analyzing the relation between the total voltage harmonic of the inverter and the voltage harmonic of each unit aiming at the main-slave structure, and determining the feasibility of selectively eliminating the harmonic;
step 3, realizing coordination control among all units by utilizing a carrier stacking strategy, determining the functions of all master-slave units by a unit master-slave carrier stacking RPWM selective harmonic elimination method, and further obtaining carriers and modulation waves corresponding to the master unit and the slave unit;
each unit realizes the process of selectively eliminating harmonic waves, is equivalent to a mode of performing pulse width modulation on random triangular carrier waves and modulation waves, and realizes the coordination control among all series units through a carrier laminating strategy.
2. The seven-level MPUC inverter unit master-slave RPWM selective harmonic cancellation method according to claim 1, characterized in that: the specific method of the step 1 comprises the following steps:
1U-shaped unit in a single-phase seven-level MPUC inverter is taken as 1 basic unit, the seven-level MPUC inverter is divided into three basic units which are connected in series, and the total output voltage of the inverter is equal to the sum of the output voltages of the units;
the single-phase seven-level inverter consists of 2 direct-current power supplies with different voltage levels and 6 groups of power switching devices T1-T6Composition is carried out; dividing a single-phase seven-level MPUC inverter into 3 basic units connected in series; namely, the circuit structure corresponding to the power switch device is regarded as 3 groups of serial basic units, which are U respectively1、U2、U3A unit; the output voltage of each unit is uAD、uDFAnd uFBThe following formula shows:
Figure FDA0003448960470000011
Figure FDA0003448960470000012
Figure FDA0003448960470000013
wherein S is1-S6For power switching devices T1-T6The on-off state of (c);
at this time, the inverter outputs the total voltage uABIs equal to uAD、uDFAnd uFBAnd if each cell output voltage does not contain a specific subharmonic, the total voltage after addition does not contain the subharmonic.
3. The seven-level MPUC inverter unit master-slave RPWM selective harmonic cancellation method according to claim 2, characterized in that: the specific method of the step 2 comprises the following steps:
in 3U-shaped series units, connect U1、U3The unit is set as a master unit, and U is set2The unit is set as a slave unit;
U1the expression of the nth period of the PWM voltage pulse output by the unit is shown as the following formula:
Figure FDA0003448960470000021
therefore, the expression of the PWM voltage pulse is as follows:
Figure FDA0003448960470000022
wherein, gn(t) represents PWM voltage pulses of the nth pulse period, g (t) represents PWM voltage pulses, E represents high level of PWM voltage pulses, DnDuty ratio of the nth pulse period, TnIs the value of the period of the nth pulse, tn、tn+1Respectively the start time of the nth and the (N + 1) th pulse periods, wherein N is the period number of the PWM voltage pulse;
performing fourier transform on the expression of the PWM voltage pulse:
Figure FDA0003448960470000023
wherein G (f) is the Fourier transform of the pulse sequence g (t), f is the frequency, ω is the angular frequency, and j represents the imaginary part of the Fourier transform;
setting c (f)0) For the general form of the real and imaginary parts in the fourier transform described above, the following equation is shown:
Figure FDA0003448960470000024
wherein f is0For the frequency of the harmonics to be cancelled,
Figure FDA0003448960470000025
is the initial phase angle of sin ();
substituting the expression of PWM voltage pulse into c (f)0) The expression of (a) is given by:
Figure FDA0003448960470000026
wherein m is the sequence number of the PWM voltage pulse;
in the above-mentioned c (f)0) On the basis of an expression, a random PWM selective harmonic elimination method is determined, and specifically comprises the following steps:
using c (f)0) The first summation subentry of the m + e term in the expression summation terms offsets the second summation subentry of the m term; offsetting a second summation element of the m +1 term by using the first summation element of the m + e +1 term; and so on;
by the pair c (f)0) The calculation formula is simplified and calculated to obtain the following formula:
Figure FDA0003448960470000027
Figure FDA0003448960470000031
further obtaining the maximum value k of the random integer kmaxAnd the minimum value kminEach k ofmin～kmaxMaximum value f of instantaneous switching frequency of inverter corresponding to positive integer k within rangekmaxAnd minimum value fkminThe following formula shows:
Figure FDA0003448960470000032
Figure FDA0003448960470000033
on the basis of the formula (10), U is calculated1Switching period value T of unitn+1I.e. at voltage uADIn elimination of f0A frequency harmonic component; in the formula (10), Tn、DnRespectively the nth pulse period value and the duty ratio; t isn+1Is the n +1 pulse period value; k is a valid random number, and then according to the Tn+1Duty ratio D calculated from instantaneous value of modulation wave at middle point in cyclen+1(ii) a Thereby generating the required hysteresis-type PWM voltage pulse waveform; a plurality of random numbers k meeting the conditions are provided, and the switching period randomization is realized through the random selection of k;
calculating U using equation (10)2、U3Switching period value T of unitn+1In U at2、U3Cell output voltage uDFAnd uFBIn elimination of f0A frequency harmonic component; if u isAD、uDFAnd uFBDo not contain a specific subharmonic, then the total voltage u after adding themABIn the method, amplitude change can only occur on the basis of the original harmonic waves, and new harmonic times cannot occur; i.e. the output voltage u of the seven-level MPUC inverter obtained after the additionABNor does it contain the specific subharmonic.
4. The seven-level MPUC inverter unit master-slave RPWM selective harmonic cancellation method of claim 3, wherein: step 3, the specific method for coordinating and controlling the series units comprises the following steps:
in the process of coordination control of each series unit, selectively eliminating harmonic waves by a unit master-slave carrier stacking RPWM selective harmonic wave elimination method; i.e. the master unit is used for RPWM selective harmonic cancellation; the slave unit is used for controlling fundamental wave power output; according to the determined master-slave unit, the carrier signals of the 3 units are still equivalently obtained according to the method of the formula (10); the slave unit adopts a step wave modulation signal to approach sine, the master unit adopts an RPWM modulation wave signal corresponding to the difference between a reference sine signal and the step wave, and the sum of the modulation waves of 3 units is still the sine wave in the formula (13);
ur(ωt)＝3EMsin(ωt)＝ur1(ωt)+ur2(ωt)+ur3(ωt) (13)
wherein u isr(ω t) is the total modulation wave of the inverter, E is the DC-side voltage value, M is the modulation degree, ur1、ur2And ur3Modulated waves corresponding to 3 series units respectively, as shown in formulas (14-16);
Figure FDA0003448960470000041
Figure FDA0003448960470000042
Figure FDA0003448960470000043
at ur1、ur2And ur3On the basis, the formula (10) is applied to 3 series units in the MPUC inverter, and the switching period value T of each unit is calculatedn+1And duty cycle Dn+1(ii) a Switch period value Tn+1And duty cycle Dn+1The calculation process of (a) is equivalent to a form of stacking 3 groups of random triangular carriers which are respectively connected with ur1、ur2And ur3Comparing the three groups of modulation waves to generate a driving signal; at this time, the output voltages u of the 3 series unitsAD、uDFAnd uFBNone of them contains specific subharmonic f0And thus the total voltage u after superpositionABDoes not contain harmonic wave f0。
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