CN114299872B - Driving circuit, driving method thereof and display device - Google Patents
Driving circuit, driving method thereof and display device Download PDFInfo
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- CN114299872B CN114299872B CN202210005519.3A CN202210005519A CN114299872B CN 114299872 B CN114299872 B CN 114299872B CN 202210005519 A CN202210005519 A CN 202210005519A CN 114299872 B CN114299872 B CN 114299872B
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Abstract
The invention provides a driving circuit, a driving method thereof and a display device, and relates to the technical field of display. The driving circuit includes: the device comprises a power supply module, a source electrode driving module, a grid electrode driving module and a time sequence control module; the power supply module at least comprises a first power supply unit and a second power supply unit, and the source electrode driving module is at least electrically connected with the first power supply unit and the second power supply unit respectively; either one of the gate driving module and the timing control module is electrically connected to either one of the first power supply unit and the second power supply unit.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a driving circuit, a driving method thereof, and a display device.
Background
At present, when more and more high-end display devices are tested, for example, reliability tests are performed, the problems of higher power consumption, higher PCB temperature, overlarge current and the like often occur, and analysis finds that final sources point to power chips, because the current power chips are not efficient enough under high load and are easy to be subjected to overcurrent protection, the problems of higher power consumption, overlarge PCB temperature, overlarge current and the like easily occur in the display devices are caused, and therefore, the display devices are abnormal and the user experience is poor.
Disclosure of Invention
The embodiment of the invention provides a driving circuit, a driving method thereof and a display device.
In order to achieve the above purpose, the embodiment of the present invention adopts the following technical scheme:
in one aspect, a driving circuit, a driving method thereof, and a display device are provided, the driving circuit including: the device comprises a power supply module, a source electrode driving module, a grid electrode driving module and a time sequence control module;
the power supply module at least comprises a first power supply unit and a second power supply unit, and the source electrode driving module is at least electrically connected with the first power supply unit and the second power supply unit respectively; either one of the gate driving module and the timing control module is electrically connected to either one of the first power supply unit and the second power supply unit.
Optionally, the power supply module includes the first power supply unit and the second power supply unit;
the source driving module comprises a plurality of source driving units, wherein a part of the source driving units are electrically connected with the first power supply unit, and the rest of the source driving units are electrically connected with the second power supply unit.
Optionally, the source driving module includes M source driving units, where the M source driving units are divided into two groups, the first group includes N1 source driving units, the second group includes N2 source driving units, the first group of source driving units is electrically connected to the first power supply unit, and the second group of source driving units is electrically connected to the second power supply unit;
in the case where M is even, n1=n2=m/2;
in the case where M is an odd number of 3 or more, n1= (m+1)/2, and n2= (m+1)/2-1.
Optionally, the power supply module includes the first power supply unit and the second power supply unit;
the source driving module comprises a plurality of source driving units, each source driving unit comprises a first power signal line and a second signal line, all the first power signal lines of the source driving units are electrically connected with the first power supply unit, and all the second signal lines of the source driving units are electrically connected with the second power supply unit.
Optionally, the gate driving module is electrically connected with the first power supply unit;
the time sequence control module is electrically connected with the second power supply unit.
Optionally, the power supply module includes the first power supply unit and the second power supply unit;
the driving circuit further comprises a connector, a debugging control module and a debugging module;
the input end of the debugging module is electrically connected with the connector in a first state and is electrically connected with the debugging control module in a second state, the power supply signal end of the debugging module is electrically connected with the connector in the first state and the second state, and the output end of the debugging module is respectively and electrically connected with the first power supply unit and the second power supply unit; the debugging module is configured to provide a power supply control signal to any one of the first power supply unit and the second power supply unit according to a debugging control signal in the first state and the second state respectively;
the connector is configured to provide the debug control signal to the debug module in the first state; in the second state, not providing the debug control signal to the debug module;
the debug control module is configured to not provide the debug control signal to the debug module in the first state; in the second state, the debug control signal is provided to the debug module.
Optionally, the debugging module comprises a first debugging unit and a second debugging unit;
the first input end of the first debugging unit is electrically connected with the connector in the first state and is electrically connected with the first end of the debugging control module in the second state, the first power supply signal end of the first debugging unit is electrically connected with the connector in the first state and the second state, and the first output end of the first debugging unit is electrically connected with the first power supply unit;
the second input end of the second debugging unit is electrically connected with the connector in the first state and is electrically connected with the control end of the debugging control module in the second state, the second power supply signal end of the second debugging unit is electrically connected with the connector in the first state and the second state, and the second output end of the second debugging unit is electrically connected with the second power supply unit;
the debugging module is configured to output the power supply control signal through any one of the first output end and the second output end in the first state and the second state respectively, and the output ends for outputting the power supply control signal in the first state and the second state are different;
The connector is configured to be electrically connected to both the first input of the first debug unit and the second input of the second debug unit in the first state, and to be electrically disconnected from both the first input of the first debug unit and the second input of the second debug unit in the second state;
the debug control module is configured to be electrically disconnected from both the first input of the first debug unit and the second input of the second debug unit in the first state, and the first end of the debug control module is electrically connected to the first input of the first debug unit in the second state, and the control end of the debug control module is electrically connected to the second input of the second debug unit;
the first power supply unit and the second power supply unit are respectively configured to supply power to any one of the source driving module, the gate driving module, and the timing control module according to the power supply control signal.
Optionally, the first debug unit includes a first transistor, a first diode and a first voltage regulator; the control electrode of the first transistor is electrically connected with the first electrode of the first voltage stabilizing tube and is used as the first input end of the first debugging unit, the first electrode of the first transistor is electrically connected with the second electrode of the first voltage stabilizing tube and the first electrode of the first diode and is used as the first power supply signal end of the first debugging unit, and the second electrode of the first transistor is electrically connected with the second electrode of the first diode and is used as the first output end of the first debugging unit;
The second debugging unit comprises a second transistor, a second diode and a second voltage stabilizing tube; the control electrode of the second transistor is electrically connected with the first electrode of the second voltage stabilizing tube and is used as the second input end of the second debugging unit, the first electrode of the second transistor is electrically connected with the second electrode of the second voltage stabilizing tube and the first electrode of the second diode and is used as the second power supply signal end of the second debugging unit, and the second electrode of the second transistor is electrically connected with the second electrode of the second diode and is used as the second output end of the second debugging unit;
the first transistor is of the same type as the second transistor.
Optionally, the debugging control module comprises a first control unit and a second control unit;
the first control unit comprises a first voltage end, a third output end, a grounding end and a resistor; the resistor is arranged between the third output end and the grounding end in the first state, the resistor is not arranged between the third output end and the first voltage end and is suspended, the resistor is arranged between the third output end and the first voltage end in the second state, and the resistor is not arranged between the third output end and the grounding end and is suspended;
The second control unit comprises a third transistor, a third diode and a third voltage stabilizing tube; the control electrode of the third transistor is electrically connected to the first electrode of the third voltage regulator, and is used as the input terminal of the debug unit in the second state, the first electrode of the third transistor is electrically connected to the second electrode of the third voltage regulator and the first electrode of the third diode, and the second electrode of the third transistor is electrically connected to the second electrode of the third diode and the ground terminal.
Optionally, the third transistor is of opposite type to the first transistor.
In another aspect, a display device is provided, including the driving circuit described above.
In still another aspect, a driving method of the driving circuit is provided, where the driving circuit includes a power supply module, a source driving module, a gate driving module, and a timing control module; the power supply module at least comprises a first power supply unit and a second power supply unit, and the source electrode driving module is at least electrically connected with the first power supply unit and the second power supply unit respectively; either one of the gate driving module and the timing control module is electrically connected with either one of the first power supply unit and the second power supply unit;
The driving method includes:
the first power supply unit and the second power supply unit supply power to the source driving module, the gate driving module and the timing control module.
The embodiment of the invention provides a driving circuit, which comprises a power supply module, a source electrode driving module, a grid electrode driving module and a time sequence control module; the power supply module at least comprises a first power supply unit and a second power supply unit, and the source electrode driving module is at least electrically connected with the first power supply unit and the second power supply unit respectively; any one of the grid driving module and the time sequence control module is electrically connected with any one of the first power supply unit and the second power supply unit, so that at least two power supply units are matched to bear the power supply of the whole source driving module, the working pressure of each power supply unit can be reduced, the working temperature of each power supply unit is not easy to be too high, and the driving circuit can work normally.
The foregoing description is only an overview of the technical solutions of the present application, and may be implemented according to the content of the specification in order to make the technical means of the present application more clearly understood, and in order to make the above-mentioned and other objects, features and advantages of the present application more clearly understood, the following detailed description of the present application will be given.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a driving circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a driving circuit applied to a display device according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an electrical connection between a power supply unit and a source driving unit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another power supply unit and a source driving unit according to an embodiment of the present invention;
fig. 5 and fig. 6 are schematic diagrams of electrical connection structures of a connector, a debug control module, a debug module and a power supply unit in a first state and a second state according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of an MSDA signal control debug module according to an embodiment of the present invention;
Fig. 8 and fig. 9 are schematic diagrams of electrical connection structures of a connector, a debug control module, a first debug unit, a second debug unit, and a power supply unit in a first state and a second state according to an embodiment of the present invention;
fig. 10 and fig. 11 are schematic diagrams of electrical connection structures of a connector, a debug control module, a first debug unit, a second debug unit, a first power supply unit, a second power supply unit, a gate driving module, a source driving module and a timing control module in a first state and a second state according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of a first debug unit and a second debug unit according to an embodiment of the present invention;
fig. 13 is a schematic structural diagram of a first control unit according to an embodiment of the present invention;
fig. 14 is a schematic structural diagram of a second control unit according to an embodiment of the present invention;
fig. 15 is a schematic structural diagram of a driving circuit in a second state according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the embodiments of the present invention, the words "first," "second," "third," etc. are used to distinguish between the same item or similar items that have substantially the same function and function, and are merely used to clearly describe the technical solutions of the embodiments of the present invention, and they are not to be construed as indicating or implying relative importance or implying that the number of technical features indicated is indicated.
In the embodiments of the present invention, the meaning of "plurality" is two or more, unless specifically defined otherwise.
An embodiment of the present invention provides a driving circuit, shown with reference to fig. 1, including: a power supply module 1, a source driving module 2, a gate driving module 3 and a timing control module 4.
Referring to fig. 1, the power supply module 1 includes at least a first power supply unit 11 and a second power supply unit 12, and the source driving module 2 is electrically connected to at least the first power supply unit 11 and the second power supply unit 12, respectively; either one of the gate driving module 3 and the timing control module 4 is electrically connected to either one of the first power supply unit and the second power supply unit.
The structure, type, etc. of the above power supply module are not particularly limited, and the power supply module may include a PMIC (Power Management Integratedcircuit, power management integrated chip) as an example.
The structure, type, etc. of the source driving module are not particularly limited, and the source driving module may include a SIC (Source Integratedcircuit, source integrated chip) as an example.
The structure, type, etc. of the above-described gate driving module are not particularly limited, and the gate driving module may include a GOA (Gate Driver On Array, array substrate row driving) circuit, for example.
The structure, type, etc. of the above-described timing control module are not particularly limited, and the timing control module may include a Tcon (Timing Controller ) as an example.
The power supply module at least comprises a first power supply unit and a second power supply unit, which means that: the power supply module only comprises a first power supply unit and a second power supply unit; alternatively, the power supply module may further include other power supply units than the first power supply unit and the second power supply unit, which are not particularly limited herein. Fig. 1 illustrates that the power supply module 1 includes only the first power supply unit 11 and the second power supply unit 12.
The source driving module is at least electrically connected with the first power supply unit and the second power supply unit respectively. By way of example, referring to fig. 1, in the case where the power supply module 1 includes only the first power supply unit 11 and the second power supply unit 12, the source driving module 2 is electrically connected to the first power supply unit 11 and the second power supply unit 12, respectively; of course, in the case that the power supply module further includes other power supply units than the first power supply unit and the second power supply unit, the source driving module may be electrically connected to the other power supply units, specifically, based on actual needs.
Any one of the gate driving module and the timing control module is electrically connected to any one of the first power supply unit and the second power supply unit. As an example, referring to fig. 1, the gate driving module 3 is electrically connected to the first power supply unit 11, and the timing control module 4 is electrically connected to the second power supply unit 12; alternatively, the gate driving module may be electrically connected with the second power supply unit, and the timing control module may be electrically connected with the second power supply unit; alternatively, the gate driving module and the timing control module may be both electrically connected to the first power supply unit; alternatively, the gate driving module and the timing control module may be electrically connected to the second power supply unit, and are not particularly limited herein.
The electrical connection relation of the source driving module, the gate driving module, and the timing control module is not particularly limited. For example, when the above-described driving circuit is applied to a display device, referring to fig. 2, the display device further includes a display panel 5, and the source driving module 2 and the gate driving module 3 are electrically connected to the display panel 5; the timing control module 4 is electrically connected to the source driving module 2 and the gate driving module 3, respectively.
The specific circuit structures of the power supply module, the source driving module, the gate driving module and the timing control module are not limited, and only need to satisfy the corresponding functions.
In the driving circuit provided by the embodiment of the invention, the source driving module is at least electrically connected with the first power supply unit and the second power supply unit respectively, and any one of the gate driving module and the time sequence control module is electrically connected with any one of the first power supply unit and the second power supply unit. Because the source electrode driving module is powered by at least two power supply units, the at least two power supply units are matched to bear the power supply of the whole source electrode driving module, the working pressure of each power supply unit is reduced, the working temperature of each power supply unit is not easy to be too high, and the driving circuit is ensured to work normally.
Alternatively, referring to fig. 3, the power supply module 1 includes a first power supply unit 11 and a second power supply unit 12; the source driving module includes a plurality of source driving units, wherein a part of the source driving units are electrically connected with the first power supply unit 11, and the rest of the source driving units are electrically connected with the second power supply unit 12. Therefore, the source driving units can be divided according to the number of the source driving units, so that the two power supply units are matched to bear the power supply of the source driving units, the working pressure of the first power supply unit and the working pressure of the second power supply unit are reduced, the working temperatures of the first power supply unit and the second power supply unit are not easy to be too high, and the first power supply unit and the second power supply unit are ensured to work normally.
The source driving module comprises a plurality of source driving units. The specific number of the source driving units is not limited herein, and the number of the source driving units may include two, but of course, the number of the source driving units may also include three, four, five, six, and so on. Fig. 3 illustrates six source driving units, which are a source driving unit 211, a source driving unit 212, a source driving unit 213, a source driving unit 214, a source driving unit 215, and a source driving unit 216, respectively.
The source electrode driving units are electrically connected with the first power supply unit, and the other source electrode driving units are electrically connected with the second power supply unit. The specific number of source driving units electrically connected to the first power supply unit and the specific number of source driving units electrically connected to the second power supply unit are not limited herein, as long as it is ensured that the source driving unit electrically connected to the first power supply unit is no longer electrically connected to the second power supply unit and the source driving unit electrically connected to the second power supply unit is no longer electrically connected to the first power supply unit. Specifically, the number of source driving units electrically connected to the first power supply unit may be the same as or different from the number of source driving units electrically connected to the second power supply unit, and fig. 3 illustrates that the number of source driving units electrically connected to the first power supply unit 11 and the number of source driving units electrically connected to the second power supply unit 12 are all three source driving units as an example. For example, referring to fig. 3, the source driving unit 211, the source driving unit 212, and the source driving unit 213 are all electrically connected to the first power supply unit 11, and the source driving unit 214, the source driving unit 215, and the source driving unit 216 are all electrically connected to the second power supply unit 12.
Optionally, the source driving module includes M source driving units, where the M source driving units are divided into two groups, the first group includes N1 source driving units, the second group includes N2 source driving units, the first group of source driving units is electrically connected with the first power supply unit, and the second group of source driving units is electrically connected with the second power supply unit.
Referring to fig. 3, in the case where M is an even number, n1=n2=m/2. Therefore, even number of source driving units can be divided equally according to the number of source driving units, namely, each power supply unit supplies power to the same number of source driving units, so that the working pressure of each power supply unit is basically consistent, and when the driving circuit is used for the display panel 5 shown in fig. 2, the display panel 5 avoids the split problem as much as possible.
In the case where M is an even number, n1=n2=m/2. Specific values of M are not limited herein, and M may be equal to 2, 4, 6, 8, etc., as examples. When m=2, n1=n2=1; when m=4, n1=n2=2; when m=6, n1=n2=3; when m=8, n1=n2=4. Fig. 3 illustrates that, when m=6, n1=n2=3.
Referring to fig. 4, in the case where M is an odd number greater than or equal to 3, n1= (m+1)/2, and n2= (m+1)/2-1. Thus, the odd number of source driving units are divided equally as much as possible according to the number of source driving units, so that the working pressure of each power supply unit is less different.
In the case where M is an odd number of 3 or more, n1= (m+1)/2, and n2= (m+1)/2-1. Specific values of M are not limited herein, and M may be equal to 3, 5, 7, 9, etc., as examples. When m=3, n1=2, and n2=1; when m=5, n1=3, and n2=4; when m=7, n1=4, and n2=3; when m=9, n1=5, and n2=4. Fig. 4 illustrates that, when m=5, n1=3 and n2=4 are taken as examples. Referring to fig. 4, the source driving unit 221, the source driving unit 222, and the source driving unit 223 are all electrically connected to the first power supply unit 11, and the source driving unit 224 and the source driving unit 225 are all electrically connected to the second power supply unit 12.
Optionally, the power supply module includes the first power supply unit and a second power supply unit; the source electrode driving module comprises a plurality of source electrode driving units, the source electrode driving units comprise first power supply signal lines and second signal lines, the first power supply signal lines of all source electrode driving units are electrically connected with the first power supply unit, and the second signal lines of all source electrode driving units are electrically connected with the second power supply unit. Therefore, the signal wires of each source electrode driving unit are classified according to types, so that the two power supply units are matched to bear the power supply of the signal wires of different types of all source electrode driving units, the working pressure of the first power supply unit and the working pressure of the second power supply unit are reduced, the working temperatures of the first power supply unit and the second power supply unit are not easy to be too high, and the first power supply unit and the second power supply unit are ensured to work normally.
The source driving module comprises a plurality of source driving units. The specific number of the source driving units is not limited herein, and the number of the source driving units may include two, but of course, the number of the source driving units may also include three, four, five, six, and so on.
The type, number, etc. of the first power signal lines are not particularly limited, and the first power signal lines may include, for example, a digital power (VDD 18) signal line, an analog positive power signal line (AVDD), an analog negative power (AVEE) signal line, etc. The number of the first power signal lines of each source driving unit may be 1, 2, 3, etc., wherein each source driving unit may include only the same type of first power signal lines, for example, only a digital power (VDD 18) signal line, or only an analog positive power signal line (AVDD), an analog negative power (AVEE) signal line; of course, each source driving unit may further include various types of first power signal lines, for example, including both a digital power (VDD 18) signal line and an analog positive power (AVDD) and negative power (AVEE) signal lines. Where VDD18 represents a voltage of 1.8 volts.
The types, the number, and the like of the second signal lines are not particularly limited, and the second signal lines may include Gamma voltage (Gamma voltage) signal lines, and the like, as examples. The number of the second power signal lines of each source driving unit may be 1, 2, 3, etc., wherein each source driving unit may include only the second power signal lines of the same type, for example, only the gamma voltage signal lines; alternatively, each source driving unit may include various types of first power signal lines, including, for example, gamma voltage signal lines and other types of signal lines, depending on practical applications.
Since the power consumption of the gate driving module and the timing control module is also higher, in order to further reduce the working voltage of each power supply unit and make the working voltages of the power supply units as close as possible, optionally, referring to fig. 1, the gate driving module 3 is electrically connected with the first power supply unit 11; the timing control module 4 is electrically connected to the second power supply unit 12.
The kind, number, etc. of the signal lines included in the gate driving module are not particularly limited, and the gate driving module may include a GOA on Voltage (VGH) signal line, a GOA off Voltage (VGL) signal line, a common Voltage (VCOM) signal line, etc. as an example. In the case where the gate driving module includes VGH signal lines, VGL signal lines, and VCOM signal lines, the VGH signal lines, VGL signal lines, and VCOM signal lines are all electrically connected with the first power supply unit 11.
The kind, number, etc. of the signal lines included in the timing control module are not particularly limited, and the timing control module may include digital power (VDD 09 and/or VDD 11) signal lines, etc. as an example. In the case where the timing control block includes the VDD09 signal line and the VDD11 signal line, both the VDD09 signal line and the VDD11 signal line are electrically connected to the second power supply unit 12. Where VDD09 represents a voltage of 0.9 volts and VDD11 represents a voltage of 1.1 volts.
Alternatively, referring to fig. 5 and 6, the power supply module 1 includes a first power supply unit 11 and a second power supply unit 12. The drive circuit further comprises a connector 6, a debug control module 7 and a debug module 8.
Referring to fig. 5 and 6, the input end of the debug module 8 is electrically connected to the connector 6 in the first state and electrically connected to the debug control module 7 in the second state, the power signal end of the debug module 8 is electrically connected to the connector 6 in both the first state and the second state, and the output end of the debug module 8 is electrically connected to the first power supply unit 11 and the second power supply unit 12, respectively; the debug module 8 is configured to provide a power supply control signal to either one of the first power supply unit 11 and the second power supply unit 12 in accordance with the debug control signal in the first state and the second state, respectively.
Referring to fig. 5 and 6, connector 6 is configured to provide debug control signals to debug module 8 in a first state; in the second state, no debug control signal is provided to debug module 8; the debug control module 7 is configured to not provide debug control signals to the debug module 8 in the first state; in the second state, a debug control signal is provided to debug module 8.
The first state refers to a state in which the connector inputs a debug control signal to the debug module, and the connector provides a power supply control signal to any power supply unit under the control of the debug control signal, so that any power supply unit supplies power under the control of the power supply control signal, and the other power supply unit does not supply power. The second state refers to a state in which the debug control module inputs a debug control signal to the debug module, and the connector provides a power supply control signal to any power supply unit under the control of the debug control signal, so that any power supply unit supplies power under the control of the power supply control signal, and the other power supply unit does not supply power. The access mode of the debug control module in the driving circuit is not particularly limited, and the debug control module may be manually connected to the debug module in the first state and electrically connected to the debug module in the second state.
The structure, type, and the like of the connector are not particularly limited herein, and the connector may include a CNT IC (Connector Integratedcircuit, connector integrated chip) as an example.
The structure, type, etc. of the above-described debug control module are not particularly limited, and the debug control module may include any one of a plurality of MOS (MOSFET) transistors, tcon ICs, or MCUs (Microcontroller Unit, micro control units), for example.
The structure, type, etc. of the above-mentioned debug module are not particularly limited, and the debug module may include any one of a plurality of MOS transistors, tcon ICs, or MCUs, for example.
The specific type of the above debug control signal is not limited herein, and the debug control signal may include a gate control signal, for example.
The specific type of the power supply control signal is not limited herein, and the power supply control signal may include a differential signal, which may include an MSCL (control line) signal, an MSDA (data line) signal, for example. Fig. 7 illustrates and describes an example of the power supply control signal as the MSDA signal.
The specific circuit structures of the connector, the debugging control module and the debugging module are not limited, and only the corresponding functions are met.
The debugging module provided by the embodiment of the invention is configured to provide a power supply control signal for any one of the first power supply unit and the second power supply unit according to the debugging control signal in a first state and a second state respectively, so that in the first state, the connector controls the debugging module to provide the power supply control signal for any one of the power supply units through the debugging control signal, and in the second state, the debugging control module controls the debugging module to provide the power supply control signal for any one of the power supply units through the debugging control signal, thereby controlling any one of the first power supply unit and the second power supply unit to supply power under the power supply control signal, and the other power supply unit is not powered, and further, the single power supply unit can be adjusted.
Alternatively, referring to fig. 8 and 9, the debug module 8 includes a first debug unit 81 and a second debug unit 82.
Referring to fig. 8 and 9, a first input terminal of the first debug unit 81 is electrically connected to the connector 6 in a first state and is electrically connected to a first terminal of the debug control module 7 in a second state, a first power signal terminal of the first debug unit 81 is electrically connected to the connector 6 in both the first state and the second state, and a first output terminal of the first debug unit 81 is electrically connected to the first power supply unit 11; a second input end of the second debugging unit 82 is electrically connected with the connector 6 in a first state and is electrically connected with a control end of the debugging control module 7 in a second state, a second power supply signal end of the second debugging unit 82 is electrically connected with the connector 6 in both the first state and the second state, and a second output end of the second debugging unit 82 is electrically connected with the second power supply unit 12; the debug module 8 is configured to output the power supply control signal through either one of the first output terminal and the second output terminal in the first state and the second state, respectively, and the output terminals that output the power supply control signal in the first state and the second state are different.
Referring to fig. 8 and 9, the connector 6 is configured to be electrically connected to both the first input terminal of the first debug unit 81 and the second input terminal of the second debug unit 82 in the first state, and to be electrically disconnected from both the first input terminal of the first debug unit 81 and the second input terminal of the second debug unit 82 in the second state.
Referring to fig. 8 and 9, the debug control module 7 is configured to be electrically disconnected from both the first input terminal of the first debug unit 81 and the second input terminal of the second debug unit 82 in the first state, and the first terminal of the debug control module 7 is electrically connected to the first input terminal of the first debug unit 81 in the second state, and the control terminal of the debug control module 7 is electrically connected to the second input terminal of the second debug unit 82.
Referring to fig. 10 and 11, the first power supply unit 11 and the second power supply unit 12 are configured to supply power to any one of the source driving module 2, the gate driving module 3, and the timing control module 4 according to a power supply control signal, respectively.
Alternatively, referring to fig. 12, the first debug unit 81 includes a first transistor 811, a first diode 812, and a first voltage regulator 813; the control electrode of the first transistor 811 is electrically connected to the first electrode of the first voltage regulator 813 and serves as the first input terminal of the first debug unit 81, the first electrode of the first transistor 811 is electrically connected to both the second electrode of the first voltage regulator 813 and the first electrode of the first diode 812 and serves as the first power supply signal terminal of the first debug unit 81, and the second electrode of the first transistor 811 is electrically connected to the second electrode of the first diode 812 and serves as the first output terminal of the first debug unit 81.
Referring to fig. 12, the second debug unit 82 includes a second transistor 821, a second diode 822, and a second voltage regulator 823; the control electrode of the second transistor 821 is electrically connected to the first electrode of the second voltage regulator 823 and serves as the second input terminal of the second debug unit 82, the first electrode of the second transistor 821 is electrically connected to both the second electrode of the second voltage regulator 823 and the first electrode of the second diode 822 and serves as the second power supply signal terminal of the second debug unit 82, and the second electrode of the second transistor 821 is electrically connected to the second electrode of the second diode 822 and serves as the second output terminal of the second debug unit 82;
as shown with reference to fig. 12, the first transistor 811 is of the same type as the second transistor 821.
The types of the first transistor and the second transistor are not particularly limited, and the first transistor and the second transistor may each include a P-type transistor, or the first transistor and the second transistor may each include an N-type transistor.
Here, the types of the first diode and the second diode are not particularly limited, and the first diode and the second diode may each include a PN photodiode or a PIN photodiode, for example.
The first voltage stabilizing tube is used for stabilizing the voltage of the first debugging unit, and the second voltage stabilizing tube is used for stabilizing the voltage of the second debugging unit. Here, the types of the first voltage regulator and the second voltage regulator are not particularly limited, and the first voltage regulator and the second voltage regulator may each include a voltage regulator diode, and specifically, the voltage regulator diode may include a low voltage regulator diode or a high voltage regulator diode.
The connection manner of the first signal terminal and the second input terminal is not specifically limited, and, for example, the first signal terminal and the second input terminal may be electrically connected to other modules (such as connectors) independently, or the first signal terminal and the second input terminal may be electrically connected to other modules (such as connectors) after being electrically connected to each other, and fig. 12 is shown by taking the first signal terminal and the second input terminal as independent settings respectively.
The connection manner of the first power signal terminal and the second power signal terminal is not specifically limited, and, for example, the first power signal terminal and the second power signal terminal may be electrically connected to other modules (such as connectors) independently, or the first power signal terminal and the second power signal terminal may be electrically connected to other modules (such as connectors) after being electrically connected to each other, and fig. 12 is shown by taking the electrical connection of the first power signal terminal and the second power signal terminal as an example.
Alternatively, referring to fig. 13 and 14, the debug control module includes a first control unit and a second control unit 72.
Referring to fig. 13, the first control unit includes a first voltage terminal VDD, a third output terminal 711, a ground terminal GND, and a resistor R; the resistor R is disposed between the third output terminal 711 and the ground terminal GND in the first state, and is not disposed between the third output terminal 711 and the first voltage terminal VDD and is suspended.
Referring to fig. 14, the second control unit 72 includes a third transistor 721, a third diode 722, and a third regulator 723; the control electrode of the third transistor 721 is electrically connected to the first electrode of the third voltage regulator 723, and in the second state, is used as an input terminal of the debug unit, the first electrode of the third transistor 721 is electrically connected to both the second electrode of the third voltage regulator 723 and the first electrode of the third diode 722, and the second electrode of the third transistor 721 is electrically connected to both the second electrode of the third diode 722 and the ground GND. In this way, in the second state, the resistor can be arranged between the third output and the first voltage terminal manually by a worker and the third output of the first control unit can be electrically connected to the gate of the third transistor of the second control unit, so that the gate of the third transistor inputs the voltage of the first voltage terminal.
The manner how the above-mentioned resistor is arranged between the third output terminal and the ground terminal in the first state and between the third output terminal and the first voltage terminal in the second state is not particularly limited, and the position of the resistor may be set by a manual manner by way of example.
For ease of control, the third transistor is optionally of opposite type to the first transistor.
Here, the types of the third transistor and the first transistor are not particularly limited, and in the case where the first transistor is a P-type transistor, the third transistor is an N-type transistor; alternatively, in the case where the first transistor is an N-type transistor, the third transistor is a P-type transistor, which is particularly practical.
The embodiment of the invention also provides a display device which comprises the driving circuit.
The display device may be a flexible display device (also called a flexible screen), or may be a rigid display device (i.e., a display screen that cannot be bent), which is not limited herein. The display device may be an OLED (Organic Light-Emitting Diode) display device, or may be an LCD (Liquid Crystal Display) display device, or may be any product or component having a display function, such as a television, a digital camera, a mobile phone, a tablet computer, etc. including an LCD or an OLED, and is particularly suitable for a game notebook computer, a tablet computer, etc. having a high refresh rate. The display device has lower power consumption under the high refresh rate, lower PCB temperature, good imaging quality and high product quality.
Optionally, referring to fig. 2, the display device further includes a display panel 5, and the source driving module 2 and the gate driving module 3 are electrically connected to the display panel 5; the timing control module 4 is electrically connected to the source driving module 2 and the gate driving module 3, respectively. At this time, the driving circuit is applied to the display device, and the source driving module and the gate driving module both provide driving signals to the display panel under the control of the timing control module.
The structures, types, and the like of the source driving module, the gate driving module, and the timing control module are not particularly limited. For example, the source driving module may include SIC; the grid driving module comprises a GOA circuit; the timing control module may include Tcon.
The embodiment of the invention also provides a driving method of the driving circuit.
The driving circuit comprises a power supply module, a source electrode driving module, a grid electrode driving module and a time sequence control module; the power supply module at least comprises a first power supply unit and a second power supply unit, and the source electrode driving module is at least electrically connected with the first power supply unit and the second power supply unit respectively; either one of the gate driving module and the timing control module is electrically connected to either one of the first power supply unit and the second power supply unit.
The driving method comprises the following steps:
s1, the first power supply unit and the second power supply unit supply power to the source electrode driving module, the grid electrode driving module and the time sequence control module.
By executing the step S1, at least two power supply units can be matched to bear the power supply of the whole source electrode driving module, so that the working pressure of each power supply unit is reduced, the working temperature of each power supply unit is not easy to be too high, and the driving circuit is ensured to work normally.
Next, referring to fig. 7 and fig. 10 to fig. 15, a driving method of the driving circuit will be specifically described by taking the first transistor 811 and the second transistor 812 as P-type transistors and the third transistor 721 as N-type transistors as an example for supplying power to the VCOM signal line of the gate driving module.
In the first state, since the default connector 6 inputs a high voltage to the first input terminal of the first debug unit 81 when drawing the schematic diagram, the control electrode of the first transistor 811 is turned off under the control of the high voltage, the first debug unit 81 does not supply the power supply control signal to the first power supply unit 11, and the first power supply unit 11 does not supply power to the source driving module 2 and the gate driving module 3, so the first power supply unit 11 does not supply power to the VCOM signal line of the gate driving module. Meanwhile, since the default connector 6 inputs a low voltage to the second input terminal of the second debug unit 82 when drawing the schematic diagram, the control electrode of the second transistor 821 is turned on under the control of the low voltage, the connector 6 inputs the MSDA signal to the second power supply unit 12 through the first electrode of the second transistor 821 and the first electrode of the second diode 822, and the second power supply unit 12 supplies power to the source driving module 2 and the timing control module 4.
In the second state, the resistor R is manually set between the third output terminal 711 and the first voltage terminal VDD (high voltage), and the third output terminal 711 is suspended from the ground terminal GND. The third output terminal 711 is electrically connected to the gate of the third transistor 721 in the second control unit 72, the gate of the third transistor 721 is turned on at a high voltage, and the ground terminal GND makes the first electrode of the third transistor 721 low. Since the control electrode of the third transistor 721 is manually electrically connected to the control electrode of the second transistor 821 in the second debug unit 82 and the first electrode of the third transistor 721 is electrically connected to the control electrode of the first transistor 811 in the first debug unit 81, the second transistor 821 is turned off under the high potential control of the debug control module 7, the second debug unit 82 does not supply the power supply control signal to the second power supply unit 12, and the second power supply unit 12 does not supply power to the source driving module 2 and the timing control module 4. Meanwhile, the first transistor 811 in the first debug unit 81 is turned on under the low-level control of the debug control module 7, the connector 6 inputs the MSDA signal to the first power supply unit 11 through the first pole of the first transistor 811 and the first pole of the first diode 812, and the second pole of the first transistor 811 and the second pole of the first diode 812 supply power to the source driving module 2 and the gate driving module 3 at this time, and thus the first power supply unit 11 supplies power to the VCOM signal line of the gate driving module.
If the first power supply unit is not powered and the second power supply unit is powered, the resistor R is manually set between the third output terminal 711 and the ground terminal VDD, and other steps may be repeated, which will not be repeated here.
First, in fig. 13, the resistor is not turned on by the "x" mark.
Second, in this embodiment, the structure description of the first power supply unit, the second power supply unit, the source driving module, the gate driving module, the timing control module, the debug module, the connector and the debug control module, the first control unit, the second control unit, the first debug unit and the second debug unit may refer to the foregoing embodiments, and will not be repeated herein.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application.
In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the present application may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and are not limiting thereof; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the corresponding technical solutions.
Claims (11)
1. The driving circuit is characterized by comprising a power supply module, a source electrode driving module, a grid electrode driving module and a time sequence control module;
the power supply module at least comprises a first power supply unit and a second power supply unit, and the source electrode driving module is at least electrically connected with the first power supply unit and the second power supply unit respectively; either one of the gate driving module and the timing control module is electrically connected with either one of the first power supply unit and the second power supply unit;
the power supply module comprises the first power supply unit and the second power supply unit;
the source driving module comprises a plurality of source driving units, wherein a part of the source driving units are electrically connected with the first power supply unit, and the rest of the source driving units are electrically connected with the second power supply unit.
2. The driving circuit according to claim 1, wherein the source driving module includes M source driving units, the M source driving units are divided into two groups, a first group includes N1 source driving units, a second group includes N2 source driving units, the first group of source driving units is electrically connected to the first power supply unit, and the second group of source driving units is electrically connected to the second power supply unit;
in the case where M is even, n1=n2=m/2;
in the case where M is an odd number of 3 or more, n1= (m+1)/2, and n2= (m+1)/2-1.
3. The drive circuit according to claim 1, wherein the power supply module includes the first power supply unit and the second power supply unit;
the source driving module comprises a plurality of source driving units, each source driving unit comprises a first power signal line and a second signal line, all the first power signal lines of the source driving units are electrically connected with the first power supply unit, and all the second signal lines of the source driving units are electrically connected with the second power supply unit.
4. The drive circuit of claim 1, wherein the gate drive module is electrically connected to the first power supply unit;
The time sequence control module is electrically connected with the second power supply unit.
5. The drive circuit according to claim 1, wherein the power supply module includes the first power supply unit and the second power supply unit;
the driving circuit further comprises a connector, a debugging control module and a debugging module;
the input end of the debugging module is electrically connected with the connector in a first state and is electrically connected with the debugging control module in a second state, the power supply signal end of the debugging module is electrically connected with the connector in the first state and the second state, and the output end of the debugging module is respectively and electrically connected with the first power supply unit and the second power supply unit; the debugging module is configured to provide a power supply control signal to any one of the first power supply unit and the second power supply unit according to a debugging control signal in the first state and the second state respectively;
the connector is configured to provide the debug control signal to the debug module in the first state; in the second state, not providing the debug control signal to the debug module;
The debug control module is configured to not provide the debug control signal to the debug module in the first state; in the second state, the debug control signal is provided to the debug module.
6. The driving circuit according to claim 5, wherein the debug module includes a first debug unit and a second debug unit;
the first input end of the first debugging unit is electrically connected with the connector in the first state and is electrically connected with the first end of the debugging control module in the second state, the first power supply signal end of the first debugging unit is electrically connected with the connector in the first state and the second state, and the first output end of the first debugging unit is electrically connected with the first power supply unit;
the second input end of the second debugging unit is electrically connected with the connector in the first state and is electrically connected with the control end of the debugging control module in the second state, the second power supply signal end of the second debugging unit is electrically connected with the connector in the first state and the second state, and the second output end of the second debugging unit is electrically connected with the second power supply unit;
The debugging module is configured to output the power supply control signal through any one of the first output end and the second output end in the first state and the second state respectively, and the output ends for outputting the power supply control signal in the first state and the second state are different;
the connector is configured to be electrically connected to both the first input of the first debug unit and the second input of the second debug unit in the first state, and to be electrically disconnected from both the first input of the first debug unit and the second input of the second debug unit in the second state;
the debug control module is configured to be electrically disconnected from both the first input of the first debug unit and the second input of the second debug unit in the first state, and the first end of the debug control module is electrically connected to the first input of the first debug unit in the second state, and the control end of the debug control module is electrically connected to the second input of the second debug unit;
the first power supply unit and the second power supply unit are respectively configured to supply power to any one of the source driving module, the gate driving module, and the timing control module according to the power supply control signal.
7. The driving circuit according to claim 6, wherein the first debug unit includes a first transistor, a first diode, and a first voltage regulator; the control electrode of the first transistor is electrically connected with the first electrode of the first voltage stabilizing tube and is used as the first input end of the first debugging unit, the first electrode of the first transistor is electrically connected with the second electrode of the first voltage stabilizing tube and the first electrode of the first diode and is used as the first power supply signal end of the first debugging unit, and the second electrode of the first transistor is electrically connected with the second electrode of the first diode and is used as the first output end of the first debugging unit;
the second debugging unit comprises a second transistor, a second diode and a second voltage stabilizing tube; the control electrode of the second transistor is electrically connected with the first electrode of the second voltage stabilizing tube and is used as the second input end of the second debugging unit, the first electrode of the second transistor is electrically connected with the second electrode of the second voltage stabilizing tube and the first electrode of the second diode and is used as the second power supply signal end of the second debugging unit, and the second electrode of the second transistor is electrically connected with the second electrode of the second diode and is used as the second output end of the second debugging unit;
The first transistor is of the same type as the second transistor.
8. The drive circuit of claim 7, wherein the debug control module comprises a first control unit and a second control unit;
the first control unit comprises a first voltage end, a third output end, a grounding end and a resistor; the resistor is arranged between the third output end and the grounding end in the first state, the resistor is not arranged between the third output end and the first voltage end and is suspended, the resistor is arranged between the third output end and the first voltage end in the second state, and the resistor is not arranged between the third output end and the grounding end and is suspended;
the second control unit comprises a third transistor, a third diode and a third voltage stabilizing tube; the control electrode of the third transistor is electrically connected to the first electrode of the third voltage regulator, and is used as the input terminal of the debug unit in the second state, the first electrode of the third transistor is electrically connected to the second electrode of the third voltage regulator and the first electrode of the third diode, and the second electrode of the third transistor is electrically connected to the second electrode of the third diode and the ground terminal.
9. The driver circuit of claim 8, wherein the third transistor is of an opposite type to the first transistor.
10. A display device comprising the drive circuit of any one of claims 1-9.
11. A driving method of the driving circuit according to any one of claims 1 to 9, wherein the driving circuit includes a power supply module, a source driving module, a gate driving module, and a timing control module; the power supply module at least comprises a first power supply unit and a second power supply unit, and the source electrode driving module is at least electrically connected with the first power supply unit and the second power supply unit respectively; either one of the gate driving module and the timing control module is electrically connected with either one of the first power supply unit and the second power supply unit;
the driving method includes:
the first power supply unit and the second power supply unit supply power to the source driving module, the gate driving module and the timing control module.
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