CN114295965A - Power-on and power-off method of programmable device power supply - Google Patents
Power-on and power-off method of programmable device power supply Download PDFInfo
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Abstract
The invention discloses a power-on and power-off method of a programmable device power supply, wherein the programmable device power supply comprises a DPS chip, a driving circuit, a sampling circuit, a shielding circuit and a grounding circuit, wherein the DPS chip is connected with a test chip through the driving circuit; when the power supply of the programmable equipment is powered on, the DPS chip outputs driving voltage after the sampling circuit, the grounding circuit and the driving circuit are sequentially conducted; when the power supply of the programmable equipment is powered off, the DPS chip stops outputting the driving voltage, and the sampling circuit, the grounding circuit and the driving circuit are sequentially disconnected. According to the power-on and power-off method of the programmable device power supply, provided by the invention, through reasonably configuring the power-on and power-off sequence of the programmable device power supply, the monotonous power-on and power-off waveforms, no steps, no return grooves and no overshoot are ensured, and the yield of a test chip is further improved.
Description
Technical Field
The invention belongs to the field of ATE (automatic test equipment) testing, and particularly belongs to a power-on and power-off method of a programmable device power supply.
Background
Programmable device power supplies (Programmable device power supplies) are applied to the field of Automatic Test Equipment (ATE) of semiconductors and provide power for testing a chip DUT. The programmable equipment power supply comprises a DPS chip, a driving circuit, a sampling circuit, a shielding circuit and a grounding circuit; the drive circuit is used for outputting drive voltage, the sampling circuit is used for collecting the voltage output by the drive circuit and feeding the voltage back to the DPS chip for analysis, the shielding circuit is used for shielding the sampling circuit to ensure that the sampling circuit is not influenced by external radiation, and the grounding circuit is used for connecting the programmable device to a near-end ground or a far-end ground.
In the process of powering on and powering off the power supply of the programmable device, the phenomenon that the waveform of the power-on and power-off output has steps and overshoots usually occurs because the conduction sequence of each circuit is not uniform. For example, when sampling at the far end, if the sampling circuit is conducted before the driving circuit, the DPS chip cannot sample the far-end voltage after outputting, the ring is opened first to output to generate a step, and then the pressurizing output generates an uprush; for example, if the additional capacitor is turned on during the output of the driving voltage, the increase of the load capacitor in the driving circuit will cause the waveform to be pulled down and generate a return channel. Therefore, the problems of monotonicity and overshoot exist in the power-on and power-off process of the power supply of the programmable equipment at present, the test chip can be damaged, the yield of the test chip is reduced, and huge economic loss is caused.
Disclosure of Invention
In order to solve the technical problem, the invention provides a power-up and power-down method of a programmable device power supply, which ensures that the power-up and power-down waveforms are monotonous, have no steps, no return grooves and no overshoot by reasonably configuring the power-up and power-down sequence of the programmable device power supply, thereby improving the yield of test chips.
In order to achieve the purpose, the invention provides the following technical scheme: a power-on and power-off method of a programmable device power supply comprises a DPS chip, a driving circuit, a sampling circuit, a shielding circuit and a grounding circuit, wherein the DPS chip is connected with a test chip through the driving circuit; when the power supply of the programmable equipment is powered on, the DPS chip outputs driving voltage after the sampling circuit, the grounding circuit and the driving circuit are sequentially conducted; when the power supply of the programmable equipment is powered off, the DPS chip stops outputting the driving voltage, and the sampling circuit, the grounding circuit and the driving circuit are sequentially disconnected.
Further, the driving circuit includes a first driving switch; the sampling circuit comprises a near-end sampling switch and a far-end sampling switch, and the far-end sampling switch is positioned on one side of the near-end sampling switch, which is close to the output end; the ground circuit includes a ground switch, and the DPS chip is coupled to ground when the ground switch is closed and to ground when the ground switch is open.
Further, when the power supply of the programmable device is powered on, the method comprises the following steps:
s01: initializing and configuring a DPS chip;
s02: the near-end sampling switch is closed;
s03: the grounding switch is closed;
s04: configuring shielding circuit parameters;
s05: the DPS chip outputs 0V voltage;
s06: the first drive switch is closed;
s07: the DPS chip outputs a driving voltage.
Furthermore, the driving circuit further comprises a second driving switch, the second driving switch is positioned on one side of the first driving switch close to the output end, one end of the second driving switch is connected with one end of the first driving switch, and the other end of the second driving switch is connected with the additional capacitor;
step S051 is further included after step S05: judging whether the second driving switch needs to be closed or not according to the magnitude of the driving voltage; and selects whether to close the second driving switch according to the judgment result, and then proceeds to step S06.
Further, step S06 is followed by step S061: and judging whether the drive circuit needs to carry out far-end sampling, if so, closing the far-end sampling switch firstly, and then disconnecting the near-end sampling switch, and if not, directly entering the step S07.
Furthermore, in the step S05, after outputting the voltage of 0V, the DPS chip needs to delay x seconds and then proceeds to the next step; the closing and opening of all the switches in the steps S06-S07 requires a delay of x seconds to proceed to the next step.
Further, in step S01, the DPS chip is in a reset state during initialization configuration, where the initialization configuration includes configuring the operating mode, current range, measurement gain, and output slew rate of the DPS chip.
Further, when the power supply of the programmable device is powered off, the method comprises the following steps:
s01: the DPS chip outputs 0V voltage and delays for y seconds; initializing and configuring a DPS chip;
s02: judging whether the far-end sampling switch is in a closed state, if the far-end sampling switch is in the closed state, closing the near-end sampling switch and the grounding switch, and then disconnecting the far-end sampling switch; if the far-end sampling switch is in an open state, directly entering step S03;
s03: the first drive switch is closed;
s04: the DPS chip disables output and resets.
Furthermore, the driving circuit further comprises a second driving switch, the second driving switch is positioned on one side of the first driving switch close to the output end, one end of the second driving switch is connected with one end of the first driving switch, and the other end of the second driving switch is connected with the additional capacitor;
step S021 is further included after step S02: judging whether the second driving switch is in a closed state, if so, closing the second driving switch, and then entering the step S04; if the state is the off state, the process proceeds directly to step S04.
Further, in step S01, y is U/b; wherein U is the driving voltage, and b is the slew rate of the output end of the driving circuit.
The invention has the following beneficial effects: when a power supply of the programmable equipment is powered on, after the sampling circuit, the grounding circuit and the driving circuit are sequentially conducted, the DPS chip outputs driving voltage; when the power supply of the programmable device is powered off, the DPS chip stops outputting the driving voltage, and the sampling circuit, the grounding circuit and the driving circuit are sequentially disconnected, so that the programmable device power supply is ensured to have monotonous output waveform, no step, no return ditch and no overshoot when being powered on and powered off, and the yield of the test chip is further improved.
Drawings
FIG. 1 is a flow chart of the present invention for powering up a programmable device power supply;
FIG. 2 is a flow chart of the power down of the programmable device of the present invention;
fig. 3 is a schematic circuit diagram of a programmable device power supply of the present invention.
Detailed Description
For a more clear understanding of the technical features, objects and effects of the present invention, embodiments of the present invention will now be described in detail with reference to the accompanying drawings. In the following description, it is to be understood that the orientations and positional relationships indicated by "front", "rear", "upper", "lower", "left", "right", "longitudinal", "lateral", "vertical", "horizontal", "top", "bottom", "inner", "outer", "leading", "trailing", and the like are configured and operated in specific orientations based on the orientations and positional relationships shown in the drawings, and are only for convenience of describing the present invention, and do not indicate that the device or element referred to must have a specific orientation, and thus, are not to be construed as limiting the present invention.
It is also noted that, unless expressly stated or limited otherwise, the terms "mounted," "connected," "secured," "disposed," and the like are intended to be inclusive and mean, for example, that they may be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. When an element is referred to as being "on" or "under" another element, it can be "directly" or "indirectly" on the other element or intervening elements may also be present. The terms "first", "second", "third", etc. are only for convenience in describing the present technical solution, and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated, whereby the features defined as "first", "second", "third", etc. may explicitly or implicitly include one or more of such features. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
Referring to fig. 1-3, the present invention discloses a power-up and power-down method for a power supply of a programmable device, wherein the power supply of the programmable device includes a DPS chip, a driving circuit, a sampling circuit, a shielding circuit and a grounding circuit; when the power supply of the programmable equipment is powered on, the DPS chip outputs driving voltage after the sampling circuit, the grounding circuit and the driving circuit are sequentially conducted; when the power supply of the programmable equipment is powered off, the DPS chip stops outputting the driving voltage, and the sampling circuit, the grounding circuit and the driving circuit are sequentially disconnected. The programmable device power supply can output monotonous waveforms, without steps, without return grooves and without overshooting when the programmable device power supply is powered on and powered off through the power-on and power-off sequence, and the yield of the test chip is improved.
Referring to fig. 3, the driving circuit Force in the present application includes a first driving switch kf; the sampling circuit Sense comprises a near-end sampling switch ksi and a far-end sampling switch ks, wherein the far-end sampling switch ks is positioned on one side, close to the output end, of the near-end sampling switch ksi; the ground circuit DGS includes a ground switch kd, and the DPS chip is connected to ground when the ground switch kd is closed, and to ground when the ground switch kd is open, i.e., the DSP chip is connected to ground at one end of the test chip. The driving circuit Force further includes a second driving switch kfc, the second driving switch kfc is located on one side of the first driving switch kf close to the output end, one end of the second driving switch kfc is connected to one end of the first driving switch kf, and the other end is connected to the additional capacitor. The shielding circuit Guard is located at the side of the sampling circuit Sense and is used for shielding the sampling circuit Sense from external influences.
Referring to fig. 1, when the power supply of the programmable device is powered on, the method includes the following steps:
s011: the test single board in the ATE test machine is powered on and started, and the power supply of the programmable equipment is positioned in the test single board;
s012: after the test single board is electrified and started, the DPS chip outputs disable, and at the moment, the power supply of the programmable device is in a default state after the test single board is electrified: the programmable device power supply is in a reset state, the output is in a hardware prohibition state, and the clamp function of the drive circuit Force is in an enabling state; the ground switch Kd is in a closed state, the ground circuit DGS selects the near-end ground so that the DPS chip is grounded, and the other switches are all in an open state. And if a test starting command of the upper computer is received, executing the next action, otherwise, maintaining the state.
S013: and (3) resetting the DPS chip.
S014: initializing and configuring a DPS chip; the DPS chip is in a reset state during initialization configuration, the DPS chip is in the reset state at the moment, software can configure the working mode, the current range, the measurement gain, the output slew rate and the like of the programmable device power supply, and at the moment, hardware and software output is in a forbidden state, namely output is forbidden.
S02: the near-end sampling switch ksi is closed;
s03: closing the grounding switch kd; note that: in step S01, the ground switch kd is already in the closed state, and the program here confirms again that no operation is required if the ground switch is already closed.
S04: configuring shielding circuit parameters; the shield circuit Guard configuration defaults to hi-z, and specifically can select a Sense mode or a GND mode, and only parameters of the shield circuit Guard can be modified at this step. The Sense mode and the GND mode are two parameter modes of the shield circuit Guard set by the system.
S05: the DPS chip outputs 0V voltage; and delayed by x seconds; at this point the initialization of the programmable device power supply has been completed and the output voltage is configured to 0V to enable the hardware/software disabled state, i.e., to enable the output of the programmable device power supply. After this, no modification of the operating mode and current range is allowed.
S051: judging whether the second driving switch kfc needs to be closed according to the magnitude of the driving voltage; selecting whether to close the second drive switch kfc according to the determination configuration; and selects whether to close the second driving switch kfc according to the determination result, and then proceeds to step S06. If the second drive switch kfc is closed, a delay of x seconds is required. The additional capacitor is switched on only under a large current range; the additional capacitor is not switched on in a non-large current range; the additional capacitance may be set to 10uF capacity.
S06: the first drive switch kf is closed; and delayed by x seconds;
s061: judging whether the drive circuit needs to carry out far-end sampling, if so, closing a far-end sampling switch ks and delaying for x seconds; then the near-end sampling switch ksi is switched off, and x seconds are delayed; if the far-end sampling is not needed, directly entering the step S07;
s07: the DPS chip outputs a normal voltage.
The delay x seconds in each of the above steps can be configured to be 1 ms.
Referring to fig. 2, when the power supply of the programmable device is powered off, the method includes the following steps:
s01: after the test is finished, preparing to power off, outputting 0V voltage by the DPS chip and delaying for y seconds; initializing and configuring a DPS chip; y is U/b; wherein U is a driving voltage, and b is a slew rate of an output end of the driving circuit; after the power supply is completely powered off, the next operation can be carried out;
s02: judging whether the sampling switch is in a far-end sampling state, namely judging whether the far-end sampling switch ks is in a closed state, if the far-end sampling switch ks is in the closed state, closing the near-end sampling switch ksi and the grounding switch kd, and then disconnecting the far-end sampling switch ks; if the remote sampling switch ks is in the on state, directly entering step S021; wherein, x seconds are delayed after the near-end sampling switch ksi and the grounding switch kd are closed, and x seconds are delayed after the far-end sampling switch ks is disconnected.
S021: judging whether the second driving switch kfc is in a closed state, if so, turning off the second driving switch kfc, and then entering step S03; if the state is in the off state, the process directly goes to step S03;
s03: the first drive switch kf is closed and delayed by x seconds;
s04: the DPS chip outputs disable, at the moment, the DPS chip is reset, the internal register is restored to a default state, and the next test is waited; and resetting the DPS chip.
The delay x seconds in each of the above steps can be configured to be 1 ms.
When a power supply of the programmable equipment is powered on, after the sampling circuit, the grounding circuit and the driving circuit are sequentially conducted, the DPS chip outputs driving voltage; when the power supply of the programmable device is powered off, the DPS chip stops outputting the driving voltage, and the sampling circuit, the grounding circuit and the driving circuit are sequentially disconnected, so that the programmable device power supply is ensured to have monotonous output waveform, no step, no return ditch and no overshoot when being powered on and powered off, and the yield of the test chip is further improved.
It is to be understood that the foregoing examples, while indicating the preferred embodiments of the invention, are given by way of illustration and description, and are not to be construed as limiting the scope of the invention; it should be noted that, for those skilled in the art, the above technical features can be freely combined, and several changes and modifications can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention; therefore, all equivalent changes and modifications made within the scope of the claims of the present invention should be covered by the claims of the present invention.
Claims (10)
1. The power-on and power-off method of the power supply of the programmable equipment is characterized in that the power supply of the programmable equipment comprises a DPS chip, a driving circuit, a sampling circuit, a shielding circuit and a grounding circuit, wherein the DPS chip is connected with a test chip through the driving circuit; when the power supply of the programmable equipment is powered on, the DPS chip outputs driving voltage after the sampling circuit, the grounding circuit and the driving circuit are sequentially conducted; when the power supply of the programmable equipment is powered off, the DPS chip stops outputting the driving voltage, and the sampling circuit, the grounding circuit and the driving circuit are sequentially disconnected.
2. The method of claim 1, wherein the driving circuit comprises a first driving switch; the sampling circuit comprises a near-end sampling switch and a far-end sampling switch, and the far-end sampling switch is positioned on one side of the near-end sampling switch, which is close to the output end; the ground circuit includes a ground switch, and the DPS chip is coupled to ground when the ground switch is closed and to ground when the ground switch is open.
3. The method of claim 2, wherein when the power supply of the programmable device is powered on, the method comprises the following steps:
s01: initializing and configuring a DPS chip;
s02: the near-end sampling switch is closed;
s03: the grounding switch is closed;
s04: configuring shielding circuit parameters;
s05: the DPS chip outputs 0V voltage;
s06: the first drive switch is closed;
s07: the DPS chip outputs a driving voltage.
4. The method of claim 3, wherein the driving circuit further comprises a second driving switch, the second driving switch is located on a side of the first driving switch close to the output terminal, one end of the second driving switch is connected to one end of the first driving switch, and the other end of the second driving switch is connected to the additional capacitor;
step S051 is further included after step S05: judging whether the second driving switch needs to be closed or not according to the magnitude of the driving voltage; and selects whether to close the second driving switch according to the judgment result, and then proceeds to step S06.
5. The method according to claim 4, further comprising, after step S06, step S061: and judging whether the drive circuit needs to carry out far-end sampling, if so, closing the far-end sampling switch firstly, and then disconnecting the near-end sampling switch, and if not, directly entering the step S07.
6. The power-on/power-off method of the programmable device power supply as claimed in claim 5, wherein in step S05, the delay x seconds after the DPS chip outputs 0V is required before proceeding to the next step; the closing and opening of all the switches in the steps S06-S07 requires a delay of x seconds to proceed to the next step.
7. The method of claim 3, wherein the DPS chip is in a reset state during initialization configuration in step S01, the initialization configuration includes configuring the operation mode, current range, measurement gain and output slew rate of the DPS chip.
8. The method for powering on and powering off the power supply of the programmable device according to claim 2, wherein when the power supply of the programmable device is powered off, the method comprises the following steps:
s01: the DPS chip outputs 0V voltage and delays for y seconds; initializing and configuring a DPS chip;
s02: judging whether the far-end sampling switch is in a closed state, if the far-end sampling switch is in the closed state, closing the near-end sampling switch and the grounding switch, and then disconnecting the far-end sampling switch; if the far-end sampling switch is in an open state, directly entering step S03;
s03: the first drive switch is closed;
s04: the DPS chip disables output and resets.
9. The method of claim 8, wherein the driving circuit further comprises a second driving switch, the second driving switch is located on a side of the first driving switch close to the output terminal, one end of the second driving switch is connected to one end of the first driving switch, and the other end of the second driving switch is connected to the additional capacitor;
step S021 is further included after step S02: judging whether the second driving switch is in a closed state, if so, closing the second driving switch, and then entering the step S04; if the state is the off state, the process proceeds directly to step S04.
10. A method for powering on/off a power supply of a programmable device according to claim 8, wherein in step S01, y is U/b; wherein U is the driving voltage, and b is the slew rate of the output end of the driving circuit.
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