CN114283748B - Self-luminous display device - Google Patents
Self-luminous display device Download PDFInfo
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Abstract
A self-luminous display device comprises a self-luminous display panel, a multiplexer circuit, a source driver, a switch circuit and an anode reset circuit. The self-luminous display panel comprises a plurality of pixel circuits and a plurality of source lines. The pixel circuits each have a light emitting element and a driving circuit. The source lines are respectively coupled to part of the pixel circuits and to the anode of the light emitting element of each of the coupled pixel circuits and the driving circuit. The source driver is coupled to the source lines through the multiplexer circuit to provide a plurality of gamma voltages to the source lines. The anode reset circuit is coupled to the source line through the switch circuit to provide at least one anode reset voltage to the source line.
Description
Technical Field
The present invention relates to a display device, and more particularly, to a self-luminous display device.
Background
Organic Light-Emitting diodes (OLEDs) have been a mature display process technology, and many advantages make them important technologies for display devices. The organic light emitting diode has the advantages that: 1. high color saturation, bright color and high contrast; 2. the black non-luminous is beneficial to electricity saving; 3. the self-luminous characteristic can be made thinner without backlight, which is beneficial to saving the space of the mobile phone; and 4, because of being light and thin, can be folded and bent.
However, the organic light emitting diode has parasitic capacitance, which affects low gray scale, so that voltage reset is required to be performed on the anode terminal of the organic light emitting diode, but the voltage reset has a problem of increasing layout area. For example, independently pulling one voltage trace for voltage reset, resulting in an increase in layout area; alternatively, when the picture refresh frequency decreases, leakage may affect picture jitter (flicker), and a Low Temperature Poly Oxide (LTPO) circuit is used to overcome the problem, and a larger circuit area is used.
Therefore, how to reset the voltage at the anode terminal of the organic light emitting diode without affecting the layout area is an important issue in designing the organic light emitting diode display device.
Disclosure of Invention
The invention provides a self-luminous display device which can reset the voltage of the anode terminal of a light-emitting element without affecting the layout area.
The self-luminous display device comprises a self-luminous display panel, a multiplexer circuit, a source driver, a switch circuit and an anode reset circuit. The self-luminous display panel comprises a plurality of pixel circuits and a plurality of source lines. The pixel circuits each have a light emitting element and a driving circuit. The source lines are respectively coupled to part of the pixel circuits and to the anode of the light emitting element of each of the coupled pixel circuits and the driving circuit. The multiplexer circuit is coupled to the source line. The source driver is coupled to the source lines through the multiplexer circuit to provide a plurality of gamma voltages to the source lines. The switch circuit is coupled to the source line. The anode reset circuit is coupled to the source line through the switch circuit to provide a plurality of anode reset voltages to the source line.
Based on the above, in the self-luminous display device of the embodiment of the invention, the source driver and the anode reset circuit transmit the gamma voltage and the anode reset voltage by sharing the source line in a time-sharing manner, so that the anode reset voltage can be transmitted without increasing the wiring on the self-luminous display panel, that is, the voltage reset can be performed on the anode terminal of the light-emitting element under the condition of not affecting the layout area.
In order to make the above features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1 is a schematic system diagram of a self-luminous display device according to an embodiment of the invention.
Fig. 2 is a schematic circuit diagram of a self-luminous pixel according to an embodiment of the invention.
Fig. 3 is a schematic timing diagram of an operation of the self-luminous display device according to an embodiment of the invention.
Fig. 4 is a schematic timing diagram illustrating an operation of a self-luminous display device according to another embodiment of the present invention.
Wherein reference numerals are as follows:
100: self-luminous display device
110: control circuit
120: source driver
130: anode reset circuit
140: self-luminous display panel
141: multiplexer circuit
143: pixel array
145: switching circuit
a: first end
b: second end
CP1: current path
Cst: capacitance device
Ct_ R, CT _ G, CT _b: anode reset voltage
Ct_sw: switch control signal
DX1: driving circuit
EM: luminous signal
F1 to F11: frame period
Hsync: during horizontal scanning
LD1: light-emitting element
LDX: source line
M1 to M4: transistor with a high-voltage power supply
Mux1 to Mux n: multiplexing control signals
OVDD: system voltage
OVSS: common voltage
PX, PXa: pixel circuit
S1, S2: scanning signal
SC1, SC2: control signal
T11-T1N, TM-TMN: first switch
T2: second switch
Vdata1 to Vdata M: gamma voltage
Vref: reference voltage
Detailed Description
Unless defined otherwise, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present invention and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
It will be understood that, although the terms "first," "second," "third," etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a "first element," "component," "region," "layer" or "section" discussed below could be termed a second element, component, region, layer, or section without departing from the teachings herein.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well as "at least one" unless the context clearly indicates otherwise. "or" means "and/or". As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.
Fig. 1 is a schematic system diagram of a self-luminous display device according to an embodiment of the invention. Referring to fig. 1, in the present embodiment, the self-luminous display device 100 at least includes a control circuit 110, a source driver 120, an anode reset circuit 130, and a self-luminous display panel 140. The control circuit 110 includes, for example, a timing controller, the control circuit 110 is coupled to the source driver 120 to provide a control signal SC1, the anode reset circuit 130 to provide a control signal SC2, and the control circuit 110 is coupled to the self-luminous display panel 140 to provide multiplexed control signals Mux 1-Mux N and a switch control signal ct_sw, wherein N may be a positive integer.
The self-luminous display panel 140 includes a multiplexer circuit 141, a pixel array 143, and a switching circuit 145. The pixel array 143 includes a plurality of pixel circuits PX and a plurality of source lines LDX, wherein each pixel circuit PX at least has a light emitting element LD1, a current path CP1 and a driving circuit DX1, and the current path CP1 is coupled between the light emitting element LD1 and the driving circuit DX1, wherein the light emitting element LD1 may be an organic light emitting diode, but the embodiment of the invention is not limited thereto.
The source lines LDX are respectively coupled to a portion of the pixel circuits PX (e.g., a row of the pixel circuits PX), and each of the source lines LDX is coupled to an anode of the light emitting element LD1 of each of the coupled pixel circuits PX and the driving circuit DX1.
The multiplexer circuit 141 is coupled to the first ends a of the source lines LDX, and the source driver 120 is coupled to the source lines LDX through the multiplexer circuit 141 to provide a plurality of gamma voltages Vdata 1-Vdata M to the source lines LDX through the multiplexer circuit 141. The switch circuit 145 is coupled to the second ends B of the source lines LDX, and the anode reset circuit 130 is coupled to the source lines LDX through the switch circuit 145 to provide a plurality of anode reset voltages (e.g., ct_ R, CT _ G, CT _b) to the source lines LDX through the switch circuit 145.
In the present embodiment, since the time for the pixel circuit PX to perform the voltage reset and the time for the data writing are different, the first on time of the multiplexer circuit 141 and the second on time of the switching circuit 145 do not overlap. In other words, when the voltage is reset, the switch circuit 145 is turned on and the multiplexer circuit 141 is turned off; and, when data writing is performed, the multiplexer circuit 141 is turned on and the switch circuit 145 is turned off.
Therefore, since the source driver 120 and the anode reset circuit 130 transmit the gamma voltages Vdata1 to VdataM and the anode reset voltage ct_ R, CT _ G, CT _b through the time-sharing common source line LDX, the anode reset voltage ct_ R, CT _ G, CT _b can be transmitted without increasing the wiring on the self-luminous display panel 140, i.e. the voltage reset can be performed on the anode terminal of the light emitting element LD1 without affecting the layout area. In addition, the anode reset circuit 130 disposed outside the self-luminous display panel 140 has no relation with the manufacturing process of the self-luminous display panel 140 due to its driving capability, so that the anode reset voltage ct_ R, CT _ G, CT _b, that is, the voltage range of the anode reset voltage ct_ R, CT _ G, CT _b, can be set according to the circuit requirement without being limited by the manufacturing process of the self-luminous display panel 140.
In the embodiment of the invention, the multiplexer circuit 141 includes a plurality of first switches (e.g. T11-T1N, TM-TMN), and the first switches (e.g. T11-T1N, TM-TMN) respectively receive one of the multiplexing control signals Mux 1-Mux n and are respectively coupled between the corresponding source lines LDX and the source driver 120, wherein M may be a positive integer, and NxM may be equal to the number of the source lines LDX. For example, the first switches T11, …, and TM1 receive the multiplexing control signal Mux1, and the first switches T1N, …, and TMN receive the multiplexing control signal Mux N.
In addition, the first switches (e.g., T11-T1N, TM 1-TMN) are divided into subsets, and the first switches (e.g., T11-T1N, TM-TMN) in each subset receive the same gamma voltage (e.g., vdata 1-VdataM). For example, the first switches T11 to T1N may be regarded as one subset (i.e., may be regarded as one multiplexer) and receive the gamma voltage Vdata1, and the first switches TM1 to TMN may be regarded as the other subset (i.e., may be regarded as the other multiplexer) and receive the gamma voltage Vdata m.
In the embodiment of the invention, the switch circuit 145 includes a plurality of second switches T2, commonly receiving the switch control signal ct_sw, and individually coupled between the corresponding source line LDX and the anode reset circuit 130. Since a high driving capability (e.g., current) is required to simultaneously drive all the pixel circuits PX, the pixel circuits PX may be divided into a plurality of groups to provide a plurality of anode reset voltages (e.g., ct_ R, CT _ G, CT _b).
Furthermore, the pixel circuits PX can be divided into red, green and blue groups according to colors, and the anode reset voltages ct_ R, CT _ G, CT _b can be respectively corresponding to the red, green and blue groups, so that the anode reset voltages ct_ R, CT _ G, CT _b can be respectively set (or adjusted) according to the requirements of the red, green and blue groups. In addition, when the anode reset circuit 130 has enough driving capability, only one anode reset voltage may be provided, and the embodiment of the invention is not limited thereto.
In the present embodiment, the multiplexer circuit 141 and the switch circuit 145 are disposed on the self-luminous display panel 140, but in other embodiments, the multiplexer circuit 141 and the switch circuit 145 may be disposed outside the self-luminous display panel 140, which may depend on the circuit design, and the embodiment of the invention is not limited thereto.
Fig. 2 is a circuit diagram of a pixel circuit of a self-luminous display panel according to an embodiment of the present invention. Referring to fig. 1 and 2, in the present embodiment, the driving circuit DX1 of the pixel circuit PX includes a transistor M1 and a capacitor Cst, and the current path CP1 of the pixel circuit PX includes transistors M2 to M4, wherein the transistors M1 to M4 are N-type transistors, but the embodiment of the invention is not limited thereto.
The first terminal of the transistor M1 receives the reference voltage Vref, and the control terminal of the transistor M1 receives the scan signal S1. The capacitor Cst is coupled between the second terminal of the transistor M1 and the source line LDX. The first terminal of the transistor M2 receives the system voltage OVDD, and the control terminal of the transistor M2 is coupled to the second terminal of the transistor M1. The first terminal of the transistor M4 is coupled to the second terminal of the transistor M2, and the control terminal of the transistor M4 receives the light emitting signal EM. The first terminal of the transistor M3 is coupled to the source line LDX, the control terminal of the transistor M2 receives the scan signal S2, and the second terminal of the transistor M2 is coupled to the second terminal of the transistor M4. The light emitting element LD1 is coupled between the second terminal of the transistor M4 and the common voltage OVSS.
In the present embodiment, the transistors M1 to M4 are exemplified by N-type transistors, so that the anode reset voltage (e.g., ct_ R, CT _ G, CT _b) can be smaller than the common voltage OVSS commonly received by the pixel circuit PX, so as to completely eliminate the voltage drop of the parasitic capacitance of the light emitting element LD 1. Conversely, if the transistors M1-M4 are P-type transistors, the structure of the pixel circuit PX is inverted, so that the anode reset voltage (e.g., ct_ R, CT _ G, CT _b) can be greater than the common voltage (e.g., OVSS) commonly received by the pixel circuit PX, so as to completely eliminate the voltage drop of the parasitic capacitance of the light emitting element LD 1. According to the above, the anode reset voltage (e.g., ct_ R, CT _ G, CT _b) can be different from the common voltage OVSS commonly received by the pixel circuits PX. Also, based on the common voltage (e.g., OVSS), the anode reset voltage (e.g., ct_ R, CT _ G, CT _b) output by the anode reset circuit 130 can be a positive voltage or a negative voltage, but the embodiment of the invention is not limited thereto.
Fig. 3 is a schematic timing diagram of an operation of the self-luminous display device according to an embodiment of the invention. Referring to fig. 1 and 3, in the present embodiment, the self-luminous display device 100 can generally operate in a normal mode and a sleep mode. When the self-luminous display device 100 is operated in the normal mode (i.e., in the frame periods F1, F8 and F9), the self-luminous display device 100 is started to update the image displayed on the self-luminous display panel 140. When operating in the sleep mode (i.e., in the frame periods F2 to F7), the self-luminous display device 100 basically displays a black frame, but is still activated to update the black image displayed by the self-luminous display panel 140 during a portion of the frame periods (e.g., the frame periods F2, F5), so as to maintain the stability of the image, and the self-luminous display device 100 ignores the image update during the remaining frame periods (e.g., the frame periods F3, F4, F6 and F7).
In this embodiment, in the frame period (for example, frame periods F3, F4, F6, and F7) in which the self-luminous display device 100 ignores the image update operation, the anode of the light emitting element LD1 of the pixel circuit PX can be reset throughout the frame period, that is, the on time (that is, the second on time) of the second switch T2 of the switch circuit 145 can last for more than one frame period in the frame periods F3, F4, F6, and F7 in which the image update operation is ignored.
Fig. 4 is a schematic timing diagram illustrating an operation of a self-luminous display device according to another embodiment of the present invention. Referring to fig. 1 and 4, in the present embodiment, when the self-luminous display device 100 is operated in the normal mode, in 1 horizontal scanning period Hsync, the first switches (e.g. T11-T1N, TM 1-TMN) of the multiplexer circuit 141 are turned on sequentially, i.e. the multiplexing control signals Mux 1-Mux n are enabled sequentially, so as to transmit the plurality of gamma voltages Vdata 1-VdataM provided by the source driver 120 to the source line LDX for writing into the driving circuits DX1 of the pixel circuits PX in a row. When the driving circuit DX1 of the pixel circuit PX of a row performs gamma voltage writing, the light emitting signal EM and the switch control signal ct_sw are disabled, i.e. the light emitting element LD1 of the pixel circuit PX is not turned on and the second switch T2 of the switch circuit 145 is not turned on, so as to avoid influencing the voltage writing.
When the gamma voltages of the driving circuits DX1 of the pixel circuits PX are updated, the light emitting signal EM is enabled to light the light emitting elements LD1 of all the pixel circuits PX, and the multiplexing control signals Mux 1-Mux n and the switching control signal ct_sw are disabled, i.e. the first switches (e.g. T11-T1N, TM 1-TMN) of the multiplexer circuit 141 and the second switch T2 of the switching circuit 145 are not turned on, so as to avoid affecting the display effect of the light emitting elements LD1 of the pixel circuits PX. Next, when the voltage at the anode terminal of the light emitting element LD1 is reset, the switch control signal ct_sw presents an enable to turn on the second switch T2 of the switch circuit 145, and at this time, the light emitting signal EM and the multiplexing control signals Mux1 to Mux n present a disable to avoid affecting the voltage reset effect of the light emitting element LD 1.
In the present embodiment, when the self-luminous display device 100 is operated in the normal mode, the self-luminous display device 100 performs data (or voltage) update on the pixel circuit PX, and at this time, the self-luminous display device 100 may perform voltage reset of the light emitting element LD1 using the horizontal scanning period Hsync not used for data (or voltage) update in the frame period (e.g., the frame period F10 or F11). In other words, the self-light emitting display device 100 can reset the voltage of the light emitting element LD1 by using 0.5 horizontal scanning periods Hsync or more than 1 horizontal scanning period Hsync, that is, the on time (i.e., the second on time) of the second switch T2 of the switch circuit 145 can last for more than 0.5 horizontal scanning periods Hsync, which may not be the case according to the circuit design.
In summary, in the self-light emitting display device according to the embodiment of the invention, the source driver and the anode reset circuit share the source line in a time-sharing manner to transfer the gamma voltage and the anode reset voltage, so that the anode reset voltage can be transferred without increasing the wiring on the self-light emitting display panel, that is, the voltage reset can be performed on the anode terminal of the light emitting element without affecting the layout area. In addition, the anode reset circuit arranged outside the self-luminous display panel has no relation with the manufacture procedure of the self-luminous display panel due to the driving capability, so that the anode reset voltage can be set according to the circuit requirement, namely the voltage range of the anode reset voltage is not limited by the manufacture procedure of the self-luminous display panel.
Although the present invention has been described with reference to the above embodiments, it should be understood that the invention is not limited thereto, but rather is capable of modification and variation without departing from the spirit and scope of the present invention.
Claims (13)
1. A self-luminous display device comprising:
a self-luminous display panel comprising:
a plurality of pixel circuits respectively provided with a light-emitting element and a driving circuit; and
a plurality of source lines respectively coupled to a part of the pixel circuits and to an anode of the light emitting element and the driving circuit of each of the coupled pixel circuits;
a multiplexer circuit coupled to the source line;
a source driver coupled to the source lines through the multiplexer circuit for providing a plurality of gamma voltages to the source lines;
a switch circuit coupled to the source line; and
an anode reset circuit coupled to the source line through the switch circuit for providing at least one anode reset voltage to the source line,
the source driver and the anode reset circuit transmit the gamma voltage and the anode reset voltage by sharing the source line in a time-sharing manner.
2. The self-luminous display device of claim 1, wherein a first on-time of the multiplexer circuit and a second on-time of the switching circuit do not overlap.
3. The self-luminous display device as claimed in claim 2, wherein the second on-time is longer than 0.5 horizontal scan period.
4. The self-luminous display device as claimed in claim 3, wherein the second on-time is longer than one frame period when the self-luminous display device is operated in a sleep mode.
5. The self-luminous display device as claimed in claim 4, wherein the duration of the second on-time is interrupted before the self-luminous display device is switched from the sleep mode to a normal mode.
6. The self-luminous display device of claim 1, wherein the multiplexer circuit comprises a plurality of first switches respectively receiving a multiplexing control signal and respectively coupled between the corresponding source lines and the source driver.
7. The self-luminous display device according to claim 1, wherein the switching circuit comprises a plurality of second switches, which commonly receive a switching control signal, and are respectively coupled between the corresponding source line and the anode reset circuit.
8. The self-luminous display device according to claim 1, wherein the at least one anode reset voltage is different from a common voltage commonly received by the pixel circuits.
9. The self-luminous display device according to claim 8, wherein the at least one anode reset voltage is greater than the common voltage.
10. The self-luminous display device according to claim 8, wherein the at least one anode reset voltage is less than the common voltage.
11. The self-luminous display device according to claim 1, wherein the multiplexer circuit and the switch circuit are disposed on the self-luminous display panel.
12. The self-luminous display device of claim 11, wherein the multiplexer circuit is coupled to a first end of the source line and the switch circuit is coupled to a second end of the source line.
13. The self-luminous display device as claimed in claim 1, wherein the light emitting element comprises an organic light emitting diode.
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| Application Number | Priority Date | Filing Date | Title |
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| TW110124075A TWI837485B (en) | 2021-06-30 | 2021-06-30 | Self-luminous display device |
| TW110124075 | 2021-06-30 |
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| CN114283748A CN114283748A (en) | 2022-04-05 |
| CN114283748B true CN114283748B (en) | 2023-09-12 |
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| Publication number | Publication date |
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| TW202303565A (en) | 2023-01-16 |
| TWI837485B (en) | 2024-04-01 |
| CN114283748A (en) | 2022-04-05 |
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