CN111627383B - LED drive circuit, lamp panel and display panel - Google Patents

LED drive circuit, lamp panel and display panel Download PDF

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Publication number
CN111627383B
CN111627383B CN202010690556.3A CN202010690556A CN111627383B CN 111627383 B CN111627383 B CN 111627383B CN 202010690556 A CN202010690556 A CN 202010690556A CN 111627383 B CN111627383 B CN 111627383B
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led
circuit
constant current
signal
current source
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CN111627383A (en
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闫晓林
蔡胜强
林智远
谢相伟
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Shenzhen TCL High-Tech Development Co Ltd
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Shenzhen TCL High-Tech Development Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

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  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

An LED drive circuit, a lamp panel and a display panel are provided, wherein the LED drive circuit comprises a first constant current source circuit and a second constant current source circuit, the first constant current source circuit is used for working when receiving a power supply signal and outputting a received column data signal; the second constant current source circuit is used for transmitting the column data signal to the LED to indicate the LED to emit light when receiving the line scanning signal. According to the LED driving circuit, the first constant current source circuit and the second constant current source circuit work in a matched mode, constant current control over the LEDs is achieved, the output current of the LED driving circuit is not affected by LED loads, and therefore brightness consistency among the individual LEDs is high, and gray scale display is more uniform.

Description

LED drive circuit, lamp panel and display panel
Technical Field
The application belongs to the technical field of show, especially, relate to a LED drive circuit, lamp plate and display panel.
Background
The micro LED is also named as a micro LED, and as a new generation display technology, compared with the traditional LED display technology, the micro LED has the advantages of higher brightness, better luminous efficiency and lower power consumption. At present, pwm (Pulse width modulation) driving technology is usually adopted to drive the micro LED, and the brightness of the micro LED is controlled by changing the duty ratio of the high level in the pwm signal. However, the pwm control technique belongs to constant voltage control, and different micro LEDs have different currents when receiving pwm signals with the same duty ratio, thereby resulting in low brightness uniformity among the individual micro LEDs. The same problems as described above are also faced with other types of LEDs.
Therefore, when the conventional pwm driving technology is used to drive the LEDs, different LEDs have inconsistent pwm signal response degrees with the same duty ratio, which results in low brightness consistency among the individual LEDs.
Disclosure of Invention
An object of the application is to provide an LED drive circuit, lamp plate and display panel, when aiming at solving the drive LED that adopts traditional pwm drive technology, the different LED that exists is inconsistent to the pwm signal response degree of same duty cycle to lead to the problem that luminance uniformity between the individual LED is low.
A first aspect of an embodiment of the present application provides an LED driving circuit, including:
the first constant current source circuit is used for working when receiving a power supply signal and outputting a received column data signal; and
and the second constant current source circuit is connected with the first constant current source circuit and the LED and used for correspondingly generating a current signal based on the column data signal output by the first constant current source circuit when a line scanning signal is received, transmitting the current signal to the LED and indicating the LED to emit light.
According to the LED driving circuit, the first constant current source circuit and the second constant current source circuit work in a matched mode, constant current control over the LEDs is achieved, the output current of the LED driving circuit is not affected by the LED load, and therefore the brightness consistency of the LEDs is high.
The second aspect of the embodiment of the application provides a lamp panel, includes: a plurality of pixel units and a plurality of LED driving circuits according to any one of claims 1 to 8, wherein the pixel units comprise three sub-pixel units, and the sub-pixel units comprise LEDs, and wherein one LED driving circuit corresponds to one pixel unit or one LED driving circuit corresponds to one sub-pixel unit.
A second aspect of the embodiments of the present application provides a display panel, including the above-mentioned lamp panel.
According to the lamp panel, the pixel units/the sub-pixel units are connected in one-to-one correspondence mode through the plurality of LED driving circuits capable of achieving constant current control, so that one pixel unit/sub-pixel unit is driven by a constant current, the output current of the lamp panel is not affected by LED loads, and the brightness consistency between the individual pixel units or LEDs is high.
Furthermore, a plurality of LED drive circuits can be realized by adopting an integrated circuit in the lamp panel, the plurality of LED drive circuits are integrated in one chip, the integrated circuit correspondingly drives one pixel unit/sub-pixel unit, the integration level is high, the occupied space is small, the micro LED (micro light emitting diode) batch type is conveniently transferred to the circuit substrate from the sapphire substrate, the transfer process and the transfer times are simplified, the transfer yield is improved, and the production cost of the display panel adopting the micro LED is greatly reduced.
A third aspect of the embodiments of the present application provides a display panel, including the above-mentioned lamp panel.
According to the display panel, the plurality of LEDs in the LED arrays are connected in a one-to-one correspondence mode through the plurality of LED driving circuits respectively, one LED driving circuit is used for indicating one LED to emit light according to respective preset brightness, the LED arrays on the constant-current driving display panel are achieved, when the display panel displays images, the brightness consistency of the LEDs is high, and the customer experience degree is improved.
Drawings
Fig. 1 is a schematic block diagram of an LED driving circuit according to an embodiment of the present disclosure;
fig. 2 is a schematic block diagram of an LED driving circuit according to another embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of an LED driving circuit according to yet another embodiment of the present disclosure;
FIG. 4 is a schematic diagram of an exemplary circuit of the first current mirror, the switch circuit and the second current mirror of the LED driving circuit shown in FIG. 2 according to the present application;
fig. 5 is a schematic diagram of a module structure of a lamp panel according to an embodiment of the present application;
fig. 6 is a pin schematic diagram of an integrated circuit when a plurality of LED driving circuits in the lamp panel shown in fig. 5 are implemented by the integrated circuit;
FIG. 7 is an exemplary circuit schematic within the integrated circuit shown in FIG. 5;
fig. 8 is another schematic structural view of a lamp panel according to an embodiment of the present application;
fig. 9 is a schematic structural view of a lamp panel according to another embodiment of the present application;
fig. 10 is a schematic structural view of a lamp panel according to another embodiment of the present application;
FIG. 11 is a schematic circuit diagram of a row driving circuit in the lamp panel shown in FIG. 10;
fig. 12 and 13 are schematic circuit diagrams of a column driving circuit in the lamp panel shown in fig. 10;
FIG. 14 is a schematic circuit diagram of a power circuit in the lamp panel shown in FIG. 10;
FIG. 15 is a flowchart illustrating steps of a timing control method according to an embodiment of the present application;
FIG. 16 is a timing diagram illustrating the timing control method shown in FIG. 15.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
It should be understood that the terms "first," "second," and the like, as used herein, are used for descriptive purposes only and are not intended to indicate or imply relative importance or to implicitly indicate the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
Referring to fig. 1, a schematic diagram of a module structure of an LED driving circuit 100 according to an embodiment of the present disclosure shows only parts related to the embodiment for convenience of description, and the detailed description is as follows:
an LED drive circuit 100 includes a first constant current source circuit 10 and a second constant current source circuit 20 connected to the first constant current source circuit 10.
The first constant current source circuit 10 is configured to operate when receiving a power supply signal VCC, and output a received column data signal Vdata.
The second constant current source circuit 20 is configured to generate a current signal Vo corresponding to the column data signal Vdata output by the first constant current source circuit 10 when receiving the row scanning signal Vgate, and transmit the current signal Vo to the LED to indicate the LED to emit light, so that gray scale display is more uniform.
Specifically, the input/output current transfer ratio of the first constant current source circuit 10 is 1, and the current signal Vo output to the second constant current source circuit is equal to the column data signal Vdata received by the second constant current source circuit. The second constant current source circuit 20 is turned on only when receiving the row scanning signal Vgate, thereby receiving the column data signal Vdata output by the first constant current source circuit 10. The magnitude of the current signal Vo determines the luminance of the LED, so that the magnitude of the current signal Vo output to the LED by the second constant current source circuit 20 can be correspondingly adjusted by adjusting the magnitude of the column data signal Vdata input to the first constant current source circuit 10, thereby indicating the LED to emit light at the preset luminance.
The LED driving circuit 100 provided in this embodiment can be used to connect an OLED, a QLED, a micro LED, or a miniLED to drive any of the above-mentioned types of LEDs to operate.
The LED driving circuit 100 provided in this embodiment realizes constant current control of the LEDs by the cooperation of the first constant current source circuit 10 and the second constant current source circuit 20, and the output current of the LED driving circuit 100 is not affected by the LED load, so that the brightness uniformity between the individual LEDs is high.
Referring to fig. 2, a schematic diagram of a module structure of an LED driving circuit 100 according to another embodiment of the present application is shown, for convenience of description, only the parts related to the embodiment are shown, and the detailed description is as follows:
in an alternative embodiment, the LED driving circuit 100 further includes a constant voltage circuit 30 connected to the first constant current source circuit 10.
The voltage stabilizing circuit 30 is configured to stabilize the column data signal Vdata output by the first constant current source circuit 10. By additionally arranging the voltage stabilizing circuit 30, the signal at the output node of the first constant-interest source circuit is stabilized, the overall precision of the LED driving circuit 100 is improved, the LED brightness distortion is prevented, and the gray scale display is more uniform.
Referring to fig. 3, a schematic structural diagram of an LED driving circuit 100 according to another embodiment of the present disclosure is shown, for convenience of description, only the relevant portions of the embodiment are shown, and the detailed description is as follows:
in an alternative embodiment, the first constant current source circuit 10 includes a first current mirror 101.
The power supply end of the first current mirror 101 is used for accessing a power supply signal VCC; the input end of the first current mirror 101 is used for accessing a column data signal Vdata; the output terminal of the first current mirror 101 is connected to the switch circuit 201, and is used for outputting the column data signal Vdata to the second constant current source circuit 20.
Specifically, the first current mirror 101 has an input/output current transfer ratio of 1, has a constant current function, and copies the received column data signal Vdata in a ratio of 1 to 1 and outputs the column data signal Vdata to the switching circuit 201 described below via an output terminal. The first current mirror 101 outputs the column data signal Vdata after performing first constant current.
The power supply signal VCC connected to the first current mirror 101 is a 5V dc signal, and the output terminal of the first current mirror 101 is connected to the voltage stabilizing circuit 30 and the switch circuit 201.
In an alternative embodiment, the second constant current source circuit 20 includes a switching circuit 201 connected to the first constant current source circuit 10 and a second current mirror 202 connected to the switching circuit 201.
The switch circuit 201 is configured to be turned on when receiving the row scanning signal Vgate, and receive and transmit the column data signal Vdata output by the first constant current source circuit 10.
The output end of the second current mirror 202 is connected with the LED, and the second current mirror 202 correspondingly generates a current signal Vo based on the column data signal Vdata output by the first constant current source circuit 10, and transmits the current signal Vo to the LED to indicate the LED to emit light according to the preset brightness; the second current mirror 202 controls the current transfer ratio between the column data signal Vdata and the current signal Vo to be 1.
Specifically, since the input-output current transfer ratio of the first current mirror 101 and the input-output current transfer ratio of the second current mirror 202 are both 1, and the column data signal Vdata output by the first current mirror 101 is used as the input signal of the second current mirror 202, the current signal Vo finally output by the second current mirror 202 to the LED is equal to the column data signal Vdata input to the first current.
The LED driving circuit 100 provided in this embodiment realizes constant current control of the LEDs by the cooperation of the first current mirror 101 and the second current mirror 202, and the output current of the LED driving circuit 100 is not affected by the LED load, so that the brightness uniformity between the individual LEDs is high, and the gray scale display is more uniform.
Referring to fig. 4, an exemplary schematic circuit diagram of the first current mirror 101, the switch circuit 201 and the second current mirror 202 in the LED driving circuit 100 shown in fig. 2 of the present application is shown, and for convenience of description, only the parts related to the present embodiment are shown, and the following details are described:
in an alternative embodiment, the first current mirror 101 includes a first MOS transistor N1 and a second MOS transistor N2.
A node where the gate of the first MOS transistor N1, the source of the first MOS transistor N1, and the gate of the second MOS transistor N2 are connected in common serves as an input end of the first current mirror 101, and is used for accessing a column data signal Vdata; a node where the drain of the first MOS transistor N1 and the drain of the second MOS transistor N2 are connected in common serves as a power supply terminal of the first current mirror 101 and is used for accessing a power supply signal VCC; the source of the second MOS transistor N2 is used as the output terminal of the first current mirror 101, and is used for outputting the column data signal Vdata to the switch circuit 201.
The node where the drain of the first MOS transistor N1 and the drain of the second MOS transistor N2 are connected in common serves as a power supply terminal of the first current mirror 101, the source of the first MOS transistor N1 serves as an input terminal of the first current mirror 101, and the source of the second MOS transistor N2 serves as an output terminal of the first current mirror 101.
Specifically, the input-output current transfer ratio of the first current mirror 101 is 1. The first MOS transistor N1 and the second MOS transistor N2 are both realized by NMOS transistors.
In an alternative embodiment, the switch circuit 201 includes a third MOS transistor N3 and a fourth MOS transistor N4.
A node where the gate of the third MOS transistor N3 and the gate of the fourth MOS transistor N4 are connected in common is used for accessing a row scanning signal Vgate, and a node where the drain of the third MOS transistor N3 and the drain of the fourth MOS transistor N4 are connected in common is connected to the first constant current source circuit 10 and is used for receiving a column data signal Vdata; the source of the third MOS transistor N3 and the source of the fourth MOS transistor N4 are both connected to the second constant current source circuit 20.
The node at which the drain of the third MOS transistor N3 and the drain of the fourth MOS transistor N4 are connected together serves as the input terminal of the second constant current source circuit 20, and is connected to the source of the second MOS transistor N2. The third MOS transistor N3 and the fourth MOS transistor N4 are turned on only when the gates of the two receive the row scanning signal Vgate, thereby turning on the first current mirror 101 and the second current mirror 202.
Specifically, the third MOS transistor N3 and the fourth MOS transistor N4 are both implemented by NMOS transistors.
In an alternative embodiment, the second current mirror 202 includes a fifth MOS transistor N5 and a sixth MOS transistor N6.
A parasitic capacitor is arranged between the gate and the source of the sixth MOS transistor N6, and the parasitic capacitor is used for storing the column data signal Vdata and outputting the stored column data signal Vdata to the LED when the LED is in operation, so as to drive the LED to emit light at a predetermined brightness.
A node of the gate of the fifth MOS transistor N5 and the drain of the fifth MOS transistor N5 are connected to the switch circuit 201, and the gate of the sixth MOS transistor N6 is connected to the switch circuit 201; the source of the fifth MOS transistor N5 and the source of the sixth MOS transistor N6 are grounded, and the drain of the sixth MOS transistor N6 is externally connected to the LED.
Specifically, the fifth MOS transistor N5 and the sixth MOS transistor N6 are both implemented by NMOS transistors.
In an alternative embodiment, the voltage stabilizing circuit 30 includes a voltage regulator D1 and a seventh MOS transistor N7.
The anode of the voltage regulator tube D1 is connected to the first constant current source circuit 10, specifically to the source of the second MOS tube N2. The cathode of the voltage regulator tube D1, the gate of the seventh MOS tube N7 and the drain of the seventh MOS tube N7 are connected in common, and the source of the seventh MOS tube N7 is grounded.
Specifically, the seventh MOS transistor N7 is implemented by an NMOS transistor.
The following describes the principle of the LED driving circuit 100 provided in this embodiment with reference to fig. 4:
in the LED driving circuit 100 provided in this embodiment, a current mirror is adopted to control the current output of the source of the sixth MOS transistor N6, the first MOS transistor N1 and the second MOS transistor N2 form the first current mirror 101, that is, the current output by the second MOS transistor N2 is the same as the column data signal Vdata accessed by the first MOS transistor N1, the fifth MOS transistor N5 and the sixth MOS transistor N6 form the second current mirror 202, that is, the current output by the fifth MOS transistor N5 and the current output by the second MOS transistor N6 are the same as the second current mirror 202, when the row scanning signal Vgate received by the third MOS transistor N3 and the fourth MOS transistor N4, the third MOS transistor N3 and the fourth MOS transistor N4 are turned on, the current output by the fifth MOS transistor N5 is the same as the current output by the second MOS transistor N2, so that the current output by the seventh MOS transistor N7 is the same as the column data signal Vdata accessed by the first MOS transistor N1, and the current value of the seventh MOS transistor N7 can be changed, i.e. the value of the current signal Vo received by the LED. The voltage regulator D1 and the seventh MOS transistor N7 form a voltage regulator circuit 30, which stabilizes the source voltage of the second MOS transistor N2. The capacitor Cs1 is a gate-source parasitic capacitor of the seventh MOS transistor N7; when receiving a line scanning signal Vgate, the third MOS transistor N3 and the fourth MOS transistor N4 are turned on, and the capacitor Cs1 is charged, and when the switching circuit 201 receives the line scanning signal Vgate, the capacitor Cs1 discharges, and the current of the seventh MOS transistor N7 is maintained unchanged until the next time the line scanning signal Vgate is received, the third MOS transistor N3 and the fourth MOS transistor N4 are turned on again, and the capacitor Cs1 is charged again; the row scanning signal Vgate is a high level signal.
The LED driving circuit 100 provided in this embodiment is formed by a plurality of NMOS transistors and a voltage regulator D1, and has a small occupied space, thereby facilitating integration and effectively saving the space of the display panel.
Please refer to fig. 5, which is a schematic diagram of a module structure of a lamp panel M100 according to an embodiment of the present application, and for convenience of description, only parts related to the embodiment are shown, and detailed descriptions are as follows:
a lamp panel comprises a plurality of pixel units 101 and a plurality of LED driving circuits, wherein each pixel unit 101 comprises three sub-pixel units (111, 121 and 131), each sub-pixel unit comprises an LED, one LED driving circuit corresponds to one pixel unit 101, or one LED driving circuit corresponds to one sub-pixel unit.
It should be noted that fig. 5 only shows a lamp panel, which includes three LED driving circuits and a pixel unit 101, and each LED driving circuit is correspondingly connected to and controls a sub-pixel unit, so as to illustrate the principle as an example, in an actual application process, one LED driving circuit may be further designed to correspond to one pixel unit 101.
Specifically, the emission colors of the LEDs included in the three sub-pixel units in one pixel unit 101 are different from each other.
Optionally, the lamp panel includes at least two LED driving circuits 100 as described above, and each LED driving circuit 100 is correspondingly connected to one LED.
The lamp panel M100 provided in this embodiment connects the plurality of pixel units/sub-pixel units in one-to-one correspondence through the plurality of LED driving circuits 100 capable of realizing constant current control, so as to realize constant current driving of one pixel unit/sub-pixel unit, and the output current of the lamp panel M100 is not affected by an individual pixel unit or an LED, thereby realizing high brightness uniformity between individual pixel units or LEDs.
In practical operation, in one pixel unit, three sub-pixel units are respectively composed of LEDs with the light emitting colors of red, green and blue.
In an optional embodiment, each specific number of LED driving circuits in the lamp panel M100 is implemented by using an integrated circuit, that is, the specific number of LED driving circuits are integrated in one chip, and the integrated circuit correspondingly drives one pixel unit/sub-pixel unit, so that the integration level is high and the occupied space is small. Optionally, the "specific number" is 1, 2 or 3, and one lamp panel has a plurality of integrated circuits. Fig. 6 is a pin diagram of the integrated circuit, which only shows the parts related to the present embodiment for convenience of illustration, and the details are as follows:
the integrated circuit comprises 10 pins, namely a scanning pin 9, a first data pin 1, a second data pin 2, a third data pin 3, a first output pin 8, a second output pin 7, a third output pin 6 and a power supply pin 10, and also comprises at least two grounding pins 4 and 5.
The scan pin 9 is configured to receive a row scan signal Vgate, and the first data pin 1, the second data pin 2, and the third data pin 3 are respectively configured to receive a first column data signal Vdata _ r, a second column data signal Vdata _ g, and a third column data signal Vdata _ b. The first, second and third column data signals Vdata _ r, Vdata _ g and Vdata _ b are the column data signals Vdata described above, and the received column data signals Vdata are different for different LED driving circuits 100, so the terms "first, second and third" are added before "column data signals" to distinguish them.
The first output pin 8, the second output pin 7 and the third output pin 6 are respectively connected to three LEDs in one pixel unit in a one-to-one correspondence manner, and are respectively configured to output a first current signal LED _ r, a second current signal LED _ g and a third current signal LED _ b. It should be noted that the first current signal LED _ r, the second current signal LED _ g, and the third current signal LED _ b all belong to the current signals Vo described above, and for different LED driving circuits 100, the received column data signals Vdata are different from each other, and the corresponding generated current signals Vo are also different from each other, so that the terms "first, second, and third" are added before the "current signal" to distinguish them.
The supply pin 10 is configured to be switched in a supply signal VCC.
It should be noted that fig. 6 only illustrates the pin functions and the arrangement positions of the integrated circuit, and is not intended to limit the packaging form of the integrated circuit. In other embodiments, the pin arrangement of the integrated circuit may also adopt a single in-line mode, a dual in-line mode, or the like, and the arrangement position between the pins may also be set according to actual needs.
The integrated circuit provided by the embodiment is suitable for a pixel unit formed by an OLED, a QLED, a micro LED and a miniLED.
Particularly, in the micro LED display technology, the display principle is to make the structural design of the LED into a thin film, a small size and an array, and the size is only about 1-50 μm, which is difficult in the process of transferring the micro LEDs in batch. Due to lattice matching, the micro led must be grown by molecular beam epitaxy on a sapphire substrate and then transferred to a circuit substrate in batch to fabricate a display.
Because microLED's pixel interval is less, every pixel needs independent control and drive, when traditional drive technique used discrete unit circuit to control, required space is great, the components and parts quantity is more, can't shift to the circuit substrate in batches, and it is lower to shift the yield, shift the number of times many, with high costs, utilize the integrated circuit that this embodiment provided to drive pixel, the integration degree is high, a pixel unit can be controlled independently to every integrated circuit, reduce component difference and welding influence and cause LED's inhomogeneous problem of luminance, the shared space of integrated circuit is little, shift the number of times has been reduced, shift the cost has been reduced, and shift the yield has been improved, make microLED display panel mass production.
Referring to fig. 7, a schematic diagram of an exemplary circuit inside the integrated circuit shown in fig. 5 is shown, for convenience of illustration, only the portion related to the present embodiment is shown, and the detailed description is as follows:
the integrated circuit comprises at least two LED driving circuits 100, each LED driving circuit 100 correspondingly drives an LED in one sub-pixel unit, and one integrated circuit drives one pixel unit. Fig. 7 shows only an integrated circuit formed by three parallel LED driving circuits 100.
The operation principle of the integrated circuit shown in fig. 7 is described with reference to the LED driving circuit 100 shown in fig. 4 and the description related to fig. 4, and will not be described in detail herein.
The integrated circuit provided by the embodiment is applied to a lamp panel, a certain number of LED drive circuits on the lamp panel are integrated in one chip, and the LEDs in the pixel units are connected in a one-to-one correspondence manner through at least two LED drive circuits 100 capable of realizing constant current control, so that a pixel unit is driven by a constant current, the output current of the integrated circuit is not affected by an individual pixel unit or an LED, and the brightness consistency between the individual pixel units or the LEDs is high.
Please refer to fig. 8, which is a schematic structural diagram of a lamp panel according to an embodiment of the present application, and for convenience of description, only the portions related to the embodiment are shown, and the detailed description is as follows:
a display panel comprises an LED array and a plurality of LED driving circuits 100. The LEDs in the LED array are respectively connected to the LED driving circuits 100 in a one-to-one correspondence, and the LED array is formed by arranging the LEDs in a plurality of pixel units in an array.
Specifically, the LED driving circuits 100 shown in fig. 8 together form a driving array 400 (see fig. 10 in detail), and one driving array 400 is used for driving one LED array.
The LED array comprises a plurality of red light-emitting LEDs, a plurality of green light-emitting LEDs and a plurality of blue light-emitting LEDs, one LED is contained in one sub-pixel unit, and every three sub-pixel units jointly form a minimum light-emitting unit, namely a pixel unit.
The lamp plate that this embodiment provided, through a plurality of LED drive circuit 100 respectively a plurality of LED in the one-to-one connection LED array, LED drive circuit 100 is used for instructing an LED to give out light according to respective luminance of predetermineeing, realizes the LED array on the constant current drive display panel, and when the lamp plate shows the image, LED's luminance uniformity is high, has promoted customer experience degree.
In an alternative embodiment, the LEDs are implemented by micro LEDs.
Please refer to fig. 9, which is a schematic structural diagram of a lamp panel according to another embodiment of the present application, and for convenience of description, only the parts related to the embodiment are shown, and the details are as follows:
a lamp panel comprises a plurality of integrated circuits and LED arrays, and further comprises a row driving circuit 200 and a column driving circuit 300. The LED array is composed of a plurality of pixel units, each pixel unit comprises three sub-pixel units, each sub-pixel unit comprises an LED, and the LEDs in the LED arrays are arranged in an array mode to form the LED array.
Wherein the row driver circuit 200 and the column driver circuit 300 are connected to each integrated circuit. The row driving circuit 200 is configured to output row scan signals (Vgate 1, Vgate2 … … vganten), and the column driving circuit 300 is configured to output column data signals (Vdata _ r1, Vdata _ g1, Vdata _ b1, Vdata _ r2, Vdata _ g2, Vdata _ b2 … … Vdata _ r n, Vdata _ g n, Vdata _ b n).
The integrated circuit is composed of at least two LED driving circuits 100, one integrated circuit correspondingly drives one pixel unit, and one pixel unit comprises at least two LEDs with different light emitting colors; each preset number of LEDs in the LED array are correspondingly connected with one integrated circuit respectively; each sub-pixel unit comprises one of the above-mentioned LEDs, and every three sub-pixel units constitute one pixel unit 101.
Fig. 9 exemplarily shows a plurality of integrated circuits composed of three LED driving circuits 100 to drive respective connected pixel units; one pixel unit is composed of three sub-pixel units, each sub-pixel unit including an LED of one color.
The integrated circuits shown in fig. 9 collectively form a drive array 400 (see fig. 10 for details). One driving array 400 is used to drive one LED array.
The integrated circuits shown in fig. 9 are connected to the row driving circuit 200 and the column driving circuit 300 to receive the row scanning signal Vgate output by the row driving circuit 200 and the column data signal Vdata output by the column driving circuit 300.
It should be noted that fig. 9 only exemplarily shows a connection channel of the integrated circuit of row 1 to the column driving circuit 300 and a connection channel of the integrated circuit of row n to the row driving circuit 200, but does not show a connection channel of the integrated circuits of row 2 to row (n-1) to the column driving circuit 300 or the row driving circuit 200. Those skilled in the art will appreciate that the connection paths of the row 2 to (n-1) integrated circuits and the column driving circuit 300 or the row driving circuit 200, which are not shown, are actually present.
Please refer to fig. 10, which is a schematic structural diagram of a display panel according to another embodiment of the present application, wherein for convenience of description, only the portions related to the embodiment are shown, and the detailed description is as follows:
a lamp panel comprises an FPGA (Field Programmable Gate Array), an SOC (System on Chip), a row driving circuit 200, a column driving circuit 300, a driving Array 400 and a power circuit 500.
Here, the driving array 400 is composed of a plurality of LED driving circuits 100 shown in fig. 8 or a plurality of integrated circuits shown in fig. 9.
The FPGA is connected to the row driving circuit 200 and the column driving circuit 300. The FPGA is configured to convert the received analog luminance signal into a digital luminance signal, output a row control signal to the row driving circuit 200 according to a preset timing sequence, so as to respectively control the row driving circuit 200 to output a row scanning signal Vgate row by row, and output a digital luminance signal to the column driving circuit 300, so that the column driving circuit 300 correspondingly outputs a column data signal Vdata. Specifically, the control signal is a TTL level signal.
The SOC is connected with the FPGA. The power supply circuit 500 is connected to the row driver circuit 200, the column driver circuit 300, the SOC, and the driver array 400, and the power supply circuit 500 is used to supply power to each of the LED driver circuits 100/integrated circuits in the row driver circuit 200, the column driver circuit 300, the SOC, and the driver array 400.
The SOC is used for receiving a video signal source with 4K resolution ratio and above and simultaneously sending a brightness signal to the FPGA through LVDS or SPI; after receiving the luminance signal provided by the SOC, the FPGA performs corresponding processing, and according to the timing sequence shown in fig. 16, the SPI sends a digital luminance signal to the column driving circuit 300, the column driving circuit 300 outputs a column data signal Vdata to the driving array 400, and simultaneously sends a TTL level signal to the row driving circuit 200, the row driving circuit 200 outputs a row scanning signal Vgate to the driving array 400, and the row scanning signal Vgate and the column data signal Vdata control the brightness of each LED, thereby displaying the corresponding image.
SOC is also used to output a field sync signal VSYNC described below.
Please refer to fig. 11, which is a schematic circuit diagram of the row driving circuit 200 in the lamp panel shown in fig. 10, and for convenience of description, only the parts related to the present embodiment are shown, and the details are as follows:
a line driving circuit 200 is realized by a plurality of cascaded register chips, data input by a DS pin of a first register chip can be sequentially shifted to output ports of all the register chips through the cascade connection of the plurality of register chips, the time of outputting a high level by the output port of each register chip can be controlled by controlling SH and ST pins of the register chips, an/OE pin is used as an enabling pin of the register chip, the register chip can be enabled by pulling down the level, line scanning signals (Vgate 1, Vgate2 … … Vgate n) output by the register chips are controlled at the beginning of each frame data, namely the high level of a field synchronizing signal VSYNC, so that the high level is sequentially output according to the time sequence logic shown in fig. 16, and each line of LED driving circuits 100/integrated circuits is scanned.
Specifically, the model of the register chip is 74hc595, and the register chip is powered by 5V provided by the power supply circuit 500.
Please refer to fig. 12 and fig. 13, which are schematic circuit diagrams of the column driving circuit 300 in the lamp panel shown in fig. 10, and for convenience of description, only the parts related to the present embodiment are shown, and the details are as follows:
the column driving circuit 300 outputs column data signals (Vdata _ r, Vdata _ g, Vdata _ b) by using current driving chips, and transmits the column data signals to the LED driving circuit 100/integrated circuit, and outputs corresponding current signals through the LED driving circuit 100/integrated circuit, thereby controlling brightness of the LED lamp, each current driving chip uses an SPI communication method, and each current driving chip can output a plurality of columns of column data signals Vdata, when the number of columns of the driving array 400 is large, all the current driving chips can be cascaded in the connection manner shown in fig. 12 and 13, so as to output column data signals Vdata of more columns.
SCK _ r, MOSI _ r, CSB _ r, SCK _ g, MOSI _ g, CSB _ g, SCK _ b, MOSI _ b and CSB _ b of the 1 st current driving chip are connected with corresponding IO ports of the FPGA, MISO _ r0 of the last 1 chip is connected with the corresponding IO ports of the FPGA, the FPGA sequentially sends all column data signals Vdata to all the current driving chips through the SPI interface, the current driving chips output corresponding column data signals Vdata to the driving array 400, the column data signals are Vdata _ r1, Vdata _ g1, Vdata _ b1, Vdata _ r2, Vdata _ g2, Vdata _ b2 … … ata _ r n, Vdata _ g n and Vdata _ b n in fig. 12 and fig. 13, and after the driving array 400 receives the column data signals, the corresponding current signals are output to control brightness and darkness of the LED array.
Specifically, the model of the current driving chip is IW7038, and other multi-channel current control chips are also available. The current driver chip is supplied with a 12V power supply signal by the power supply circuit 500.
Please refer to fig. 14, which is a schematic circuit diagram of the power circuit 500 in the lamp panel shown in fig. 10, for convenience of description, only the parts related to the present embodiment are shown, and the details are as follows:
the power circuit 500 inputs an external 12V initial power signal VCC, and converts the 12V initial power signal VCC into 5V and 3.3V electrical signals, wherein the 5V electrical signal is the power signal VCC, the power signal VCC mainly supplies power to the LED driving circuit 100/integrated circuit/driving array 400, and the 3.3V supplies power to the FPGA.
Please refer to fig. 15, which is a flowchart illustrating steps of a timing control method according to an embodiment of the present application, wherein for convenience of description, only parts related to the embodiment are shown, and the following detailed description is provided:
a timing control method includes the following steps:
s01: generating and outputting a field synchronizing signal VSYNC with a preset duty ratio;
s02: when the field synchronizing signal VSYNC is in a high level state, outputting a line scanning signal to a plurality of LED driving circuits 100 corresponding to each line of LEDs in the LED array in sequence;
s03: when the row scan signal Vgate is in a high level state, the column data signal Vdata is sequentially output to the plurality of LED driving circuits 100 corresponding to each row of LEDs in the LED array.
Specifically, the field sync signal VSYNC is output from the SOC. In each high level state of the field synchronizing signal VSYNC, one frame of image display is completed respectively.
Please refer to fig. 16, which is a timing diagram illustrating the timing control method shown in fig. 15.
At the beginning of each frame picture signal, the field sync signal is high, the 1 st line scan signal Vgate1 starts to be output, and all the column data signals (Vdata _ r1, Vdata _ g1, Vdata _ b1, Vdata _ r2, Vdata _ g2, Vdata _ b2 … … Vdata _ r n, Vdata _ g n) start to be output. When the line 1 scan is completed, the output of the row scan signal Vgate1 is stopped, the output of the line 2 scan signal Vgate2 is started, and all the column data signals (Vdata _ r1, Vdata _ g1, Vdata _ b1, Vdata _ r2, Vdata _ g2, Vdata _ b2 … … Vdata _ r n, Vdata _ g n) are output. After the line 2 scanning is completed, the output of the row scanning signal Vgate2 is stopped, and the process is repeated until the output of the scanning signal of the last line (nth line) is completed, the signal of the nth line scanning signal Vgate n becomes low level, all the LEDs on the LED array are lit according to the respective received current signals, and the corresponding brightness pattern is displayed. In each high level state of the field synchronizing signal VSYNC, one frame of image display is completed respectively.
A third aspect of the embodiments of the present application provides a display panel, which includes the above-mentioned lamp panel.
To sum up, the application provides an LED drive circuit, lamp plate and display panel. The LED driving circuit realizes constant current control on the LED through the cooperation of the first constant current source circuit and the second constant current source circuit, and the output current of the LED driving circuit is not influenced by the LED load, so that the brightness consistency between individual LEDs is high, the gray scale display is more uniform, and the problem of uneven brightness of the LED caused by element difference and welding influence is reduced. The lamp panel is provided with a plurality of integrated circuits, each integrated circuit is composed of at least two LED driving circuits, one integrated circuit is used for driving one pixel unit, the integration degree is high, constant current driving on the pixel unit is achieved, output current is not affected by loads of all LEDs in the pixel unit, the transfer yield is improved, and the production cost of the display panel adopting the micro LEDs is greatly reduced.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

Claims (9)

1. An LED driving circuit, comprising:
the first constant current source circuit is used for working when receiving a power supply signal and outputting a received column data signal; and
the second constant current source circuit is connected with the first constant current source circuit and the LED and used for correspondingly generating a current signal based on the column data signal output by the first constant current source circuit when a line scanning signal is received, transmitting the current signal to the LED and indicating the LED to emit light;
the first constant current source circuit includes a first current mirror; the power supply end of the first current mirror is used for accessing the power supply signal; the input end of the first current mirror is used for accessing the column data signal; the output end of the first current mirror is connected with a second constant current source circuit;
the second constant current source circuit includes:
the switching circuit is connected with the first constant current source circuit and used for conducting when receiving the line scanning signal and transmitting the column data signal output by the first constant current source circuit; and
and the second current mirror is connected with the switching circuit and the LED and used for correspondingly generating a current signal based on the column data signal output by the first constant current source circuit when the switching circuit is switched on, transmitting the current signal to the LED and indicating the LED to emit light according to preset brightness.
2. The LED driving circuit according to claim 1, wherein the second current mirror controls a current transfer ratio between the column data signal and the current signal to be 1.
3. The LED driving circuit according to claim 1, further comprising:
and the voltage stabilizing circuit is connected with the first constant current source circuit and is used for stabilizing the column data signals output by the first constant current source circuit.
4. The LED drive circuit of claim 1, wherein the first current mirror comprises:
the MOS transistor comprises a first MOS transistor and a second MOS transistor;
a node where the grid electrode of the first MOS tube, the source electrode of the first MOS tube and the grid electrode of the second MOS tube are connected in common serves as an input end of the first current mirror and is used for accessing the column data signals; a node where the drain electrode of the first MOS transistor and the drain electrode of the second MOS transistor are connected in common serves as a power supply end of the first current mirror and is used for being connected with the power supply signal; and the source electrode of the second MOS tube is used as the output end of the first current mirror and is used for outputting the column data signal to the second constant current source circuit.
5. The LED driving circuit according to claim 1, wherein the switching circuit comprises:
a third MOS transistor and a fourth MOS transistor;
a node where the grid electrode of the third MOS tube is connected with the grid electrode of the fourth MOS tube in common is used for accessing the line scanning signal, and a node where the drain electrode of the third MOS tube is connected with the drain electrode of the fourth MOS tube in common is connected with the first constant current source circuit and is used for receiving the column data signal; and the source electrode of the third MOS tube and the source electrode of the fourth MOS tube are both connected with the second current mirror.
6. The LED drive circuit of claim 1, wherein the second current mirror comprises:
a fifth MOS transistor and a sixth MOS transistor;
a parasitic capacitor is arranged between the grid electrode and the source electrode of the sixth MOS tube and used for storing the current signal and outputting the stored current signal to the LED when the LED works so as to drive the LED to emit light according to preset brightness;
a node of the grid electrode of the fifth MOS tube and the drain electrode of the fifth MOS tube which are connected in common is connected with the switch circuit, and the grid electrode of the sixth MOS tube is connected with the switch circuit; the source electrode of the fifth MOS tube is grounded with the source electrode of the sixth MOS tube, and the drain electrode of the sixth MOS tube is externally connected with the LED.
7. The LED driver circuit of claim 3, wherein the voltage regulator circuit comprises:
a voltage regulator tube and a seventh MOS tube;
the anode of the voltage-stabilizing tube is connected with the first constant current source circuit, the cathode of the voltage-stabilizing tube, the grid of the seventh MOS tube and the drain of the seventh MOS tube are connected in common, and the source of the seventh MOS tube is grounded.
8. The utility model provides a lamp plate, its characterized in that includes: a plurality of pixel units and a plurality of LED driving circuits according to any one of claims 1 to 7, wherein the pixel units comprise three sub-pixel units, and the sub-pixel units comprise LEDs, and wherein one LED driving circuit corresponds to one pixel unit or one LED driving circuit corresponds to one sub-pixel unit.
9. A display panel comprising the lamp panel of claim 8.
CN202010690556.3A 2020-07-17 2020-07-17 LED drive circuit, lamp panel and display panel Active CN111627383B (en)

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