CN114283738A - Pixel circuit, driving method thereof and display device - Google Patents
Pixel circuit, driving method thereof and display device Download PDFInfo
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- CN114283738A CN114283738A CN202010981056.5A CN202010981056A CN114283738A CN 114283738 A CN114283738 A CN 114283738A CN 202010981056 A CN202010981056 A CN 202010981056A CN 114283738 A CN114283738 A CN 114283738A
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Abstract
The application discloses a pixel circuit, a driving method thereof and a display device, wherein the pixel circuit comprises: a light emission control circuit; at least two serially arranged light emitting units; the light-emitting unit selection circuit is used for selectively connecting at least one of the light-emitting units to the light-emitting control circuit, and the light-emitting control circuit is used for providing driving current for the light-emitting unit connected to the light-emitting unit selection circuit. The scheme is at least used for reducing the probability of the bad point after the Bonding of the Micro LED chip.
Description
Technical Field
The invention relates to the technical field of display, in particular to a pixel circuit, a driving method thereof and a display device.
Background
Micro Light Emitting Diode (Micro LED) Micro LED is a new generation display technology, and has advantages of higher brightness, better Light Emitting efficiency, lower power consumption, and the like compared with Organic Light Emitting Diode (OLED) technology.
With the continuous progress of the Micro process, the size of Micro LED chip has reached below 10 um. As the size of Micro LED chips decreases, how to accurately bond (Bonding) the Micro LED chips to the array substrate poses a great challenge.
At present, dead spots are easy to appear after the Bonding of the Micro LED chips, such as the shedding between the Micro LED chips and the Bonding pads, the short circuit of the cathode and anode Bonding pads, the virtual connection between the Micro LED chips and the Bonding pads, the defects of the Micro LED chips, such as the defects, which appear electrically and optically, and the like, and the defects cause that the Micro LEDs at the corresponding pixel positions cannot normally emit light, namely the dead spots appear at the corresponding pixel positions.
Disclosure of Invention
The application is expected to provide a pixel circuit, a driving method thereof and a display device, which are at least used for reducing the probability of dead spots after the Bonding of Micro LED chips.
In a first aspect, the present invention provides a pixel circuit comprising:
a light emission control circuit;
at least two serially arranged light emitting units;
the light-emitting unit selection circuit is used for selectively connecting at least one of the light-emitting units to the light-emitting control circuit, and the light-emitting control circuit is used for providing driving current for the light-emitting unit connected to the light-emitting unit selection circuit.
As an implementation manner, the light emitting units arranged in pairs are included, and the light emitting units arranged in pairs comprise a first light emitting unit and a second light emitting unit;
the light emitting unit selection circuit comprises a first switch element, a second switch element and a switch element control circuit, wherein the first switch element is connected with the first light emitting unit in parallel, the second switch element is connected with the second light emitting unit in parallel, and the switch element control circuit is used for controlling the on-off of the first switch element and the second switch element.
As an implementable manner, the gates of the first switching element and the second switching element are connected to the same switching element control circuit;
the first switching element and the second switching element are of different types.
As an implementable manner, the switching element control circuit includes a first capacitance and a third switching element;
a first pole of the first capacitor is respectively connected with the grid electrodes of the first switch element and the second switch element, and a second pole of the first capacitor is connected with a first voltage;
the first pole of the third switching element is respectively connected with the gates of the first switching element and the second switching element, the second pole of the third switching element is used for receiving a first driving voltage, and the gate of the third switching element is used for receiving a first gate signal.
In this case, the switching element control circuit may include a first switching element control circuit and a second switching element control circuit, and the gate of the first switching element may be connected to the first switching element control circuit and the gate of the second switching element may be connected to the second switching element control circuit.
As an implementable manner, the first switching element control circuit includes a fourth capacitance and a tenth switching element, and the second switching element control circuit includes a fifth capacitance and an eleventh switching element;
a first pole of the fourth capacitor is connected to the gate of the first switching element, a second pole of the fourth capacitor is connected to the first voltage, a first pole of the tenth switching element is connected to the gate of the first switching element, a second pole of the tenth switching element is configured to receive the second driving voltage, and a gate of the tenth switching element is configured to receive the second gate signal;
a first pole of the fifth capacitor is connected to the gate of the second switching element, a second pole of the fifth capacitor is connected to the first voltage, a first pole of the eleventh switching element is connected to the gate of the second switching element, a second pole of the eleventh switching element is configured to receive the third driving voltage, and a gate of the eleventh switching element is configured to receive the third gate signal.
As an implementation, the light emission control circuit includes: a fourth switching element, a fifth switching element, a sixth switching element, a seventh switching element, an eighth switching element, a ninth switching element, and a second capacitor;
a first pole of the fourth switching element is connected with an initialization voltage, a second pole of the fourth switching element is connected with a first pole of the second capacitor, and a grid electrode of the fourth switching element is used for receiving a reset signal;
a first pole of the fifth switching element is used for receiving a first data voltage, a second pole of the fifth switching element is connected with a first pole of the seventh switching element, and a grid electrode of the fifth switching element is used for receiving a second grid electrode signal;
a first pole of the sixth switching element is connected to a second pole of the fourth switching element, a second pole of the sixth switching element is connected to a second pole of the seventh switching element, and a gate of the sixth switching element is configured to receive the second gate signal;
a gate of the seventh switching element is connected to the second pole of the fourth switching element;
a first pole of the eighth switching element is connected with a second pole of the second capacitor and is connected with a second voltage, a second pole of the eighth switching element is connected with a first pole of the seventh switching element, and a grid electrode of the eighth switching element is used for receiving a reset signal;
the first pole of the ninth switching element is connected with the second pole of the seventh switching element, the second pole of the ninth switching element is connected with the light emitting unit, and the grid electrode of the ninth switching element is used for receiving the reset signal.
As an implementation manner, the light emitting element is a Micro LED.
In a second aspect, the invention provides a display device including the pixel circuit.
In a third aspect, the present invention provides a driving method of the pixel circuit, in the light emitting stage, according to the light emitting unit to be lit, the switching element connected in parallel with the light emitting unit that does not need to be lit is controlled to be turned on by the level signal output by the switching element control circuit, so as to short-circuit the light emitting unit that does not need to be lit.
In the above scheme, since more than two light emitting units are arranged in series in the pixel circuit, at least one of the light emitting units can be selectively connected to the light emitting control circuit through the light emitting unit selection circuit, for example, if a dead pixel occurs after one of the light emitting units Bonding, and the other light emitting unit is normal, the normal light emitting unit can be connected to the light emitting control circuit through the light emitting unit selection circuit to perform display. With this scheme, the probability of generating a dead pixel is reduced compared to a scheme in which each pixel circuit (corresponding to one pixel or sub-pixel) has only one light emitting unit.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:
fig. 1 is a schematic structural diagram of a pixel circuit according to a first embodiment of the invention;
fig. 2 is a schematic structural diagram of a pixel circuit according to a second embodiment of the invention;
fig. 3 is a schematic structural diagram of a pixel circuit according to a third embodiment of the invention;
fig. 4 is a schematic structural diagram of a pixel circuit according to a fourth embodiment of the invention;
fig. 5 is a schematic structural diagram of a pixel circuit according to a fifth embodiment of the present invention;
fig. 6 is a schematic structural diagram of a pixel circuit according to a sixth embodiment of the invention;
fig. 7 is a schematic structural diagram of a pixel circuit according to a seventh embodiment of the invention;
fig. 8 is a timing control diagram of a driving method according to an embodiment of the present invention.
Detailed Description
The present application will be described in further detail with reference to the following drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and not restrictive of the invention. It should be noted that, for convenience of description, only the portions related to the present invention are shown in the drawings.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
As shown in fig. 1, an embodiment of the present invention provides a pixel circuit, including:
a light emission control circuit 1;
at least two light-emitting units arranged in series, wherein the specific number of the light-emitting units can be set according to specific conditions, the light-emitting units can be composed of one light-emitting element or a plurality of light-emitting elements, each light-emitting power source is represented by one light-emitting element in the embodiment, and the two light-emitting units in series are respectively represented as a first light-emitting unit LED-A and a second light-emitting unit LED-B for example;
and the light emitting unit selection circuit 2 is used for selectively connecting at least one of the light emitting units to the light emitting control circuit 1, and the light emitting control circuit 1 is used for providing driving current for the light emitting unit connected thereto. For example, but not limited to, the light emitting units that are not desired to be switched into the circuit or need not be lit may be shorted by means of a short.
In the above scheme, since more than two light emitting units are arranged in series in the pixel circuit, at least one of the light emitting units can be selectively connected to the light emitting control circuit 1 through the light emitting unit selection circuit 2, for example, if a dead pixel occurs after one of the light emitting units Bonding, and the other light emitting unit is normal, the normal light emitting unit can be connected to the light emitting control circuit 1 through the light emitting unit selection circuit 2 for displaying. Compared with the scheme that each pixel circuit (corresponding to one pixel or sub-pixel) is provided with only one light-emitting unit, the scheme reduces the probability of generating dead pixels and achieves the repairable effect. In addition, under the condition that the light-emitting units are normal, the light-emitting units can work alternately, and the problems that the temperature is accumulated and is increased due to long-time work of the same light-emitting unit, the efficiency is reduced along with the temperature increase, the color cast is caused and the like are avoided.
Each of the following switching elements may be a transistor, each transistor may be a thin film transistor, a field effect transistor, or another device having the same characteristics, and may be an N-type transistor or a P-type transistor, and different types of transistors are mainly used in consideration of their conduction forms, and the N-type transistor is turned on at a high level, and the P-type transistor is turned on at a low level. To distinguish the two poles of the transistor, except for the control pole, one pole is called a first pole, and the other pole is called a second pole. The control electrode is a grid electrode, the first electrode can be a drain electrode, and the second electrode can be a source electrode; alternatively, the control electrode is a gate, the first electrode may be a source, and the second electrode may be a drain.
As an implementation manner, referring to fig. 2, in this embodiment, the pixel circuit includes the light emitting units arranged in pairs, the light emitting units arranged in pairs include a first light emitting unit LED-a and a second light emitting unit LED-B, and the first light emitting unit LED-a and the second light emitting unit LED-B may be connected in series; the light emitting unit selection circuit comprises a first switch element T9, a second switch element T8 and a switch element control circuit, wherein the first switch element T9 is connected in parallel with the first light emitting unit LED-A, namely a first pole and a second pole of the first switch element T9 are connected to two poles of the first light emitting unit LED-A in a one-to-one correspondence manner, the second switch element T8 is connected in parallel with the second light emitting unit LED-B, namely a first pole and a second pole of the second switch element T8 are connected to two poles of the second light emitting unit LED-B in a one-to-one correspondence manner, and the switch element control circuit is used for controlling the on-off of the first switch element T9 and the second switch element.
As an implementation manner, referring to fig. 3, in this embodiment, the gates of the first switching element T9 and the second switching element T8 are connected to the same switching element control circuit; the first switch element T9 and the second switch element T8 are of different types to selectively control the on/off of the first switch element T9 and the second switch element T8 by different level signals, for example, the first switch element T9 and the second switch element T8 are P-type switch elements and N-type switch elements.
Since the first and second switching elements T9 and T8 are different types of switching elements, only one of the first and second switching elements T9 and T8 is in a conductive state when the switching element control circuit 3 inputs the same level signal to the gates of the first and second switching elements T9 and T8. For example, the first switching element T9 is a P-type switching element, the second switching element T8 is an N-type switching element, and when the switching element control circuit 3 inputs a low level to the gates of the first switching element T9 and the second switching element T8, the first switching element T9 is turned on, the light emitting cell connected in parallel to the first switching element T9 is short-circuited, the second switching element T8 is turned off, and the light emitting cell connected in parallel to the second switching element T8 receives a driving current from the light emission control circuit 1 to emit light; when the switching element control circuit 3 inputs a high level to the gates of the first switching element T9 and the second switching element T8, the second switching element T8 is turned on, the light emitting cells connected in parallel to the second switching element T8 are short-circuited, the first switching element T9 is turned off, and the light emitting cells connected in parallel to the first switching element T9 emit light by being supplied with a driving current by the light emission control circuit 1. On the contrary, if the first switching element T9 is an N-type switching element and the second switching element T8 is a P-type switching element, when the switching element control circuit 3 inputs a low level to the gates of the first switching element T9 and the second switching element T8, the second switching element T8 is turned on, the light emitting unit connected in parallel with the second switching element T8 is short-circuited, the first switching element T9 is turned off, and the light emitting unit connected in parallel with the first switching element T9 receives the driving current from the light emitting control circuit 1 to emit light; when the switching element control circuit 3 inputs a high level to the gates of the first switching element T9 and the second switching element T8, the first switching element T9 is turned on, the light emitting cells connected in parallel to the first switching element T9 are short-circuited, the second switching element T8 is turned off, and the light emitting cells connected in parallel to the second switching element T8 emit light by being supplied with a driving current by the light emission control circuit 1.
As an implementation, referring also to fig. 4, the switching element control circuit 3 includes a first capacitor C2 and a third switching element T7;
a first pole of the first capacitor C2 is connected to the corresponding gate, a second pole of the first capacitor is connected to a first voltage VCOM, which may be any constant voltage source, such as but not limited to a common voltage;
a first pole of the third switching element T7 is connected to the corresponding gate, a second pole of the third switching element is used for receiving the first driving voltage VGL/VGH, and a gate of the third switching element is used for receiving the first gate signal sw.
As another implementable manner, referring to fig. 5, the switching element control circuit 3 includes a first switching element control circuit 31 and a second switching element control circuit 32, a gate of the first switching element T9 is connected to the first switching element control circuit 31, and a gate of the second switching element T8 is connected to the second switching element control circuit 32.
By adopting the structure, on one hand, one of the light-emitting units can be controlled to emit light arbitrarily, and on the other hand, a plurality of light-emitting units can be controlled to emit light simultaneously, so that the brightness of the pixel is improved.
As an achievable manner, referring also to fig. 6, the first switching element control circuit 31 includes a fourth capacitance C3 and a tenth switching element T10, and the second switching element control circuit includes a fifth capacitance C4 and an eleventh switching element T11;
a first pole of the fourth capacitor C3 is connected to the gate of the first switch element T9, a second pole of the fourth capacitor C3 is connected to the first voltage VCOM, a first pole of the tenth switch element T10 is connected to the gate of the first switch element T9, a second pole of the tenth switch element T10 is configured to receive the second driving voltage V1, and a gate of the tenth switch element T10 is configured to receive the second gate signal sw 1;
a first pole of the fifth capacitor C4 is connected to the gate of the second switch element T8, a second pole of the fifth capacitor C4 is connected to the first voltage VCOM, a first pole of the eleventh switch element T10 is connected to the gate of the second switch element T8, a second pole of the eleventh switch element T10 is configured to receive the third driving voltage V2, and a gate of the eleventh switch element T10 is configured to receive the third gate signal sw 2. In this example, the first and second switching elements T9 and T8 may be of the same type or of different types.
As an implementation, referring also to fig. 7, as an implementation, the light emission control circuit 1 includes: a fourth switching element T1, a fifth switching element T2, a sixth switching element T3, a seventh switching element T4, an eighth switching element T5, a ninth switching element T6, and a second capacitor C1;
a first pole of the fourth switching element T1 is connected to the initialization voltage Vini, a second pole of the fourth switching element T1 is connected to a first pole of a second capacitor C1, and a gate of the fourth switching element T1 is configured to receive a Reset signal Reset;
a first pole of the fifth switching element T2 is for receiving a first data voltage Vdata-a, a second pole of the fifth switching element T2 is connected to a first pole of the seventh switching element T4, and a Gate of the fifth switching element T2 is for receiving a second Gate signal Gate-a;
a first pole of the sixth switching element T3 is connected to the second pole of the fourth switching element T1, a second pole of the sixth switching element T3 is connected to the second pole of the seventh switching element T4, and a Gate of the sixth switching element T3 is configured to receive the second Gate signal Gate-a;
a gate of the seventh switching element T4 is connected to the second pole of the fourth switching element T1;
a first pole of the eighth switching element T5 is connected to a second pole of a second capacitor C1 and to a second voltage VDD, a second pole of the eighth switching element T5 is connected to a first pole of the seventh switching element T4, and a gate of the eighth switching element T5 is configured to receive a reset signal EM;
a first pole of the ninth switching element T6 is connected to a second pole of a seventh switching element T4, a second pole of the ninth switching element T6 is connected to the light emitting unit, and a gate of the ninth switching element T6 is configured to receive the reset signal EM.
A first pole of the eighth switching element T5 is connected to the second voltage VDD, and a second pole of the second light emitting unit LED-B is connected to the third voltage VSS different from the first pole of the first light emitting unit LED-a.
Specifically, the pixel circuit of the present invention will be described in detail below with reference to the circuit shown in fig. 7. The pixel circuit comprises a first light-emitting unit LED-A and a second light-emitting unit LED-B which are arranged in series, wherein the first light-emitting unit LED-A is connected with a first switch element T9 in parallel, the second light-emitting unit LED-B is connected with a second switch element T8 in parallel, the gates of the first switch element T9 and the second switch element T8 are connected with the first pole of a first capacitor C2, and the second pole of the first capacitor is connected with a first voltage VCOM; and a first pole of the third switching element T7 is connected to the gates of the first switching element T9 and the second switching element T8, a second pole of the third switching element T7 is configured to receive the first driving voltage VGH/VGL, and a gate of the third switching element is configured to receive the first gate signal sw. Further comprising: a fourth switching element T1, a fifth switching element T2, a sixth switching element T3, a seventh switching element T4, an eighth switching element T5, a ninth switching element T6, and a second capacitor C1. A first pole of the fourth switching element T1 is connected to the initialization voltage Vini, a second pole of the fourth switching element T1 is connected to a first pole of the second capacitor C1, and a gate of the fourth switching element T1 is configured to receive a Reset signal Reset; a first pole of the fifth switching element T2 is for receiving the first data voltage Vdata-a, a second pole of the fifth switching element T2 is connected to a first pole of the seventh switching element T4, and a Gate of the fifth switching element T2 is for receiving the second Gate signal Gate-a; a first pole of the sixth switching element T3 is connected to the second pole of the fourth switching element T1, a second pole of the sixth switching element T3 is connected to the second pole of the seventh switching element T4, and a Gate of the sixth switching element T3 is configured to receive the second Gate signal Gate-a; the gate of the seventh switching element T4 is connected to the second pole of the fourth switching element T1; a first pole of the eighth switching element T5 is connected to the second pole of the second capacitor C1 and to the second voltage VDD, a second pole of the eighth switching element T5 is connected to the first pole of the seventh switching element T4, and a gate of the eighth switching element T5 is configured to receive the reset signal EM; a first pole of the ninth switching element T6 is connected to the second pole of the seventh switching element T4, a second pole of the ninth switching element T6 is connected to the first pole of the first light emitting unit LED-a and the first pole of the first switching element T9, and a gate of the ninth switching element T6 receives the reset signal EM. The eighth switching element T5 has a first pole connected to the second voltage VDD, and the second light emitting unit LED-B has a different pole connected to the third voltage VSS from the first light emitting unit LED-a.
As an implementation manner, the light emitting unit is a Micro LED. Of course, the light emitting unit may employ an OLED.
In a second aspect, the invention provides a display device including the pixel circuit.
The display device adopts the pixel circuit, and the specific structure and effect of the display device refer to the pixel circuit, which is not described herein again.
Examples of display devices include, but are not limited to, tablet computers, computer display screens, Augmented Reality (AR) devices, Virtual Reality (VR) devices, and the like.
In a third aspect, the present invention provides a driving method of the pixel circuit, in the light emitting stage, according to the light emitting unit to be lit, the switching element connected in parallel with the light emitting unit that does not need to be lit is controlled to be turned on by the level signal output by the switching element control circuit 3, so as to short-circuit the light emitting unit that does not need to be lit.
The driving method will be described in detail with reference to the pixel circuit shown in fig. 7 and the control timing shown in fig. 8.
In this example, of the first switching element T9, the second switching element T8, the third switching element T7, the fourth switching element T1, the fifth switching element T2, the sixth switching element T3, the seventh switching element T4, the eighth switching element T5, and the ninth switching element T6, P-type switching elements are selected except that the first switching element T9 is an N-type switching element.
For example, one display period in the driving method includes three stages, which are a reset stage (i), a seventh switching element T4 threshold voltage compensation and data voltage reading stage (ii), and a light emitting stage (iii).
In the Reset phase, the Reset signal Reset is pulled low, only the fourth switching element T1 is turned on, the gate of the seventh switching element T4 and the second capacitor C1 are turned on with the initialization voltage Vini, the seventh switching element T4 is turned on, and the second capacitor C1 is Reset to the initialization voltage Vini.
In the seventh switching element T4 threshold voltage compensation and data voltage reading stage —, the level signal output by the second Gate signal Gate-a is pulled low, the fifth switching element T2 and the sixth switching element T3 are turned on, the second capacitor C1 keeps the seventh switching element T4 turned on, and the data voltage of the first data voltage Vdata-a is written into the second capacitor C1.
In the light emitting stage c, the level signal output by the reset signal EM is pulled low, the eighth switching element T5 and the ninth switching element T6 are turned on, the level signal output by the first gate signal sw is pulled low, and the third switching element T7 is turned on, so that one of the light emitting units can be selectively controlled to operate by connecting the second pole of the third switching element T7 to the level signal of the first driving voltage. For example, after the level signal output by the first gate signal sw is pulled low and the third switching element T7 is turned on, if the signal of the first driving voltage is VGL, and the level signal output in the early stage of the light emitting phase is pulled low, the first switching element T9 is turned off, the second switching element T8 is turned on, the first light emitting unit LED-a can operate, and the second light emitting unit LED-B is short-circuited, and the first driving voltage is written into the first capacitor C2, and after the third switching element T7 is turned off in the later stage of the light emitting phase, the first capacitor C2 can be maintained, the first switching element T9 is turned off and the second switching element T8 is turned on, so as to maintain the light emitting unit LED-a to operate.
After the level signal output by the first gate signal sw is pulled low and the third switching element T7 is turned on, if the signal of the first driving voltage is VGH and the level signal output in the early stage of the light emitting phase is pulled high, the first switching element T9 is turned on and the second switching element T8 is turned off, the second light emitting unit LED-B can operate, and the first light emitting unit LED-a is short-circuited while the first driving voltage is written into the first capacitor C2, after the third switching element T7 is turned off in the later stage of the light emitting phase, the first capacitor C2 can be maintained, and the first switching element T9 is turned on and the second switching element T8 is turned off, so as to maintain the second light emitting unit LED-B to operate.
Correspondingly, if the first light emitting unit LED-a has a defect or a Bonding failure, and the second LED-B is normal, the signal of the first driving voltage adopts VGH to short-circuit the first light emitting unit LED-a through the first switching element T9, so that the second light emitting unit LED-B can operate, otherwise, the same principle is applied, so as to achieve the purpose of repairing the pixel.
It will be understood that any orientation or positional relationship indicated above with respect to the terms "central," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," etc., is based on the orientation or positional relationship shown in the drawings and is for convenience in describing and simplifying the invention, and does not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and is therefore not to be considered limiting of the invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified.
The above description is only a preferred embodiment of the application and is illustrative of the principles of the technology employed. It will be appreciated by those skilled in the art that the scope of the invention herein disclosed is not limited to the particular combination of features described above, but also encompasses other arrangements formed by any combination of the above features or their equivalents without departing from the inventive concept. For example, the above features may be replaced with (but not limited to) features having similar functions disclosed in the present application.
Claims (10)
1. A pixel circuit, comprising:
a light emission control circuit;
at least two serially arranged light emitting units;
the light-emitting unit selection circuit is used for selectively connecting at least one of the light-emitting units to the light-emitting control circuit, and the light-emitting control circuit is used for providing driving current for the light-emitting unit connected to the light-emitting unit selection circuit.
2. The pixel circuit according to claim 1, comprising the light emitting units arranged in pairs, the light emitting units arranged in pairs comprising a first light emitting unit and a second light emitting unit;
the light emitting unit selection circuit comprises a first switch element, a second switch element and a switch element control circuit, wherein the first switch element is connected with the first light emitting unit in parallel, the second switch element is connected with the second light emitting unit in parallel, and the switch element control circuit is used for controlling the on-off of the first switch element and the second switch element.
3. The pixel circuit according to claim 2, wherein gates of the first switching element and the second switching element are connected to the same switching element control circuit;
the first switching element and the second switching element are of different types.
4. The pixel circuit according to claim 3, wherein the switching element control circuit includes a first capacitance and a third switching element;
a first pole of the first capacitor is respectively connected with the grid electrodes of the first switch element and the second switch element, and a second pole of the first capacitor is connected with a first voltage;
the first pole of the third switching element is respectively connected with the gates of the first switching element and the second switching element, the second pole of the third switching element is used for receiving a first driving voltage, and the gate of the third switching element is used for receiving a first gate signal.
5. The pixel circuit according to claim 2, wherein the switching element control circuit comprises a first switching element control circuit and a second switching element control circuit, a gate of the first switching element is connected to the first switching element control circuit, and a gate of the second switching element is connected to the second switching element control circuit.
6. The pixel circuit according to claim 5, wherein the first switching element control circuit includes a fourth capacitance and a tenth switching element, and wherein the second switching element control circuit includes a fifth capacitance and an eleventh switching element;
a first pole of the fourth capacitor is connected to the gate of the first switching element, a second pole of the fourth capacitor is connected to the first voltage, a first pole of the tenth switching element is connected to the gate of the first switching element, a second pole of the tenth switching element is configured to receive the second driving voltage, and a gate of the tenth switching element is configured to receive the second gate signal;
a first pole of the fifth capacitor is connected to the gate of the second switching element, a second pole of the fifth capacitor is connected to the first voltage, a first pole of the eleventh switching element is connected to the gate of the second switching element, a second pole of the eleventh switching element is configured to receive the third driving voltage, and a gate of the eleventh switching element is configured to receive the third gate signal.
7. The pixel circuit according to any one of claims 1 to 6, wherein the light emission control circuit comprises: a fourth switching element, a fifth switching element, a sixth switching element, a seventh switching element, an eighth switching element, a ninth switching element, and a second capacitor;
a first pole of the fourth switching element is connected with an initialization voltage, a second pole of the fourth switching element is connected with a first pole of the second capacitor, and a grid electrode of the fourth switching element is used for receiving a reset signal;
a first pole of the fifth switching element is used for receiving a first data voltage, a second pole of the fifth switching element is connected with a first pole of the seventh switching element, and a grid electrode of the fifth switching element is used for receiving a second grid electrode signal;
a first pole of the sixth switching element is connected to a second pole of the fourth switching element, a second pole of the sixth switching element is connected to a second pole of the seventh switching element, and a gate of the sixth switching element is configured to receive the second gate signal;
a gate of the seventh switching element is connected to the second pole of the fourth switching element;
a first pole of the eighth switching element is connected with a second pole of the second capacitor and is connected with a second voltage, a second pole of the eighth switching element is connected with a first pole of the seventh switching element, and a grid electrode of the eighth switching element is used for receiving a reset signal;
the first pole of the ninth switching element is connected with the second pole of the seventh switching element, the second pole of the ninth switching element is connected with the light emitting unit, and the grid electrode of the ninth switching element is used for receiving the reset signal.
8. The pixel circuit according to any of claims 1-6, wherein the light emitting element is a Micro LED.
9. A display device comprising the pixel circuit according to any one of claims 1 to 8.
10. A driving method of a pixel circuit according to claim 2, wherein in the light emitting stage, the switching element connected in parallel with the light emitting unit which is not required to be lit is controlled to be turned on by the level signal outputted from the switching element control circuit in accordance with the light emitting unit which is to be lit, so as to short-circuit the light emitting unit which is not required to be lit.
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Application publication date: 20220405 |