CN110930949A - Pixel circuit and display panel - Google Patents
Pixel circuit and display panel Download PDFInfo
- Publication number
- CN110930949A CN110930949A CN201911305020.9A CN201911305020A CN110930949A CN 110930949 A CN110930949 A CN 110930949A CN 201911305020 A CN201911305020 A CN 201911305020A CN 110930949 A CN110930949 A CN 110930949A
- Authority
- CN
- China
- Prior art keywords
- electrically connected
- switching transistor
- module
- signal input
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electroluminescent Light Sources (AREA)
- Control Of El Displays (AREA)
Abstract
The invention discloses a pixel circuit and a display panel. The pixel circuit comprises a first switch module, a second switch module, a third switch module, a driving module, a first storage module, a second storage module and a light-emitting module; the control end of the first switch module is electrically connected with the first scanning signal input end; the driving module is used for outputting driving current according to the voltage of the control end; the control end of the second switch module is electrically connected with the enabling signal input end; the light emitting module is used for responding to the driving current to emit light; the first end of the first storage module is electrically connected with the first power signal input end, and the second end of the first storage module is electrically connected with the control end of the driving module; the second storage module and the third switch module are connected in series and are connected in series between the control end of the driving module and the first power signal input end, and the control end of the third switch module is electrically connected with the enable signal input end. The embodiment of the invention can maintain the stable light emission of the light-emitting module for a long time and avoid the bad problems of black cluster and the like.
Description
Technical Field
Embodiments of the present invention relate to display technologies, and in particular, to a pixel circuit and a display panel.
Background
With the development of display technology, display panels, such as Organic Light-Emitting Diode (OLED) display panels, are increasingly widely used.
The OLED display panel needs to use a pixel circuit to drive the display panel to display, however, the conventional OLED display panel has a black cluster problem during display, and the display effect is not good.
Disclosure of Invention
The invention provides a pixel circuit and a display panel, which can maintain stable light emission of a light emitting module during low-frequency driving, avoid the bad problems of black clusters and the like and improve the display effect.
In a first aspect, an embodiment of the present invention provides a pixel circuit, including a first switch module, a second switch module, a third switch module, a driving module, a first storage module, a second storage module, and a light emitting module; the control end of the first switch module is electrically connected with the first scanning signal input end and is used for writing data voltage into the control end of the driving module according to the scanning signal of the first scanning signal input end; the driving module is used for outputting driving current according to the voltage of the control end; the control end of the second switch module is electrically connected with the enable signal input end, and the second switch module is used for conducting the driving module and the light-emitting module according to an enable signal input by the enable signal input end; the light emitting module is used for responding to the driving current to emit light; the first end of the first storage module is electrically connected with a first power signal input end, and the second end of the first storage module is electrically connected with the control end of the driving module; the second storage module and the third switch module are connected in series and are connected in series between the control end of the driving module and the first power signal input end, and the control end of the third switch module is electrically connected with the enable signal input end.
Optionally, the second memory module has the same charge storage performance as the first memory module.
Optionally, a first end of the second storage module is electrically connected to a second end of the third switch module, and the second end is electrically connected to the control end of the driving module; and the first end of the third switch module is electrically connected with the first power supply signal input end.
Optionally, the first switch module includes a first switch transistor, the second switch module includes a second switch transistor, the third switch module includes a third switch transistor, and the driving module includes a driving transistor; the first storage module comprises a first capacitor, and the second storage module comprises a second capacitor; the control end of the first switching transistor is electrically connected with the first scanning signal input end, the first end of the first switching transistor is electrically connected with the data signal input end, and the second end of the first switching transistor is electrically connected with the control end of the driving transistor; the control end of the second switching transistor is electrically connected with the enable signal input end, the first end of the second switching transistor is electrically connected with the second end of the driving transistor, and the second end of the second switching transistor is electrically connected with the first electrode of the light-emitting module; the first end of the driving transistor is electrically connected with the first power supply signal input end; the first end of the first capacitor is electrically connected with the first power signal input end, and the second end of the first capacitor is electrically connected with the control end of the driving transistor; the first end of the second capacitor is electrically connected with the second end of the third switching transistor, and the second end of the second capacitor is electrically connected with the control end of the driving transistor; the control end of the third switching transistor is electrically connected with the enable signal input end, and the first end of the third switching transistor is electrically connected with the first power supply signal input end.
Optionally, the first switch module includes a first switch transistor, the second switch module includes a second switch transistor, the third switch module includes a third switch transistor, and the driving module includes a driving transistor; the first storage module comprises a first capacitor, and the second storage module comprises a second capacitor; the pixel circuit further comprises a fourth switching transistor, a fifth switching transistor, a sixth switching transistor and a seventh switching transistor; a control end of the first switching transistor is electrically connected with the first scanning signal input end, a first end of the first switching transistor is electrically connected with the data signal input end, and a second end of the first switching transistor is electrically connected with the first end of the driving transistor; the control end of the second switching transistor is electrically connected with the enable signal input end, the first end of the second switching transistor is electrically connected with the second end of the driving transistor, and the second end of the second switching transistor is electrically connected with the first electrode of the light-emitting module; the control end of the third switching transistor is electrically connected with the enable signal input end, the first end of the third switching transistor is electrically connected with the first power supply signal input end, and the second end of the third switching transistor is electrically connected with the first end of the second capacitor; the first end of the driving transistor is electrically connected with the second end of the fourth switching transistor; the first end of the first capacitor is electrically connected with the first power signal input end, and the second end of the first capacitor is electrically connected with the control end of the driving transistor; the second end of the second capacitor is electrically connected with the control end of the driving transistor; the control end of the fourth switching transistor is electrically connected with the enable signal input end, and the first end of the fourth switching transistor is electrically connected with the first power supply signal input end; a control end of the fifth switching transistor is electrically connected with the first scanning signal input end, a first end of the fifth switching transistor is electrically connected with a control end of the driving transistor, and a second end of the fifth switching transistor is electrically connected with a second end of the driving transistor; the control end of the sixth switching transistor is electrically connected with the second scanning signal input end, the first end of the sixth switching transistor is electrically connected with the control end of the driving transistor, and the second end of the sixth switching transistor is electrically connected with the initialization signal input end; a control end of the seventh switching transistor is electrically connected to the second scanning signal input end, a first end of the seventh switching transistor is electrically connected to the initialization signal input end, and a second end of the seventh switching transistor is electrically connected to the first electrode of the light emitting module.
In a second aspect, an embodiment of the present invention further provides a display panel, including: a substrate; a plurality of pixel circuits of the first aspect on the substrate.
Optionally, the first storage module comprises a first capacitor, and the second storage module comprises a second capacitor; the first pole plate of the first capacitor and the first pole plate of the second capacitor are arranged on the same layer, and the first pole plate of the first capacitor is used as the second end of the first storage module.
Optionally, the second plate of the first capacitor and the second plate of the second capacitor are disposed in the same layer.
Optionally, the display panel includes an active layer, a gate layer, a capacitor metal layer, and a source drain layer, which are stacked in sequence; the second plate of the first capacitor is positioned on the capacitor metal layer and is multiplexed as the first metal electrode of the third switching transistor; and the second plate of the second capacitor is positioned on the capacitor metal layer and is multiplexed as a second metal electrode of the third switching transistor.
Optionally, the first plate of the first capacitor and the first plate of the second capacitor are an integral metal structure.
According to the technical scheme, the adopted pixel circuit comprises a first switch module, a second switch module, a third switch module, a driving module, a first storage module, a second storage module and a light-emitting module; in the data writing module, only the first storage module works, and at the moment, the data signal can be fully written into the first storage module, so that the problem of black clusters generated in the light-emitting stage due to insufficient writing of the data signal is avoided; meanwhile, in the light emitting stage, the first storage module and the second storage module work, so that the voltage of the control end of the driving module can be kept stable for a long time, and further the light emitting module can stably emit light for a long time, namely the light emitting module can be kept stably emit light during low-frequency driving.
Drawings
Fig. 1 is a schematic circuit structure diagram of a pixel circuit according to an embodiment of the present invention;
fig. 2 is a schematic circuit diagram of another pixel circuit according to an embodiment of the present invention;
fig. 3 is a schematic circuit diagram of another pixel circuit according to an embodiment of the present invention;
FIG. 4 is a timing diagram according to an embodiment of the present invention;
fig. 5 is a schematic circuit diagram of another pixel circuit according to an embodiment of the present invention;
FIG. 6 provides yet another timing diagram according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
As mentioned in the background art, the conventional display panel has a problem of black cluster, and the inventors have found through careful study that the reason for this problem is: when the display panel is driven at a low frequency, the adopted pixel circuit usually needs a larger capacitor to ensure that the electric potential of the grid electrode of the driving transistor can be kept in a light-emitting stage, however, when the capacitor is larger, in a data writing stage, because the duration time of a scanning signal is shorter, the data writing on the capacitor can be influenced, so that the data writing is insufficient, the bad problems of black clusters and the like are easily generated after the black state voltage is increased, and the display effect of the display panel is not good.
Based on the technical problem, the invention provides the following solution:
fig. 1 is a schematic circuit structure diagram of a pixel circuit according to an embodiment of the present invention, and referring to fig. 1, the pixel circuit includes: a first switch module 101, a second switch module 102, a third switch module 103, a driving module 104, a first storage module 105, a second storage module 106, and a light emitting module 107; the control terminal a1 of the first switch module 101 is electrically connected to the first scan signal input terminal S1, and is used for writing the data voltage into the control terminal D1 of the driving module 104 according to the scan signal of the first scan signal input terminal S1; the driving module 104 is configured to output a driving current according to the voltage of the control terminal D1; the control terminal B1 of the second switch module 102 is electrically connected to the enable signal input terminal EM, and the second switch module 102 is configured to conduct between the driving module 104 and the light emitting module 107 according to an enable signal input by the enable signal input terminal EM; the light emitting module 107 is used for emitting light in response to the driving current; the first terminal E1 of the first memory module 105 is electrically connected to the first power signal input terminal PVDD, and the second terminal E2 of the first memory module 105 is electrically connected to the control terminal D1 of the driving module 104; the second memory module 106 is connected in series with the third switch module 103 and in series between the control terminal D1 of the driving module 104 and the first power signal line PVDD, and the control terminal C1 of the third switch module 103 is electrically connected to the enable signal input terminal EM.
Specifically, the light emitting module 107 may be an OLED or a micro LED, which is a current type light emitting device, and since the current is not maintained, a pixel circuit is required to control the light emitting module 107 to achieve stable light emission in the light emitting stage, the first electrode H1 of the light emitting module 107 may be an anode, the second electrode H2 may be a cathode, the second electrode H2 thereof is electrically connected to the second power signal input terminal PVEE, the first power signal input by the first power signal input terminal PVDD may be a positive voltage signal, and the second power signal input by the second power signal input terminal PVEE may be a negative voltage signal, so as to ensure the light emission of the light emitting module in the light emitting stage, thereby ensuring normal display. When the display device is in the light-emitting stage, under the effect of the enable signal, the second switch module 102 is turned on, and at this time, a path exists between the second end D3 of the driving module 104 and the first electrode H1 of the light-emitting module 107, that is, the current output by the driving module 104 can be transmitted to the light-emitting module 107, so that the light-emitting module 107 is driven to emit light according to the driving current to realize the display. In other phases, such as the data writing phase, the second switch module 102 is not turned on, and the driving current output by the driving module 104 cannot be transmitted to the light emitting module 107 at this time, i.e., it is ensured that the light emitting module 107 emits light only in the light emitting phase, thereby preventing the light emitting module 107 from emitting light by mistake.
Taking the low-frequency driving as an example, in this case, the driving frequency of the display panel is less than 60Hz, in the data writing phase, the first switch module 101 is turned on by the scan signal, the second switch module 102 is turned off by the enable signal, and at this time, the third switch module 103 is turned off by the enable signal, that is, only the first storage module 105 in the pixel circuit operates, if the first storage module 105 can be a capacitor, the equivalent storage capacitor in the pixel circuit is only the capacitance value of the first storage module 105 in the data writing phase, the equivalent storage capacitor is small, even if the duration of the scan signal is short, the data can be sufficiently written into the first storage module 105, and there is no adverse problem of black lumps and the like generated in the light emitting phase due to insufficient writing. In the light emitting stage, at this time, the first switch module 101 is turned off under the action of the scan signal, the second switch module 102 and the third switch module 103 are turned on under the action of the enable signal, at this time, the second storage module 106 starts to operate, for example, the second storage module 106 may be a capacitor, at this time, the second storage module 106 is connected in parallel to two ends of the first storage module 105, which is equivalent to increasing the storage capacitor in the pixel circuit, at this time, the capacitance value of the storage capacitor is larger, the discharge is slower, that is, the discharge time is longer, the potential of the control terminal D1 of the driving module 104 can be maintained for a longer time, that is, the driving current output by the driving module 104 can be kept stable for a longer time, and further, the light emitting module 107 can stably emit light for a longer time.
In the technical scheme of this embodiment, the adopted pixel circuit includes a first switch module, a second switch module, a third switch module, a driving module, a first storage module, a second storage module and a light emitting module; in the data writing module, only the first storage module works, and at the moment, the data signal can be fully written into the first storage module, so that the bad problems of black clusters and the like generated in the light-emitting stage after the black-state voltage is increased due to insufficient writing of the data signal are avoided; meanwhile, in the light emitting stage, the first storage module and the second storage module work, so that the voltage of the control end of the driving module can be kept stable for a long time, and further the light emitting module can stably emit light for a long time, namely the light emitting module can be kept stably emit light during low-frequency driving.
Alternatively, with continued reference to fig. 1, the first terminal G1 of the second memory module 106 is electrically connected to the second terminal C3 of the third switch module 103, and the second terminal G2 is electrically connected to the control terminal D1 of the driving module 104; the first terminal C2 of the third switching module 103 is electrically connected to the first power signal input terminal PVDD.
Specifically, when fabricating each layer structure of the display panel, the control terminal D1 of the driving module 104 and the second terminal E2 of the first memory module 105 may be disposed at the same layer, and may be implemented by using the same metal electrode, in other words, the metal electrode forming the second terminal E2 may be a part of the electrode from which the metal electrode forming the control terminal D1 extends. The second end G2 of the second memory module 106 is electrically connected to the control end D1 of the driving module 104, and when the film structure of the display panel is fabricated, the second end G2 of the second memory module 106 and the control end D1 of the driving module 104 may be formed by using the same metal electrode, that is, the second end G2 of the second storage capacitor 106 may be a part of an electrode extending from the metal electrode forming the control end D1, so as to simplify the design difficulty of each film of the display panel, and reduce the design cost.
It should be noted that fig. 2 is a schematic circuit structure diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 2, different from the structure shown in fig. 1, in fig. 2, a first terminal of the second memory module 106 is electrically connected to the first power signal input terminal PVDD, a second terminal G2 is electrically connected to a first terminal C2 of the third switch module 103, and a second terminal C3 of the third switch module 103 is electrically connected to the control terminal D1 of the driving module 104. In the data writing stage, the third switch module 103 is turned off, and only the first storage module 105 works at this time, so that even if the data writing time is short, data can be sufficiently written into the first storage module 105, and the bad problems such as black lumps are avoided; in the light emitting phase, the enable signal input by the enable signal input terminal EM turns on the third switch module 103, so that the first storage module 105 and the second storage module 106 work together, and the equivalent storage capacitor of the pixel circuit is large, so that the control terminal D1 of the driving module 104 can maintain a stable potential for a long time, that is, the light emitting module 107 can emit light stably in the light emitting phase. As long as only the first memory module 105 operates in the data writing phase and the first memory module 105 and the second memory module 196 operate together in the light emitting phase, the specific connection manner of the second memory module 106 and the third switch module 103 is not particularly limited in the embodiment of the present invention.
Optionally, fig. 3 is a schematic circuit structure diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 3, the first switch module 101 includes a first switch transistor P1, the second switch module 102 includes a second switch transistor P2, the third switch module 103 includes a third switch transistor P3, the driving module 104 includes a driving transistor P4, the first storage module 105 includes a first capacitor Cst1, and the second storage module 106 includes a second capacitor Cst 2; the light emitting module 107 includes a light emitting diode Le;
a control terminal of the first switching transistor P1 is used as the control terminal a1 of the first switching module 101, a first terminal of the first switching transistor P1 is used as the first terminal a2 of the first switching module 101, and a second terminal of the first switching transistor P1 is used as the second terminal A3 of the first switching module 101; a control terminal of the second switching transistor P2 is used as the control terminal B1 of the second switching module 102, a first terminal is used as the first terminal B2 of the second switching module 102, and a second terminal of the second switching transistor P2 is used as the second terminal B3 of the second switching module 102; a control terminal of the third switching transistor P3 is used as the control terminal C1 of the third switching module 103, a first terminal of the third switching transistor P3 is used as the first terminal C2 of the third switching module 103, and a second terminal of the third switching transistor P3 is used as the second terminal C3 of the third switching module 103; a control terminal of the driving transistor P4 is used as the control terminal D1 of the driving module 104, a first terminal of the driving transistor P4 is used as the first terminal D2 of the driving module 104, and a second terminal of the driving transistor P4 is used as the second terminal D3 of the driving module 104; the first terminal of the first capacitor Cst1 is used as the first terminal E1 of the first memory module 105, and the second terminal of the first capacitor Cst1 is used as the second terminal E2 of the first memory module 105; a first terminal of the second capacitor Cst2 serves as the first terminal G1 of the second memory module 106, and a second terminal of the second capacitor Cst2 serves as the second terminal G2 of the second memory module 106; the first end of the led Le serves as the first end H1 of the light emitting module 107, and the second end of the led Le serves as the second end H2 of the light emitting module 107;
a control terminal of the first switching transistor P1 is electrically connected to the first scan signal input terminal S1, a first terminal of the first switching transistor P1 is electrically connected to the data signal input terminal Vdata, and a second terminal of the first switching transistor P1 is electrically connected to a control terminal of the driving transistor P4; a control terminal of the second switching transistor P2 is electrically connected to the enable signal input terminal EM, a first terminal of the second switching transistor P2 is electrically connected to the second terminal of the driving module P4, and a second terminal of the second switching transistor P2 is electrically connected to the first electrode H1 of the light emitting module 107; a first terminal of the first capacitor Cst1 is electrically connected to the first power signal input terminal PVDD, and a second terminal of the first capacitor Cst1 is electrically connected to the control terminal of the driving transistor P4; a first terminal of the second capacitor Cst2 is electrically connected to a second terminal of the third switching transistor P3, and a second terminal of the second capacitor Cst2 is electrically connected to a control terminal of the driving transistor P4; a control terminal of the third switching transistor P3 is electrically connected to the enable signal input terminal EM, and a first terminal of the third switching transistor P3 is electrically connected to the first power supply signal input terminal PVDD.
Specifically, fig. 4 is a timing diagram applicable to the pixel circuit shown in fig. 3, and the operation process of the pixel circuit is described with reference to fig. 3 and 4, where each transistor in the pixel circuit may be a P-type transistor or an N-type transistor, as long as the first terminal and the second terminal of the transistor can be turned on under the action of the control signal of the control terminal of the transistor, and the control terminal of each transistor is a low-level signal, the first terminal and the second terminal of the transistor are turned on; when the control end of the transistor is a high level signal, the first end and the second end of the transistor are switched off; in the data writing stage T1, the scanning signal input from the first scanning signal input terminal S1 is at a low level, the first switching transistor P1 is turned on, the data signal at the data signal input terminal Vdata is written into the first capacitor Cst1, because the enable signal input from the enable signal input terminal EM is at a high level, that is, the second switching transistor P2 and the third switching transistor P3 are both turned off, the data signal is written into only the first capacitor Cst1 at this time, even if the duration of the data writing stage T1 is short, the data signal can be sufficiently written into the first capacitor Cst1, and the undesirable problems such as black lumps will not occur, and at this time, the driving transistor P4 is not turned on with the led Le, and the led Le will not emit light by mistake; in the light emitting period T2, the scanning signal inputted from the first scanning signal input terminal S1 is at a high level, the first switching transistor P1 is turned off, and the signal inputted from the enable signal input terminal EM is at a low level, that is, the second switching transistor P2 and the third switching transistor P3 are both turned on, on one hand, the driving current outputted from the second terminal of the driving transistor P4 is transmitted to the first electrode of the light emitting diode Le, so as to drive the light emitting transistor Le to emit light, on the other hand, since the third switching transistor P3 is in an on state, the second capacitor Cst2 and the first capacitor Cst1 are both operated, and the second capacitor Cst2 is connected in parallel with the first capacitor Cst1, which is equivalent to increase the capacitance value of the equivalent storage capacitor in the pixel circuit, in the light emitting period T2, since the equivalent storage capacitor is larger, the control electrode of the driving transistor P4 can be maintained in a stable state for a longer time, even if the duration of the light emitting period T2 is longer, the stable light emission of the light emitting diode Le can be maintained, and the display effect is good when the light emitting diode Le is driven at low frequency.
Optionally, fig. 5 is a schematic circuit structure diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 5, the first switch module 101 includes a first switch transistor P1, the second switch module 102 includes a second switch transistor P2, the third switch module 103 includes a third switch transistor P3, the driving module 104 includes a driving transistor P4, the first storage module 105 includes a first capacitor Cst1, and the second storage module 106 includes a second capacitor Cst 2; the pixel circuit further includes a fourth switching transistor P5, a fifth switching transistor P6, a sixth switching transistor P7, and a seventh switching transistor P8;
a control terminal of the first switching transistor P1 is electrically connected to the first scan signal input terminal S1, a first terminal of the first switching transistor P1 is electrically connected to the data signal input terminal Vdata, and a second terminal of the first switching transistor P1 is electrically connected to the first terminal of the driving transistor P4; a control terminal of the second switching transistor P2 is electrically connected to the enable signal input terminal EM, a first terminal of the second switching transistor P2 is electrically connected to the second terminal of the driving transistor P4, and a second terminal of the second switching transistor P2 is electrically connected to the first electrode H1 of the light emitting module 107; a control terminal of the third switching module P3 is electrically connected to the enable signal input terminal EM, a first terminal of the third switching module P3 is electrically connected to the first power signal input terminal PVDD, and a second terminal of the third switching module P3 is electrically connected to a first terminal of the second capacitor Cst 2; a first terminal of the driving transistor P4 is electrically connected to the second terminal I3 of the fourth switching transistor P5; a first terminal of the first capacitor Cst1 is electrically connected to the first power signal input terminal PVDD, and a second terminal of the first capacitor Cst1 is electrically connected to the control terminal of the driving transistor P4; a second terminal of the second capacitor Cst2 is electrically connected to the control terminal of the driving transistor P4; a control terminal I1 of the fourth switching transistor P5 is electrically connected to the enable signal input terminal EM, and a first terminal I2 of the fourth switching transistor P5 is electrically connected to the first power supply signal input terminal PVDD; a control terminal J1 of the fifth switching transistor P6 is electrically connected to the second scan signal input terminal S2, a first terminal J2 of the fifth switching transistor P6 is electrically connected to a control terminal of the driving transistor P4, and a second terminal J3 of the fifth switching transistor P6 is electrically connected to a second terminal of the driving transistor P4; a control terminal K1 of the sixth switching transistor P7 is electrically connected to the second scan signal input terminal S2, a first terminal K2 of the sixth switching transistor P7 is electrically connected to the control terminal of the driving transistor P4, and a second terminal K3 of the sixth switching transistor P7 is electrically connected to the initialization signal input terminal Vref; a control terminal L1 of the seventh switching transistor P8 is electrically connected to the second scan signal input terminal S2, a first terminal L2 of the seventh switching transistor P8 is electrically connected to the initialization signal input terminal Vref, and a second terminal L3 of the seventh switching transistor P8 is electrically connected to the first electrode H1 of the light emitting module 107.
Specifically, fig. 6 is another timing diagram applicable to the pixel circuit shown in fig. 5, and with reference to fig. 5 and fig. 6, during the initialization period Tc, the scan signal input by the second scan signal input terminal S2 is at a low level, while the signals input by the first scan signal input terminal S1 and the enable signal input terminal EM are both at a high level, at this time, only the sixth switching transistor P7 and the seventh switching transistor P8 are turned on, the initialization signal input by the initialization signal input terminal Vref is respectively input to the control terminal of the driving transistor P4 and the first electrode of the light emitting diode Le, and the control terminal of the driving transistor P4 and the first electrode of the light emitting diode Le are respectively initialized; in the data writing phase T1, the signal inputted from the second scan signal input terminal S2 is at a high level, the signal inputted from the first scan signal input terminal S1 is at a low level, and the data signal inputted from the data signal input terminal Vdata can be written into the control terminal of the driving transistor P4, in the data writing phase T1, the first switching transistor P1, the driving transistor P4 and the fifth switching transistor P6 are all turned on, and the data signal is written into the first capacitor Cst1 through the first switching transistor P1, the driving transistor P4 and the fifth switching transistor P6, and the potential at the control terminal of the driving transistor P4 is gradually increased, and when the potential is increased to turn off the driving transistor P4, the data signal is no longer written into the first capacitor Cst1, so that the compensation of the threshold voltage of the driving transistor P4 is completed, and the driving current outputted from the driving transistor P4 is independent of the threshold voltage of the driving transistor P4, thereby improving the light emitting stability of the light emitting diode Le; and because the enable signal input at the enable signal input terminal EM is at a high level, that is, the third switching transistor P3 is turned off, the data signal is only written into the first capacitor Cst1 at this time, even if the duration of the data writing phase T1 is short, the data signal can be sufficiently written into the first capacitor Cst1 without generating the undesirable problems such as black clusters, and at this time, the driving transistor P4 and the light emitting diode Le are not turned on, and the light emitting diode Le does not emit light by mistake. In the light emitting period T2, the signals at the input terminals of the first scan signal input terminal S1 and the second scan signal input terminal S2 are all at high level, and the enable signal input at the enable signal input terminal EM is at low level, at this time, the fourth switching transistor P5, the second switching transistor P2 and the third switching transistor P3 are all turned on, on one hand, the driving current output from the second terminal of the driving transistor P4 is transmitted to the first electrode of the light emitting diode Le, so as to drive the light emitting diode Le to emit light, on the other hand, since the third switching transistor P3 is in the on state, the second capacitor Cst2 and the first capacitor Cst1 are both operated, and the second capacitor Cst2 is connected in parallel with the first capacitor Cst1, which is equivalent to increase the capacitance value of the equivalent storage capacitor in the pixel circuit, in the light emitting period T2, since the equivalent storage capacitor is large, the control electrode of the driving transistor P4 can be maintained in a stable state for a long time, that is, even if the duration of the light emitting period T2 is long, the stable light emission of the light emitting diode Le can be maintained, and the display effect is good when the light emitting diode Le is driven at a low frequency.
Optionally, the charge storage performance of the first memory module is the same as the charge storage performance of the second memory module.
Illustratively, the first storage module may employ a first capacitor Cst1, the second storage module may employ a second capacitor Cst2, the capacitance value of the first capacitor Cst1 may be set to 50fF, the capacitance value of the second capacitor Cst2 may be set to 50fF, and when the driving frequency is 10Hz, if the prior art scheme is employed, the Flicker value is 23.3%; by adopting the technical scheme of the embodiment, the Flicker value is only 11.11%, so that the display effect of the display panel is greatly improved.
Fig. 7 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and referring to fig. 7, the display panel includes a substrate; a plurality of pixel circuits as provided in any of the embodiments of the present invention are located on a substrate.
Alternatively, as shown in fig. 7, the first storage module includes a first capacitor Cst1, and the second storage module includes a second capacitor Cst 2; the first plate of the first capacitor Cst1 is disposed at the same layer as the first plate of the second capacitor Cst2, and the first plate of the first capacitor Cst1 serves as the second terminal of the first memory module.
Specifically, the display panel may include an active layer, a gate layer, a capacitor metal layer, a source/drain metal layer, and a power metal layer, which are sequentially stacked, the second switching transistor P2 formed in the layers is electrically connected to the anode 202 of the light emitting module 107 to provide a driving current, the second switching transistor P2 includes an active layer 2011, a gate 2012, a first pole 2013, and a second pole 2014; the third switching transistor P3 includes an active layer 301, a gate electrode 302, a first electrode 303, and a second electrode 304, the first electrode 303 is connected to a power metal electrode 305 in a power metal layer through a via hole, and the first electrode 303 and the second electrode 304 of the third switching transistor P3 are formed in a capacitor metal layer. The display panel may further include a first metal structure 401, a second metal structure 402, and a third metal structure 403, the second metal structure 402 overlaps the first metal structure 401 to form a second capacitor Cst2, the third metal structure 403 overlaps the first metal structure 401 to form a first capacitor Cst1, and the first plate of the first capacitor Cst1 and the first plate of the second capacitor Cst2 are integrated metal structures, that is, the first plate of the first capacitor Cst1 and the first plate of the second capacitor Cst2 may both be formed by the first metal structure 401, thereby simplifying layout design difficulty; further, the first metal structure 401 may be disposed in the gate layer and may be composed of a portion of a metal electrode extending from the control electrode of the first transistor P1 (not shown), so as to further facilitate simplification of layout design difficulty.
Optionally, with continued reference to fig. 7, the second plate of the first capacitor Cst1 is disposed in the same layer as the second plate of the second capacitor Cst 2. Specifically, the second metal structure 402 and the third metal structure 403 may both be located in the capacitor metal layer. In addition, the second metal structure 402 may be formed by a part of the metal electrode extending from the second pole 304 of the third switching transistor P3, so that it is not necessary to electrically connect the second metal structure 402 to the second pole 304 through a via hole, which simplifies layout design difficulty and reduces design cost. And the third metal structure 403 may be formed by a part of the metal electrode extending from the first electrode 303 of the third switching transistor P3, so that it is not necessary to electrically connect the third metal structure 403 with the first electrode 303 through a via hole, which simplifies layout design difficulty and reduces design cost.
Fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present invention, and referring to fig. 8, a display device 20 includes a display panel 19 according to any embodiment of the present invention, and the display device may be a mobile phone, a tablet, a computer, or a wearable device.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A pixel circuit is characterized by comprising a first switch module, a second switch module, a third switch module, a driving module, a first storage module, a second storage module and a light-emitting module;
the control end of the first switch module is electrically connected with the first scanning signal input end and is used for writing data voltage into the control end of the driving module according to the scanning signal of the first scanning signal input end;
the driving module is used for outputting driving current according to the voltage of the control end;
the control end of the second switch module is electrically connected with the enable signal input end, and the second switch module is used for conducting the driving module and the light-emitting module according to an enable signal input by the enable signal input end;
the light emitting module is used for responding to the driving current to emit light;
the first storage module is electrically connected between the first power signal input end and the control end of the driving module;
the second storage module and the third switch module are connected in series between the control end of the driving module and the first power signal input end, and the control end of the third switch module is electrically connected with the enable signal input end.
2. The pixel circuit according to claim 1, wherein the second storage block has the same charge storage performance as the first storage block.
3. The pixel circuit according to claim 1,
the first end of the second storage module is electrically connected with the second end of the third switch module, and the second end of the second storage module is electrically connected with the control end of the driving module;
and the first end of the third switch module is electrically connected with the first power supply signal input end.
4. The pixel circuit according to claim 1, wherein the first switching module comprises a first switching transistor, the second switching module comprises a second switching transistor, the third switching module comprises a third switching transistor, and the driving module comprises a driving transistor; the first storage module comprises a first capacitor, and the second storage module comprises a second capacitor;
the control end of the first switching transistor is electrically connected with the first scanning signal input end, the first end of the first switching transistor is electrically connected with the data signal input end, and the second end of the first switching transistor is electrically connected with the control end of the driving transistor;
the control end of the second switching transistor is electrically connected with the enable signal input end, the first end of the second switching transistor is electrically connected with the second end of the driving transistor, and the second end of the second switching transistor is electrically connected with the first electrode of the light-emitting module;
the first end of the driving transistor is electrically connected with the first power supply signal input end;
the first end of the first capacitor is electrically connected with the first power signal input end, and the second end of the first capacitor is electrically connected with the control end of the driving transistor;
the first end of the second capacitor is electrically connected with the second end of the third switching transistor, and the second end of the second capacitor is electrically connected with the control end of the driving transistor;
the control end of the third switching transistor is electrically connected with the enable signal input end, and the first end of the third switching transistor is electrically connected with the first power supply signal input end.
5. The pixel circuit according to claim 1, wherein the first switching module comprises a first switching transistor, the second switching module comprises a second switching transistor, the third switching module comprises a third switching transistor, and the driving module comprises a driving transistor; the first storage module comprises a first capacitor, and the second storage module comprises a second capacitor;
the pixel circuit further comprises a fourth switching transistor, a fifth switching transistor, a sixth switching transistor and a seventh switching transistor;
a control end of the first switching transistor is electrically connected with the first scanning signal input end, a first end of the first switching transistor is electrically connected with the data signal input end, and a second end of the first switching transistor is electrically connected with the first end of the driving transistor;
the control end of the second switching transistor is electrically connected with the enable signal input end, the first end of the second switching transistor is electrically connected with the second end of the driving transistor, and the second end of the second switching transistor is electrically connected with the first electrode of the light-emitting module;
the control end of the third switching transistor is electrically connected with the enable signal input end, the first end of the third switching transistor is electrically connected with the first power supply signal input end, and the second end of the third switching transistor is electrically connected with the first end of the second capacitor;
the first end of the driving transistor is electrically connected with the second end of the fourth switching transistor;
the first end of the first capacitor is electrically connected with the first power signal input end, and the second end of the first capacitor is electrically connected with the control end of the driving transistor;
the second end of the second capacitor is electrically connected with the control end of the driving transistor;
the control end of the fourth switching transistor is electrically connected with the enable signal input end, and the first end of the fourth switching transistor is electrically connected with the first power supply signal input end;
a control end of the fifth switching transistor is electrically connected with the first scanning signal input end, a first end of the fifth switching transistor is electrically connected with a control end of the driving transistor, and a second end of the fifth switching transistor is electrically connected with a second end of the driving transistor;
the control end of the sixth switching transistor is electrically connected with the second scanning signal input end, the first end of the sixth switching transistor is electrically connected with the control end of the driving transistor, and the second end of the sixth switching transistor is electrically connected with the initialization signal input end;
a control end of the seventh switching transistor is electrically connected to the second scanning signal input end, a first end of the seventh switching transistor is electrically connected to the initialization signal input end, and a second end of the seventh switching transistor is electrically connected to the first electrode of the light emitting module.
6. A display panel, comprising:
a substrate;
a plurality of pixel circuits according to claim 1 on the substrate.
7. The display panel according to claim 6,
the first storage module comprises a first capacitor, and the second storage module comprises a second capacitor;
the first pole plate of the first capacitor and the first pole plate of the second capacitor are arranged on the same layer, and the first pole plate of the first capacitor is used as the second end of the first storage module.
8. The display panel according to claim 7,
the second polar plate of the first capacitor and the second polar plate of the second capacitor are arranged in the same layer.
9. The display panel according to claim 8,
the display panel comprises an active layer, a grid layer, a capacitance metal layer and a source drain layer which are sequentially stacked;
the second plate of the first capacitor is positioned on the capacitor metal layer and is multiplexed as the first metal electrode of the third switching transistor;
and the second plate of the second capacitor is positioned on the capacitor metal layer and is multiplexed as a second metal electrode of the third switching transistor.
10. The display panel according to claim 7,
the first polar plate of the first capacitor and the first polar plate of the second capacitor are of an integrated metal structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911305020.9A CN110930949A (en) | 2019-12-17 | 2019-12-17 | Pixel circuit and display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911305020.9A CN110930949A (en) | 2019-12-17 | 2019-12-17 | Pixel circuit and display panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110930949A true CN110930949A (en) | 2020-03-27 |
Family
ID=69863080
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911305020.9A Pending CN110930949A (en) | 2019-12-17 | 2019-12-17 | Pixel circuit and display panel |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110930949A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112382237A (en) * | 2020-11-27 | 2021-02-19 | 京东方科技集团股份有限公司 | Pixel circuit, driving method thereof, display substrate and display device |
| CN112447140A (en) * | 2020-11-30 | 2021-03-05 | 武汉天马微电子有限公司 | Organic light emitting display panel and display device |
| TWI773313B (en) * | 2021-05-11 | 2022-08-01 | 友達光電股份有限公司 | Pixel circuit and driving method thereof |
Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1741114A (en) * | 2004-08-26 | 2006-03-01 | 三星Sdi株式会社 | Capacitor circuit and display device and display ddrive circuit |
| CN1779767A (en) * | 2004-11-22 | 2006-05-31 | 三星Sdi株式会社 | Pixel and luminescent display device |
| CN1932940A (en) * | 2005-09-16 | 2007-03-21 | 株式会社半导体能源研究所 | Display device and driving method of display device |
| KR100911981B1 (en) * | 2008-03-04 | 2009-08-13 | 삼성모바일디스플레이주식회사 | Pixel and organic light emitting display using the same |
| CN102163403A (en) * | 2010-02-24 | 2011-08-24 | 索尼公司 | Pixel circuit, display device, method of driving the display device, and electronic unit |
| CN102194404A (en) * | 2010-03-16 | 2011-09-21 | 三星移动显示器株式会社 | Pixel, pixel circuit and organic light emitting display including the same |
| CN105679792A (en) * | 2014-12-06 | 2016-06-15 | 乐金显示有限公司 | Organic light emitting display device |
| CN106023891A (en) * | 2016-07-22 | 2016-10-12 | 京东方科技集团股份有限公司 | Pixel circuit, driving method thereof and display panel |
| US9536472B2 (en) * | 2015-01-27 | 2017-01-03 | Samsung Display Co., Ltd. | Display device and repairing method thereof |
| CN107170409A (en) * | 2017-07-18 | 2017-09-15 | 京东方科技集团股份有限公司 | A kind of image element circuit and display panel |
| CN107403804A (en) * | 2016-05-17 | 2017-11-28 | 群创光电股份有限公司 | Display device |
| CN109410778A (en) * | 2018-10-31 | 2019-03-01 | 武汉天马微电子有限公司 | Display panel and display device |
| CN109545129A (en) * | 2017-09-21 | 2019-03-29 | 三星显示有限公司 | Display device |
| CN110136648A (en) * | 2019-05-14 | 2019-08-16 | 深圳市华星光电半导体显示技术有限公司 | Pixel circuit and OLED display panel |
-
2019
- 2019-12-17 CN CN201911305020.9A patent/CN110930949A/en active Pending
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1741114A (en) * | 2004-08-26 | 2006-03-01 | 三星Sdi株式会社 | Capacitor circuit and display device and display ddrive circuit |
| CN1779767A (en) * | 2004-11-22 | 2006-05-31 | 三星Sdi株式会社 | Pixel and luminescent display device |
| CN1932940A (en) * | 2005-09-16 | 2007-03-21 | 株式会社半导体能源研究所 | Display device and driving method of display device |
| KR100911981B1 (en) * | 2008-03-04 | 2009-08-13 | 삼성모바일디스플레이주식회사 | Pixel and organic light emitting display using the same |
| CN102163403A (en) * | 2010-02-24 | 2011-08-24 | 索尼公司 | Pixel circuit, display device, method of driving the display device, and electronic unit |
| CN102194404A (en) * | 2010-03-16 | 2011-09-21 | 三星移动显示器株式会社 | Pixel, pixel circuit and organic light emitting display including the same |
| CN105679792A (en) * | 2014-12-06 | 2016-06-15 | 乐金显示有限公司 | Organic light emitting display device |
| US9536472B2 (en) * | 2015-01-27 | 2017-01-03 | Samsung Display Co., Ltd. | Display device and repairing method thereof |
| CN107403804A (en) * | 2016-05-17 | 2017-11-28 | 群创光电股份有限公司 | Display device |
| CN106023891A (en) * | 2016-07-22 | 2016-10-12 | 京东方科技集团股份有限公司 | Pixel circuit, driving method thereof and display panel |
| CN107170409A (en) * | 2017-07-18 | 2017-09-15 | 京东方科技集团股份有限公司 | A kind of image element circuit and display panel |
| CN109545129A (en) * | 2017-09-21 | 2019-03-29 | 三星显示有限公司 | Display device |
| CN109410778A (en) * | 2018-10-31 | 2019-03-01 | 武汉天马微电子有限公司 | Display panel and display device |
| CN110136648A (en) * | 2019-05-14 | 2019-08-16 | 深圳市华星光电半导体显示技术有限公司 | Pixel circuit and OLED display panel |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112382237A (en) * | 2020-11-27 | 2021-02-19 | 京东方科技集团股份有限公司 | Pixel circuit, driving method thereof, display substrate and display device |
| CN112447140A (en) * | 2020-11-30 | 2021-03-05 | 武汉天马微电子有限公司 | Organic light emitting display panel and display device |
| CN112447140B (en) * | 2020-11-30 | 2021-09-21 | 武汉天马微电子有限公司 | Organic light emitting display panel and display device |
| TWI773313B (en) * | 2021-05-11 | 2022-08-01 | 友達光電股份有限公司 | Pixel circuit and driving method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104933993B (en) | Pixel-driving circuit and its driving method, display device | |
| CN110473503B (en) | Pixel circuit, display panel and display device | |
| CN106991968B (en) | Pixel compensation circuit, pixel compensation method and display device | |
| US11289004B2 (en) | Pixel driving circuit, organic light emitting display panel and pixel driving method | |
| CN109308872B (en) | Pixel circuit and display substrate | |
| US10997920B2 (en) | Pixel drive circuit and drive method, and display apparatus | |
| CN107437399B (en) | A kind of pixel compensation circuit | |
| CN104658480A (en) | Pixel circuit, pixel circuit driving method and display device | |
| CN107871471B (en) | Pixel driving circuit, driving method thereof and display device | |
| CN110930949A (en) | Pixel circuit and display panel | |
| CN113707089B (en) | Pixel driving circuit, display panel and display device | |
| CN109712568B (en) | Pixel driving circuit and driving method thereof, display panel and display device | |
| CN109301088B (en) | Organic light-emitting display panel and organic light-emitting display device | |
| CN112669765B (en) | Breakpoint self-repairing pixel driving circuit, driving method and display device | |
| US9384693B2 (en) | Pixel circuit and display apparatus using the same | |
| CN111710297B (en) | Pixel driving circuit, driving method thereof and display panel | |
| CN109256086A (en) | Pixel circuit and its driving method, array substrate, display panel | |
| CN111916028A (en) | Pixel circuit, driving method thereof, display panel and electronic equipment | |
| CN114023237B (en) | Pixel circuit and display panel | |
| CN113205773A (en) | Display panel and display device | |
| CN114842802B (en) | Pixel driving circuit, display panel and display device | |
| CN114299847B (en) | Light emitting device driving circuit and display panel | |
| CN114927095A (en) | Pixel circuit, driving method thereof and display panel | |
| CN112837653A (en) | Pixel driving circuit and display panel | |
| CN110910835A (en) | Pixel driving circuit and pixel driving method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200327 |
|
| RJ01 | Rejection of invention patent application after publication |