CN114277433A - Growth method of single crystal annealing product applied to Hanhong single crystal furnace - Google Patents
Growth method of single crystal annealing product applied to Hanhong single crystal furnace Download PDFInfo
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Abstract
The invention provides a growth method of a single crystal annealing product applied to a Hanhong single crystal furnace, which belongs to the technical field of single crystal annealing technology.A single crystal furnace is internally provided with an inner heat shield and a water cooling jacket, wherein the inner heat shield is positioned above a silicon solution, the angle formed by the inner wall of the lower end of the inner heat shield and the axis in the single crystal furnace is 22.5-30 degrees, the water cooling jacket is positioned above the inner heat shield, the water cooling jacket is connected with the inner wall of the single crystal furnace, and the height from the water cooling jacket to the liquid level of the silicon solution is 100-300 mm; argon is introduced into the single crystal furnace, the pulling speed of the single crystal rod pulled out of the silicon solution is 1mm/min-1.5mm/min, a thermal environment with temperature gradient is established in the single crystal furnace, and in the process of pulling out the single crystal rod from the silicon solution, the edge temperature of the single crystal rod is close to the central temperature, so that the single crystal rod is pulled out of the silicon solution at the preset pulling speed, the growing interface of the whole single crystal rod is more flat when the temperature is reduced and solidified, and the COP formation with high density and small particle diameter is facilitated.
Description
Technical Field
The invention relates to the technical field of single crystal annealing processes, in particular to a growth method of a single crystal annealing product applied to a Hanhong-hong single crystal furnace.
Background
Along with the continuous reduction of the characteristic line width in an integrated circuit, the requirement of the integrated circuit on the surface quality of a silicon wafer is higher and higher, and besides metal pollution, vacancy defect (COP) is also one of main defects influencing the surface quality of the silicon wafer; if COP exists on the near surface of the silicon wafer, the GOI (Gate Oxide integration) of the integrated circuit is seriously influenced.
In the prior art, three methods are mainly used for eliminating silicon chip COP, namely reducing the pulling speed of monocrystalline silicon, annealing at high temperature and extending. In the high-temperature annealing, if the high-temperature annealing process is not good, COP with larger particle diameter and low density is easily generated, so that COP on the near surface of the silicon wafer cannot be adsorbed.
Disclosure of Invention
In view of the above, it is necessary to provide a method for growing a single crystal annealed product applied to a hanhong-rainbow single crystal furnace, which can reduce the COP of a silicon wafer near the surface.
The technical scheme adopted by the invention for solving the technical problems is as follows:
a growth method of a single crystal annealing product applied to a Hanhong single crystal furnace comprises the following steps:
s1: arranging an inner heat shield and a water cooling jacket in a single crystal furnace, wherein the inner heat shield is positioned above the silicon solution, the angle formed by the inner wall of the lower end of the inner heat shield and the axis in the single crystal furnace is 22.5-30 degrees, the water cooling jacket is positioned above the inner heat shield, the water cooling jacket is connected with the inner wall of the single crystal furnace, and the height from the water cooling jacket to the liquid level of the silicon solution is 100-300 mm;
s2: and introducing argon into the single crystal furnace, pulling the single crystal bar out of the silicon solution at a pulling speed of 1-1.5 mm/min, cutting the single crystal bar into silicon wafers, and annealing to reduce COP (coefficient of performance) on the near surface of the silicon wafers.
Preferably, in step S1, the water-cooling jacket is cylindrical, and the upper end of the water-cooling jacket is connected to the inner wall of the single crystal furnace.
Preferably, after the step S2, a step S3 is further included, and the step S3 is specifically: and cutting the crystal bar into silicon wafers, and annealing at a preset temperature in the atmosphere of protective gas for a preset time.
Preferably, in step S3, the shielding gas is argon.
Preferably, in step S3, the predetermined temperature is 1000 ℃ to 1200 ℃, and the predetermined holding time is 1h to 4 h.
Compared with the prior art, the invention has the beneficial effects that:
the invention makes the angle formed by the lower end inner wall of the inner heat shield and the axis in the single crystal furnace be 22.5-30 degrees, and makes the height of the water cooling jacket from the liquid level of the silicon solution be 100-300 mm, further establishes the thermal environment with the temperature gradient approximate to 1, and provides sufficient argon atmosphere in the single crystal furnace, when the single crystal rod is pulled out from the silicon solution, the edge temperature of the crystal rod is close to the central temperature, so that the single crystal rod is pulled out from the silicon solution at the preset pulling speed, the interface of the whole crystal rod growing in the cooling solidification is flatter, the COP formation with high density and small particle diameter is more facilitated, and the single crystal rod is filled with interstitial oxygen, and then is annealed at high temperature, so that the COP and interstitial oxygen are combined to generate BMD, the generated BMD absorbs the impurities on the near surface of the silicon wafer and the COP which is not combined to the center of the silicon wafer, so that the defect number on the near surface of the silicon wafer is reduced, and the quality of the silicon chip is improved.
Drawings
FIG. 1 is a sectional view of a thermal field of a single crystal furnace.
Fig. 2 is a graph of COP particle diameter for the first example.
Fig. 3 is a COP density distribution diagram of the first embodiment.
FIG. 4 is a graph of the oxygen content of the silicon wafer of the first example.
FIG. 5 is a graph showing the near-surface COP distribution of the annealed silicon wafer according to the first embodiment.
FIG. 6 is a graph comparing the number of COP before and after annealing in the first embodiment.
FIG. 7 is an electron micrograph of BMD density at a center depth of 400 μm to 500 μm for a silicon wafer according to example two.
FIG. 8 is an electron micrograph of BMD density at a center depth of 300 μm to 200 μm for a silicon wafer according to example two.
FIG. 9 is an electron micrograph of the BMD density distribution of the silicon wafer of comparative example ranging from 0 μm to 200 μm.
In the figure: the single crystal furnace comprises a single crystal furnace 10, an inner heat shield 100, an outer heat shield 200, a heat shield adiabatic material 300 and a water cooling jacket 400.
Detailed Description
The technical solutions and effects of the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings of the present invention.
Referring to fig. 1, a method for growing a single crystal annealed product applied to a hanhong se single crystal furnace includes the steps of:
s1: arranging an inner heat shield 100 and a water cooling jacket 400 in a single crystal furnace, wherein the inner heat shield 100 is positioned above a silicon solution, the angle formed by the inner wall of the lower end of the inner heat shield 100 and the axis in the single crystal furnace is 22.5-30 degrees, the water cooling jacket 400 is positioned above the inner heat shield 100, the water cooling jacket 400 is connected with the inner wall of the single crystal furnace, and the height from the water cooling jacket 400 to the liquid level of the silicon solution is 100-300 mm;
s2: introducing argon into the single crystal furnace, and pulling out the single crystal rod from the silicon solution at a pulling speed of 1-1.5 mm/min so as to generate COP (coefficient of performance) with small particle diameter and large quantity in the single crystal rod to obtain the crystal rod; and cutting the crystal bar into silicon wafers and annealing to reduce COP (coefficient of performance) of the near surfaces of the silicon wafers.
Specifically, the angle formed by the inner wall of the lower end of the inner heat shield 100 and the axis in the single crystal furnace is 22.5-30 degrees, the height of the water cooling jacket 400 from the liquid level of the silicon solution is 100-300 mm, and then a thermal environment with a temperature gradient of approximately 1 is established, so that the ratio of the central temperature to the edge temperature of the crystal bar is close to 1 in the process of drawing the crystal bar, and more specifically, the edge temperature and the central temperature of the crystal bar at the same level are close to each other.
Specifically, the angle formed by the inner wall of the lower end of the inner heat shield 100 and the axis in the single crystal furnace is 22.5-30 degrees, which is specifically explained as follows: referring to fig. 1, the inner wall of the inner heat shield 100 is sequentially formed by a first circular truncated cone, a cylinder and a second circular truncated cone from top to bottom, and an included angle a between the side wall of the second circular truncated cone and the axis of the single crystal furnace in the cross-sectional view of fig. 1 is an angle formed between the inner wall of the lower end of the inner heat shield 100 and the axis of the single crystal furnace; the inner heat shield 100 is connected with the outer heat shield 200 through the heat shield heat insulation material 300, and the lower end of the inner heat shield 100 is inclined at a predetermined angle, so that the thickness of the lower part of the heat shield heat insulation material 300 between the inner heat shield 100 and the outer heat shield 200 is increased, the reflected light of heat on the liquid surface is transmitted to the crystal bar less, and the heat insulation effect is better.
Compared with the prior art, the invention has the beneficial effects that:
the invention makes the angle formed by the lower end inner wall of the inner heat shield 100 and the axis in the single crystal furnace be 22.5-30 degrees, and makes the height of the water cooling jacket 400 from the liquid level of the silicon solution be 100-300 mm, further establishes the thermal environment with the temperature gradient approximate to 1, and provides sufficient argon atmosphere in the single crystal furnace, when the single crystal rod is pulled out from the silicon solution, the edge temperature of the crystal rod is close to the central temperature, so that the single crystal rod is pulled out from the silicon solution at the preset pulling speed, the interface grown when the whole crystal rod is cooled and solidified is more flat, the COP formation with high density and small particle diameter is more facilitated, and the single crystal rod is filled with the interstitial oxygen and is annealed at high temperature, so that the COP and the interstitial oxygen are combined to generate BMD, the generated BMD absorbs the impurities on the near surface of the silicon wafer and the COP which is not combined to the center of the silicon wafer, so that the defect number on the near surface of the silicon wafer is reduced, and the quality of the silicon chip is improved.
Further, in step S1, the water cooling jacket 400 is cylindrical, and the upper end of the water cooling jacket 400 is connected to the inner wall of the single crystal furnace.
Further, after the step S2, a step S3 is further included, and the step S3 specifically includes: and cutting the crystal bar into silicon wafers, and annealing at a preset temperature in the atmosphere of protective gas for a preset time.
Specifically, during pulling of single-crystal silicon by the CZ method, by controlling the ratio V/G of the pulling rate V at the crystal interface and the axial temperature gradient G, i.e., the ratio of the pulling rate to the quotient of the center temperature/edge temperature of the ingot, the pulling rate V being the rate at which the grown single crystal is lifted upward out of the melt, and the axial temperature gradient G being a measure of the temperature change at the crystal interface in the crystal lifting direction, when the V/G quotient is large, the holes form agglomerates verifiable as COPs, and when the V/G quotient is low, i.e., the supersaturation degree of the holes is slightly lower than that required for forming COPs, seeds of OSF defects (oxidation-induced stacking faults) are formed, so that the pulling rate needs to be strictly controlled so that agglomerates of COPs are generated in the ingot body.
Further, in step S3, the shielding gas is argon.
Further, in step S3, the predetermined temperature is 1000 ℃ to 1200 ℃, the predetermined holding time is 1h to 4h, and when the temperature of the silicon wafer is raised to 1200 ℃ or higher, the bonded body of oxygen and COP is decomposed, so that interstitial silicon atoms existing on the crystal surface fill up the COP, and a perfect single crystal is realized.
Specifically, it is further illustrated by the following examples;
example one, experimental group: when the included angle between the inner heat shield 100 and the axis in the single crystal furnace is 22.5 degrees, the height between the water cooling jacket 400 and the lower surface and the liquid level is 100mm, argon is introduced, and the crystal bar is pulled out at the pulling speed of 1.5 mm/min. Comparison group: the included angle between the inner heat shield 100 and the axis of the single crystal furnace is 40 degrees, the height between the water cooling jacket 400 and the lower surface and the liquid level is 400mm, argon is introduced, the single crystal rod is pulled out at the pulling speed of 0.9mm/min, and the central temperature and the edge temperature of different positions of the single crystal rod are detected, as shown in table 1:
TABLE 1
And (4) conclusion: detect central temperature, the edge temperature of crystal bar in position department at crystal bar 1300, 1350, through detecting, after the contained angle of axis in heat shield 100 and the single crystal growing furnace in the change, the ratio of the Gc/Ge of different positions departments of crystal bar all is close 1, make the interface that whole crystal bar grows when the cooling solidifies regional more flat, and the brilliant process growth interface of crystal bar can not become the shape to the indent, and then whole crystal bar refrigerated in-process temperature is unanimous, do benefit to the formation of defect.
Referring to fig. 2, fig. 3, and fig. 4, it can be seen that the diameter of the obtained COP particles is small, the density is high, and the oxygen content of the adjusted silicon wafer is increased, so that the high-density COP particles with small particle diameter are combined with oxygen to generate BMD.
Specifically, the ingot is sliced, argon is introduced, and annealing is carried out at 1200 ℃ for 4 hours to obtain an annealed silicon wafer, please refer to fig. 5 and 6, and the silicon wafer is detected by a surface particle detector, so that the COP (coefficient of performance) quantity of the near surface of the silicon wafer is greatly reduced, and the quality of the silicon wafer is improved.
Specifically, when the BMD detection needs to be performed on a silicon wafer, the ingot is cut into the silicon wafer to obtain an original silicon wafer, the original silicon wafer is not annealed, and a pretreatment step is performed first, where the pretreatment step specifically includes: heating an original silicon wafer to a first preset temperature at a first preset heating rate, introducing a first preset gas, reacting for a first preset time, and pretreating to obtain the original silicon wafer with a compact film so as to isolate the outward diffusion path of oxygen elements, vacancies and interstitial silicon in the original silicon wafer;
and then introducing a second preset gas into the original silicon wafer with the compact film, keeping the second preset time to uniformly diffuse the vacancy, the interstitial silicon and the interstitial oxygen in the original silicon wafer to obtain an intermediate silicon wafer, annealing the intermediate silicon wafer, and detecting the annealed intermediate silicon wafer under a microscope to obtain the number of BMDs in the silicon wafer.
Specifically, an original silicon wafer is heated to a first preset temperature at a first preset heating rate, a first preset gas is introduced to react for a first preset time, pretreatment is carried out to obtain the original silicon wafer with a compact film, a second preset gas is introduced to the original silicon wafer with the compact film, a second preset time is kept, and vacancies and interstitial oxygen in the original silicon wafer are uniformly diffused to obtain an intermediate silicon wafer; the silicon wafer is pretreated to prevent interstitial oxygen elements and vacancies in the silicon wafer from diffusing outwards, and the interstitial oxygen and the vacancies in the silicon wafer are diffused uniformly, so that uniform BMD is generated in the silicon wafer during annealing treatment.
Further, annealing the intermediate silicon wafer, wherein the annealing specifically comprises the following steps: annealing at 1000-1200 ℃ in the argon atmosphere, and keeping for 1-4 h to obtain the processed silicon wafer.
Further, the method comprises the following steps of performing a film removing step on the processed silicon wafer, wherein the film removing step specifically comprises the following steps: and removing the film generated on the surface of the processed silicon wafer, keeping the uniformity of the defect density in the body, and then splitting the silicon wafer for preferential corrosion to obtain the silicon wafer to be detected.
Further, the silicon wafer to be detected is detected, and the detecting step specifically comprises: and (4) placing the silicon wafer to be detected under a microscope for observation, and detecting the number of BMDs.
Further, in the step of preprocessing, the first preset heating rate is 50 ℃/s-100 ℃/s, the first preset temperature is 1000-1200 ℃, the first preset gas is nitrogen or oxygen, the pressure of the nitrogen or oxygen is 10bar-100bar, the first preset time is 1min-30min, the second preset gas is argon, the pressure of the argon is 10bar-100bar, and the second preset time is 5min-30 min; in the pretreatment step, the temperature rise rate needs to be strictly controlled, if the temperature rise rate is too slow or the temperature rises in a low-temperature region for too long, BMD nuclei are easily generated in the silicon wafer, so that the generation of BMD is influenced during subsequent heat treatment, when oxygen or nitrogen reacts on the surface of the silicon wafer for 1min to 30min, the introduction of oxygen or nitrogen is stopped immediately, the introduction of argon is switched, the phenomenon that an oxidation film or a nitride film generated on the surface of an original silicon wafer is too thick is avoided, and the introduction of argon is kept for a certain time, so that vacancies, interstitial silicon and interstitial oxygen in the original silicon wafer are uniformly diffused in the silicon wafer.
Specific nitrogen and oxygen can generate a compact nitride film, but in the process of generating an oxide film, oxygen can generate certain external diffusion, the defect density near the film can be reduced to a certain extent, and the formed nitride film can maintain the defect density near the film, even the defect number is increased, so that the defect distribution in a silicon body is more uniform.
Further, in the step of removing the film, the specific way of removing the film generated on the surface of the processed silicon wafer comprises: by chemical etching or mechanical polishing.
Further, the chemical agent for the chemical agent etching methodIs HF or HNO3。
Furthermore, the mechanical polishing method needs to remove the thickness of 10-80 μm on the front and back surfaces of the processed silicon wafer.
Further, in the step of removing the film, the agent for preferential corrosion is HF or HNO3Or Gu (NO)3）2Or AgNO3。
Furthermore, the original silicon wafer is formed by cutting monocrystalline silicon, and the thickness of the original silicon wafer is 0.5mm-3 mm.
The specific description is given by example two and comparative example.
Example two: cutting the monocrystalline silicon into silicon wafers with the thickness of 1mm, rapidly heating the silicon wafers to 1100 ℃ at a speed of 80 ℃/s, introducing 50bar of nitrogen, reacting for 20min, introducing 60bar of argon after reacting for 20min, keeping for 10min, then cooling to 800 ℃ at a speed of 20 ℃/min, reacting for 4h, heating to 1000 ℃ at a speed of 7 ℃/min after reacting for 4h to obtain treated silicon wafers, then mechanically polishing the treated silicon wafers, removing the thickness of 30 mu m on the front and back surfaces of the silicon wafers to be treated, then splitting the silicon wafers into halves and halves, and detecting under a microscope at different depths, wherein the distribution of BMD in the silicon wafers in the specific embodiments is shown in figures 7 and 8.
Comparative example: cutting the monocrystalline silicon into silicon wafers with the thickness of 1mm, heating the silicon wafers to 800 ℃, reacting for 4 hours, heating to 1000 ℃ at the speed of 7 ℃/min after reacting for 4 hours to obtain silicon wafers to be treated, mechanically polishing the silicon wafers, removing the thickness of 30 mu m on the front and back surfaces of the silicon wafers to be treated, splitting the silicon wafers into halves, and detecting under a microscope, wherein the distribution of BMD in the silicon wafers is shown in fig. 9.
In conclusion, through pretreatment between heat treatments, a nitride film is firstly generated on the surface of the silicon wafer under the condition of high temperature so as to isolate the outward diffusion of oxygen elements, vacancies and interstitial silicon in the silicon wafer, then argon is introduced into the silicon wafer with a compact film, and the argon is kept for a certain time, so that the vacancies, interstitial silicon and interstitial oxygen in the silicon wafer are uniformly diffused, and further, uniform BMD is generated in the silicon wafer in the process of subsequent heat treatment, and the detection result is more accurate during detection
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.
Claims (5)
1. A growth method of a single crystal annealing product applied to a Hanhong single crystal furnace is characterized by comprising the following steps:
s1: arranging an inner heat shield and a water cooling jacket in a single crystal furnace, wherein the inner heat shield is positioned above the silicon solution, the angle formed by the inner wall of the lower end of the inner heat shield and the axis in the single crystal furnace is 22.5-30 degrees, the water cooling jacket is positioned above the inner heat shield, the water cooling jacket is connected with the inner wall of the single crystal furnace, and the height from the water cooling jacket to the liquid level of the silicon solution is 100-300 mm;
s2: argon is introduced into the single crystal furnace, and the pulling speed of pulling the single crystal bar out of the silicon solution is 1mm/min-1.5 mm/min.
2. The method for growing a single crystal annealed product applied to a hanhong se single crystal furnace as claimed in claim 1, wherein said water jacket is cylindrical and an upper end of said water jacket is connected to an inner wall of the single crystal furnace in step S1.
3. The method for growing a single crystal annealed product for use in a hanhong se single crystal furnace as claimed in claim 1, further comprising a step S3 after step S2, wherein the step S3 is specifically: and cutting the crystal bar into silicon wafers, and annealing at a preset temperature in the atmosphere of protective gas for a preset time.
4. The method for growing a single crystal annealed product for use in a hanhong rainbow single crystal furnace as claimed in claim 3, wherein said shielding gas is argon gas in step S3.
5. The method for growing a single crystal annealed product to be applied to a hanhong se single crystal furnace as set forth in claim 3, wherein the predetermined temperature is 1000 ℃ to 1200 ℃ and the predetermined holding time is 1h to 4h in step S3.
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Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1417386A (en) * | 2001-11-01 | 2003-05-14 | 北京有色金属研究总院 | Heat shielding method and heat shield for vertically pulling crystal furnace |
| CN101575731A (en) * | 2009-06-22 | 2009-11-11 | 上虞晶盛机电工程有限公司 | Vertical pulling silicon single crystal growing furnace with water-cooling jacket |
| CN201459276U (en) * | 2009-06-22 | 2010-05-12 | 上虞晶盛机电工程有限公司 | Czochralski silicon single crystal growing furnace with water cooling jacket |
| CN201901725U (en) * | 2010-12-13 | 2011-07-20 | 天津市环欧半导体材料技术有限公司 | Draft tube for growing silicon single crystal |
| CN102181925A (en) * | 2011-04-13 | 2011-09-14 | 任丙彦 | Growth process and device for growing IC-level silicon single crystal with low Fe content by czochralski method |
| CN204111931U (en) * | 2014-10-17 | 2015-01-21 | 包头市山晟新能源有限责任公司 | Guide shell |
| CN204251760U (en) * | 2014-10-31 | 2015-04-08 | 内蒙古中环光伏材料有限公司 | Thermal field of czochralski silicon |
| CN105297140A (en) * | 2015-09-10 | 2016-02-03 | 上海超硅半导体有限公司 | Silicon chip and annealing treatment method |
| CN105442037A (en) * | 2015-12-08 | 2016-03-30 | 西安交通大学 | High-speed single crystal growth device |
| CN207391599U (en) * | 2017-10-13 | 2018-05-22 | 北京北方华创真空技术有限公司 | A kind of crystal pulling furnace |
| CN207452294U (en) * | 2017-09-20 | 2018-06-05 | 内蒙古中环光伏材料有限公司 | A kind of bell with cooling device |
| CN113106546A (en) * | 2021-03-25 | 2021-07-13 | 徐州鑫晶半导体科技有限公司 | Guide cylinder for single crystal furnace, single crystal furnace and machining method of guide cylinder |
-
2021
- 2021-12-24 CN CN202111601688.5A patent/CN114277433B/en active Active
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1417386A (en) * | 2001-11-01 | 2003-05-14 | 北京有色金属研究总院 | Heat shielding method and heat shield for vertically pulling crystal furnace |
| CN101575731A (en) * | 2009-06-22 | 2009-11-11 | 上虞晶盛机电工程有限公司 | Vertical pulling silicon single crystal growing furnace with water-cooling jacket |
| CN201459276U (en) * | 2009-06-22 | 2010-05-12 | 上虞晶盛机电工程有限公司 | Czochralski silicon single crystal growing furnace with water cooling jacket |
| CN201901725U (en) * | 2010-12-13 | 2011-07-20 | 天津市环欧半导体材料技术有限公司 | Draft tube for growing silicon single crystal |
| CN102181925A (en) * | 2011-04-13 | 2011-09-14 | 任丙彦 | Growth process and device for growing IC-level silicon single crystal with low Fe content by czochralski method |
| CN204111931U (en) * | 2014-10-17 | 2015-01-21 | 包头市山晟新能源有限责任公司 | Guide shell |
| CN204251760U (en) * | 2014-10-31 | 2015-04-08 | 内蒙古中环光伏材料有限公司 | Thermal field of czochralski silicon |
| CN105297140A (en) * | 2015-09-10 | 2016-02-03 | 上海超硅半导体有限公司 | Silicon chip and annealing treatment method |
| CN105442037A (en) * | 2015-12-08 | 2016-03-30 | 西安交通大学 | High-speed single crystal growth device |
| CN207452294U (en) * | 2017-09-20 | 2018-06-05 | 内蒙古中环光伏材料有限公司 | A kind of bell with cooling device |
| CN207391599U (en) * | 2017-10-13 | 2018-05-22 | 北京北方华创真空技术有限公司 | A kind of crystal pulling furnace |
| CN113106546A (en) * | 2021-03-25 | 2021-07-13 | 徐州鑫晶半导体科技有限公司 | Guide cylinder for single crystal furnace, single crystal furnace and machining method of guide cylinder |
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