CN114256374A - Avalanche photodetector and preparation method thereof - Google Patents
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Abstract
The invention provides an avalanche photodetector and a preparation method thereof. Wherein, avalanche photodetector includes: a substrate, a surface of which includes a first semiconductor layer; the second semiconductor layer is positioned on the substrate, the first semiconductor layer comprises a first P-type doped region, a second P-type doped region, a third N-type doped region, a first intrinsic region, a third P-type doped region, a second intrinsic region, a second N-type doped region and a first N-type doped region which are sequentially arranged in a first direction, the dopant concentrations of the first P-type doped region to the third P-type doped region are sequentially decreased, the dopant concentrations of the first N-type doped region to the third N-type doped region are sequentially decreased, and the first direction is an electron flowing direction; the second semiconductor layer sequentially covers a part of a second P-type doped region, a third N-type doped region, a first intrinsic region and a third P-type doped region in the first direction, and the first N-type doped region is connected with the first electrode; the third P-type doped region is connected with the second electrode; the first N-type doped region is connected with the third electrode.
Description
Technical Field
The invention relates to the technical field of photonic integrated chip detection, in particular to an avalanche photodetector and a preparation method thereof.
Background
The avalanche photodetector is one of core devices of a silicon photon framework, has the function of realizing conversion from a low-power optical signal to an electric signal, and has the working principle that photogenerated carriers (hole electron pairs) generated by a photoelectric effect are rapidly accelerated when moving in a high electric field area, one or more times of collision can occur in the moving process, secondary and third new hole electron pairs are generated by a collision ionization effect, an avalanche multiplication effect is generated, the number of the carriers is rapidly increased, and accordingly a larger optical signal current is formed.
At present, a germanium-silicon material compatible with a CMOS process is widely used in a silicon photonic integrated chip to realize avalanche photodetection, which uses a silicon material as an optical waveguide and also as an avalanche gain region (also referred to as a multiplication region), and the germanium material absorbs photons. The defects of the structure of the existing germanium-silicon avalanche photodetector are as follows: firstly, an epitaxial monocrystalline silicon process is needed, and the manufacturing is relatively complex; secondly, the absorption region is usually doped by P or N type, and the doping can cause light absorption loss, thereby reducing the quantum efficiency of the detector; and thirdly, the absorption region and the multiplication region are not easy to independently adjust, the concentration precision of the doping region is higher, the process tolerance is low, and the gain bandwidth is not ideal easily. Therefore, the avalanche photodetector using the silicon germanium material is yet to be further improved.
Disclosure of Invention
In view of the above, embodiments of the present invention provide an avalanche photodetector and a method for manufacturing the same to solve at least one of the problems in the background art.
In order to achieve the purpose, the technical scheme of the invention is realized as follows:
an aspect of an embodiment of the present invention provides an avalanche photodetector, including:
a substrate, a surface of the substrate comprising a first semiconductor layer;
a second semiconductor layer over the first semiconductor layer, the second semiconductor layer being of a different material than the first semiconductor layer; wherein the content of the first and second substances,
the first semiconductor layer comprises a first P-type doped region, a second P-type doped region, a third N-type doped region, a first intrinsic region, a third P-type doped region, a second intrinsic region, a second N-type doped region and a first N-type doped region which are sequentially arranged in a first direction, the dopant concentrations of the first to third P-type doped regions are sequentially decreased, the dopant concentrations of the first to third N-type doped regions are sequentially decreased, and the first direction is the electron flowing direction of the avalanche photodetector;
the second semiconductor layer covers a part of the second P-type doped region, a part of the third N-type doped region, a part of the first intrinsic region and a part of the third P-type doped region in sequence along the first direction,
the first N-type doped region is connected with a first electrode; the third P-type doped region is connected with a second electrode; the first P-type doped region is connected with a third electrode.
In the above scheme, a first reverse bias voltage V is provided between the first electrode and the third electrode1And a second reverse bias voltage V is arranged between the first electrode and the second electrode2。
In the above scheme, the first semiconductor layer is made of silicon, and the second semiconductor layer is made of germanium, a germanium-silicon alloy, a III-V material, or an alloy thereof.
In the above scheme, the dopant concentration of the first P-type doped region or the first N-type doped region is 1 × 1020/cm3～5×1020/cm3The dopant concentration of the second P-type doped region or the second N-type doped region is 2 × 1017/cm3～5×1018/cm3The dopant concentration of the third P-type doped region or the third N-type doped region is 1.2 × 1017～4×1017/cm3。
In the above scheme, the size of the second intrinsic region in the first direction is 50nm to 800 nm.
In the above aspect, a dimension of the second semiconductor layer in the first direction is 150nm to 1500nm, a dimension in the second direction is 1 μm to 100 μm, and a dimension in the third direction is 150nm to 600nm, wherein the third direction is a direction perpendicular to the substrate, and the second direction is perpendicular to the third direction and perpendicular to the first direction.
The embodiment of the invention also provides a preparation method of the avalanche photodetector, which comprises the following steps:
providing a substrate, wherein the surface of the substrate comprises a first semiconductor layer;
executing a selective doping process to form a first P-type doped region, a second P-type doped region, a third N-type doped region, a first intrinsic region, a third P-type doped region, a second intrinsic region, a second N-type doped region and a first N-type doped region which are sequentially arranged on the first semiconductor layer along a first direction, wherein the dopant concentrations of the first to third P-type doped regions are sequentially decreased, and the dopant concentrations of the first to third N-type doped regions are sequentially decreased;
forming a second semiconductor layer, wherein the material of the second semiconductor layer is different from that of the first semiconductor layer, and the second semiconductor layer covers a part of the second P-type doped region, a part of the third N-type doped region, a part of the first intrinsic region and a part of the third P-type doped region in sequence in the first direction;
forming a first electrode, a second electrode and a third electrode which are arranged in a direction vertical to the plane direction of the substrate, wherein the first electrode is electrically connected with the first N-type doped region; the second electrode is electrically connected with the third P-type doped region, and the third electrode is electrically connected with the first P-type doped region;
the first direction is an electron flow direction of the avalanche photodetector.
In the above scheme, the first semiconductor layer is made of silicon, and the second semiconductor layer is made of germanium, a germanium-silicon alloy, a III-V material, or an alloy thereof.
In the above scheme, the dopant concentration of the first P-type doped region or the first N-type doped region is 1 × 1020/cm3～5×1020/cm3The dopant concentration of the second P-type doped region or the second N-type doped region is 2 × 1017/cm3～5×1018/cm3The dopant concentration of the third P-type doped region or the third N-type doped region is 1.2 × 1017～4×1017/cm3。
In the above aspect, the forming the first electrode, the second electrode, and the third electrode provided perpendicular to the substrate plane direction includes:
forming a capping layer capping the first semiconductor layer and the second semiconductor layer;
forming a first window, a second window and a third window respectively corresponding to the first N-type doped region, the third P-type doped region and the first P-type doped region;
and filling metal in the first window, the second window and the third window to form a first electrode, a second electrode and a third electrode.
The avalanche photodetector provided by the embodiment of the invention comprises: a substrate, a surface of the substrate comprising a first semiconductor layer; a second semiconductor layer over the first semiconductor layer, the second semiconductor layer being of a different material than the first semiconductor layer; the first semiconductor layer comprises a first P-type doped region, a second P-type doped region, a third N-type doped region, a first intrinsic region, a third P-type doped region, a second intrinsic region, a second N-type doped region and a first N-type doped region which are sequentially arranged in a first direction, the dopant concentrations of the first to third P-type doped regions are sequentially decreased, the dopant concentrations of the first to third N-type doped regions are sequentially decreased, and the first direction is the electron flowing direction of the avalanche photodetector; the second semiconductor layer sequentially covers a part of the second P-type doped region, a part of the third N-type doped region, the first intrinsic region and a part of the third P-type doped region along the first direction, and the first N-type doped region is connected with a first electrode; the third P-type doped region is connected with a second electrode; the first P-type doped region is connected with a third electrode. Because the plurality of doped charge regions and the second intrinsic region serving as the avalanche region are both arranged in the first semiconductor layer, additional epitaxial production of monocrystalline silicon is not needed, the production is relatively simple, and the cost is favorably reduced; in addition, the first N-type doped region is connected with the first electrode, the third P-type doped region is connected with the second electrode, the first P-type doped region is connected with the third electrode, and bias voltage can be independently applied to the three electrodes subsequently, so that electric fields of the second semiconductor layer serving as the absorption region and the second intrinsic region serving as the avalanche region can be independently adjusted, the tolerance on the concentration precision of the doped regions is good, and low noise and high gain bandwidth are facilitated to be realized.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
Fig. 1 is an axial view of an avalanche photodetector according to an embodiment of the present invention;
fig. 2 is a schematic top view of an avalanche photodetector according to an embodiment of the present invention;
fig. 3 is a schematic view of an avalanche photodetector along the Y direction according to an embodiment of the present invention;
fig. 4 is a schematic flow chart of a method for manufacturing an avalanche photodetector according to an embodiment of the present invention;
fig. 5a to 5e are cross-sectional views of device structures in the process of manufacturing the avalanche photodetector according to the embodiment of the present invention.
Detailed Description
In order to make the technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention are further described in detail below with reference to the drawings and the specific embodiments of the specification.
In the embodiments of the present invention, the terms "first", "second", and the like are used for distinguishing similar objects, and are not used for describing a specific order or sequence.
In embodiments of the present invention, unless otherwise expressly specified or limited, an "upper" or "lower" relationship between two layers in a semiconductor structure may be a direct contact between the two layers, or an indirect contact between the two layers through an intermediate layer.
In embodiments of the present invention, the term "layer" refers to a portion of material that includes a region having a thickness. A layer may extend over the entirety of the underlying or overlying structure or may have an extent that is less than the extent of the underlying or overlying structure. Furthermore, a layer may be a region of a homogeneous or heterogeneous continuous structure having a thickness less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or a layer may be between any horizontal pair of surfaces at the top and bottom surfaces of a continuous structure. The layers may extend horizontally, vertically and/or along inclined surfaces. Also, a layer may include multiple sublayers.
Spatially relative terms, such as "under," "below," "lower," "over," "upper," "upward," "downward," and the like, may describe one element or feature's relationship to another element(s) or feature(s) for ease of description herein, as illustrated in the figures, in embodiments of the invention. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
Silicon photonics is a new generation of technology for optical device development and integration based on silicon and silicon-based substrate materials (e.g., SiGe/Si, silicon-on-insulator, etc.) using existing Complementary Metal Oxide Semiconductor (CMOS) processes. The silicon photon technology combines the characteristics of ultra-large scale and ultra-high precision manufacturing of an integrated circuit technology and the advantages of ultra-high speed and ultra-low power consumption of the photon technology, and is a subversive technology for coping with the Moore's law failure. This combination benefits from the scalability of semiconductor wafer fabrication, and thus can reduce costs. The photoelectric detector is one of core devices of a silicon photon architecture and has the function of converting an optical signal into an electric signal. The defects of the structure of the existing germanium-silicon avalanche photodetector are as follows: firstly, an epitaxial monocrystalline silicon process is needed, and the manufacturing is relatively complex; secondly, the absorption region is usually doped by P or N type, and the doping can cause light absorption loss, thereby reducing the quantum efficiency of the detector; thirdly, the absorption region and the avalanche region (also called as a multiplication region) are not easy to be independently adjusted, the concentration precision of the doping region is required to be higher, the process tolerance is low, and the gain bandwidth is easy to cause unsatisfied. .
Based on this, the following technical solutions of the embodiments of the present application are proposed.
An embodiment of the present invention provides an avalanche photodetector, including:
a substrate, a surface of the substrate comprising a first semiconductor layer;
a second semiconductor layer over the first semiconductor layer, the second semiconductor layer being of a different material than the first semiconductor layer; wherein the content of the first and second substances,
the first semiconductor layer comprises a first P-type doped region, a second P-type doped region, a third N-type doped region, a first intrinsic region, a third P-type doped region, a second intrinsic region, a second N-type doped region and a first N-type doped region which are sequentially arranged in a first direction, the dopant concentrations of the first to third P-type doped regions are sequentially decreased, the dopant concentrations of the first to third N-type doped regions are sequentially decreased, and the first direction is the electron flowing direction of the avalanche photodetector;
the second semiconductor layer covers a part of the second P-type doped region, a part of the third N-type doped region, a part of the first intrinsic region and a part of the third P-type doped region in sequence along the first direction,
the first N-type doped region is connected with a first electrode; the third P-type doped region is connected with a second electrode; the first P-type doped region is connected with a third electrode.
Referring to fig. 1 to fig. 3, fig. 1 is a schematic axial view of an avalanche photodetector according to an embodiment of the present invention; fig. 2 is a schematic top view of an avalanche photodetector according to an embodiment of the present invention; fig. 3 is a schematic view of an avalanche photodetector along the Y direction according to an embodiment of the present invention.
With reference to fig. 1 to 3, the avalanche photodetector includes:
a substrate 10 comprising a first semiconductor layer 300; an avalanche region of the avalanche photodetector is formed in the first semiconductor layer 300 to achieve an avalanche effect;
a second semiconductor layer 400 using a material different from that of the first semiconductor layer 300.
Here, the substrate may have a multilayer structure in which the top of the substrate is a first semiconductor layer, and a layer of a simple substance semiconductor material (e.g., silicon (Si), germanium (Ge), etc.), a layer of a compound semiconductor material (e.g., silicon germanium (SiGe), etc.), and an insulating layer of an oxide thereof may be included thereunder. In this example, the substrate 10 may be a silicon-on-insulator (SOI), a germanium-on-insulator (GeOI), or the like.
In the embodiments of the present application, the layer below the substrate surface is taken as an SOI example for explanation. It is to be understood that the first semiconductor layer 300 is located on top of the inventive substrate 10.
In some embodiments, the material of the first semiconductor layer 300 includes silicon. The layers below the first semiconductor layer 300 include an insulating layer 200 and a bottom layer 100 in this order.
In practical applications, the bottom layer 100 may be a silicon wafer, or a wafer formed of other materials. The material of the bottom layer 100 may be silicon, germanium, sapphire, or the like.
In some embodiments, the material of the bottom layer 100 is silicon, and correspondingly, the material of the insulating layer 200 may be an oxide of silicon, such as silicon dioxide
The bottom layer 100 may have a thicker thickness than the first semiconductor layer 300. It should be understood that in order to clearly show each layer structure in the drawings, the dimensional ratio of each layer structure may not be consistent with the actual structure.
It should be noted that, for convenience of description, as shown in fig. 1, the embodiment of the present invention is described by the first direction (X), the second direction (Y), and the third direction (Z) (see fig. 1).
Here, the substrate 10 may include a top surface at the front surface and a bottom surface at the back surface opposite to the front surface; the direction perpendicular to the top and bottom surfaces of the substrate is defined as a third direction (Z) in a case where the flatness of the top and bottom surfaces is neglected. The third direction Z is also the stacking direction of the layers subsequently deposited on the substrate, or the height direction of the device. The plane of the top and bottom surfaces of the substrate, or in a strict sense the central plane in the thickness direction of the substrate, is defined as the substrate plane. Two first directions (X) and second directions (Y) intersecting each other (e.g., being perpendicular to each other) are defined in the substrate plane direction. In this embodiment, the first direction X is an electron flow direction; the second direction Y is a propagation direction of the optical signal.
Since theoretically, any semiconductor material can be used as the material of the first semiconductor layer 300 in the avalanche photodetector, the first semiconductor material is not strictly limited here. In embodiments where the substrate 10 includes an underlying layer 100 of elemental Si, the first semiconductor material is Si.
In order for the avalanche photodetector to achieve the avalanche effect, different regions of the first semiconductor layer 300 of the avalanche photodetector are formed with different doped regions, including regions doped with different concentrations of P-type dopants, N-type dopants, and undoped regions (intrinsic regions).
The structure of the first semiconductor layer 300 of the avalanche photodetector according to the embodiment of the present disclosure will be described in detail below. In some embodiments, the first semiconductor layer 300 in the avalanche photodetector includes a first P-type doped region 301, a second P-type doped region 302, a third N-type doped region 303, a first intrinsic region 304, a third P-type doped region 305, a second intrinsic region 306, a second N-type doped region 307, and a first N-type doped region 308 sequentially arranged in the first direction X. The concentrations of the P-type dopants in the first P-type doped region, the second P-type doped region and the third P-type doped region are sequentially decreased in a descending manner, and the concentrations of the N-type dopants in the first N-type doped region, the second N-type doped region and the third N-type doped region are sequentially decreased in a descending manner.
In some embodiments, the P-type dopant may be boron (B) and the N-type dopant may be phosphorus (P) or arsenic (As).
In some casesIn one embodiment, the dopant concentration of the first P-type doped region 301 or the first N-type doped region 308 is 1 × 1020/cm3～5×1020/cm3The dopant concentration of the second P-type doped region 302 or the second N-type doped region 307 is 2 × 1017/cm3～5×1018/cm3The dopant concentration of the third P-type doped region 305 or the third N-type doped region 303 is 1.2 × 1017～4×1017/cm3。
In practical applications, the intrinsic region, being undoped or lightly doped, is typically less than a predetermined concentration, e.g., less than 1 × 1017/cm3。
It should be noted that the dopant concentrations of the first P-type doped region and the first N-type doped region may be the same or different, as long as their dopant concentrations are within the above-mentioned range.
Similarly, the dopant concentrations of the second P-type doped region and the second N-type doped region, and the dopant concentrations of the third P-type doped region and the third N-type doped region may be the same or different, respectively.
For the intrinsic region, it may be a first semiconductor material that is undoped or lightly doped. Wherein the intrinsic region is a region in which impact ionization occurs to generate electron-hole pairs.
In the first semiconductor layer 300 in the avalanche photodetector of the present invention, the avalanche region can be the second intrinsic region 306.
It is to be understood that avalanche photodetectors are based on applying a voltage between avalanche regions, creating an electric field, whereby photogenerated carriers are extracted by the electric field to form a current. Specifically, bias voltage is applied to two sides of the avalanche region along the first direction, and photoelectric detection is achieved.
In the embodiment of the present invention, the second semiconductor layer 400 is included on the first semiconductor layer 300, and the material of the second semiconductor layer 400 is different from that of the first semiconductor layer.
In some embodiments, the material of the first semiconductor layer 300 is silicon, and the material of the second semiconductor layer 400 is germanium, a germanium-silicon alloy, a group III-V material, and an alloy thereof.
In a further embodiment, the material of the first semiconductor layer 300 is silicon and the material of the second semiconductor layer is germanium. The avalanche photodetector thus formed is a silicon germanium photodetector.
Here, since the second semiconductor layer 400 as the absorption region in the avalanche photodetector provided by the present invention is not doped with P or N type and does not involve ohmic contact, the light absorption loss can be reduced as much as possible, which is advantageous for improving the quantum absorption efficiency.
The second semiconductor layer 400 of the avalanche photodetector of this embodiment sequentially covers a portion of the second P-type doped region 302, the third N-type doped region 303, the first intrinsic region 304, and a portion of the third P-type doped region 305 along the first direction. The second semiconductor layer 400 is formed as an absorption region of the avalanche photodetector.
Here, when an optical signal is applied in the Y direction of the avalanche photodetector, the second semiconductor layer 400 absorbs photons in the optical signal. As known from the photoelectric effect proposed by einstein, one photon generates one photo-generated electron. Thus, the second semiconductor layer 400 absorbs photons and generates electrons, which are photo-generated electrons.
Referring to fig. 1 to fig. 3, the second semiconductor layer 400 covers a portion of the second P-type doped region 302 and a portion of the third P-type doped region 305, so as to bridge the second P-type doped region 302 and the third P-type doped region 305, thereby forming a carrier channel. The photo-generated electrons are able to move from the second P-type doped region 302 to the third P-type doped region 305 under the influence of an electric field.
With continued reference to fig. 1-3, the avalanche photodetector of this embodiment further includes a first electrode 501, a second electrode 502, and a third electrode 503. The first electrode 501 is electrically connected with the first N-type doped region 308; the second electrode 502 is electrically connected to the third P-type doped region 305, and the third electrode 503 is electrically connected to the first P-type doped region 301.
The first electrode 501, the second electrode 502, and the third electrode 503 electrically connected to the first N-type doped region 308, the third P-type doped region 305, and the first P-type doped region 301 can be formed by applying a first bias voltage V between the first electrode 501 and the third electrode 5031Thereby providing a first bias voltage V between the first N-type doped region 308 and the first P-type doped region 3011While simultaneously providing a second bias voltage V between the first electrode 501 and the second electrode 5022Thereby providing a second bias voltage V applied between the first N-type doped region 308 and the third P-type doped region 3052。
As described above, the second semiconductor layer 400 as an absorption region connects the second P-type doped region 302 and the third P-type doped region 305 to form a carrier path. Accordingly, by applying an electric field between the first N-type doped region 308 and the first P-type doped region 301 (i.e., by the first bias voltage V)1) And can be used to adjust the energy of the photo-generated electrons.
While for providing a second bias voltage V between the third P-type doped region 305 and the first N-type doped region 3082The second bias voltage V is due to the fact that it is located across the second intrinsic region 306, the second intrinsic region 306 acting as an avalanche region2The electric field distribution of the avalanche region can be regulated. The avalanche region of an avalanche photodetector refers to a region where multiplication of carriers (here, electrons) occurs, and thus may also be referred to as a multiplication region. The absorption region of the avalanche photodetector can convert an incident optical signal into a plurality of electrons, and the electron pairs flow under the action of an electric field to form a photocurrent; the avalanche region can further excite a small amount of electrons formed in the absorption region through an avalanche effect to form a large amount of electrons so as to realize amplification; and finally, conducting photocurrent through a pair of metal electrodes to realize photoelectric detection.
The photo-generated electrons are in the presence of an electric field (due to a first bias voltage V applied to the avalanche photodetector)1) These photo-generated electrons are accelerated to the second intrinsic region 306 for multiplication. As the photo-generated electrons pass through the second intrinsic region 306, they collide with other carriers incorporated in the lattice of semiconductor atoms, thereby generating more free carriers through a process known as "impact ionization". These new free carriers are also accelerated by the applied electric field and generate more free carriers.
In addition, the third N doped region 30 of the avalanche photodetector in the embodiment of the invention3. The arrangement of the three regions, i.e., the first intrinsic region 304 and the third P-doped region 305, and the concentration ranges of the dopants of the third N-doped region 303 and the third P-doped region 305, are advantageous for the electric field distribution in the second semiconductor layer 400 as an absorption region. Due to the presence of the first intrinsic region 304, even at the first bias voltage V1Electrons cannot pass through the first intrinsic region 304, and the first intrinsic region 304 plays a certain role in blocking. Electrons from the second P-doped region 302 can pass through the third N-doped region 303, through the second semiconductor layer 400, and through the third P-doped region 305 to the avalanche region.
In order to achieve the avalanche effect, the conventional avalanche photodetector only applies bias voltage to two ends of the avalanche region, which has some disadvantages, for example, the absorption region and the avalanche region (also called multiplication region) are not easy to be independently adjusted, the concentration accuracy of the doped region is too high, the process tolerance is low, and the gain bandwidth is not ideal. To this end, the present invention simultaneously sets a bias voltage across the absorption region and the avalanche region of the avalanche photodetector, i.e., a first bias voltage V is provided between the first P-doped region 301 and the first N-doped region 3081And a second bias voltage V is provided between the first N-doped region 308 and the third P-doped region 3052. Thereby, independent adjustment of the electric fields corresponding to the absorption region and the avalanche region is achieved, and the gain bandwidth can be further improved.
Note that the first bias voltage V1And said bias voltage V2Is relatively independent, the first bias voltage V1Acting on the absorption region and may have a value of 1 to 4 volts. And a second bias voltage V2Acting in the avalanche region and may have a value of 3 to 20 volts.
In some embodiments, the dimension of the second intrinsic region 306 in the first direction X is 50nm to 800nm, that is, the width of the second intrinsic region 306 is within the above-mentioned interval. Thereby, a large bandwidth is achieved while achieving a higher gain. Since the second intrinsic region 306 is an avalanche region of an avalanche photodetector according to an embodiment of the present invention, the second intrinsic region 306 is not preferably too small in size in the first direction X. For example, when the wavelength is less than 50nm, electrons moving from the absorption region do not have sufficient avalanche space, and are not efficiently absorbed, resulting in poor multiplication efficiency. The size of the avalanche region is not too large, otherwise, the voltage requirement on two ends of the avalanche region is too high, the time for electrons to generate avalanche is too long, the response is reduced, and the detection effect is influenced.
In some embodiments, the second semiconductor layer has a dimension in the first direction X of 150nm to 1500nm, a dimension in the second direction Y of 1 μm to 100 μm, and a dimension in the third direction Z of 150nm to 600 nm. The size of the second semiconductor layer in the embodiment of the invention is limited in the range, so that the generation of dark current can be reduced while noise is reduced.
Here, in describing the size of the second semiconductor layer, the difference in the size of the upper and lower surfaces of the second semiconductor layer during the epitaxial growth may not be considered.
It should be noted that the shape of the second semiconductor layer 400 parallel to the substrate 10 may be a regular rectangle, or may have a trapezoid with a chamfer of a certain size along the first direction X, see fig. 1.
The avalanche photodetector of the present invention may further comprise a cover layer covering the first semiconductor layer 300, the second semiconductor layer 400, the first electrode 501, the second electrode 502 and the third electrode 503 (see fig. 5 e).
It should be noted that the structure of the avalanche photodetector of the present invention may also be a mirror image structure of itself, for example, referring to fig. 3, the first direction X in the embodiment of the present invention is from right to left, and the first direction X' of the mirror image structure is from left to right. Therefore, the avalanche photodetector and the mirror structure thereof provided by the embodiment of the invention are all within the protection scope of the invention.
The avalanche photodetector provided by the embodiment of the invention comprises: a substrate, a surface of the substrate comprising a first semiconductor layer; a second semiconductor layer over the first semiconductor layer, the second semiconductor layer being of a different material than the first semiconductor layer; the first semiconductor layer comprises a first P-type doped region, a second P-type doped region, a third N-type doped region, a first intrinsic region, a third P-type doped region, a second intrinsic region, a second N-type doped region and a first N-type doped region which are sequentially arranged in a first direction, the dopant concentrations of the first to third P-type doped regions are sequentially decreased, the dopant concentrations of the first to third N-type doped regions are sequentially decreased, and the first direction is the electron flowing direction of the avalanche photodetector; the second semiconductor layer sequentially covers a part of the second P-type doped region, a part of the third N-type doped region, the first intrinsic region and a part of the third P-type doped region along the first direction, and the first N-type doped region is connected with a first electrode; the third P-type doped region is connected with a second electrode; the first P-type doped region is connected with a third electrode. Because the plurality of doped charge regions and the second intrinsic region serving as the avalanche region are both arranged in the first semiconductor layer, additional epitaxial production of monocrystalline silicon is not needed, the production is relatively simple, and the cost is favorably reduced; in addition, the first N-type doped region is connected with the first electrode, the third P-type doped region is connected with the second electrode, the first P-type doped region is connected with the third electrode, and bias voltage can be independently applied to the three electrodes subsequently, so that electric fields of the second semiconductor layer serving as the absorption region and the second intrinsic region serving as the avalanche region can be independently adjusted, the tolerance on the concentration precision of the doped regions is good, and low noise and high gain bandwidth are facilitated.
The embodiment of the invention also provides a preparation method of the avalanche photodetector; please refer to fig. 5a to 5 e. As shown, the method comprises the steps of:
step 201: providing a substrate, wherein the surface of the substrate comprises a first semiconductor layer;
step 202: performing a selective doping process to form a first P-type doped region, a second P-type doped region, a third N-type doped region, a first intrinsic region, a third P-type doped region, a second intrinsic region, a second N-type doped region and a first N-type doped region which are sequentially arranged on the first semiconductor layer along a first direction;
step 203: forming a second semiconductor layer, wherein the material of the second semiconductor layer is different from that of the first semiconductor layer, and the second semiconductor layer covers a part of the second P-type doped region, a part of the third N-type doped region, a part of the first intrinsic region and a part of the third P-type doped region in sequence in the first direction;
step 204: forming a first electrode, a second electrode and a third electrode which are arranged in a direction vertical to the plane direction of the substrate, wherein the first electrode is electrically connected with the first N-type doped region; the second electrode is electrically connected with the third P-type doped region, and the third electrode is electrically connected with the first P-type doped region.
The first direction is an electron flow direction of the avalanche photodetector.
The avalanche photodetector and the manufacturing method thereof according to the embodiments of the present invention will be further described in detail with reference to the device structure cross-sectional views in the manufacturing process of the avalanche photodetector in fig. 5a to 5 e.
First, step 201 is performed. A substrate is provided, the substrate including a first semiconductor layer.
Referring to fig. 5a, a substrate 10 is provided; the substrate 10 may comprise a multilayer structure with further functional layers grown on top of the multilayer structure. Accordingly, the substrate 10 of the present invention may include a multi-layer structure, wherein the surface of the substrate 10 includes the first semiconductor layer 300, and the layer below the surface may include an insulating layer made of a simple substance semiconductor material (e.g., silicon (Si), germanium (Ge), etc.), a composite semiconductor material (e.g., silicon germanium (SiGe), etc.), and an oxide thereof, and thus, the substrate 10 may be either Silicon On Insulator (SOI), germanium on insulator (GeOI), or the like.
In the embodiment of the present application, the substrate 10 is an SOI substrate as an example. It is understood that the first semiconductor layer 300 is located on the surface of the inventive substrate 10.
The substrate 10 further includes an intermediate layer 200 (which may be an insulating layer in practical applications) and a bottom layer 100 (which may be a silicon layer in practical applications) under the first semiconductor layer 300. The insulating layer 200 is, for example, a silicon dioxide layer, which can be obtained directly by thermal oxidation of the bottom layer 100. The bottom layer 100 may have a thicker thickness than the first semiconductor layer 300.
Next, step 202 is performed. Here, reference is made to fig. 5 b. A selective doping process is performed to form a first P-type doped region 301, a second P-type doped region 302, a third N-type doped region 303, a first intrinsic region 304, a third P-type doped region 305, a second intrinsic region 306, a second N-type doped region 307, and a first N-type doped region 308 sequentially arranged along a first direction on the first semiconductor layer 300.
In the actual process, the areas needing to be doped can be sequentially subjected to windowing by utilizing a mask photolithography process. Ion implantation is then performed in the window to form doped regions of different doping concentrations as described above.
Specifically, the doping concentration of the first P-type doped region or the first N-type doped region is 1 × 1020/cm3～5×1020/cm3The doping concentration of the second P-type doped region or the second N-type doped region is 2 x 1017/cm3～5×1018/cm3The doping concentration of the third P-type doped region or the third N-type doped region is 1.2 x 1017～4×1017/cm3. In some embodiments, the dopant in the first P-type doped region 301, the second P-type doped region 302, and the third P-type doped region 305 is boron (B); the dopants of the first N-type doped region 308, the second N-type doped region 307, and the third N-type doped region 303 are phosphorus (P) or arsenic (As).
Next, step 203 is performed. Referring to fig. 5c, a second semiconductor layer 400 is formed to cover the first intrinsic region 304 and the third N-type doped region 303 and cover a portion of the second P-type doped region 302 and the third P-type doped region 305 in the first direction X.
In some embodiments, an initial second semiconductor layer 400 '(not shown) is first formed overlying the first semiconductor material 300, the initial second semiconductor layer 400' is then etched using a patterned photoresist layer to form the second semiconductor layer 400, and the photoresist layer is removed.
Here, the second semiconductor layer 400 is formed in a trapezoidal structure (the shape of which can be referred to as the second semiconductor layer 400 in fig. 1). Wherein the trapezoidal structure has a smaller side length near the light incident end.
In some embodiments, the material of the first semiconductor layer is different from the material of the second semiconductor layer. For example, in the case where the material of the first semiconductor layer is Si, the material of the second semiconductor layer is germanium, a germanium-silicon alloy, a III-V material, and an alloy thereof.
In a specific embodiment of the avalanche photodetector according to the embodiment of the present invention, the first semiconductor layer is made of silicon, and the second semiconductor layer is made of germanium.
The second semiconductor layer can be formed by epitaxially growing a high-quality polycrystalline germanium material by using a molecular beam epitaxial growth process or the like.
Step 204 is performed next. Reference may be made to fig. 5 d. Forming a first electrode 501, a second electrode 502 and a third electrode 503 which are arranged in a direction vertical to the plane direction of the substrate, wherein the first electrode 501 is electrically connected with the first N-type doped region 308; the second electrode 502 is electrically connected to the third P-type doped region 305, and the third electrode 503 is electrically connected to the first P-type doped region 301.
In some embodiments, the forming the first electrode 501, the second electrode 502, and the third electrode 503 disposed perpendicular to the substrate plane direction includes:
forming a capping layer 600 capping the first semiconductor layer 300 and the second semiconductor layer 400;
forming a first window, a second window and a third window over the first N-type doped region 308, the third P-type doped region 305 and the first N-type doped region 308, respectively;
the first, second, and third windows are filled with a metal material to form a first electrode 501, a second electrode 502, and a third electrode 503.
In one embodiment, the cover layer 600 may be formed directly using an insulating material. Referring to fig. 5e, a capping layer 600 may be first formed using an insulating material, such as silicon dioxide, to cover the doped first and second semiconductor layers 300 and 400. Then, photolithography and inductive plasma etching are used to perform window opening on the covering layer 600, so as to form a first window, a second window and a third window to expose the surfaces of the first N-type doped region 308, the third P-type doped region 305 and the first P-type doped region 301 in the first semiconductor layer 300, and then a magnetron sputtering process is used to deposit metal materials in the first window, the second window and the third window, so as to form a first electrode 501, a second electrode 502 and a third electrode 503 electrically connected with the first N-type doped region 308, the third P-type doped region 305 and the first P-type doped region 301, respectively.
After the electrode is formed, a step of planarizing the upper surface of the capping layer 600 may be performed, and a Chemical Mechanical Polishing (CMP) process may be specifically used. In this manner, different voltages can be applied between the first electrode 501 and the second electrode 502 and between the first electrode 501 and the third electrode 503 through external leads, thereby providing bias voltages between the first electrode 501 and the third electrode 503 and between the first electrode 501 and the third electrode 503.
It should be noted that the embodiment of the avalanche photodetector provided by the present invention and the embodiment of the preparation method of the avalanche photodetector belong to the same concept; the technical features of the technical means described in the embodiments may be arbitrarily combined without conflict. It should be further noted that, in the avalanche photodetector provided by the embodiments of the present invention, the technical features of the avalanche photodetector can be combined to solve the technical problems to be solved by the present invention; therefore, the avalanche photodetector provided by the embodiment of the present invention may not be limited by the manufacturing method of the avalanche photodetector provided by the embodiment of the present invention, and any avalanche photodetector that can be manufactured by the manufacturing method of the avalanche photodetector structure provided by the embodiment of the present invention is within the protection scope of the present invention.
The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, and any modifications, equivalents, improvements, etc. that are within the spirit and principle of the present invention should be included in the present invention.
Claims (10)
1. An avalanche photodetector, comprising:
a substrate, a surface of the substrate comprising a first semiconductor layer;
a second semiconductor layer over the first semiconductor layer, the second semiconductor layer being of a different material than the first semiconductor layer; wherein the content of the first and second substances,
the first semiconductor layer comprises a first P-type doped region, a second P-type doped region, a third N-type doped region, a first intrinsic region, a third P-type doped region, a second intrinsic region, a second N-type doped region and a first N-type doped region which are sequentially arranged in a first direction, the dopant concentrations of the first to third P-type doped regions are sequentially decreased, the dopant concentrations of the first to third N-type doped regions are sequentially decreased, and the first direction is the electron flowing direction of the avalanche photodetector;
the second semiconductor layer covers a part of the second P-type doped region, the third N-type doped region, the first intrinsic region and a part of the third P-type doped region in sequence along the first direction,
the first N-type doped region is connected with a first electrode; the third P-type doped region is connected with a second electrode; the first P-type doped region is connected with a third electrode.
2. The avalanche photodetector of claim 1 wherein a first reverse bias voltage V is provided between the first and third electrodes1And a second reverse bias voltage V is arranged between the first electrode and the second electrode2。
3. The avalanche photodetector of claim 1 or 2, wherein the material of the first semiconductor layer is silicon and the material of the second semiconductor layer is germanium, a germanium-silicon alloy, a group III-V material and alloys thereof.
4. The avalanche photodetector of claim 1 wherein the dopant concentration of the first P-type doped region or the first N-type doped region is 1 x 1020/cm3～5×1020/cm3The first mentionedThe dopant concentration of the two P-type doped regions or the second N-type doped region is 2 x 1017/cm3～5×1018/cm3The dopant concentration of the third P-type doped region or the third N-type doped region is 1.2 × 1017～4×1017/cm3。
5. The avalanche photodetector of claim 1, wherein the second intrinsic region has a dimension in the first direction of 50nm to 800 nm.
6. The avalanche photodetector of claim 1 or 2, wherein the second semiconductor layer has a dimension in the first direction of 150nm to 1500nm, a dimension in the second direction of 1 μm to 100 μm, and a dimension in the third direction of 150nm to 600nm, wherein the third direction is a direction perpendicular to the substrate, and the second direction is perpendicular to the third direction and perpendicular to the first direction.
7. A method of fabricating an avalanche photodetector, comprising:
providing a substrate, wherein the surface of the substrate comprises a first semiconductor layer;
executing a selective doping process to form a first P-type doped region, a second P-type doped region, a third N-type doped region, a first intrinsic region, a third P-type doped region, a second intrinsic region, a second N-type doped region and a first N-type doped region which are sequentially arranged on the first semiconductor layer along a first direction, wherein the dopant concentrations of the first to third P-type doped regions are sequentially decreased, and the dopant concentrations of the first to third N-type doped regions are sequentially decreased;
forming a second semiconductor layer, wherein the material of the second semiconductor layer is different from the material of the first semiconductor layer, and the second semiconductor layer covers a part of the second P-type doped region, the third N-type doped region, the first intrinsic region and a part of the third P-type doped region in sequence in the first direction;
forming a first electrode, a second electrode and a third electrode which are arranged in a direction vertical to the plane direction of the substrate, wherein the first electrode is electrically connected with the first N-type doped region; the second electrode is electrically connected with the third P-type doped region, and the third electrode is electrically connected with the first P-type doped region;
the first direction is an electron flow direction of the avalanche photodetector.
8. The method of claim 7, wherein the material of the first semiconductor layer is silicon, and the material of the second semiconductor layer is germanium, a germanium-silicon alloy, a group III-V material, and alloys thereof.
9. The method of claim 7, wherein the dopant concentration of the first P-type doped region or the first N-type doped region is 1 x 1020/cm3～5×1020/cm3The dopant concentration of the second P-type doped region or the second N-type doped region is 2 × 1017/cm3～5×1018/cm3The dopant concentration of the third P-type doped region or the third N-type doped region is 1.2 × 1017～4×1017/cm3。
10. The method of claim 7, wherein the forming the first, second, and third electrodes disposed perpendicular to the substrate plane direction comprises:
forming a capping layer capping the first semiconductor layer and the second semiconductor layer;
forming a first window, a second window and a third window at one end of the first N-type doped region, the third P-type doped region and the first P-type doped region along a second direction respectively to expose partial surfaces of the first P-type doped region, the third P-type doped region and the first N-type doped region;
and filling metal in the first window, the second window and the third window to form a first electrode, a second electrode and a third electrode.
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| WO2023125283A1 (en) * | 2021-12-29 | 2023-07-06 | 武汉光谷信息光电子创新中心有限公司 | Avalanche photodetector and preparation method therefor |
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