CN114253422A - Display control circuit, display control method and electronic equipment - Google Patents

Display control circuit, display control method and electronic equipment Download PDF

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Publication number
CN114253422A
CN114253422A CN202111635926.4A CN202111635926A CN114253422A CN 114253422 A CN114253422 A CN 114253422A CN 202111635926 A CN202111635926 A CN 202111635926A CN 114253422 A CN114253422 A CN 114253422A
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China
Prior art keywords
image
display
chip
frame rate
main control
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CN202111635926.4A
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Chinese (zh)
Inventor
欧恩惠
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Vivo Mobile Communication Co Ltd
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Vivo Mobile Communication Co Ltd
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Priority to CN202111635926.4A priority Critical patent/CN114253422A/en
Publication of CN114253422A publication Critical patent/CN114253422A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers

Abstract

The application discloses a display control circuit, a display control method and electronic equipment, and belongs to the technical field of display. The display control circuit comprises a main control chip and a display chip, wherein the main control chip is connected with the display chip; the main control chip is used for generating a first image and sending the first image to the display chip; the display chip is used for continuously outputting the first image to a display screen based on a first frame rate under the condition that a second image sent by the main control chip is not received, wherein the first frame rate is determined based on a screen refreshing frequency range of the display screen.

Description

Display control circuit, display control method and electronic equipment
Technical Field
The application belongs to the technical field of display, and particularly relates to a display control circuit, a display control method and electronic equipment.
Background
At present, with the development of intelligent electronic devices, the screen refresh rate is higher and higher, and changes from 60Hz to 120Hz, which results in higher and higher power consumption of the intelligent electronic devices.
Disclosure of Invention
An object of the embodiments of the present application is to provide a display control circuit, a display control method, and an electronic device, which can implement dynamic adjustment of a frame rate and save power consumption.
In a first aspect, an embodiment of the present application provides a display control circuit, which includes a main control chip and a display chip, where the main control chip is connected to the display chip;
the main control chip is used for generating a first image and sending the first image to the display chip;
the display chip is used for continuously outputting the first image to a display screen based on a first frame rate under the condition that a second image sent by the main control chip is not received, wherein the first frame rate is determined based on a screen refreshing frequency range of the display screen.
In a second aspect, an embodiment of the present application provides a display control circuit, which includes a main control chip and a display chip, where the main control chip includes a generation unit and a first interface; the display chip comprises a second interface, a storage unit and a third interface;
the generating unit is used for generating a first image;
the generating unit is connected with the first interface, and the first interface is used for sending the first image;
the first interface is connected with the second interface, the storage unit is respectively connected with the second interface and the third interface, the storage unit is used for storing the first image, the third interface is used for continuously outputting the first image to a display screen based on a first frame rate under the condition that the second interface does not receive the second image sent by the main control chip, and the first frame rate is determined based on the screen refreshing frequency range of the display screen.
In a third aspect, an embodiment of the present application provides a display control method, which is applied to the display control circuit described in the second aspect above, and the method includes:
the method comprises the steps that a main control chip generates a first image and sends the first image to a display chip;
and under the condition that the display chip does not receive the second image sent by the main control chip, continuously outputting the first image to the display screen based on a first frame rate, wherein the first frame rate is determined based on the screen refreshing frequency range of the display screen.
In a fourth aspect, an embodiment of the present application provides an electronic device, including a display screen and the display control circuit of the first aspect, where the display screen is connected to a display chip in the display control circuit, and the display screen is configured to display the first image.
In a fifth aspect, an embodiment of the present application provides an electronic device, which includes a display screen and the display control circuit of the second aspect, where the display screen is connected to a display chip in the display control circuit, and the display screen is used to display the first image.
In the embodiment of the application, the display control circuit comprises a main control chip and a display chip, the main control chip is connected with the display chip, the main control chip is used for generating a first image and sending the first image to the display chip, the display chip is used for continuously outputting the first image to the display screen based on a first frame rate under the condition that a second image sent by the main control chip is not received, and the first frame rate is determined based on a screen refreshing frequency range of the display screen. Therefore, in the embodiment of the application, under the condition that the display chip does not receive the second image, the display chip can continuously output the first image based on the first frame rate, so that the power consumption of the main control chip is reduced; meanwhile, the first frame rate is determined based on the screen refreshing frequency range of the display screen, so that a smaller frame rate supported by the display screen can be achieved, and the dynamic adjustment of the frame rate can be realized through the display chip.
Drawings
Fig. 1 is a first schematic structural diagram of a display control circuit according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a display control circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic flowchart of a display control method according to an embodiment of the present application;
fig. 4 is a first schematic structural diagram of an electronic device provided in an embodiment of the present application;
fig. 5 is a schematic structural diagram ii of an electronic device according to an embodiment of the present application;
fig. 6 is a schematic structural diagram three of an electronic device provided in the embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments that can be derived by one of ordinary skill in the art from the embodiments given herein are intended to be within the scope of the present disclosure.
The terms first, second and the like in the description and in the claims of the present application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that embodiments of the application may be practiced in sequences other than those illustrated or described herein, and that the terms "first," "second," and the like are generally used herein in a generic sense and do not limit the number of terms, e.g., the first term can be one or more than one. In addition, "and/or" in the specification and claims means at least one of connected objects, a character "/" generally means that a preceding and succeeding related objects are in an "or" relationship.
The display control circuit provided in the embodiments of the present application is described in detail with reference to the accompanying drawings through specific embodiments and application scenarios thereof.
Please refer to fig. 1, which is a display control circuit according to an embodiment of the present disclosure, in which the display control circuit 100 includes a main control chip 110 and a display chip 120, and the main control chip 110 is connected to the display chip 120.
The main control chip 110 is configured to generate a first image and send the first image to the display chip 120. The main control Chip 110 is a System on Chip (SoC), which is an integrated circuit with a dedicated target, and the main control Chip 110 includes a complete System and has all contents of embedded software.
The first image is an image generated by the main control chip 110 when the layer update information is detected, that is, the main control chip 110 is configured to generate the first image when the layer update information is detected.
Illustratively, a user performs a touch input on the display screen, where the touch input may cause data of at least one of the layers to be updated, and the main control chip 110 generates a first image and sends the first image to the display chip 120 when detecting that the data of the at least one of the layers is updated. Generally, the main control chip 110 can send the first image to the display chip 120 through the signal data line between the main control chip 110 and the display chip 120, and when the main control chip 110 sends the first image to the display chip 120 through the signal data line, the signal state of the signal data line is the first state.
The display chip 120 is configured to continuously output the first image to the display screen based on a first frame rate when the second image sent by the main control chip 110 is not received, where the first frame rate is determined based on a screen refresh frequency range of the display screen, for example, the first frame rate may be a smaller frame rate supported by the display screen, so as to reduce power consumption. The second image is typically the next frame image of the first image.
In this embodiment, when the signal state on the signal data line between the display chip 120 and the main control chip 110 is the second state, it indicates that the display chip 120 does not receive the second image sent by the main control chip 110, and here, the display chip 120 continuously outputs the first image to the display screen based on the first frame rate. That is, when the display chip 120 does not receive the second image sent by the main control chip 110, the display chip 120 continuously outputs the first image to the display screen, which reduces the power consumption of the main control chip 110. Meanwhile, since the first frame rate is determined based on the screen refresh frequency range of the display screen, the dynamic adjustment of the frame rate can be realized through the display chip 120.
According to the embodiment of the disclosure, the display control circuit comprises a main control chip and a display chip, the main control chip is connected with the display chip, the main control chip is used for generating a first image and sending the first image to the display chip, the display chip is used for continuously outputting the first image to the display screen based on a first frame rate under the condition that a second image sent by the main control chip is not received, and the first frame rate is determined based on a screen refreshing frequency range of the display screen. Therefore, in the embodiment of the application, under the condition that the display chip does not receive the second image, the display chip can continuously output the first image based on the first frame rate, so that the power consumption of the main control chip is reduced; meanwhile, the first frame rate is determined based on the screen refreshing frequency range of the display screen, so that a smaller frame rate supported by the display screen can be achieved, and the dynamic adjustment of the frame rate can be realized through the display chip.
In one embodiment, the main control chip 110 is further configured to generate a second image and send the second image to the display chip 120; the display chip 120 is configured to output image data to the display screen based on a second frame rate when receiving a second image sent by the main control chip, where the image data includes the second image, and the second frame rate is greater than the first frame rate.
In this embodiment, the second image is an image generated by the main control chip 110 when the layer update information is detected, that is, the main control chip 110 is configured to generate the second image when the layer update information is detected.
For example, a user performs a touch input on the display screen, where the touch input may cause data of at least one of the layers to be updated, and the main control chip 110 generates a second image and sends the second image to the display chip 120 when detecting that the data of the at least one of the layers is updated. In general, the main control chip 110 may send the second image to the display chip 120 through a signal data line between the main control chip 110 and the display chip 120, and when the main control chip 110 sends the second image to the display chip 120 through the signal data line, the signal state of the signal data line is restored to the first state.
In this embodiment, when the signal state on the signal data line between the display chip 120 and the main control chip 110 is the first state, it indicates that the display chip 120 receives the second image sent by the main control chip 110, and here, the display chip 120 outputs image data including the second image to the display screen based on the second frame rate. That is, in the case that the display chip 120 receives the second image sent by the main control chip 110, the display chip 120 outputs image data to the display screen based on the second frame rate, and since the second frame rate is greater than the first frame rate, the dynamic adjustment of the frame rate can be realized by the display chip 120.
Based on the above, the present embodiment further provides an electronic device, as shown in fig. 4, the electronic device 400 includes a display screen 410 and the display control circuit 100, the display screen 410 is connected to the display chip 120 in the display control circuit 100, and the display screen 410 is used for displaying the first image.
Please refer to fig. 2, which is a display control circuit according to another embodiment of the present disclosure, wherein the display control circuit 200 includes a main control chip 210 and a display chip 220. The main control chip 210 includes a generation unit 2101 and a first interface 2102. The display chip 220 includes a second interface 2201, a memory unit 2202, and a third interface 2203.
The generating unit 2101 is configured to generate a first image. The generation unit 2101 is connected to a first interface 2102, and the first interface 2102 is used to transmit a first image.
The first image is an image generated by the generation unit 2101 in a case where the layer update information is detected, that is, the generation unit 2101 is specifically configured to generate the first image in a case where the layer update information is detected.
Illustratively, a user applies a touch input to the display screen, the touch input may cause data of at least one of the plurality of layers to be updated, and the generation unit 2101 may generate a first image and transmit the first image through the first interface 2102 when detecting that the data of the at least one of the plurality of layers is updated.
The first interface 2102 is connected to the second interface 2201, the storage unit 2202 is connected to the second interface 2201 and the third interface 2203, respectively, the storage unit 2202 is configured to store a first image, and the third interface 2203 is configured to continuously output the first image to the display screen based on a first frame rate when the second interface does not receive a second image sent by the main control chip 210, where the first frame rate is determined based on a screen refresh frequency range of the display screen, for example, the first frame rate may be a lower frame rate supported by the display screen, so that power consumption may be reduced.
In this embodiment, a signal data line is connected between the first interface 2102 of the main control chip 210 and the second interface 2201 of the display chip 220, the main control chip 210 can send the first image to the display chip 220 through the signal data line, and the storage unit 2202 of the display chip 220 can store the first image. When the main control chip 210 sends the first image to the display chip 220 through the signal data line, the signal state of the signal data line is the first state. The second image is typically the next frame image of the first image.
When the signal status on the signal data line between the display chip 220 and the main control chip 210 is the second status, it indicates that the display chip 220 does not receive the second image sent by the main control chip 210, and here, the display chip 220 continuously outputs the first image to the display screen based on the first frame rate. That is, when the display chip 220 does not receive the second image sent by the main control chip 210, the display chip 220 continuously outputs the first image to the display screen, thereby reducing the power consumption of the main control chip 210. Meanwhile, since the first frame rate is determined based on the screen refresh frequency range of the display screen, the dynamic adjustment of the frame rate may be achieved by the display chip 220.
According to the embodiment of the disclosure, the display control circuit comprises a main control chip and a display chip, the main control chip comprises a generation unit and a first interface, the display chip comprises a second interface, a storage unit and a third interface, the first interface is connected with the generation unit, the second interface is respectively connected with the first interface and the storage unit, the storage unit is further connected with the third interface, the generation unit is used for generating a first image and sending the first image through the first interface, the storage unit is used for storing the first image, the third interface is used for continuously outputting the first image to the display screen based on a first frame rate under the condition that the second interface does not receive a second image sent by the main control chip, and the first frame rate is determined based on a screen refreshing frequency range of the display screen. As can be seen, in the embodiment of the present application, when the second interface does not receive the second image, since the storage unit stores the first image, the third interface may continuously output the first image based on the first frame rate, thereby reducing the power consumption of the main control chip; meanwhile, the first frame rate is determined based on the screen refreshing frequency range of the display screen, so that a smaller frame rate supported by the display screen can be achieved, and the dynamic adjustment of the frame rate can be realized through the display chip.
In one embodiment, the generating unit 2101 is further configured to generate a second image, the first interface 2102 is further configured to transmit the second image; the third interface 2203 is further configured to output image data to the display screen based on a second frame rate if the second interface 2201 receives the second image sent by the first interface 2102, where the image data includes the second image, and the second frame rate is greater than the first frame rate.
In this embodiment, the second image is an image generated by the generation unit 2101 when the layer update information is detected, that is, the generation unit 2101 is specifically configured to generate the second image when the layer update information is detected.
Illustratively, a user applies a touch input to the display screen, where the touch input causes data of at least one of the layers to be updated, and the generating unit 2101 generates a second image and sends the second image to the display chip 120 through a signal data line between the first interface 2102 and the second interface 2201 when detecting that the data of the at least one of the layers is updated. Generally, when the main control chip 210 transmits the second image to the display chip 220 through the signal data line, the signal state of the signal data line is restored to the first state.
In this embodiment, when the signal status on the signal data line between the display chip 120 and the main control chip 110 is the first status, it indicates that the second interface 2201 receives the second image sent by the first interface 2102, and here, the third interface 2203 outputs the image data including the second image to the display screen based on the second frame rate. That is, in the case where the second interface 2201 receives the second image transmitted by the first interface 2102, the third interface 2203 outputs image data to the display screen based on the second frame rate, and since the second frame rate is greater than the first frame rate, the dynamic adjustment of the frame rate can be realized by the display chip 220.
Based on the above, the present embodiment further provides an electronic device, as shown in fig. 5, the electronic device 500 includes a display screen 510 and a display control circuit 200, the display screen 510 is connected to the display chip 220 in the display control circuit 200, and the display screen 510 is used for displaying the first image.
Please refer to fig. 3, which is a display control method according to an embodiment of the present disclosure, applied to a display control circuit according to any embodiment of the present disclosure, and the method may include steps 3100 to 3200 as follows:
step 3100, the main control chip generates a first image and sends the first image to the display chip.
In this embodiment, the generating the first image by the main control chip 3100 may further include: and the main control chip generates a first image under the condition of detecting the layer updating information.
Step 3200, the display chip continuously outputs the first image to the display screen based on a first frame rate when not receiving the second image sent by the main control chip, wherein the first frame rate is determined based on a screen refresh frequency range of the display screen.
According to the embodiment of the disclosure, the main control chip is configured to generate a first image and send the first image to the display chip, the display chip is configured to continuously output the first image to the display screen based on a first frame rate when a second image sent by the main control chip is not received, and the first frame rate is determined based on a screen refresh frequency range of the display screen. Therefore, in the embodiment of the application, under the condition that the display chip does not receive the second image, the display chip can continuously output the first image based on the first frame rate, so that the power consumption of the main control chip is reduced; meanwhile, the first frame rate is determined based on the screen refreshing frequency range of the display screen, so that a smaller frame rate supported by the display screen can be achieved, and the dynamic adjustment of the frame rate can be realized through the display chip.
In one embodiment, after the display chip continuously outputs the first image to the display screen based on the first frame rate in step 3200 above, the display control method of the embodiment of the present disclosure further includes steps 4100 to 4200 of:
step 4100, the main control chip generates a second image and sends the second image to the display chip.
In this embodiment, the generating of the second image by the main control chip in step 4100 may further include: and the main control chip generates a second image under the condition of detecting the layer updating information.
Step 4200, the display chip outputs image data to the display screen based on a second frame rate when receiving the second image sent by the main control chip, where the image data includes the second image, and the second frame rate is greater than the first frame rate.
According to this embodiment, when the display chip receives the second image sent by the main control chip, the display chip outputs image data to the display screen based on the second frame rate, and since the second frame rate is greater than the first frame rate, the display chip can dynamically adjust the frame rate.
The display control circuit in the embodiments of the present application may be a component in an electronic device, such as an integrated circuit. The electronic device may be a terminal, or may be a device other than a terminal. The electronic Device may be, for example, a Mobile phone, a tablet computer, a notebook computer, a palm top computer, a vehicle-mounted electronic Device, a Mobile Internet Device (MID), an Augmented Reality (AR)/Virtual Reality (VR) Device, a robot, a wearable Device, an ultra-Mobile personal computer (UMPC), a netbook or a Personal Digital Assistant (PDA), and the like, and may also be a server, a Network Attached Storage (NAS), a Personal Computer (PC), a Television (TV), a teller machine, a self-service machine, and the like, and the embodiments of the present application are not particularly limited.
The electronic device in the embodiment of the present application may be an apparatus having an operating system. The operating system may be an Android (Android) operating system, an ios operating system, or other possible operating systems, and embodiments of the present application are not limited specifically.
The display control circuit provided in the embodiment of the present application can implement each process implemented in the method embodiment of fig. 3, and is not described here again to avoid repetition.
Fig. 6 is a schematic diagram of a hardware structure of an electronic device implementing an embodiment of the present application.
The electronic device 600 includes, but is not limited to: the system comprises a radio frequency unit 601, a network module 602, an audio output unit 603, an input unit 604, a sensor 605, a display unit 606, a user input unit 607, an interface unit 608, a memory 609, a processor 610, a display chip and the like, wherein the processor 610 is connected with the display chip.
Those skilled in the art will appreciate that the electronic device 600 may further comprise a power source (e.g., a battery) for supplying power to the various components, and the power source may be logically connected to the processor 610 through a power management system, so as to implement functions of managing charging, discharging, and power consumption through the power management system. The electronic device structure shown in fig. 6 does not constitute a limitation of the electronic device, and the electronic device may include more or less components than those shown, or combine some components, or arrange different components, and thus, the description is omitted here.
The processor 610 is configured to generate a first image and send the first image to the display chip.
And a display chip, configured to, when a second image sent by the processor 610 is not received, continuously output the first image to a display screen based on a first frame rate, where the first frame rate is determined based on a screen refresh frequency range of the display screen.
In the embodiment of the application, a processor (a main control chip) is connected with the display chip, the processor is configured to generate a first image and send the first image to the display chip, the display chip is configured to continuously output the first image to the display screen based on a first frame rate when a second image sent by the processor is not received, and the first frame rate is determined based on a screen refresh frequency range of the display screen. Therefore, in the embodiment of the application, under the condition that the display chip does not receive the second image, the display chip can continuously output the first image based on the first frame rate, so that the power consumption of the processor is reduced; meanwhile, the first frame rate is determined based on the screen refreshing frequency range of the display screen, so that the first frame rate can be a smaller frame rate supported by the display screen, and the dynamic adjustment of the frame rate can be realized through the display chip
In one embodiment, the processor 610 is further configured to generate a second image and send the second image to the display chip.
The display chip is configured to output image data to the display screen based on a second frame rate when receiving a second image sent by the processor 610, where the image data includes the second image, and the second frame rate is greater than the first frame rate.
In this embodiment of the application, when the display chip receives the second image sent by the processor 610, the display chip outputs image data to the display screen based on the second frame rate, and since the second frame rate is greater than the first frame rate, the display chip can dynamically adjust the frame rate.
In an embodiment, the processor 610 is specifically configured to generate the first image or the second image when layer update information is detected.
In this embodiment of the application, the processor 610 generates a first image or a second image when detecting the layer update information, and transmits the first image or the second image to the display screen through the display chip for displaying, so as to meet the requirements of the user.
It is to be understood that, in the embodiment of the present application, the input Unit 604 may include a Graphics Processing Unit (GPU) 6041 and a microphone 6042, and the Graphics Processing Unit 6041 processes image data of a still picture or a video obtained by an image capturing apparatus (such as a camera) in a video capturing mode or an image capturing mode. The display unit 606 may include a display panel 6061, and the display panel 6061 may be configured in the form of a liquid crystal display, an organic light emitting diode, or the like. The user input unit 607 includes at least one of a touch panel 6071 and other input devices 6072. A touch panel 6071, also referred to as a touch screen. The touch panel 6071 may include two parts of a touch detection device and a touch controller. Other input devices 6072 may include, but are not limited to, a physical keyboard, function keys (e.g., volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which are not described in detail herein.
The memory 609 may be used to store software programs as well as various data. The memory 609 may mainly include a first storage area storing a program or an instruction and a second storage area storing data, wherein the first storage area may store an operating system, an application program or an instruction (such as a sound playing function, an image playing function, etc.) required for at least one function, and the like. Further, the memory 609 may include volatile memory or nonvolatile memory, or the memory x09 may include both volatile and nonvolatile memory. The non-volatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), or a flash Memory. The volatile Memory may be a Random Access Memory (RAM), a Static Random Access Memory (Static RAM, SRAM), a Dynamic Random Access Memory (Dynamic RAM, DRAM), a Synchronous Dynamic Random Access Memory (Synchronous DRAM, SDRAM), a Double Data Rate Synchronous Dynamic Random Access Memory (Double Data Rate SDRAM, ddr SDRAM), an Enhanced Synchronous SDRAM (ESDRAM), a Synchronous Link DRAM (SLDRAM), and a Direct Memory bus RAM (DRRAM). The memory 1009 in the embodiments of the present application includes, but is not limited to, these and any other suitable types of memory.
Processor 610 may include one or more processing units; optionally, the processor 610 integrates an application processor, which mainly handles operations related to the operating system, user interface, application programs, etc., and a modem processor, which mainly handles wireless communication signals, such as a baseband processor. It will be appreciated that the modem processor described above may not be integrated into the processor 610.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element. Further, it should be noted that the scope of the methods and apparatus of the embodiments of the present application is not limited to performing the functions in the order illustrated or discussed, but may include performing the functions in a substantially simultaneous manner or in a reverse order based on the functions involved, e.g., the methods described may be performed in an order different than that described, and various steps may be added, omitted, or combined. In addition, features described with reference to certain examples may be combined in other examples.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solutions of the present application may be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal (such as a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present application.
While the present embodiments have been described with reference to the accompanying drawings, it is to be understood that the invention is not limited to the precise embodiments described above, which are meant to be illustrative and not restrictive, and that various changes may be made therein by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (11)

1. A display control circuit is characterized by comprising a main control chip and a display chip, wherein the main control chip is connected with the display chip;
the main control chip is used for generating a first image and sending the first image to the display chip;
the display chip is used for continuously outputting the first image to a display screen based on a first frame rate under the condition that a second image sent by the main control chip is not received, wherein the first frame rate is determined based on a screen refreshing frequency range of the display screen.
2. The display control circuit of claim 1,
the main control chip is also used for generating a second image and sending the second image to the display chip;
the display chip is used for outputting image data to the display screen based on a second frame rate under the condition of receiving a second image sent by the main control chip, wherein the image data comprises the second image, and the second frame rate is greater than the first frame rate.
3. The display control circuit according to claim 2, wherein the main control chip is specifically configured to generate the first image or the second image when layer update information is detected.
4. A display control circuit is characterized by comprising a main control chip and a display chip, wherein the main control chip comprises a generation unit and a first interface; the display chip comprises a second interface, a storage unit and a third interface;
the generating unit is used for generating a first image;
the generating unit is connected with the first interface, and the first interface is used for sending the first image;
the first interface is connected with the second interface, the storage unit is respectively connected with the second interface and the third interface, the storage unit is used for storing the first image, the third interface is used for continuously outputting the first image to a display screen based on a first frame rate under the condition that the second interface does not receive the second image sent by the main control chip, and the first frame rate is determined based on the screen refreshing frequency range of the display screen.
5. The display control circuit of claim 4,
the generating unit is further used for generating a second image, and the first interface is further used for sending the second image;
the third interface is further configured to output image data to the display screen based on a second frame rate when the second interface receives the second image sent by the first interface, where the image data includes the second image, and the second frame rate is greater than the first frame rate.
6. The display control circuit of claim 5,
the generating unit is specifically configured to generate the first image or the second image when layer update information is detected.
7. A display control method applied to the display control circuit according to any one of claims 4 to 6, the method comprising:
the method comprises the steps that a main control chip generates a first image and sends the first image to a display chip;
and under the condition that the display chip does not receive the second image sent by the main control chip, continuously outputting the first image to the display screen based on a first frame rate, wherein the first frame rate is determined based on the screen refreshing frequency range of the display screen.
8. The method of claim 7, wherein after the display chip continuously outputs the first image to the display screen based on the first frame rate, the method further comprises:
the main control chip generates a second image and sends the second image to the display chip;
and the display chip outputs image data to the display screen based on a second frame rate under the condition of receiving a second image sent by the main control chip, wherein the image data comprises the second image, and the second frame rate is greater than the first frame rate.
9. The method of claim 8, wherein the master control chip generates the first image, comprising:
the main control chip generates the first image under the condition of detecting the layer updating information;
the master control chip generates a second image, including:
and the main control chip generates the second image under the condition of detecting the layer updating information.
10. An electronic device, comprising a display screen and the display control circuit of any one of claims 1 to 3, wherein the display screen is connected to a display chip in the display control circuit, and the display screen is configured to display the first image.
11. An electronic device, comprising a display screen and the display control circuit of any one of claims 4 to 6, wherein the display screen is connected to a display chip in the display control circuit, and the display screen is configured to display the first image.
CN202111635926.4A 2021-12-28 2021-12-28 Display control circuit, display control method and electronic equipment Pending CN114253422A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111635926.4A CN114253422A (en) 2021-12-28 2021-12-28 Display control circuit, display control method and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111635926.4A CN114253422A (en) 2021-12-28 2021-12-28 Display control circuit, display control method and electronic equipment

Publications (1)

Publication Number Publication Date
CN114253422A true CN114253422A (en) 2022-03-29

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111635926.4A Pending CN114253422A (en) 2021-12-28 2021-12-28 Display control circuit, display control method and electronic equipment

Country Status (1)

Country Link
CN (1) CN114253422A (en)

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