Disclosure of Invention
The invention provides a logic control circuit and a control method of a high-voltage circuit, aiming at one or more problems in the prior art, the voltage drop required by the logic control circuit is obtained by utilizing the leakage current characteristic of a high-voltage tube, and the current is turned off through interlocking control, so that the power consumption of a lithium battery management chip when a battery is not started is reduced, and the standby time of a lithium battery pack is prolonged.
The technical solution for realizing the purpose of the invention is as follows:
according to one aspect of the present invention, a logic control circuit of a high voltage circuit includes:
a high voltage tube which is connected to an input voltage through a mos tube connected by a diode and generates a reference voltage based on a leakage current of the high voltage tube;
the interlocking control circuit is characterized in that a signal end is connected with a control level signal, a control end is connected with a reference voltage, an output voltage is generated and output of the output voltage is controlled based on the control level signal and the reference voltage, and internal current is interlocked and cut off;
the switch tube, the control end inserts output voltage, and the output is coupled high voltage circuit, based on output voltage realizes first operating condition or second operating condition, and when the switch tube was in first operating condition, high voltage circuit was out of work, and when the switch tube was in the second operating condition, high voltage circuit normally worked.
Optionally, the interlock-type control circuit includes a first control circuit and a second control circuit coupled to each other, signal ends of the first control circuit and the second control circuit are respectively connected to opposite control level signals, control ends of the first control circuit and the second control circuit are both coupled to an output end of the high-voltage tube, the first control circuit or the second control circuit is controlled according to the opposite control level signals to generate an output voltage based on the reference voltage, and the first control circuit or the second control circuit is coupled to the switching tube.
Optionally, the first control circuit includes a first switch tube, the second control circuit includes a second switch tube, the first switch tube and the second switch tube are coupled to each other and form an interlock, when the first switch tube is turned on, the second switch tube is turned off, and when the second switch tube is turned on, the first switch tube is turned off.
Optionally, a gate of the first switching tube is coupled to a drain of the second switching tube, a gate of the second switching tube is coupled to a drain of the first switching tube, and a source of the first switching tube and a source of the second switching tube are both connected to the input voltage.
Optionally, the first control circuit includes a third switch tube, the second control circuit includes a fourth switch tube, the first end of the third switch tube and the first end of the fourth switch tube are both coupled to the output end of the high-voltage tube, the output end of the third switch tube or the output end of the fourth switch tube is coupled to the control end of the switch tube, and the third switch tube or the fourth switch tube generates the output voltage based on the reference voltage when conducting.
Optionally, the first control circuit includes a third switching tube, the second control circuit includes a fourth switching tube, a source of the third switching tube is coupled to the gate of the second switching tube and the drain of the first switching tube, a source of the fourth switching tube is coupled to the gate of the first switching tube and the drain of the second switching tube, and a source of the third switching tube or a source of the fourth switching tube is coupled to the control terminal of the switching tube, the gate of the third switching tube and the gate of the fourth switching tube are both coupled to the output terminal of the high voltage tube, and the third switching tube or the fourth switching tube generates the output voltage based on the reference voltage when turned on.
Optionally, the first control circuit includes a fifth switching tube, the second control circuit includes a sixth switching tube, the fifth switching tube is connected to the first control level signal and turned on or off based on the first control level signal, and the sixth switching tube is connected to the second control level signal and turned on or off based on the second control level signal.
Optionally, the first control circuit includes a fifth switching tube, the second control circuit includes a sixth switching tube, a drain of the fifth switching tube is coupled to a drain of the third switching tube, a drain of the sixth switching tube is coupled to a drain of the fourth switching tube, a gate of the fifth switching tube is coupled to the first control level signal, and a gate of the sixth switching tube is coupled to the second control level signal.
Optionally, the first control level signal and the second control level signal are opposite control level signals.
Optionally, the gate of the high voltage tube is connected to the source, the source is connected to the input voltage through a mos tube connected to a diode, and the source is coupled to the interlock-type control circuit as an output terminal.
Optionally, the source of the switching tube is connected to the input voltage, the gate is coupled to the output terminal of the interlock control circuit, and the drain is coupled to the high-voltage circuit.
Optionally, the diode-connected mos tube includes a plurality of mos tubes with gates shorted to drains, the drains of adjacent mos tubes are connected to the sources, the source of the head mos tube is coupled to the input voltage, and the drain of the tail mos tube is coupled to the source of the high-voltage tube.
Optionally, the first switch tube, the second switch tube, the third switch tube and the fourth switch tube are PMOS tubes, and the fifth switch tube and the sixth switch tube are NMOS switch tubes.
According to another aspect of the present invention, a lithium battery management chip includes:
a control level generating circuit for generating a control level signal; and
the logic control circuit of any one of the high-voltage circuits is connected with the control level generating circuit, and the output end of the logic control circuit is coupled with the high-voltage circuit of the lithium battery and used for generating a logic control signal for controlling the high-voltage circuit according to the control level signal.
According to another aspect of the present invention, a logic control circuit of a high voltage circuit includes:
a high voltage tube which is connected to an input voltage through a mos tube connected by a diode and generates a reference voltage based on a leakage current of the high voltage tube;
the interlocking control circuit comprises an interlocking circuit, an output voltage generating circuit and a control level receiving circuit which are sequentially coupled, wherein the interlocking circuit is used for interlocking and switching off an internal switching tube of the interlocking control circuit so as to prevent the internal switching tube from being simultaneously switched on; the input end of the output voltage generating circuit is coupled with the output end of the high-voltage tube, and the output end of the output voltage generating circuit is coupled with the switching tube and used for generating output voltage based on reference voltage; the input end of the control level receiving circuit is coupled with the control level signal and used for controlling the output of the output voltage based on the control level signal;
and the control end of the switch tube is coupled with the output voltage, the output end of the switch tube is coupled with the high-voltage circuit, the first working state or the second working state is realized based on the output voltage, when the switch tube is in the first working state, the high-voltage circuit does not work, and when the switch tube is in the second working state, the high-voltage circuit works normally.
Optionally, the interlock circuit includes a first switch tube and a second switch tube, the source of the first switch tube and the source of the second switch tube are both connected to the input voltage, the gate of the first switch tube is coupled to the drain of the second switch tube, the gate of the second switch tube is coupled to the drain of the first switch tube, the first switch tube and the second switch tube are interlocked and not simultaneously turned on, and the drain of the first switch tube and the drain of the second switch tube are respectively coupled to the output voltage generating circuit.
Optionally, the output voltage generating circuit includes a third switching tube and a fourth switching tube, gates of the third switching tube and the fourth switching tube are both coupled to the output end of the high voltage tube and coupled to a reference voltage, a source of the third switching tube and a source of the fourth switching tube are coupled to the interlock circuit, respectively, and the source of the third switching tube or the source of the fourth switching tube is coupled to the control end of the switching tube, the third switching tube or the fourth switching tube generates the output voltage based on the reference voltage when turned on, and a drain of the third switching tube and a drain of the fourth switching tube are coupled to the control level receiving circuit, respectively.
Optionally, the control level receiving circuit includes a fifth switching tube and a sixth switching tube, a drain of the fifth switching tube and a drain of the sixth switching tube are respectively coupled to the output voltage generating circuit, a gate of the fifth switching tube is coupled to the first control level signal, a gate of the sixth switching tube is coupled to the second control level signal, a source of the fifth switching tube and a source of the sixth switching tube are both coupled to ground, and the fifth switching tube and the sixth switching tube control output of the output voltage based on the first control level signal and the second control level signal respectively.
Optionally, the first control level signal and the second control level signal are opposite control level signals.
According to another aspect of the present invention, a logic control method of a high voltage circuit includes:
the method comprises the steps that an input voltage is connected into a high-voltage tube through a mos tube connected with a diode, and the high-voltage tube generates a reference voltage based on leakage current;
the control level signal and the reference voltage are connected into an interlocking control circuit, the interlocking control circuit generates output voltage based on the control level signal and the reference voltage and controls the output of the output voltage, and meanwhile, the interlocking control circuit interlocks and shuts off internal current;
the output voltage is connected into the switch tube, the switch tube realizes a first working state or a second working state based on the output voltage, the working state of the high-voltage circuit is controlled according to the first working state or the second working state of the switch tube, when the switch tube is in the first working state, the high-voltage circuit does not work, and when the switch tube is in the second working state, the high-voltage circuit works normally.
Compared with the prior art, the invention adopting the technical scheme has the following technical effects:
according to the logic control circuit of the high-voltage circuit, the whole circuit does not need a current source, the power consumption is only the leakage current of the high-voltage tube, the current is generally less than 1 nanoampere, the voltage drop required by the logic control circuit is obtained by utilizing the leakage current characteristic of the high-voltage tube, and the current is completely closed through interlocking control, so that the consumed current can be ignored, the power consumption of a lithium battery management chip when the lithium battery management chip is not started is reduced, and meanwhile, the standby time of a lithium battery pack is prolonged.
Detailed Description
For a further understanding of the invention, reference will now be made to the preferred embodiments of the invention by way of example, and it is to be understood that the description is intended to further illustrate features and advantages of the invention, and not to limit the scope of the claims.
The description in this section is for several exemplary embodiments only, and the present invention is not limited only to the scope of the embodiments described. Combinations of different embodiments, and substitutions of features from different embodiments, or similar prior art means may be substituted for or substituted for features of the embodiments shown and described.
The term "coupled" or "connected" in this specification includes both direct and indirect connections. An indirect connection is a connection made through an intermediate medium, such as a conductor, wherein the electrically conductive medium may contain parasitic inductance or parasitic capacitance, or through an intermediate circuit or component as described in the embodiments in the specification; indirect connections may also include connections through other active or passive devices that perform the same or similar function, such as connections through switches, signal amplification circuits, follower circuits, and so on. "plurality" or "plurality" means two or more.
According to one aspect of the invention, a logic control circuit of a high-voltage circuit, as shown in fig. 2, comprises a high-voltage mos transistor PM8, a switch transistor PM1 and an interlocking control circuit 1, wherein:
a first end of the high-voltage mos tube PM8 is connected to the input voltage VIN through a diode-connected mos tube, and an output end of the high-voltage mos tube PM8 is coupled to the interlock control circuit 1 to generate a reference voltage based on a leakage current of the high-voltage tube. Generally, a low-voltage tube is used when the voltage is less than 5V, and a high-voltage tube is used when the voltage exceeds 5V. A logic low level with respect to the input voltage VIN can be obtained by a diode-connected mos transistor. In one embodiment, the gate and the source of the high-voltage mos transistor PM8 are connected to obtain a very small current by using the leakage current characteristic of the high-voltage mos transistor PM8, the source is connected to the input voltage VIN through the diode-connected mos transistor, the source is coupled to the interlock control circuit as the output terminal, and the output voltage of the source is the input voltage VIN minus the total V of the diode-connected mos transistorSGAnd the drain is grounded. In one embodiment, the diode-connected mos transistor includes 4 mos transistors PM4, PM5, PM6, PM7 with gates shorted to drains, with drains and sources of adjacent mos transistors connected, namely: the drain of PM4 is coupled to the source of PM5, the drain of PM5 is coupled to the source of PM6, the drain of PM6 is coupled to the source of PM7, the source of the head mos transistor PM4 is coupled to the input voltage VIN, and the drain of the tail mos transistor PM7 is coupled to the source of the high voltage transistor PM 8. In another embodiment, achieving a logic low level relative to the input voltage VIN may be accomplished by replacing the diode-connected mos transistor with a zener diode, but occupying a larger area than the diode-connected mos transistorThe diode has more area, and the mos tube and the high-voltage tube connected with the diode share the substrate, so that the occupied area is small.
The interlocking control circuit 1 has a first end connected to the input voltage VIN, a second end grounded, a signal end connected to the control level signal, a control end coupled to the reference voltage, and an output end coupled to the switching tube PM1, generates an output voltage based on the control level signal and the reference voltage, outputs the output voltage to the controller, and interlocks to turn off the internal current. In one embodiment, the control level signal is generated by a low voltage logic circuit, and the low voltage logic circuit is implemented by using an existing low voltage logic circuit.
And a control end of the switching tube PM1 is coupled to the output voltage of the interlock control circuit 1, an output end of the switching tube PM1 is coupled to the high-voltage circuit 2, and the switching tube PM1 is switched on or off based on the output voltage of the interlock control circuit 1, when the switching tube PM1 is switched on, the high-voltage circuit 2 does not work, and when the switching tube PM1 is switched off, the high-voltage circuit 2 works normally. In one embodiment, the source of the switching transistor PM1 is connected to the input voltage VIN, the gate is coupled to the output terminal of the interlock control circuit 1, and the drain is coupled to the high voltage circuit 2.
In one embodiment, the interlock type control circuit 1 includes a first control circuit and a second control circuit coupled to each other, the first control circuit and the second control circuit are coupled to each other in an interlock type, and the internal current is turned off, signal terminals of the first control circuit and the second control circuit are respectively connected to opposite control level signals, control terminals of the first control circuit and the second control circuit are both coupled to an output terminal of the high voltage pipe PM8, and control the first control circuit or the second control circuit to generate an output voltage based on a reference voltage according to the opposite control level signals, and the first control circuit or the second control circuit is coupled to the switching tube.
In a second embodiment, the interlocking control circuit includes a first control circuit and a second control circuit, signal terminals of the first control circuit and the second control circuit are respectively connected to opposite control level signals, and control terminals of the first control circuit and the second control circuit are both coupled to an output terminal of the high voltage pipe PM 8. The first control circuit comprises a first switch tube PM9, the second control circuit comprises a second switch tube PM10, the first switch tube PM9 and the second switch tube PM10 are coupled with each other and form an interlock, when the first switch tube PM9 is conducted, the second switch tube PM10 is closed, and when the second switch tube PM10 is conducted, the first switch tube PM9 is closed. Preferably, the gate of the first switching transistor PM9 is coupled to the drain of the second switching transistor PM10, the gate of the second switching transistor PM10 is coupled to the drain of the first switching transistor PM9, and the source of the first switching transistor PM9 and the source of the second switching transistor PM10 are both connected to the input voltage VIN.
In a third embodiment, the interlocking control circuit includes a first control circuit and a second control circuit, signal terminals of the first control circuit and the second control circuit are respectively connected to opposite control level signals, and control terminals of the first control circuit and the second control circuit are both coupled to an output terminal of the high voltage pipe PM 8. The first control circuit comprises a third switching tube PM11, the second control circuit comprises a fourth switching tube PM12, the first end of the third switching tube PM11 and the first end of the fourth switching tube PM12 are both coupled with the output end of the high-voltage tube PM8, the output end of the third switching tube PM11 or the output end of the fourth switching tube PM12 is coupled with the control end of the switching tube PM1, and the third switching tube PM11 or the fourth switching tube PM12 generates an output voltage based on a reference voltage when being conducted.
In a fourth embodiment, the interlock-type control circuit includes a first control circuit and a second control circuit, signal terminals of the first control circuit and the second control circuit are respectively connected to opposite control level signals, and control terminals of the first control circuit and the second control circuit are both coupled to the output terminal of the high-voltage tube. The first control circuit comprises a first switch tube PM9 and a third switch tube PM11, the second control circuit comprises a second switch tube PM10 and a fourth switch tube PM12, the first switch tube PM9 and the second switch tube PM10 are coupled with each other and form interlocking, when the first switch tube PM9 is conducted, the second switch tube PM10 is closed, when the second switch tube PM10 is conducted, the first switch tube PM9 is closed, the third switch tube PM11 and the fourth switch tube PM12 are both coupled with the output end of the high-voltage tube PM8, and when the second switch tube PM10 is conducted, an output voltage is generated on the basis of a reference voltage. Preferably, the gate of the first switch tube PM9 is coupled to the drain of the second switch tube PM10, the gate of the second switch tube PM10 is coupled to the drain of the first switch tube PM9, the source of the first switch tube PM9 and the source of the second switch tube PM10 are both connected to the input voltage VIN, the gate of the first switch tube PM9 or the gate of the second switch tube PM10 is coupled to the switch tube PM1, the source of the third switch tube PM11 is coupled to the gate of the second switch tube PM10 and the drain of the first switch tube PM9, the source of the fourth switch tube PM12 is coupled to the gate of the first switch tube PM9 and the drain of the second switch tube PM10, and the source of the third switching tube PM11 or the source of the fourth switching tube PM12 is coupled to the control terminal of the switching tube PM1, the gate of the third switching tube PM11 and the gate of the fourth switching tube PM12 are both coupled to the output terminal of the high voltage tube PM8, and the third switching tube PM11 or the fourth switching tube PM12 generates an output voltage based on the reference voltage when turned on.
In a fifth embodiment, the interlocking control circuit includes a first control circuit and a second control circuit, signal terminals of the first control circuit and the second control circuit are respectively connected to opposite control level signals, and control terminals of the first control circuit and the second control circuit are both coupled to an output terminal of the high voltage pipe PM 8. The first control circuit includes a fifth switching tube NM1, the second control circuit includes a sixth switching tube NM2, the fifth switching tube NM1 and the sixth switching tube NM2 are respectively connected to opposite control level signals, and the fifth switching tube NM1 and the sixth switching tube NM2 are turned on or off based on the control level signals.
In a sixth embodiment, the interlock-type control circuit includes a first control circuit and a second control circuit, signal terminals of the first control circuit and the second control circuit are respectively connected to opposite control level signals, and control terminals of the first control circuit and the second control circuit are both coupled to an output terminal of the high-voltage tube. The first control circuit comprises a first switching tube PM9, a third switching tube PM11 and a fifth switching tube NM1, the second control circuit comprises a second switching tube PM10, a fourth switching tube PM12 and a sixth switching tube NM2, the first switching tube PM9 and the second switching tube PM10 are coupled with each other and form an interlock, when the first switching tube PM9 is switched on, the second switching tube PM10 is closed, when the second switching tube PM10 is switched on, the first switching tube PM9 is closed, the third switching tube PM11 and the fourth switching tube PM12 are both coupled with the output end of the high-voltage tube PM8 and generate an output voltage based on a reference voltage, the fifth switching tube NM1 and the sixth switching tube NM2 are respectively connected with opposite control level signals, and the fifth switching tube NM1 and the sixth switching tube NM2 are connected or disconnected based on the control level signals. Preferably, the gate of the first switching tube PM9 is coupled to the drain of the second switching tube PM10, the gate of the second switching tube PM10 is coupled to the drain of the first switching tube PM9, the source of the first switching tube PM9 and the source of the second switching tube PM10 are both connected to the input voltage VIN, the gate of the first switching tube PM9 or the gate of the second switching tube PM10 are both coupled to the switching tube PM1, the source of the third switching tube PM11 is coupled to the gate of the second switching tube PM10 and the drain of the first switching tube PM9, the source of the fourth switching tube PM12 is coupled to the gate of the first switching tube PM9 and the drain of the second switching tube PM10, the gate of the third switching tube PM11 and the gate of the fourth switching tube PM12 are both coupled to the output end of the high voltage tube PM8, the drain of the fifth switching tube NM1 is coupled to the drain of the third switching tube PM11, the drain of the sixth switching tube NM2 is coupled to the drain of the fourth switching tube PM 57328, and the drain of the fifth switching tube PM 639 is coupled to the SDB signal level control signal level of the first switching tube SDB, the gate of the sixth switching tube NM2 is coupled to the second control level signal SD, the source of the fifth switching tube NM1 and the source of the sixth switching tube NM2 are both grounded, and the first control level signal SDB and the second control level signal SD are opposite control level signals. Preferably, the first switching tube PM9, the second switching tube PM10, the third switching tube PM11 and the fourth switching tube PM12 are all PMOS tubes, and the fifth switching tube NM1 and the sixth switching tube NM2 are all NMOS switching tubes.
According to the scheme, a source and a grid of the high-voltage tube PM8 are connected, a very small current is obtained by utilizing the leakage current characteristic of the high-voltage tube PM8, mos tubes PM4-PM7 are connected in a diode connection mode, and grid voltages of a third switching tube PM11 and a fourth switching tube PM12 are VIN-4VSG。
When the SD signal received by the sixth switching tube NM2 is at a high level, the SDB signal received by the fifth switching tube NM1 is at a low level. At this time, the sixth switching tube NM2 and the fourth switching tube PM12 are both turned on, the source voltage of the fourth switching tube PM12 is the gate voltage plus the threshold voltage, that is, the source voltage of the fourth switching tube PM12 is VIN-4VSG+VThreshold(s). Then, the switching tube PM1 and the first switching tube PM9 are both turned on, and the switching tube PM1 is turned on to connect the high voltage circuit 2 (the dashed line in the dashed line box in fig. 2 isHigh voltage circuit), the first switching tube PM9 is turned on to turn off the second switching tube PM10, i.e. the first switching tube PM9 and the second switching tube PM10 form an interlock. Since the second switching tube PM10 and the fifth switching tube NM1 are turned off, and the first switching tube PM9 and the sixth switching tube NM2 are turned on, neither branch of the first control circuit nor the second control circuit has current.
When the SD signal received by the sixth switching tube NM2 is at a low level, the SDB signal received by the fifth switching tube NM1 is at a high level. At this time, the fifth switching tube NM1 and the third switching tube PM11 are both turned on, the source voltage of the third switching tube PM11 is the gate voltage plus the threshold voltage, that is, the source voltage of the third switching tube PM11 is VIN-4VSG+VThreshold(s). Then, the second switching tube PM10 is turned on, the second switching tube PM10 is turned on to turn off both the first switching tube PM9 and the switching tube PM1, and the switching tube PM1 is turned off to make the high-voltage circuit work normally. Since the fifth switching tube NM1 and the second switching tube PM10 are turned on and the first switching tube PM9 and the sixth switching tube NM2 are turned off, neither branch of the first control circuit nor the second control circuit has current.
Therefore, the current consumed by the logic control circuit of the high-voltage circuit in the present embodiment is only the leakage current generated by the high-voltage transistor PM8, and the leakage current is generally less than 1 nanoampere.
The scheme can also adopt a mode of introducing a current source to replace the high-voltage pipe PM8, but the generation of the current source needs to add an additional circuit, and the introduced current source can cause current consumption exceeding a desired value due to matching errors.
The scheme can be applied to a lithium battery management chip, and the lithium battery management chip comprises a control level generating circuit and a logic control circuit of any one of the high-voltage circuits, wherein the control level generating circuit is used for generating a control level signal; the logic control circuit of the high-voltage circuit is connected with the control level generating circuit, and the output end of the logic control circuit is coupled with the high-voltage circuit of the lithium battery and used for generating a logic control signal for controlling the high-voltage circuit according to the control level signal.
According to another aspect of the present invention, a logic control circuit of a high voltage circuit, as shown in fig. 3, includes:
the first end of the high-voltage pipe PM8 is connected with an input voltage through a mos pipe connected with a diode, the output end of the high-voltage pipe PM8 is coupled with the interlocking control circuit 1, and a reference voltage is generated based on the leakage current of the high-voltage pipe PM 8;
the interlocking control circuit 1 comprises an interlocking circuit 11, an output voltage generating circuit 12 and a control level receiving circuit 13 which are sequentially coupled, wherein the interlocking circuit 11 is used for interlocking and switching off an internal switch tube thereof so as to prevent the internal switch tube from being simultaneously switched on; the input end of the output voltage generating circuit 12 is coupled to the output end of the high voltage pipe PM8, and the output end is coupled to the switching pipe PM1, and is configured to generate an output voltage based on a reference voltage; a control level receiving circuit 13, an input end of which is coupled to the control level signal, for controlling the output of the output voltage based on the control level signal;
and a control terminal of the switching tube PM1 is coupled to the output voltage, and an output terminal of the switching tube PM1 is coupled to the high-voltage circuit 2, and is turned on or off based on the output voltage, in an embodiment, when the switching tube PM1 is turned on, the high-voltage circuit 2 does not operate, and when the switching tube PM1 is turned off, the high-voltage circuit 2 operates normally.
In one embodiment, the interlock circuit 11 includes a first switch tube PM9 and a second switch tube PM10, a source of the first switch tube PM9 and a source of the second switch tube PM10 are both connected to the input voltage VIN, a gate of the first switch tube PM9 is coupled to a drain of the second switch tube PM10, a gate of the second switch tube PM10 is coupled to a drain of the first switch tube PM9, the first switch tube PM9 and the second switch tube PM10 are interlocked and not simultaneously turned on, and a drain of the first switch tube PM9 and a drain of the second switch tube PM10 are respectively coupled to the output voltage generating circuit 12.
In one embodiment, the output voltage generating circuit 12 includes a third switching transistor PM11 and a fourth switching transistor PM12, a gate of the third switching transistor PM11 and a gate of the fourth switching transistor PM12 are both coupled to the output terminal of the high voltage transistor PM8 and to the reference voltage, a source of the third switching transistor PM11 and a source of the fourth switching transistor PM12 are respectively coupled to the interlock circuit 11, and a source of the third switching transistor PM11 or a source of the fourth switching transistor PM12 is coupled to the control terminal of the switching transistor PM1, the third switching transistor or the fourth switching transistor generates the output voltage based on the reference voltage when conducting, and a drain of the third switching transistor PM11 and a drain of the fourth switching transistor PM12 are respectively coupled to the control level receiving circuit 13.
In one embodiment, the control level receiving circuit 13 includes a fifth switch NM1 and a sixth switch NM2, a drain of the fifth switch NM1 and a drain of the sixth switch NM2 are respectively coupled to the output voltage generating circuit 12, a gate of the fifth switch NM1 is coupled to a first control level signal, a gate of the sixth switch NM2 is coupled to a second control level signal, the first control level signal and the second control level signal are opposite control level signals, a source of the fifth switch NM1 and a source of the sixth switch NM2 are both coupled to ground, and the fifth switch NM and the sixth switch control output of the output voltage based on the first control level signal and the second control level signal.
According to another aspect of the present invention, a logic control method of a high voltage circuit includes:
the input voltage VIN is connected into a high-voltage pipe PM8 through a mos pipe connected with a diode, and the high-voltage pipe PM8 generates a reference voltage based on leakage current;
the control level signal and the reference voltage are connected into the interlocking control circuit 1, the interlocking control circuit 1 generates output voltage based on the control level signal and the reference voltage and controls the output of the output voltage, and meanwhile, the interlocking control circuit 1 interlocks and shuts off internal current;
the output voltage is connected to the switching tube PM1, the switching tube PM1 achieves a first working state or a second working state based on the output voltage, the working state of the high-voltage circuit 2 is controlled according to the first working state or the second working state of the switching tube PM1, when the switching tube PM1 is in the first working state, the high-voltage circuit 2 does not work, and when the switching tube PM1 is in the second working state, the high-voltage circuit 2 works normally.
Those skilled in the art should understand that the logic controls such as "high" and "low", "set" and "reset", "and gate" and "or gate", "non-inverting input" and "inverting input" in the logic controls referred to in the specification or the drawings may be exchanged or changed, and the subsequent logic controls may be adjusted to achieve the same functions or purposes as the above-mentioned embodiments.
The description and applications of the invention herein are illustrative and are not intended to limit the scope of the invention to the embodiments described above. The descriptions related to the effects or advantages in the specification may not be reflected in practical experimental examples due to uncertainty of specific condition parameters or influence of other factors, and the descriptions related to the effects or advantages are not used for limiting the scope of the invention. Variations and modifications of the embodiments disclosed herein are possible, and alternative and equivalent various components of the embodiments will be apparent to those skilled in the art. It will be clear to those skilled in the art that the present invention may be embodied in other forms, structures, arrangements, proportions, and with other components, materials, and parts, without departing from the spirit or essential characteristics thereof. Other variations and modifications of the embodiments disclosed herein may be made without departing from the scope and spirit of the invention.