CN114242015A - Control method of display panel circuit and display panel circuit - Google Patents
Control method of display panel circuit and display panel circuit Download PDFInfo
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- CN114242015A CN114242015A CN202111554400.3A CN202111554400A CN114242015A CN 114242015 A CN114242015 A CN 114242015A CN 202111554400 A CN202111554400 A CN 202111554400A CN 114242015 A CN114242015 A CN 114242015A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0289—Details of voltage level shifters arranged for use in a driving circuit
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- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The application relates to a control method of a display panel circuit and the display panel circuit, wherein a power supply management unit outputs an analog voltage signal to a level conversion unit according to an input signal, wherein the analog voltage signal comprises three paths of analog negative voltage signals; the level conversion unit outputs two paths of discharge trigger signals based on the three paths of analog negative voltage signals; in the embodiment, the power management unit outputs three different analog negative voltage signals, the level conversion unit outputs two discharging trigger signals based on the three different analog negative voltage signals, and compared with a mode of outputting three different analog negative voltage signals by using a traditional BUCK, the embodiment can reduce the design cost while ensuring that three different analog negative voltage signals and two different discharging trigger signals are accurately and effectively output.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a control method for a display panel circuit and a display panel circuit.
Background
A display panel is widely used in various fields such as homes, workplaces, and the like as an output device capable of visually displaying electronic information. In the process of using the display panel, abnormal voltage drop, such as abnormal jump of the mains supply, poor contact and the like, is often encountered, when the input voltage is powered down, the level conversion unit triggers a discharge function, that is, all the voltages of the level conversion unit are converted into high levels and start to discharge, which can release residual charges in the panel to prevent polarization of liquid crystal molecules. At present, in order to meet the above requirements, a general design needs at least three analog negative pressures, but such a design causes high cost.
Disclosure of Invention
In view of the above, it is necessary to provide a control method of a display panel circuit and a display panel circuit capable of effectively preventing polarization of liquid crystal molecules in a panel end in view of the above technical problems.
A control method of a display panel circuit, the display panel circuit comprising: a power management unit and a level conversion unit;
the power supply management unit outputs an analog voltage signal to the level conversion unit according to an input signal, wherein the analog voltage signal comprises three paths of analog negative voltage signals;
and the level conversion unit outputs two paths of discharge trigger signals based on the three paths of analog negative voltage signals.
Optionally, the power management unit includes a buck conversion circuit, a first negative linear regulating circuit, and a second negative linear regulating circuit; the power management unit outputting an analog voltage signal to the level conversion unit according to an input signal includes:
the voltage-reducing conversion circuit outputs a first path of analog negative pressure signal according to the input signal;
the first negative linear regulating circuit receives the first path of analog negative pressure signal output by the voltage-reducing conversion circuit and outputs a second path of analog negative pressure signal based on the first path of analog negative pressure signal;
the second negative linear regulating circuit receives the first path of analog negative pressure signal output by the voltage-reducing type conversion circuit and outputs a third path of analog negative pressure signal based on the first path of analog negative pressure signal.
Optionally, the method further includes: the analog voltage signal still includes the simulation malleation signal, level conversion unit includes based on two routes simulation negative pressure signal output two routes discharge trigger signal:
and the level conversion unit takes the first path of analog negative voltage signal or the third path of analog negative voltage signal as low-level analog voltage, takes the analog positive voltage signal as high-level analog voltage and outputs a first path of discharge trigger signal.
Optionally, the method further includes:
and taking the second path of analog negative voltage signal as a low-level analog voltage, taking the analog positive voltage signal as a high-level analog voltage, and outputting a second path of discharge trigger signal.
Optionally, the method further includes:
the value of the second path of simulated negative pressure signal is smaller than that of the first path of simulated negative pressure signal; the value of the third path of simulated negative pressure signal is smaller than that of the first path of simulated negative pressure signal.
Optionally, the method further includes:
when the analog positive voltage signal reaches a low voltage locking value, the discharge trigger signal is pulled to be a high level signal.
A display panel circuit, the display panel circuit comprising:
the power management unit is configured to output an analog voltage signal to the level conversion unit according to an input signal, wherein the analog voltage signal comprises three analog negative voltage signals;
the level conversion unit is configured to output two paths of discharge trigger signals based on the three paths of analog negative voltage signals.
According to the control method of the display panel circuit, the display panel circuit and the display panel device, the power supply management unit outputs an analog voltage signal to the level conversion unit according to an input signal, wherein the analog voltage signal comprises three paths of analog negative voltage signals; the level conversion unit outputs two paths of discharge trigger signals based on the three paths of analog negative voltage signals; in the embodiment, the power management unit outputs three different analog negative voltage signals, the level conversion unit outputs two discharging trigger signals based on the three different analog negative voltage signals, and compared with a mode of outputting three different analog negative voltage signals by using a traditional BUCK, the embodiment can reduce the design cost while ensuring that three different analog negative voltage signals and two different discharging trigger signals are accurately and effectively output.
Drawings
Fig. 1 is a schematic structural diagram of a display panel circuit in an embodiment of the present application.
Fig. 2 is another structural schematic diagram of a display panel circuit according to an embodiment of the present disclosure.
Fig. 3 is a schematic structural diagram of a level shift unit in a display panel circuit according to an embodiment of the present disclosure.
Fig. 4 is another structural schematic diagram of a display panel circuit according to an embodiment of the present disclosure.
Fig. 5 is a waveform diagram of a display panel circuit according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The control method of the display panel circuit provided by the application can be applied to the application environment shown in fig. 1. As shown in fig. 2 below, the display panel circuit includes a power management unit 10 and a level conversion unit 20, and the power management unit 10 and the level conversion unit 20 are electrically connected; for solving the problem that the polarization of liquid crystal molecules in the panel ends cannot be effectively prevented.
In one embodiment, referring to fig. 1, the PMIC is mainly used for panel-side panel power supply, and generally integrates functions of three ICs including a power management unit 10(PM), a level shift unit 20(Levelshift), and a display P-Gamma. The present application mainly explains specific circuit structures of the power management unit 10(PM) and the level shift unit 20(Levelshift), and operating states thereof in their actual application processes.
In an exemplary embodiment, the panel end panel includes an array substrate, a color filter substrate arranged in a box-to-box manner with the array substrate, and a liquid crystal layer sandwiched between the array substrate and the color filter substrate. The array substrate comprises a grid line and a data line, the grid line and the data line are crossed to form a plurality of sub-pixel regions, a thin film transistor is arranged in each sub-pixel region, the grid electrode of the thin film transistor is connected with the grid line, the source electrode of the thin film transistor is connected with the data line, the drain electrode of the thin film transistor is connected with a pixel electrode, and the on-off of the thin film transistor can be controlled through the grid line, so that whether signals of the data line are written into the pixel electrode or not is controlled. Here, the panel-end panel may be a display of another type such as an organic light emitting diode display, in addition to the liquid crystal display. The display panel circuit PMIC is mainly used for supplying power to the panel-side panel, so that the panel-side panel operates.
Referring to fig. 2 below, the display panel circuit includes: a power management unit 10 and a level conversion unit 20. The power management unit 10 and the level conversion unit 20 are electrically connected.
The power management unit 10 outputs an analog voltage signal to the level conversion unit 20 according to the input signal, wherein the analog voltage signal includes three analog negative voltage signals.
The power management unit 10 is a unit for providing a driving voltage and an analog voltage to the level shifter 20. The power management unit 10 may output signals such as a digital power signal (DVDD), an analog power signal (AVDD), a half analog power signal (HAVDD), a gate high level (VGH), and a gate low level (VGL) according to the input signal Vin. In an actual application process, the power management unit 10 can provide a positive analog voltage signal VGH and at least one negative analog voltage VGL to the level conversion unit 20 according to actual requirements. In this embodiment, the power management unit 10 can provide three analog negative voltage signals VGL to the level conversion unit 20. Preferably, the three analog negative voltage signals VGL are analog negative voltage signals VGL with different voltage values.
The level conversion unit 20 outputs two paths of discharge trigger signals based on the three paths of analog negative voltage signals.
Referring to fig. 3 below, a circuit configuration diagram of the level shift unit 20 is shown. Illustratively, the display panel circuit generally further includes a TCON circuit, in which a crystal oscillator is integrated, and the TCON circuit is capable of generating a clock signal CLKT (low level 0V and high level 3.3V), and the level shifter 20 is configured to generate signals such as STV, CLK, VSS, VDDO, VDDE, VGL, VGH, etc. according to the signal (e.g., analog negative voltage signal) output by the power management unit 10 and the signal output by the TCON circuit.
In this embodiment, the power management unit 10 provides one path of analog positive voltage signal (VGH) and three paths of analog negative voltage signals (VGL) to the level conversion unit 20, and the level conversion unit 20 generates two paths of discharging trigger signals VSS under the action of the one path of analog positive voltage signal (VGH) and the three paths of analog negative voltage signals (VGL). The discharge trigger signal VSS is a signal that triggers the level shifter 20 to output when the level shifter 20 is required to discharge. The two discharging trigger signals VSS are preferably discharging trigger signals VSS with different voltage values.
Illustratively, the display panel circuit further includes a gate driving circuit that generates a gate driving signal using the signal generated by the level converting unit 20. The power management unit 10, the level conversion unit 20, and the Gate driving circuit may be implemented by using integrated circuit boards, and the Gate driving circuit may also be implemented by using a shift register, that is, a Gate On Array (GOA) mode is set On the panel end, that is, a shift register unit (GOA unit) On the panel end is used as the Gate driving circuit. The gate driving circuit outputs a Gout signal, which is VGL or VGH during an operation period, to the gate line under the control of the signal output from the level shifter unit 20. Here, VGL and VGH output by the level shift unit 20 to the gate driving circuit 40 are VGL and VGH output by the power management unit 10 to the level shift unit 20, and the gate driving circuit determines which gate line at the panel end outputs VGH and which gate line outputs VGL according to the level of the CLK signal.
In this embodiment, the power management unit outputs an analog voltage signal to the level conversion unit according to the input signal, wherein the analog voltage signal includes three analog negative voltage signals; the level conversion unit outputs two paths of discharge trigger signals based on the three paths of analog negative voltage signals; in the embodiment, the power management unit outputs three different simulation negative pressure signals, the level conversion unit outputs two discharging trigger signals based on the three different simulation negative pressure signals, and compared with a mode of outputting three different simulation negative pressure signals by using a traditional BUCK, the embodiment can ensure that three different simulation negative pressure signals and two different discharging trigger signals are accurately and effectively output, and meanwhile, the design cost can be reduced.
Illustratively, the power management unit 10 includes a buck converter circuit 101, a first negative linear regulator circuit 102, and a second negative linear regulator circuit 103; the power management unit 10 outputting an analog voltage signal to the level conversion unit 20 according to the input signal includes:
the buck conversion circuit 101 outputs a first analog negative voltage signal according to the input signal. The first negative linear regulating circuit 102 receives the first path of analog negative voltage signal output by the buck conversion circuit 101, and outputs a second path of analog negative voltage signal based on the first path of analog negative voltage signal. The second negative linear regulating circuit receives the first path of analog negative pressure signal output by the buck conversion circuit 101, and outputs a second path of analog negative pressure signal based on the first path of analog negative pressure signal.
The buck conversion circuit 101 is a buck conversion regulator, and can efficiently output an output signal VOUT lower than an input signal VIN. The buck converter circuit 101 typically includes an inductor, a switching Field Effect Transistor (FET) or diode, a capacitor, and an error amplifier with a switching control circuit. The buck converter circuit 101 changes the turn-on time of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) and then applies power to the inductor. The buck converter circuit 101 has a high efficiency because the MOSFETs are either fully on or fully off. Between the two states, on and off (impedance), the buck converter is not operating.
The first negative linear regulating circuit/the second negative linear regulating circuit may also be referred to as an operational amplifier. It is an amplifier with special coupling circuit and feedback. The first negative linear adjustment circuit/the second negative linear adjustment circuit may be the same operational amplifier. For example: the first negative linear adjustment circuit/the second negative linear adjustment circuit may be implemented using a differential amplifier. In the present embodiment, the output signal of the first negative linearity adjusting circuit/the second negative linearity adjusting circuit is the result of mathematical operations of linearly adding, subtracting or differentiating, integrating, etc. the input signal. The first negative linear regulating circuit/the second negative linear regulating circuit has larger stability margin and stronger robustness to the error of a system model, and is widely used for controlling the production process. Since the input signal and the output signal of the first negative linear adjustment circuit/the second negative linear adjustment circuit in the present embodiment are both low-level signals, that is, both negative voltage signals, they are referred to as negative linear adjustment circuits.
For example, an input signal is firstly input to the input port VIN of the buck conversion circuit 101, and the first path of analog negative voltage signal VGL1 is output to the level conversion unit 20 by the buck conversion circuit 101; and the first path of analog negative voltage signal VGL1 output by the first path of analog negative voltage signal VGL1 is input to the first negative linear regulating circuit 102 and the second negative linear regulating circuit 103, and the first negative linear regulating circuit 102 outputs the second path of analog negative voltage signal VGL2 to the level converting unit 20 under the action of the first path of analog negative voltage signal VGL 1. The second negative linear regulating circuit 103 outputs a third analog negative voltage signal VGL3 to the level shifting unit 20 under the action of the first analog negative voltage signal VGL 1. Illustratively, if the first analog negative voltage signal VGL1 is-10V, the second analog negative voltage signal VGL2 output after the first analog negative voltage signal-10V is processed by the first negative linear regulating circuit 102 is-8V, and the third analog negative voltage signal VGL3 output after the first analog negative voltage signal-10V is processed by the second negative linear regulating circuit 103 is-6V.
In this embodiment, the first path of the analog negative voltage signal VGL1 is first output by the buck converter circuit, and then the second path of the analog negative voltage signal VGL2 and the third path of the analog negative voltage signal VGL3 are generated from the first path of the analog negative voltage signal VGL1 in the OP mode (i.e., under the action of the first negative linear adjusting circuit 102 and the first negative linear adjusting circuit 103). It should be noted that, in the embodiment, the second analog negative voltage signal VGL2 ≠ the third analog negative voltage signal VGL3< the first analog negative voltage signal VGL1, since the design cost of the OP mode is lower than that of the buck conversion circuit, compared with the case of only using the buck conversion circuit to output three analog negative voltage signals, this embodiment can ensure that three analog negative voltage signals are accurately and effectively output, and at the same time, the design cost can be reduced.
Illustratively, the analog voltage signal further includes an analog positive voltage signal, and the outputting, by the level shift unit, the two discharge trigger signals based on the three analog negative voltage signals includes:
the level conversion unit takes the first path of analog negative pressure signal or the third path of analog negative pressure signal as low-level analog voltage, takes the analog positive pressure signal as high-level analog voltage, and outputs a first path of discharge trigger signal; and taking the second path of analog negative voltage signal as a low-level analog voltage, taking the analog positive voltage signal as a high-level analog voltage, and outputting a second path of discharge trigger signal.
The level shifter is mainly used for providing the GOA signal (i.e., LS _ OUT signal, which generally includes STV, CK _ OUT, LC _ OUT, VSS, etc.) to the panel. The level conversion unit can output the input PWM pulse width modulation waveform of 0V-3.3V into the PWM waveform of voltage between VGL-VGH through level conversion, and the internal design framework is shown in figure 3. Referring to fig. 5, the analog positive voltage signal is VHG and the analog negative voltage signal is VGL, that is, if the input terminal is grounded, the output terminal will continuously output the analog negative voltage signal with the voltage value of VGL. In addition, the LS _ OUT signal generally has a Discharge (Discharge) function: the Discharge function mainly functions to trigger the LS _ OUT signal to fully pull up the VGH level after the input Power supply voltage (Vin Power supply) of the Power management unit 10 is reduced to its low voltage locking value (UVLO value), usually 75% of the input Power supply voltage, so as to release the residual charges in the panel and prevent polarization of the liquid crystal molecules. The discharging (Discharge) waveform is shown in fig. 5, when the analog positive voltage signal VGH reaches the low voltage lock value (UVLO value), VSS and LS _ O are both pulled high to VGH and then released along with VGH.
In view of the above, due to the requirement of the shift register (GOA) circuit design, the level shifter unit is required to output two discharging trigger signals (VSS negative voltage signals) with discharging (discharging) function, and the voltage values of the two discharging trigger signals (VSS negative voltage signals) are different (i.e. VSS1 ≠ VSS2), and the relationship between the two discharging trigger signals and the analog negative voltage signal is as follows:
VSS1 ≠ VSS2 ≠ VGL (assume | VSS1| > | VSS2|, which represents only the absolute value of the voltage here);
VSS1 ≠ VSS2 (it is assumed that | VSS1| > | VSS2|, which represents only the absolute value of the voltage here).
Therefore, in order to meet the above requirements, the level conversion unit uses the first path of analog negative voltage signal VGL1 or the third path of analog negative voltage signal VGL3 as a low-level analog voltage, uses the analog positive voltage signal VGH as a high-level analog voltage, and outputs the first path of discharging trigger signal (VSS 1); and outputting a second path of discharging trigger signal (VSS2) by taking the second path of analog negative voltage signal VGL2 as a low-level analog voltage and taking the analog positive voltage signal VGH as a high-level analog voltage; that is, for the second path of discharging trigger signal (VSS2), the second path of analog negative voltage signal VGL2 is used as a low-level analog voltage, and for the first path of discharging trigger signal (VSS1), the first path of analog negative voltage signal VGL1 or the third path of analog negative voltage signal VGL3 is used as a low-level analog voltage. It should be noted that, the exemplary adjustment may be performed according to the requirements of the panel; therefore, the requirements of the panel end on three different negative pressures are met, three paths of simulated negative pressure signals are accurately and effectively output, and meanwhile, the design cost can be reduced.
As an example, when two different discharging trigger signals are required at the panel end and are not equal to the first analog negative voltage signal VGL1 (i.e., the panel requires two discharging trigger signals VSS1/VSS 2: the second analog negative voltage signal VGL2 ≠ the third analog negative voltage signal VGL3< the first analog negative voltage signal VGL1), the OP mode is used to set VGL2 ═ VSS2, VGL3 ═ VSS1, then the second discharging trigger signal (VSS2) selects the second analog negative voltage signal VGL2 as the low-level analog voltage, and the first discharging trigger signal (VSS1) selects the third analog negative voltage signal VGL3 as the low-level analog voltage, so as to meet the requirement.
Illustratively, the value of the second path of analog negative pressure signal is smaller than that of the first path of analog negative pressure signal; the value of the third analog negative pressure signal is smaller than that of the first analog negative pressure signal.
In the present embodiment, the output signals of the first negative linear regulating circuit and the second negative linear regulating circuit are the result of linearly subtracting the input signal, and therefore, the value of the second analog negative pressure signal is smaller than that of the first analog negative pressure signal. The value of the third analog negative pressure signal is smaller than that of the first analog negative pressure signal. It should be noted that, in this embodiment, the value of the first analog negative voltage signal, the value of the second analog negative voltage signal, and the value of the third analog negative voltage signal are all absolute voltage values. Namely | VGL2> | VGL1| and | VGL3> | VGL1 |.
Illustratively, the discharge trigger signal is converted to a high level signal after the analog positive voltage signal reaches the low voltage lock value. When the analog positive voltage signal VGH reaches the low voltage lock value (UVLO value), VSS and LS _ O are both pulled high to VGH and then released along with VGH.
Based on the same inventive concept, the present embodiment further provides a display panel circuit, as shown in fig. 1 to 5, including: a power management unit 10 and a level conversion unit 20; the power management unit 10 is electrically connected with the level conversion unit 20, and the power management unit 10 is configured to output an analog voltage signal to the level conversion unit according to the input signal, wherein the analog voltage signal comprises three analog negative voltage signals; and a level conversion unit 20 configured to output two-way discharge trigger signals based on the three-way analog negative voltage signal.
The power management unit 10 provides the level conversion unit 20 with a driving voltage and an analog voltage. The power management unit 10 may output signals such as a digital power signal (DVDD), an analog power signal (AVDD), a half analog power signal (HAVDD), a gate high level (VGH), and a gate low level (VGL) according to the input signal Vin. In an actual application process, the power management unit 10 can provide a positive analog voltage signal VGH and at least one negative analog voltage VGL to the level conversion unit 20 according to actual requirements. In this embodiment, the power management unit 10 can provide three analog negative voltage signals VGL to the level conversion unit 20. Preferably, the three analog negative voltage signals VGL are analog negative voltage signals VGL with different voltage values.
Illustratively, the power management unit 10 provides a path of analog positive voltage signal (VGH) and three paths of analog negative voltage signals (VGL) to the level conversion unit 20, and the level conversion unit 20 generates two paths of discharge triggering signals VSS under the action of the path of analog positive voltage signal (VGH) and the three paths of analog negative voltage signals (VGL).
Illustratively, the power management unit 10 includes a buck converter circuit 101, a first negative linear regulating circuit 102, and a second negative linear regulating circuit 103.
Illustratively, the output end of the buck conversion circuit is connected to the level conversion unit and configured to input the first path of analog negative voltage signal to the level conversion unit. The output end of the first negative linear regulating circuit is connected with the level conversion unit and is configured to input the second path of analog negative voltage signal to the level conversion unit. The output end of the buck conversion circuit is connected with the second negative linear regulating circuit and is configured to input the first path of analog negative voltage signal to the second negative linear regulating circuit, and the output end of the second negative linear regulating circuit is connected with the level conversion unit and is configured to input the third path of analog negative voltage signal to the level conversion unit.
Illustratively, the level conversion unit includes a control trigger unit, and the control trigger unit is configured to take the first path of analog negative voltage signal or the third path of analog negative voltage signal as a low-level analog voltage, take the analog positive voltage signal as a high-level analog voltage, and output a first path of discharge trigger signal; and taking the second path of analog negative voltage signal as a low-level analog voltage, taking the analog positive voltage signal as a high-level analog voltage, and outputting a second path of discharge trigger signal.
Exemplarily, the level conversion unit further comprises a discharge unit, and a control end of the discharge unit is electrically connected with the control trigger unit; the discharging unit is used for switching from an off state to an on state according to a discharging trigger signal output by the control trigger unit.
Illustratively, in a normal display stage or a shutdown state of the display panel, the discharge unit is in a cut-off state, and at this time, the power supply output end maintains a normal working potential or a normal potential after power failure. The control trigger unit is mainly responsible for detecting the power-down state and controlling the conduction of the discharge unit according to the power-down state. Specifically, in the present embodiment, the discharge trigger signal provided by the level shift circuit of the display panel is used as a basis for detecting the power down of the panel, and those skilled in the art can understand that the discharge trigger signal is substantially a low level signal in a normal state, and is different from a normal low level signal in that the discharge trigger signal is temporarily raised during a power-off action, that is, in a power-down state, the discharge trigger signal is pulled up from a low level to a high level and gradually pulled down to a low level again. Based on this, the control trigger unit essentially controls the discharge unit to switch to the conducting state in the power-down state according to the level jump of the discharge trigger signal, so that the common electrode in the plane is grounded, and the effect of rapid discharge is realized.
It should be noted that the display panel in this embodiment is the display panel in any one of the control methods of the display panel in the above embodiments. Since the display panel in any of the display panel control methods in the above embodiments is used, the display panel has the same advantageous effects. Redundant description is not repeated herein.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A method of controlling a display panel circuit, the display panel circuit comprising: a power management unit and a level conversion unit;
the power supply management unit outputs an analog voltage signal to the level conversion unit according to an input signal, wherein the analog voltage signal comprises three paths of analog negative voltage signals;
and the level conversion unit outputs two paths of discharge trigger signals based on the three paths of analog negative voltage signals.
2. The control method of the display panel circuit according to claim 1, wherein the power management unit includes a buck converter circuit, a first negative linear regulator circuit, and a second negative linear regulator circuit; the power management unit outputting an analog voltage signal to the level conversion unit according to an input signal includes:
the voltage-reducing conversion circuit outputs a first path of analog negative pressure signal according to the input signal;
the first negative linear regulating circuit receives the first path of analog negative pressure signal output by the voltage-reducing conversion circuit and outputs a second path of analog negative pressure signal based on the first path of analog negative pressure signal;
the second negative linear regulating circuit receives the first path of analog negative pressure signal output by the voltage-reducing type conversion circuit and outputs a third path of analog negative pressure signal based on the first path of analog negative pressure signal.
3. The method as claimed in claim 2, wherein the analog voltage signal further comprises an analog positive voltage signal, and the step of outputting the two-way discharging trigger signal by the level shifter unit based on the three-way analog negative voltage signal comprises:
and the level conversion unit takes the first path of analog negative voltage signal or the third path of analog negative voltage signal as low-level analog voltage, takes the analog positive voltage signal as high-level analog voltage and outputs a first path of discharge trigger signal.
4. The method of claim 3, wherein the level shifting unit outputting two discharge triggering signals based on the three analog negative voltage signals further comprises:
and the level conversion unit takes the second path of analog negative voltage signal as a low-level analog voltage and takes the analog positive voltage signal as a high-level analog voltage to output a second path of discharge trigger signal.
5. The control method of the display panel circuit according to claim 2, wherein the value of the second channel of analog negative voltage signal is smaller than the value of the first channel of analog negative voltage signal; the value of the third path of simulated negative pressure signal is smaller than that of the first path of simulated negative pressure signal.
6. The method as claimed in claim 3, wherein the discharging trigger signal is pulled to a high level signal after the analog positive voltage signal reaches the low voltage lock value.
7. A display panel circuit, comprising: a power management unit and a level conversion unit; the power management unit is electrically connected with the level conversion unit,
the power management unit is configured to output an analog voltage signal to the level conversion unit according to an input signal, wherein the analog voltage signal comprises three analog negative voltage signals;
the level conversion unit is configured to output two paths of discharge trigger signals based on the three paths of analog negative voltage signals.
8. The display panel circuit of claim 7, wherein the power management unit comprises a buck converter circuit, a first negative linear regulation circuit, and a second negative linear regulation circuit,
the output end of the buck conversion circuit is connected with the level conversion unit and is configured to input the first path of analog negative voltage signal to the level conversion unit;
the output end of the buck conversion circuit is connected with the first negative linear regulating circuit and is configured to input the first path of analog negative voltage signal to the first negative linear regulating circuit, and the output end of the first negative linear regulating circuit is connected with the level conversion unit and is configured to input the second path of analog negative voltage signal to the level conversion unit;
the output end of the buck conversion circuit is connected with the second negative linear regulating circuit, and is configured to input the first path of analog negative voltage signal to the second negative linear regulating circuit, and the output end of the second negative linear regulating circuit is connected with the level conversion unit, and is configured to input the third path of analog negative voltage signal to the level conversion unit.
9. The display panel circuit according to claim 8, wherein the level conversion unit comprises a control trigger unit, and the control trigger unit is configured to output a first path of discharge trigger signal by using the first path of analog negative voltage signal or the third path of analog negative voltage signal as a low-level analog voltage and the analog positive voltage signal as a high-level analog voltage; and taking the second path of analog negative voltage signal as a low-level analog voltage, taking the analog positive voltage signal as a high-level analog voltage, and outputting a second path of discharge trigger signal.
10. The display panel circuit according to claim 9, the level conversion unit further comprising a discharge unit, a control terminal of the discharge unit being electrically connected to the control trigger unit; the discharging unit is used for switching from an off state to an on state according to the discharging trigger signal output by the control trigger unit.
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| CN114242015B (en) | 2023-01-20 |
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