CN114204414A - VCSEL manufacturing method with controllable optical path, high thermal conductivity and low resistance and VCSEL - Google Patents
VCSEL manufacturing method with controllable optical path, high thermal conductivity and low resistance and VCSEL Download PDFInfo
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- CN114204414A CN114204414A CN202111356425.2A CN202111356425A CN114204414A CN 114204414 A CN114204414 A CN 114204414A CN 202111356425 A CN202111356425 A CN 202111356425A CN 114204414 A CN114204414 A CN 114204414A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H01S5/18308—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement
- H01S5/18311—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement using selective oxidation
- H01S5/18313—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement using selective oxidation by oxidizing at least one of the DBR layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H01S5/18361—Structure of the reflectors, e.g. hybrid mirrors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
- H01S5/343—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Semiconductor Lasers (AREA)
Abstract
The invention relates to a VCSEL manufacturing method with controllable optical path, high thermal conductivity and low resistance and a VCSEL, wherein the method comprises the following steps: coupling the main DBRAl over the MQW layerxiGa1‑xiAs/AlyGa1‑yAs(xi>y is more than or equal to 0 and less than or equal to 1, and xi is gradually increased from top to bottom) medium and high Al percent component AlxiGa1‑xiPartial complete oxidation of As to Al2O3Forming Al on the desired optical pathxiGa1‑xiAs/AlyGa1‑yAs DBR stack structure and AlxiGa1‑xiAs/AlyGa1‑yThe As DBR stack structure gradually narrows from top to bottom, and simultaneously the Al content is controlled to be lower than that of the MQWzGa1‑zOxidation rate of As, in turn controlling center unoxidized AlzGa1‑zSize of As Current ApertureWherein the Al% component satisfies z>xi>y; al formed by complete oxidation of peripheral part2O3Removing by chemical etching to retain Al in optical pathxiGa1‑xiAs/AlyGa1‑yAn As DBR stack structure; removing Al of peripheral portion2O3The formed space is filled with ohmic metal in one or more of atomic layer deposition, sputtering, evaporation and electroplating to form a low-resistance electric conduction path.
Description
Technical Field
The invention relates to the technical field of VCSELs, in particular to a VCSEL manufacturing method with a controllable optical path, high heat conductivity and low resistance and a VCSEL.
Background
The existing resonant cavity reflector is made of AlxGa1-xAs/AlyGa1-yAs is stacked epitaxially. Because of the small difference of the refractive indexes, more Al pairs are neededxGa1-xAs/AlyGa1-yAs is stacked to achieve a reflectivity of approximately 99%. Current confinement AlGaAs to Al by oxidation process2O3The periphery is oxidized to form a current limiting layer, and the periphery is not oxidized to form a current channel. The overall current path is small and AlGaAs is itself a more difficult semiconductor material to dope, with higher resistance compared to metal.
Disclosure of Invention
In view of the above, it is desirable to provide a method for fabricating a VCSEL with controllable optical path, high thermal conductivity, and low electrical resistance, and a VCSEL.
In order to solve the technical problems, the invention adopts the technical scheme that: a method of fabricating a VCSEL having a stack of high thermal conductivity, low resistance DBR pairs with a controllable optical path, comprising the steps of: main DBR Al over MQW layerxiGa1-xiAs/AlyGa1-yAs(xi>y is more than or equal to 0 and less than or equal to 1, and xi is gradually increased from top to bottom) medium and high Al percent component AlxiGa1-xiPartial complete oxidation of As to Al2O3Forming Al on the desired optical pathxiGa1-xiAs/AlyGa1-yAs DBR stack structure and AlxiGa1-xiAs/AlyGa1-yThe As DBR stack structure gradually narrows from top to bottom, and simultaneously the Al content is controlled to be lower than that of the MQWzGa1-zOxidation rate of As, in turn controlling center unoxidized AlzGa1-zThe size of As current aperture, wherein the Al% component satisfies z>xi>y; al formed by complete oxidation of peripheral part2O3Removing by chemical etching to retain Al in optical pathxiGa1-xiAs/AlyGa1-yAs DBR stackStacking structures; removing Al of peripheral portion2O3The formed space is filled with ohmic metal in one or more of atomic layer deposition, sputtering, evaporation and electroplating to form a low-resistance electric conduction path.
Further, the method also comprises the steps of epitaxial growth, platform etching and upper electrode manufacturing.
Further, Al is included in the removed peripheral portion2O3MQW adjacent Al is previously protected by photoresist2O3。
Further, Al in the peripheral portion2O3An etching process is adopted.
Further, the method also comprises the following steps of secondary mesa etching, lower electrode manufacturing, dielectric layer coating and welding pad evaporation.
The invention also provides a VCSEL with controllable optical path, high thermal conductivity and low resistance, which comprises a substrate, an electrode contact layer, a lower DBR, an MQW and an upper DBR, wherein the stack structure on the optical path in the upper DBR is gradually enlarged from bottom to top, and ohmic metal is filled on two sides of the stack structure.
Further, a current aperture is disposed above the MQW, the current aperture having an outer diameter smaller than an outer diameter of the stacked structure.
Further, the stacked structure is made of AlxiGa1-xiAs/AlyGa1-yAs is formed.
The invention has the beneficial effects that: by oxidation of the high Al% component AlxiGa1-xiAs forming AlxiGa1-xiAs/AlyGa1-yAs DBR stack structure, optical path is controlled by controlling oxidation rate, and Al is controlled byxiGa1-xiAs/AlyGa1-yThe As DBR stacking structure is gradually narrowed from top to bottom to form an open type, so that current can pass more conveniently; and by controlling the low Al% component AlzGa1-zThe rate of oxidation of As in turn controls the central unoxidized AlzGa1-zThe size of the As current aperture controls the whole current channel, so that the current channel is controllable. To be provided withOhmic metal as current limiting layer to replace existing Al2O3The electrical resistance is reduced and the thermal conductivity is improved.
Drawings
FIG. 1 shows a VCSEL manufacturing method with controllable optical path, high thermal conductivity and low electrical resistance and an Al-based VCSEL manufactured by the methodyGa1-yA process structure flow diagram when y is 0 in As;
fig. 2 is a schematic flow chart of a VCSEL manufacturing method with controllable optical path, high thermal conductivity, and low electrical resistance according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly apparent, a method for fabricating a VCSEL with controllable optical path, high thermal conductivity and low electrical resistance and a VCSEL according to the present invention are described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1-2, a method for fabricating a VCSEL with a controllable optical path and a stacked high thermal conductivity and low resistance DBR pair includes the following steps: main DBR Al over MQW layerxiGa1-xiAs/AlyGa1-yAs(xi>y is more than or equal to 0 and less than or equal to 1, and xi is gradually increased from top to bottom) medium and high Al percent component AlxiGa1-xiPartial complete oxidation of As to Al2O3Forming Al on the desired optical pathxiGa1-xiAs/AlyGa1-yAs DBR stack structure and AlxiGa1-xiAs/AlyGa1-yThe As DBR stack structure gradually narrows from top to bottom, and simultaneously the Al content is controlled to be lower than that of the MQWzGa1-zOxidation rate of As, in turn controlling center unoxidized AlzGa1-zThe size of As current aperture, wherein the Al% component satisfies z>xi>y; al formed by complete oxidation of peripheral part2O3Removing by chemical etching to retain Al in optical pathxiGa1-xiAs/AlyGa1- yAs DBR stackStructure; removing Al of peripheral portion2O3The formed space is filled with ohmic metal in one or more of atomic layer deposition, sputtering, evaporation and electroplating to form a low-resistance electric conduction path.
By oxidation of the high Al% component AlxiGa1-xiAs forming AlxiGa1-xiAs/AlyGa1-yAs DBR stack structure, optical path is controlled by controlling oxidation rate, and Al is controlled byxiGa1-xiAs/AlyGa1-yThe As DBR stacking structure is gradually narrowed from top to bottom to form an open type, so that current can pass more conveniently; and by controlling the low Al% component AlzGa1-zThe rate of oxidation of As in turn controls the central unoxidized AlzGa1-zAs the size of the As current aperture controls the whole current channel, the current channel is controllable, and the whole current channel forms a shape similar to a funnel through control, so that the current can pass through the current channel conveniently. Replacing existing Al with ohmic metal as current confining layer2O3The electrical resistance is reduced and the thermal conductivity is improved. Replacing existing Al with ohmic metal as current confining layer2O3The electrical resistance is reduced and the thermal conductivity is improved. It will be appreciated that xi is gradually larger from top to bottom, i.e. Al% is gradually larger from top to bottom, thereby controlling the geometry of the central optical electrical path.
Further, the method also comprises the steps of epitaxial growth, platform etching and upper electrode manufacturing.
Further, Al is included in the removed peripheral portion2O3MQW adjacent Al is previously protected by photoresist2O3。
Further, Al in the peripheral portion2O3An etching process is adopted. Namely, wet etching or dry etching process can be selected according to the requirement.
Further, the method also comprises the following steps of secondary mesa etching, lower electrode manufacturing, dielectric layer coating and welding pad evaporation.
As can be understood, the overall flow includes in sequence: outer coverGrowing to form an epitaxial structure, which generally mainly comprises an upper DBR layer, an MQW, a lower DBR layer and a substrate; a step of primary platform etching/upper electrode manufacturing, wherein the primary platform etching enables the upper DBR layer to form a primary etching table-board, the upper electrode manufacturing is to form an upper electrode on the primary etching table-board, and the electrode can be formed in a vapor deposition mode generally; oxidation to form HC-DBR (High refractive index contrast-distributed Bragg reflector), i.e., the main DBR Al above the MQW layerxiGa1-xiAs/AlyGa1-yAs(x>y is more than or equal to 0 and less than or equal to 1) medium and high Al percent component AlxGa1-xPartial complete oxidation of As to Al2O3Forming Al on the desired optical pathxiGa1-xiAs/AlyGa1-yAs DBR stack structure by controlling the low Al% component Al closer to MQWzGa1-zOxidation rate of As, in turn controlling center unoxidized AlzGa1-zThe size of As current aperture, wherein the Al% component satisfies z>xi>y; photoresist protection MQW near Al2O3I.e. Al exposed on the top of MQW and outside the primary etching mesa2O3Protected by photoresist, photoresist can be formed by coating process; chemical etching to remove peripheral Al2O3I.e. Al formed by complete oxidation of the peripheral part2O3Removing by chemical etching to retain Al in optical pathxiGa1-xiAs/AlyGa1-yAs DBR stack structure and AlxiGa1-xiThe As/AlyGa1-yAs DBR stack structure is gradually narrowed from top to bottom, and meanwhile, the Al content is controlled to be lower than that of the lower Al content component Al adjacent to MQWzGa1-zOxidation rate of As, in turn controlling center unoxidized AlzGa1-zThe size of the As current aperture; filling the ohmic metal, namely filling the ohmic metal in one or more of atomic layer deposition, sputtering, evaporation and electroplating to form a low-resistance electric conduction path; secondary mesa etching, i.e. etching the lower DBR below the MQW and above the substratePartially, forming a secondary etching table-board; manufacturing a lower electrode, namely forming the lower electrode on the electrode contact layer (the part between the lower DBR and the substrate) outside the secondary etching mesa; coating a dielectric layer and evaporating a welding pad.
Obviously, each pair of AlxiGa1-xiAs/AlyGa1-yThe thickness of the As DBR stack layer satisfies the lambda/2 n of the resonant cavityeffWhere λ is the wavelength of the laser's main emission, neffThe equivalent refractive index of the stacked layers in each pair of DBRs for that wavelength.
The invention also provides a VCSEL with controllable optical path, high thermal conductivity and low resistance, which comprises a substrate, an electrode contact layer, a lower DBR, an MQW and an upper DBR, wherein the stack structure on the optical path in the upper DBR is gradually enlarged from bottom to top, and ohmic metal is filled on two sides of the stack structure.
Further, a current aperture is disposed above the MQW, the current aperture having an outer diameter smaller than an outer diameter of the stacked structure. That is, the outer diameter of the stacked structure is greater than that of the current aperture, forming a funnel shape, so that current can more conveniently enter the current aperture, thereby improving efficiency.
Further, the optical path of the stacked structure is made of AlxiGa1-xiAs/AlyGa1-yAs is formed.
As can be understood, the VCSEL is a Vertical-Cavity Surface-Emitting Laser (VCSEL for short, and also a Vertical-Cavity Surface-Emitting Laser); MQW, Multiple Quantum Well, Multiple Quantum Well; ALD, Atomic layer deposition; DBR, Distributed Bragg Reflector. Al, Ga, As, Al2O3That is, alumina generally means that AlGaAs is oxidized to Al in VCSEL structure2O3Mainly containing a small amount of Ga2O3GaAs or a mixture of AlAs.
It should be noted that, if directional indications (such as up, down, left, right, front, and back … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative positional relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indications are changed accordingly.
In summary, the VCSEL and the method for fabricating the VCSEL with the controllable optical path, high thermal conductivity and low electrical resistance provided by the present invention oxidize Al with high Al% componentxiGa1-xiAs forming AlxiGa1-xiAs/AlyGa1-yAs DBR stack structure, optical path is controlled by controlling oxidation rate, and Al is controlled byxiGa1-xiAs/AlyGa1-yThe As DBR stacking structure is gradually narrowed from top to bottom to form an open type, so that current can pass more conveniently; and by controlling the low Al% component AlzGa1-zThe rate of oxidation of As in turn controls the central unoxidized AlzGa1-zThe size of the As current aperture controls the whole current channel, so that the current channel is controllable. Replacing existing Al with ohmic metal as current confining layer2O3The electrical resistance is reduced and the thermal conductivity is improved.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (8)
1. A method of fabricating a VCSEL having a stack of high thermal conductivity, low resistance DBR pairs with a controllable optical path, comprising the steps of:
main DBR Al over MQW layerxiGa1-xiAs/AlyGa1-yAs(xi>y is more than or equal to 0 and less than or equal to 1, and xi is gradually increased from top to bottom) medium and high Al% groupAl componentxiGa1-xiThe peripheral portion of As is completely oxidized to convert it into Al2O3Forming Al on the desired optical pathxiGa1-xiAs/AlyGa1-yAsDBR stack structure and making the AlxiGa1-xiAs/AlyGa1-yThe As DBR stack structure gradually narrows from top to bottom, and simultaneously the Al content is controlled to be lower than that of the MQWzGa1-zOxidation rate of As, in turn controlling center unoxidized AlzGa1-zThe size of As current aperture, wherein the Al% component satisfies z>xi>y;
Al formed by complete oxidation of peripheral part2O3Removing by chemical etching to retain Al in optical pathxiGa1- xiAs/AlyGa1-yAn As DBR stack structure;
removing Al of peripheral portion2O3The formed space is filled with ohmic metal in one or more of atomic layer deposition, sputtering, evaporation and electroplating to form a low-resistance electric conduction path.
2. A method for fabricating a VCSEL in the form of an optical path controllable high thermal conductivity, low resistance DBR pair stack as recited in claim 1, further comprising a previous epitaxial growth, mesa etch/top electrode fabrication.
3. The method of claim 1 further comprising removing Al from the peripheral portion of the optical path in the VCSEL of the DBR pair stack2O3MQW adjacent Al is previously protected by photoresist2O3。
4. A method of fabricating a VCSEL having a controllable optical path, high thermal conductivity, low electrical resistance DBR pair stack as in claim 1, wherein Al is provided at an outer portion of the periphery2O3An etching process is adopted.
5. The method of claim 1, further comprising performing a second mesa etch, bottom electrode fabrication, dielectric layer coating, and bond pad evaporation.
6. The VCSEL with the optical path controllable high-thermal-conductivity and low-resistance DBR pair lamination is characterized by comprising a substrate, an electrode contact layer, a lower DBR, an MQW and an upper DBR, wherein a stacking structure on the optical path in the upper DBR is gradually enlarged from bottom to top, and ohmic metal is filled on two sides of the stacking structure.
7. An optical path controllable high thermal conductivity, low resistance DBR pair stacked VCSEL as in claim 6 wherein a current aperture is provided above said MQW, said current aperture having an outer diameter less than an outer diameter of said stacked structure.
8. The VCSEL of claim 6, wherein the stacked structure is formed from AlxiGa1-xiAs/AlyGa1-yAs is formed.
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CN202111356425.2A CN114204414A (en) | 2021-11-16 | 2021-11-16 | VCSEL manufacturing method with controllable optical path, high thermal conductivity and low resistance and VCSEL |
TW111138070A TW202324865A (en) | 2021-11-16 | 2022-10-06 | Manufacturing method of high-thermal-conductivity and low-resistance VCSEL (Vertical Cavity Surface Emitting Laser) with controllable optical path and VCSEL |
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CN202111356425.2A CN114204414A (en) | 2021-11-16 | 2021-11-16 | VCSEL manufacturing method with controllable optical path, high thermal conductivity and low resistance and VCSEL |
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Citations (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW200412001A (en) * | 2002-12-27 | 2004-07-01 | Ind Tech Res Inst | Oxide-confined type vertical cavity surface emitting laser and fabrication method thereof |
CN101227061A (en) * | 2007-12-28 | 2008-07-23 | 武汉光迅科技股份有限公司 | Manufacturing method of tunable semiconductor laser and tunable semiconductor laser |
JP2009188238A (en) * | 2008-02-07 | 2009-08-20 | Nec Corp | Surface light-emitting laser and method of manufacturing the same |
CN101604665A (en) * | 2007-07-20 | 2009-12-16 | 镓力姆企业私人有限公司 | Be used for nitride-based films with and the buried contact devices made |
CN101771114A (en) * | 2009-01-04 | 2010-07-07 | 厦门市三安光电科技有限公司 | Vertical light-emitting diode with new compound stacked barrier layer metal structure and preparation method thereof |
CN107437723A (en) * | 2017-09-21 | 2017-12-05 | 苏州全磊光电有限公司 | A kind of epitaxial structure for VCSEL array laser and preparation method thereof |
US20180261979A1 (en) * | 2015-06-09 | 2018-09-13 | Koninklijke Philips N.V. | Vertical cavity surface emitting laser |
KR101997787B1 (en) * | 2018-10-05 | 2019-07-08 | 주식회사 포셈 | Manufacturing method of vertical-cavity surface-emitting laser |
CN110197992A (en) * | 2019-06-17 | 2019-09-03 | 威科赛乐微电子股份有限公司 | A kind of efficient VCSEL chip and its manufacturing method |
CN110768105A (en) * | 2019-12-26 | 2020-02-07 | 常州纵慧芯光半导体科技有限公司 | Simplified process flow method for manufacturing vertical cavity surface emitting laser |
CN111682402A (en) * | 2020-06-19 | 2020-09-18 | 北京工业大学 | Surface-emitting semiconductor laser chip with symmetrical DBR structure and preparation method thereof |
CN111834891A (en) * | 2020-09-17 | 2020-10-27 | 山东元旭光电股份有限公司 | Low-temperature oxidation method of VCSEL chip |
CN112018598A (en) * | 2020-10-28 | 2020-12-01 | 深圳市德明利技术股份有限公司 | Method for correcting (100) crystal face oxidation aperture |
CN112290379A (en) * | 2020-12-29 | 2021-01-29 | 江西铭德半导体科技有限公司 | VCSEL chip and manufacturing method thereof |
CN113224641A (en) * | 2021-04-19 | 2021-08-06 | 深圳市德明利光电有限公司 | High-frequency VCSEL and manufacturing method thereof |
-
2021
- 2021-11-16 CN CN202111356425.2A patent/CN114204414A/en active Pending
-
2022
- 2022-10-06 TW TW111138070A patent/TW202324865A/en unknown
Patent Citations (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW200412001A (en) * | 2002-12-27 | 2004-07-01 | Ind Tech Res Inst | Oxide-confined type vertical cavity surface emitting laser and fabrication method thereof |
CN101604665A (en) * | 2007-07-20 | 2009-12-16 | 镓力姆企业私人有限公司 | Be used for nitride-based films with and the buried contact devices made |
CN101227061A (en) * | 2007-12-28 | 2008-07-23 | 武汉光迅科技股份有限公司 | Manufacturing method of tunable semiconductor laser and tunable semiconductor laser |
JP2009188238A (en) * | 2008-02-07 | 2009-08-20 | Nec Corp | Surface light-emitting laser and method of manufacturing the same |
CN101771114A (en) * | 2009-01-04 | 2010-07-07 | 厦门市三安光电科技有限公司 | Vertical light-emitting diode with new compound stacked barrier layer metal structure and preparation method thereof |
US20180261979A1 (en) * | 2015-06-09 | 2018-09-13 | Koninklijke Philips N.V. | Vertical cavity surface emitting laser |
CN107437723A (en) * | 2017-09-21 | 2017-12-05 | 苏州全磊光电有限公司 | A kind of epitaxial structure for VCSEL array laser and preparation method thereof |
KR101997787B1 (en) * | 2018-10-05 | 2019-07-08 | 주식회사 포셈 | Manufacturing method of vertical-cavity surface-emitting laser |
CN110197992A (en) * | 2019-06-17 | 2019-09-03 | 威科赛乐微电子股份有限公司 | A kind of efficient VCSEL chip and its manufacturing method |
CN110768105A (en) * | 2019-12-26 | 2020-02-07 | 常州纵慧芯光半导体科技有限公司 | Simplified process flow method for manufacturing vertical cavity surface emitting laser |
CN111682402A (en) * | 2020-06-19 | 2020-09-18 | 北京工业大学 | Surface-emitting semiconductor laser chip with symmetrical DBR structure and preparation method thereof |
CN111834891A (en) * | 2020-09-17 | 2020-10-27 | 山东元旭光电股份有限公司 | Low-temperature oxidation method of VCSEL chip |
CN112018598A (en) * | 2020-10-28 | 2020-12-01 | 深圳市德明利技术股份有限公司 | Method for correcting (100) crystal face oxidation aperture |
CN112864803A (en) * | 2020-10-28 | 2021-05-28 | 深圳市德明利光电有限公司 | Method for correcting oxidation aperture |
CN112290379A (en) * | 2020-12-29 | 2021-01-29 | 江西铭德半导体科技有限公司 | VCSEL chip and manufacturing method thereof |
CN113224641A (en) * | 2021-04-19 | 2021-08-06 | 深圳市德明利光电有限公司 | High-frequency VCSEL and manufacturing method thereof |
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