CN114203882A - Fan-out type LED packaging structure and packaging method thereof - Google Patents

Fan-out type LED packaging structure and packaging method thereof Download PDF

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Publication number
CN114203882A
CN114203882A CN202010986599.6A CN202010986599A CN114203882A CN 114203882 A CN114203882 A CN 114203882A CN 202010986599 A CN202010986599 A CN 202010986599A CN 114203882 A CN114203882 A CN 114203882A
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China
Prior art keywords
layer
packaging
metal
led
wafer
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CN202010986599.6A
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Chinese (zh)
Inventor
蔡汉龙
薛兴涛
林正忠
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SJ Semiconductor Jiangyin Corp
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Shenghejing Micro Semiconductor Jiangyin Co Ltd
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Priority to CN202010986599.6A priority Critical patent/CN114203882A/en
Priority to US17/478,832 priority patent/US20220093580A1/en
Publication of CN114203882A publication Critical patent/CN114203882A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H01L23/5283—Cross-sectional geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Abstract

The invention provides a fan-out type LED packaging structure and a packaging method thereof, wherein the fan-out type LED packaging structure at least comprises: the LED chip comprises an LED wafer, a packaging layer, a first rewiring layer, an IC control chip module and a second rewiring layer. The LED wafer and the IC control chip module realize the electrical leading-out and control of the LED chip and the IC control chip through the metal wiring of the first and second rewiring layers and the metal plated through hole of the packaging layer. The invention also provides a packaging method of the fan-out LED packaging structure, which adopts a fan-out packaging mode, adopts a metal plating mode to replace a welding wire, and adopts a PI dielectric layer and RDL layer wiring mode to replace a substrate, thereby effectively reducing the packaging size of the LED.

Description

Fan-out type LED packaging structure and packaging method thereof
Technical Field
The invention belongs to the field of LED packaging, and particularly relates to a fan-out LED packaging structure and a packaging method thereof.
Background
In the display field, especially in the outdoor large screen display, there are two modes of liquid crystal display and RBGLED. The traditional liquid crystal display has the advantage of higher resolution, but a plurality of liquid crystal panels can generate larger gaps when being spliced, so that the visual effect is influenced; for an electronic screen, the RBGLED mode has better color display degree and no splicing gap interference, but the traditional LED packaging body has larger size, the heat dissipation requirement is considered, the arrangement distance between the packaging bodies is large, the density is low, and the defect of lower resolution is caused.
The key for improving the resolution of the LED display screen is to reduce the packaging size, and the traditional LED packaging mode comprises a dot matrix module, a direct-insert type, a COB and the like. Because the traditional packaging mode uses a wire bonding process and a substrate, the packaging size is larger and the thickness is thicker, and the reduction of the packaging size is a key for improving the market competitiveness of the LED display screen and is also a technical difficulty faced by the field.
Disclosure of Invention
In a traditional LED packaging mode, an LED chip and an IC control chip module are respectively fixed on two sides of a substrate in a die bonding mode, electrical property is introduced to the substrate through an LED chip bonding wire, and the LED chip and the IC control chip module are communicated through circuit connection in the substrate, so that circuit control of an LED is achieved. The conventional drawback is that the package structure uses a substrate and bonding wires on the outer side, which results in a larger and thicker package size and is not favorable for improving the display resolution.
In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a fan-out LED package structure and a packaging method thereof, which are used to solve the problems of the prior art that the LED package has a large size and a thick thickness.
To achieve the above and other related objects, the present invention provides a fan-out LED package structure, comprising: the LED chip comprises a first surface and a second surface, wherein the first surface is plated with an electrode; the packaging layer coats the side face and the first face of the LED chip; the first redistribution layer comprises a PI medium and metal wires in the PI medium, the first redistribution layer comprises a first surface and an opposite second surface, the LED wafer is combined with the second surface of the redistribution layer, and electrodes on the first surface of the LED wafer are connected with the metal wires of the first redistribution layer through perforated metal-plated electrodes in the packaging layer; the IC control chip module comprises an IC control chip, a metal lug, a heat conducting adhesive and a radiating fin, wherein the IC control chip comprises a first surface and an opposite second surface, the first surface is provided with an electrode, the metal lug is formed on the electrode of the first surface, the heat conducting adhesive and the radiating fin are sequentially positioned on the second surface, and the IC control chip module is attached to the second surface of the first rewiring layer through the metal lug so as to realize the electric connection of the LED chip and the IC control chip module through the first rewiring layer; and the second rewiring layer comprises a PI medium and metal wires in the PI medium and is formed in the direction of the second surface of the LED wafer, and the metal wires of the second rewiring layer are connected with the metal wires of the first rewiring layer to realize the electrical leading-out and control of the LED chip and the IC control chip.
Optionally, the material of the encapsulation layer includes one of silicone, polyimide, and epoxy resin.
Optionally, the metal wire includes one of copper, gold and silver wires, the metal electrode includes one of copper, gold and silver electrodes, and the metal bump includes one of tin solder, silver solder and gold-tin alloy solder.
The invention also provides a packaging method of the fan-out type LED packaging structure, which comprises the following steps: 1) providing a support substrate; 2) forming a separation layer on the support substrate; 3) providing an LED wafer, wherein the LED wafer comprises a first surface and a second surface, the first surface is plated with an electrode, the second surface of the LED wafer is fixed on the separation layer, and the first surface electrode of the LED wafer is back to the separation layer; 4) the packaging layer packages the LED wafer, so that the first surface and the periphery of the LED wafer are wrapped by the packaging layer, and the packaging layer on the periphery of the LED wafer is in contact with the separation layer; 5) punching a hole on the packaging layer on the first surface side of the LED wafer to expose the surface of the packaging layer at a specific position on the first surface of the LED wafer and the separation layer; 6) electroplating a metal electrode to enable the surface of the packaging layer, the exposed position of the first surface of the LED wafer and the exposed position on the separation layer to be in metal communication; 7) forming a first rewiring layer on a packaging layer on one side of a first surface of an LED wafer, wherein the first rewiring layer comprises a first graphical PI layer and a first graphical metal wire which are alternately layered, the first PI layer and the first metal wire layer are alternately stacked, holes in the punching position of the packaging layer are simultaneously filled with the first PI layer, and the first metal wire is connected with the metal electrode exposed out of the packaging layer; 8) peeling the supporting substrate and the packaged LED wafer based on the separation layer; exposing the packaging layer, the metal electrode at the drilling position of the packaging layer and the second surface of the LED wafer; 9) forming a second rewiring layer on one side of the second surface of the LED wafer, wherein the second rewiring layer comprises a second PI medium and metal wires in the second PI medium, and the metal wires of the second rewiring layer are connected with the metal wires of the first rewiring layer and used for leading out the LED wafer and the metal electrodes; 10) and the IC control module with the heat sink is surface mounted on the first rewiring layer.
Optionally, the method for encapsulating the LED chip by the encapsulation layer includes one of compression molding, transfer molding, liquid encapsulation molding, vacuum lamination, and spin coating.
Optionally, the separation layer includes a light-to-heat conversion layer.
Optionally, the support substrate includes one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate.
Optionally, the step 7) includes: 7-1) placing the PI dry film with the release film on the packaging layer on one side of the first surface of the LED wafer; 7-2) carrying out vacuum hot pressing to enable the PI film to be attached to the packaging layer and to be poured into holes in the punching position, and stripping the release film; 7-3) exposing the metal on the specific position on the surface of the packaging layer through exposure and development.
The invention also provides a fan-out type packaging structure, which at least comprises: the IC control wafer module comprises an IC control wafer, wherein the IC control wafer comprises a first surface and a second surface, an electrode is arranged on the first surface, a copper lead post is formed on the electrode, a PI dielectric packaging electrode and a metal lead post are arranged on the first surface, and the top layer of the metal lead post is exposed; the first packaging layer wraps the periphery of the IC control chip module; the second surface of the IC control wafer is sequentially attached with a heat conducting adhesive and a heat radiating fin; the first redistribution layer comprises a PI medium and metal wiring in the PI medium, and comprises a first surface and an opposite second surface; the metal wiring penetrates through the first surface and the second surface, the metal wiring is arranged on the surface of the second surface, a high copper column is formed on the metal wiring on the surface of the second surface, the IC control wafer module is tightly attached to the first surface of the first heavy wiring layer, and a metal lead column of the IC control wafer module is connected with the penetrating metal wiring exposed on the first surface of the first heavy wiring layer; the LED chip module comprises an LED chip, wherein the LED chip comprises a first surface and a second surface, the first surface is provided with an electrode, the second surface is provided with a PI dielectric packaging electrode and a metal lead post, and the top layer of the metal lead post is exposed; the second packaging layer wraps the periphery of the LED wafer module and the periphery of the high copper column; the first surface of the LED wafer is tightly attached to the second surface of the first heavy wiring layer, and an electrode on the first surface of the LED wafer is communicated with the through wiring exposed on the second surface of the first heavy wiring layer and is connected with the IC control wafer module through the through metal wiring; the electrode on the first surface of the LED wafer is not communicated with the metal wiring on the second surface of the first redistribution layer; the second rewiring layer comprises a PI medium and metal wires in the PI medium, the second rewiring layer is formed on one side of the second surface of the LED wafer, the metal wires of the second rewiring layer are communicated with the metal lead posts on the second surface of the LED wafer and the high copper posts in the second packaging layer, and the high copper posts and the metal wires penetrating through the first rewiring layer realize the electrical leading-out of the IC wafer module; and the metal wiring on the surface of the second rewiring layer is used for SMD surface mounting.
The invention also provides a packaging method of the fan-out type LED packaging structure, which comprises the following steps: 1) providing a support substrate; 2) forming a separation layer on the support substrate; 3) providing an IC control wafer module which comprises an IC control wafer, wherein the IC control wafer comprises a first surface and a second surface, the first surface is provided with packaged electrodes and metal lead posts, the second surface of the IC control wafer is fixedly crystallized on the separation layer, and the first surface electrode of the IC control wafer is back to the separation layer; 4) the first packaging layer packages the IC control wafer module, so that the periphery of the IC control wafer module and the surface of one side, away from the separation layer, of the IC control wafer module are wrapped by the first packaging layer, and the first packaging layer on the periphery of the IC control wafer module is in contact with the separation layer; 5) grinding the first packaging layer on the first surface of the IC control wafer to expose the metal lead posts on the first surface of the IC control wafer module; 6) forming a first rewiring layer on the ground surface in the step 5), wherein the first rewiring layer comprises a first graphical PI layer and a first graphical metal wire in alternating layers, and the first metal wire is connected with a metal lead post on the first surface of the IC control wafer module; 7) forming a high copper column at a specific position of the metal wiring of the first redistribution layer to realize the electrical leading-out of the IC control wafer module; 8) providing an LED wafer module which comprises an LED wafer, wherein the LED wafer comprises a first surface and a second surface, an electrode is arranged on the first surface, a packaged metal lead column is arranged on the second surface, the first surface of the LED wafer is fixedly crystallized on the first redistribution layer, the electrode arranged on the first surface is connected with the metal wiring of the first redistribution layer, and the metal lead column arranged on the second surface of the LED wafer is back to the first redistribution layer; 9) packaging the first rewiring layer, the LED wafer module and the high copper column by adopting a second packaging layer; 10) grinding the second packaging layer to expose the metal lead column on the first surface of the LED wafer and the high copper column on the first rewiring layer; 11) forming a second rewiring layer on the ground surface in the step 10), wherein the second rewiring layer comprises a patterned second PI layer and a patterned second metal wire in an alternating layer, and the second metal wire is connected with the metal lead column on the first surface of the LED wafer and the top surface of the high copper column on the first rewiring layer; 12) peeling the support substrate based on the separation layer; exposing a second surface of the IC control wafer; 13) coating heat-conducting glue on the second surface of the IC control wafer; 14) mounting a radiating fin on the heat conducting adhesive; 15) and cutting the wafer to obtain the final fan-out type LED packaging structure.
As described above, the fan-out LED package structure and the package process thereof of the present invention have the following advantages: a fan-out type packaging mode is adopted, metal plating is adopted to replace bonding wires, and a PI dielectric layer and RDL layer wiring mode is adopted to replace a substrate, so that the packaging size of the LED is effectively reduced.
Drawings
Fig. 1 is a schematic diagram of a package structure in the prior art.
Fig. 2 to 16 are schematic diagrams illustrating a packaging method of a fan-out LED package structure according to the present invention, wherein fig. 16 is a schematic diagram illustrating a fan-out LED package structure according to the present invention.
Fig. 17 to 32 are schematic diagrams illustrating a packaging method of a fan-out LED package structure according to the present invention, wherein fig. 32 is a schematic diagram illustrating a fan-out LED package structure according to the present invention.
Description of the element reference numerals
100 support substrate
200 separating layer
301 LED wafer
302 encapsulation layer
303 metal lead post
304 metal electrode
305 PI media
306 bonding wire
307 bonding glue
401 first rewiring layer PI media
402 first rewiring layer metal routing
403 release film
501 PI media
601 first redistribution layer PI media
602 first rewiring layer metal routing
701 IC control wafer
702 heat conductive adhesive
703 heat sink
704 metal bump
705 metal lead post
706 PI Medium
707 first packaging layer
801 high copper column
900 substrate
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
As in the detailed description of the embodiments of the present invention, the cross-sectional views illustrating the device structures are not partially enlarged in general scale for convenience of illustration, and the schematic views are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
For convenience in description, spatial relational terms such as "below," "beneath," "below," "under," "over," "upper," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these terms of spatial relationship are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Further, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.
In the context of this application, a structure described as having a first feature "on" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed in between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that, referring to fig. 1-32, the drawings provided in the present embodiment are only schematic illustrations of the basic idea of the present invention, and only the components related to the present invention are shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, number and ratio of the components in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
A schematic diagram of a package structure in the prior art is shown in fig. 1, an LED chip 301 is die-bonded on one side of a substrate 900 by a bonding adhesive 307, electrical properties are introduced to the substrate 900 by a bonding wire 306, an IC control chip 701 is die-bonded on the other side of the substrate 900, and is electrically connected with a circuit in the substrate 900 by a metal bump 704 and connected with the LED chip 301, so as to realize circuit control of an LED, and a thermal conductive adhesive 702 and a heat sink 703 are sequentially attached to one side of the IC control chip 701, which is opposite to the substrate 900. The prior art has the disadvantage that the package structure uses the substrate and the outer bonding wires to cause a larger and thicker package size, which is not beneficial to the improvement of the display resolution.
Example 1
As shown in fig. 2 to 16, the present embodiment provides a packaging method of a fan-out LED package structure, where the packaging method includes the steps of:
as shown in fig. 2, step 1) is first performed to provide a support substrate 100; the support substrate includes one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate.
As shown in fig. 3, step 2) is performed next to form a separation layer 200 on the support substrate; the separation layer comprises a light-heat conversion layer, and is formed on the supporting substrate through a spin coating process and then cured and molded through a curing process. The photothermal conversion layer has stable properties and a smooth surface, and is easy to separate in a subsequent stripping process.
As shown in fig. 4, step 3) is then performed to provide an LED chip 301, which includes a first surface and a second surface, wherein the first surface is plated with an electrode, which may be a copper electrode, a gold electrode, or a silver electrode. And fixing the second surface of the LED chip on the separation layer 200, wherein the first surface electrode of the LED wafer is back to the separation layer 200.
As shown in fig. 5, step 4) is then performed, an encapsulation layer 302 is used to encapsulate the LED chip 301, such that the first surface and the periphery of the LED chip 301 are wrapped by the encapsulation layer, and the encapsulation layer 302 at the periphery of the LED chip 301 is in contact with the separation layer 200; the material of the packaging layer comprises one of silica gel, polyimide and epoxy resin, and the method for packaging the LED chip by the packaging layer comprises one of compression molding, transfer molding, liquid seal molding, vacuum lamination and spin coating.
As shown in fig. 6, step 5) is then performed, and laser drilling is performed on the encapsulation layer 302 on the first surface side of the LED chip 301, so that the surface is exposed at specific positions on the first surface of the LED chip 301 and on the separation layer 200.
As shown in fig. 7, step 6) is then performed, and a metal electrode 304 is electroplated, so that the surface of the encapsulation layer 302, the exposed position of the first surface of the LED chip 301, and the exposed position on the separation layer 200 are in metal communication, wherein the metal electrode 304 comprises one of copper, gold, and silver electrodes.
As shown in fig. 8 to 10, step 7) is performed to form a first PI layer 401 on the encapsulation layer on the first surface of the LED chip 301, fill the holes at the laser-drilled positions of the encapsulation layer, and expose the metal at the specific positions on the surface of the encapsulation layer through exposure and development. As shown in fig. 8, a PI dry film 401 with a release film 403 is placed on the encapsulation layer 302 on the first surface side of the LED chip 301; as shown in fig. 9, performing vacuum thermocompression bonding to attach the PI film 401 to the encapsulation layer 302, and filling the PI film into the holes at the laser-drilled position, thereby peeling off the release film 403; as shown in fig. 10, after exposure and development, the metal on the surface of the encapsulation layer 304 is exposed at a specific position.
As shown in fig. 11, step 8) is then performed, and a first metal wiring layer 402 is formed on the first PI layer 401 by exposure, development, electroplating, and etching processes, wherein the first PI layer 401 and the first metal wiring 402 are alternately stacked, the first PI layer 401 and the first metal wiring 402 form a first redistribution layer, the first metal wiring 402 is connected to the exposed metal electrode 304 of the encapsulation layer 302, and the metal wiring 402 includes one of copper, gold, and silver.
As shown in fig. 12, step 9) is then performed to form a PI medium 501 on the first redistribution layer, and expose and develop the metal wiring 402 on the first redistribution layer.
As shown in fig. 13, then, step 10) of peeling the support substrate 100 and the packaged LED chip 301 based on the separation layer 200 is performed; exposing the encapsulation layer 302, the metal electrodes 304 at the drilling positions of the encapsulation layer, and the second surface of the LED chip 301;
as shown in fig. 14 to 15, step 11) is then performed to form a third redistribution layer on the second surface side of the LED wafer, including a second PI dielectric 601 and a second metal wire 602 in the second PI dielectric, where the metal wire 602 of the second redistribution layer is connected to the metal wire 402 of the first redistribution layer for leading out the LED wafer 301 and the metal electrode 304.
As shown in fig. 16, step 12) is finally performed to surface mount the IC control module with the heat sink on the first re-wiring layer.
As shown in fig. 16, the present embodiment further provides a package structure, including: the LED chip 301 comprises a first surface and a second surface, wherein the first surface is plated with an electrode, and the metal electrode comprises one of copper, gold and silver electrodes; the packaging layer 302 wraps the side face and the first face of the LED chip, and the material of the packaging layer comprises one of silica gel, polyimide and epoxy resin; a first redistribution layer comprising a PI dielectric 401 and metal wires 402 in the PI dielectric, the metal wires 402 comprising one of copper, gold, and silver wires, the first redistribution layer comprising a first side and an opposite second side, the LED wafer 301 bonded to the second side of the redistribution layer, the electrodes on the first side of the LED wafer 301 connected to the metal wires 402 of the first redistribution layer through a perforated metallization electrode 304 in the encapsulation layer 302; an IC control chip module, comprising an IC control chip 701, a metal bump 704, a thermal conductive adhesive 702 and a heat sink 703, wherein the IC control chip 701 comprises a first surface and an opposite second surface, the first surface has an electrode, the metal bump 704 is formed on the electrode of the first surface, the metal bump comprises one of a solder, a silver solder and a gold-tin alloy solder, the thermal conductive adhesive 702 and the heat sink 703 are sequentially located on the second surface, and the IC control chip module is attached to the second surface of the first redistribution layer through the metal bump 704, so as to electrically connect the LED chip and the IC control chip module through the metal wiring 402 of the first redistribution layer; the heat-conducting glue comprises one of organic silicon-based heat-conducting glue, epoxy resin-based heat-conducting glue, polyurethane-based heat-conducting glue and PI-based heat-conducting glue. And the second redistribution layer comprises a PI medium 601 and a metal wiring 602 in the PI medium, and is formed in the direction of the second surface of the LED wafer, and the metal wiring 602 of the second redistribution layer is connected with the metal wiring 402 of the first redistribution layer, so that the electrical leading-out and control of the LED chip 301 and the IC control chip 701 are realized.
Example 2
As shown in fig. 17 to 32, the present embodiment further provides a packaging method of a fan-out LED package structure, where the packaging method includes the steps of:
as shown in fig. 17, step 1) is first performed to provide a supporting substrate 100, which may be one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate.
As shown in fig. 18, step 2) is then performed to form a separation layer 200 including a light-to-heat conversion layer on the supporting substrate, and the separation layer is formed on the supporting substrate by a spin coating process and then cured by a curing process.
As shown in fig. 19, step 3) is then performed to provide an IC control wafer module, which includes an IC control wafer 701, where the IC control wafer 701 includes a first surface and a second surface, the first surface has electrodes and metal lead posts 705 packaged by a PI dielectric 706, the second surface of the IC control wafer 701 is die-bonded to the separation layer 200, the first surface electrode of the IC control wafer 701 faces away from the separation layer 200, and the metal electrode includes one of copper, gold, and silver electrodes.
As shown in fig. 20, step 4) is then performed, in which the first encapsulation layer 707 encapsulates the IC control wafer module, so that the surface of the IC control wafer module on the side away from the separation layer and on the periphery of the IC control wafer module is wrapped by the first encapsulation layer 707, the first encapsulation layer 707 on the periphery of the IC control wafer module is in contact with the separation layer 200, and the material of the encapsulation layer includes one of silicone, polyimide, and epoxy resin.
As shown in fig. 21, step 5) is then performed to grind the first encapsulation layer 707 on the first surface of the IC control wafer module so that the metal lead posts 705 on the first surface of the IC control wafer module are exposed.
As shown in fig. 22 to 23, step 6) is then performed to form a first redistribution layer on the ground surface, where the first redistribution layer includes a patterned first PI layer 401 formed by exposure and development and a first metal wiring 402 patterned by exposure, development, electroplating and etching processes, and the first metal wiring 402 is connected to the metal lead post 706 on the first surface of the IC control wafer 701.
As shown in fig. 24, step 7) is then performed to form a high copper pillar 801 at a specific position of the metal wiring of the first redistribution layer, so as to realize electrical lead-out of the IC control chip module, wherein the high copper pillar may be formed by spot welding or reflow soldering.
As shown in fig. 25, step 8) is then performed to provide an LED chip module, which includes an LED chip 301, where the LED chip 301 includes a first surface and a second surface, the first surface has an electrode, the second surface has a metal lead post 303 packaged by a PI dielectric 305, the first surface of the LED chip 301 is die-bonded to the first redistribution layer, the electrode on the first surface is connected to the metal wiring 402 of the first redistribution layer, and the metal lead post 303 on the second surface of the LED chip module faces away from the first redistribution layer.
As shown in fig. 26, step 9) is then performed to encapsulate the first redistribution layer, the LED chip module, and the high copper pillars 801 with the second encapsulation layer 302.
As shown in fig. 27, step 10) is then performed to grind the second encapsulation layer 302 so that the metal lead posts 303 on the first surface of the LED chip 301 and the high copper posts 801 on the first redistribution layer are exposed.
As shown in fig. 28 to 29, step 11) is then performed to form a second redistribution layer on the ground surface, where the second redistribution layer includes a patterned second PI layer 601 formed by exposure and development and a second metal wiring 602 patterned by exposure, development, electroplating and etching processes, and the second metal wiring 602 is connected to the metal lead post 303 on the first surface of the LED wafer 301 and the top surface of the high copper post 801 on the first redistribution layer.
As shown in fig. 30, step 12) of peeling off the support substrate 100 based on the separation layer 200 is then performed; exposing a second surface of the IC control wafer 701.
As shown in fig. 31, step 13) is then performed to coat a thermal conductive paste 702 on the second surface of the IC control wafer 701;
as shown in fig. 32, step 14) is then performed, a heat sink 703 is attached to the thermal conductive adhesive 702, and the final fan-out LED package structure is obtained through wafer dicing.
As shown in fig. 32, the present embodiment provides a fan-out LED package structure, which includes: the IC control wafer module comprises an IC control wafer 701, wherein the IC control wafer 701 comprises a first surface and a second surface, electrodes are arranged on the first surface, copper lead posts 705 are formed on the electrodes, PI media 706 are arranged on the first surface to package the electrodes and the metal lead posts 705, and the top layers of the metal lead posts 705 are exposed; a first encapsulation layer 707 covering the periphery of the IC control chip module; a second surface of the IC control chip 701 is sequentially attached with a heat conducting adhesive 702 and a heat sink 703, wherein the heat conducting adhesive comprises one of an organic silicon-based heat conducting adhesive, an epoxy resin-based heat conducting adhesive, a polyurethane-based heat conducting adhesive and a PI-based heat conducting adhesive; a first redistribution layer comprising a PI dielectric 401 and a metal wiring 402 in the PI dielectric, the first redistribution layer comprising a first side and an opposite second side; the metal wiring 402 penetrates through the first surface and the second surface, the metal wiring 402 is arranged on the surface of the second surface, a high copper column 801 is formed on the metal wiring 402 on the surface of the second surface, the IC control wafer module is tightly attached to the first surface of the first heavy wiring layer, and a metal lead column 705 of the IC control wafer module is connected with the penetrating metal wiring 402 exposed on the first surface of the first heavy wiring layer; the LED chip module comprises an LED chip 301, wherein the LED chip 301 comprises a first surface and a second surface, the first surface is provided with an electrode, the second surface is provided with a PI medium 305 for packaging the electrode and a metal lead column 303, and the top layer of the metal lead column 303 is exposed; the second packaging layer wraps the periphery of the LED wafer module and the periphery of the high copper column 801; the first surface of the LED wafer 301 is tightly attached to the second surface of the first heavy wiring layer, and an electrode on the first surface of the LED wafer 301 is communicated with the through wiring 402 exposed on the second surface of the first heavy wiring layer and is connected with the IC control wafer module through the through metal wiring 402; the electrode on the first surface of the LED chip 301 is not connected to the metal wiring 402 on the second surface of the first redistribution layer; the second rewiring layer comprises a PI medium 601 and a metal wire 602 in the PI medium, the second rewiring layer is formed on one side of the second surface of the LED wafer 301, the metal wire 602 of the second rewiring layer is communicated with the metal lead column 305 on the second surface of the LED wafer 301 and the high copper column 801 in the second packaging layer, and the high copper column 801 and the metal wire 402 penetrating through the first rewiring layer realize the electrical leading-out of the IC wafer module; the metal wiring 602 on the surface of the second redistribution layer is used for SMD surface mounting.
In summary, the invention uses fan-out type packaging to package the LED, uses the metal plating to replace the bonding wire, and uses the PI dielectric layer and the RDL layer to wire to replace the substrate, thereby effectively reducing the packaging size of the LED and improving the display resolution. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (10)

1. A fan-out LED package structure, comprising at least:
the LED chip comprises a first surface and a second surface, wherein the first surface is plated with an electrode;
the packaging layer coats the side face and the first face of the LED chip;
the first redistribution layer comprises a PI medium and metal wires in the PI medium, the first redistribution layer comprises a first surface and an opposite second surface, the LED wafer is combined with the second surface of the redistribution layer, and electrodes on the first surface of the LED wafer are connected with the metal wires of the first redistribution layer through perforated metal-plated electrodes in the packaging layer;
the IC control chip module comprises an IC control chip, a metal lug, a heat conducting adhesive and a radiating fin, wherein the IC control chip comprises a first surface and an opposite second surface, the first surface is provided with an electrode, the metal lug is formed on the electrode of the first surface, the heat conducting adhesive and the radiating fin are sequentially positioned on the second surface, and the IC control chip module is attached to the second surface of the first rewiring layer through the metal lug so as to realize the electric connection of the LED chip and the IC control chip module through the first rewiring layer;
and the second rewiring layer comprises a PI medium and metal wires in the PI medium and is formed in the direction of the second surface of the LED wafer, and the metal wires of the second rewiring layer are connected with the metal wires of the first rewiring layer to realize the electrical leading-out and control of the LED chip and the IC control chip.
2. The fan-out LED package structure of claim 1, wherein: the material of the packaging layer comprises one of silica gel, polyimide and epoxy resin.
3. The fan-out LED package structure of claim 1, wherein: the metal wiring comprises one of copper, gold and silver wiring, the metal electrode comprises one of copper, gold and silver electrode, and the metal bump comprises one of tin solder, silver solder and gold-tin alloy solder.
4. A packaging method of a fan-out LED packaging structure is characterized in that: the packaging method comprises the following steps:
1) providing a support substrate;
2) forming a separation layer on the support substrate;
3) providing an LED wafer, wherein the LED wafer comprises a first surface and a second surface, the first surface is plated with an electrode, the second surface of the LED wafer is fixed on the separation layer, and the first surface electrode of the LED wafer is back to the separation layer;
4) the packaging layer packages the LED wafer, so that the first surface and the periphery of the LED wafer are wrapped by the packaging layer, and the packaging layer on the periphery of the LED wafer is in contact with the separation layer;
5) punching a hole on the packaging layer on the first surface side of the LED wafer to expose the surface of the packaging layer at a specific position on the first surface of the LED wafer and the separation layer;
6) electroplating a metal electrode to enable the surface of the packaging layer, the exposed position of the first surface of the LED wafer and the exposed position on the separation layer to be in metal communication;
7) forming a first rewiring layer on a packaging layer on one side of a first surface of an LED wafer, wherein the first rewiring layer comprises a first graphical PI layer and a first graphical metal wire which are alternately layered, the first PI layer and the first metal wire layer are alternately stacked, holes in the punching position of the packaging layer are simultaneously filled with the first PI layer, and the first metal wire is connected with the metal electrode exposed out of the packaging layer;
8) peeling the supporting substrate and the packaged LED wafer based on the separation layer; exposing the packaging layer, the metal electrode at the drilling position of the packaging layer and the second surface of the LED wafer;
9) forming a second rewiring layer on one side of the second surface of the LED wafer, wherein the second rewiring layer comprises a second PI medium and metal wires in the second PI medium, and the metal wires of the second rewiring layer are connected with the metal wires of the first rewiring layer and used for leading out the LED wafer and the metal electrodes;
10) and the IC control module with the heat sink is surface mounted on the first rewiring layer.
5. The packaging method of the fan-out LED packaging structure as claimed in claim 4, wherein: the method for packaging the LED chip by the packaging layer comprises one of compression molding, transfer molding, liquid sealing, vacuum lamination and spin coating.
6. The packaging method of the fan-out LED packaging structure as claimed in claim 4, wherein: the support substrate includes one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate.
7. The packaging method of the fan-out LED packaging structure as claimed in claim 4, wherein: the separation layer includes a light-to-heat conversion layer.
8. The packaging method of the fan-out LED packaging structure as claimed in claim 4, wherein: the step 7) comprises the following steps:
7-1) placing the PI dry film with the release film on the packaging layer on one side of the first surface of the LED wafer;
7-2) carrying out vacuum hot pressing to enable the PI film to be attached to the packaging layer and to be poured into holes in the punching position, and stripping the release film;
7-3) exposing the metal on the specific position on the surface of the packaging layer through exposure and development.
9. A fan-out LED package structure, comprising at least:
the IC control wafer module comprises an IC control wafer, wherein the IC control wafer comprises a first surface and a second surface, an electrode is arranged on the first surface, a copper lead post is formed on the electrode, a PI dielectric packaging electrode and a metal lead post are arranged on the first surface, and the top layer of the metal lead post is exposed;
the first packaging layer wraps the periphery of the IC control chip module;
the second surface of the IC control wafer is sequentially attached with a heat conducting adhesive and a heat radiating fin;
the first redistribution layer comprises a PI medium and metal wiring in the PI medium, and comprises a first surface and an opposite second surface; the metal wiring penetrates through the first surface and the second surface, the metal wiring is arranged on the surface of the second surface, a high copper column is formed on the metal wiring on the surface of the second surface, the IC control wafer module is tightly attached to the first surface of the first heavy wiring layer, and a metal lead column of the IC control wafer module is connected with the penetrating metal wiring exposed on the first surface of the first heavy wiring layer;
the LED chip module comprises an LED chip, wherein the LED chip comprises a first surface and a second surface, the first surface is provided with an electrode, the second surface is provided with a PI dielectric packaging electrode and a metal lead post, and the top layer of the metal lead post is exposed;
the second packaging layer wraps the periphery of the LED wafer module and the periphery of the high copper column;
the first surface of the LED wafer is tightly attached to the second surface of the first heavy wiring layer, and an electrode on the first surface of the LED wafer is communicated with the through wiring exposed on the second surface of the first heavy wiring layer and is connected with the IC control wafer module through the through metal wiring; the electrode on the first surface of the LED wafer is not communicated with the metal wiring on the second surface of the first redistribution layer;
the second rewiring layer comprises a PI medium and metal wires in the PI medium, the second rewiring layer is formed on one side of the second surface of the LED wafer, the metal wires of the second rewiring layer are communicated with the metal lead posts on the second surface of the LED wafer and the high copper posts in the second packaging layer, and the high copper posts and the metal wires penetrating through the first rewiring layer realize the electrical leading-out of the IC wafer module; and the metal wiring on the surface of the second rewiring layer is used for SMD surface mounting.
10. A packaging method of a fan-out LED packaging structure is characterized in that: the packaging method comprises the following steps:
1) providing a support substrate;
2) forming a separation layer on the support substrate;
3) providing an IC control wafer module which comprises an IC control wafer, wherein the IC control wafer comprises a first surface and a second surface, the first surface is provided with packaged electrodes and metal lead posts, the second surface of the IC control wafer is fixedly crystallized on the separation layer, and the first surface electrode of the IC control wafer is back to the separation layer;
4) the first packaging layer packages the IC control wafer module, so that the periphery of the IC control wafer module and the surface of one side, away from the separation layer, of the IC control wafer module are wrapped by the first packaging layer, and the first packaging layer on the periphery of the IC control wafer module is in contact with the separation layer;
5) grinding the first packaging layer on the first surface of the IC control wafer to expose the metal lead posts on the first surface of the IC control wafer module;
6) forming a first rewiring layer on the ground surface in the step 5), wherein the first rewiring layer comprises a first graphical PI layer and a first graphical metal wire in alternating layers, and the first metal wire is connected with a metal lead post on the first surface of the IC control wafer module;
7) forming a high copper column at a specific position of the metal wiring of the first redistribution layer to realize the electrical leading-out of the IC control wafer module;
8) providing an LED wafer module which comprises an LED wafer, wherein the LED wafer comprises a first surface and a second surface, an electrode is arranged on the first surface, a packaged metal lead column is arranged on the second surface, the first surface of the LED wafer is fixedly crystallized on the first redistribution layer, the electrode arranged on the first surface is connected with the metal wiring of the first redistribution layer, and the metal lead column arranged on the second surface of the LED wafer is back to the first redistribution layer;
9) packaging the first rewiring layer, the LED wafer module and the high copper column by adopting a second packaging layer;
10) grinding the second packaging layer to expose the metal lead column on the first surface of the LED wafer and the high copper column on the first rewiring layer;
11) forming a second rewiring layer on the ground surface in the step 10), wherein the second rewiring layer comprises a patterned second PI layer and a patterned second metal wire in an alternating layer, and the second metal wire is connected with the metal lead column on the first surface of the LED wafer and the top surface of the high copper column on the first rewiring layer;
12) peeling the support substrate based on the separation layer to expose the second surface of the IC control wafer;
13) coating heat-conducting glue on the second surface of the IC control wafer;
14) mounting a radiating fin on the heat conducting adhesive;
15) and cutting the wafer to obtain the final fan-out type LED packaging structure.
CN202010986599.6A 2020-09-18 2020-09-18 Fan-out type LED packaging structure and packaging method thereof Pending CN114203882A (en)

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CN202010986599.6A CN114203882A (en) 2020-09-18 2020-09-18 Fan-out type LED packaging structure and packaging method thereof
US17/478,832 US20220093580A1 (en) 2020-09-18 2021-09-17 Fan-out led packaging structure and method

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115911022A (en) * 2023-02-15 2023-04-04 江西兆驰半导体有限公司 Manufacturing method of fan-out type packaged LED device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115911022A (en) * 2023-02-15 2023-04-04 江西兆驰半导体有限公司 Manufacturing method of fan-out type packaged LED device

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