CN114203109A - Pixel driving circuit, compensation method thereof and display panel - Google Patents

Pixel driving circuit, compensation method thereof and display panel Download PDF

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Publication number
CN114203109A
CN114203109A CN202111562778.8A CN202111562778A CN114203109A CN 114203109 A CN114203109 A CN 114203109A CN 202111562778 A CN202111562778 A CN 202111562778A CN 114203109 A CN114203109 A CN 114203109A
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node
voltage
active switch
control signal
electrically connected
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CN114203109B (en
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卢昭阳
李荣荣
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HKC Co Ltd
Changsha HKC Optoelectronics Co Ltd
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HKC Co Ltd
Changsha HKC Optoelectronics Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275Details of drivers for data electrodes
    • G09G3/3291Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0257Reduction of after-image effects

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The application discloses pixel drive circuit and compensation method, display panel thereof, pixel drive circuit includes: the circuit comprises a capacitor circuit, a light-emitting circuit, a data input circuit and a compensation circuit; the capacitor circuit stores the voltage of the first node, the voltage of the second node and the voltage of the third node; the light-emitting circuit is connected to the first control signal and emits light under the control of the first control signal and the voltage of the first node; the data input circuit is connected with a third control signal and a data signal and transmits the data signal to the first node under the control of the third control signal; the compensation circuit is connected to the second control signal, transmits the voltage of the first node to the fourth node under the control of the second control signal, and performs compensation charging on the second node through the voltage of the fourth node under the control of the voltage of the first node. By providing a simpler pixel driving circuit, the technical problems that the structure of the existing pixel driving circuit is complex and a large amount of area is occupied during layout design are solved.

Description

Pixel driving circuit, compensation method thereof and display panel
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a pixel driving circuit, a compensation method thereof, and a display panel.
Background
An OLED (Organic Light-Emitting Diode) display has many advantages such as a thin body, power saving, bright color, and high image quality, and is widely used. Such as OLED televisions, mobile phones, notebook computers, etc., are increasingly dominant in the field of flat panel displays.
Among them, in the OLED display panel, pixels are arranged in a matrix including a plurality of rows and a plurality of columns, and the earliest pixel design generally employs a pixel circuit, which is also referred to as a 2T1C pixel circuit, including two transistors (T) and one capacitor (C) for each pixel, but the transistors have a problem of threshold voltage shift. Therefore, an 8T1C pixel circuit formed by eight transistors and one capacitor is usually adopted for each pixel, but the design has a large number of TFTs, occupies a large design space, and limits the design of a display with high resolution to a certain extent. In view of the above, it is an urgent issue to those skilled in the art to design a display panel with high ppi (pixel per inch) and reduce the design difficulty.
Disclosure of Invention
The application aims to provide a pixel driving circuit, a compensation method thereof and a display panel, and the purpose of reducing the number of TFTs is achieved through the scheme, so that high PPI is achieved, the granular sensation of the display panel is reduced, and the display effect is enhanced.
The application discloses pixel drive circuit includes: the circuit comprises a capacitor circuit, a light-emitting circuit, a data input circuit and a compensation circuit; the capacitor circuit is electrically connected with a first node, a second node and a third node, and stores the voltage of the first node, the voltage of the second node and the voltage of the third node; the light-emitting circuit is electrically connected with the first node, the second node, the third node and the fourth node, is accessed with a first control signal and emits light under the control of the first control signal and the voltage of the first node; the data input circuit is electrically connected with the first node, is accessed to a third control signal and a data signal, and transmits the data signal to the first node under the control of the third control signal; and the compensation circuit is electrically connected with the first node and the fourth node, is accessed to a second control signal, transmits the voltage of the first node to the fourth node under the control of the second control signal, and performs compensation charging on the second node through the voltage of the fourth node under the control of the voltage of the first node.
Optionally, the light emitting circuit includes a first active switch, a second active switch, a third active switch and a light emitting device; the control end of the first active switch is connected to the first control signal, the input end of the first active switch is electrically connected to the third node, the output end of the first active switch is electrically connected to the fourth node, and the third node is electrically connected to the first power signal; the control end of the second active switch is electrically connected with the first node, the input end of the second active switch is electrically connected with the fourth node, and the output end of the second active switch is electrically connected with the second node; the control end of the third active switch is connected to the first control signal, the input end of the third active switch is electrically connected to the second node, the output end of the first active switch is electrically connected to the anode of the light-emitting device, and the cathode of the light-emitting device is electrically connected to the second power signal.
Optionally, the compensation circuit includes a fourth active switch, a control end of the fourth active switch is connected to the second control signal, an input end of the fourth active switch is electrically connected to the first node, and an output end of the fourth active switch is electrically connected to the fourth node.
Optionally, the timing of the pixel driving circuit includes a compensation phase; in the compensation stage, the first control signal is a low voltage, the second control signal is a high voltage, the third control signal is a high voltage, the data input circuit outputs a first preset voltage of a data signal to the first node, when the second control signal is the high voltage, the fourth active switch is turned on, and the first preset voltage of the first node is output to the fourth node; when the first preset voltage is a high voltage, the second active switch is turned on, the voltage of the fourth node charges the second node, and when the voltage difference between the voltage of the first node and the voltage of the second node is equal to the threshold voltage of the second active switch, the second active switch is turned off.
Optionally, the capacitor circuit includes a first capacitor and the second capacitor, one end of the first capacitor is electrically connected to the first node, and the other end of the first capacitor is electrically connected to the second node; one end of the second capacitor is electrically connected with the second node, and the other end of the second capacitor is electrically connected with the third node.
Optionally, the data input circuit includes a fifth active switch, a control end of the fifth active switch is connected to the third control signal, an input end of the fifth active switch is connected to the data signal, and an output end of the fifth active switch is electrically connected to the first node.
Optionally, the timing sequence of the pixel driving circuit includes: a reset stage, a compensation stage, a data writing stage and a light-emitting stage; in the reset stage, the first control signal and the third control signal are high voltages, the second control signal is low voltage, and the data signal is a first preset voltage; in the compensation stage, the first control signal is a low voltage, the second control signal and the third control signal are high voltages, and the data signal is a first preset voltage; in the data writing phase, the first control signal, the second control signal and the third control signal are low voltages, and the data signal is a data voltage; in the light-emitting stage, the first control signal is at a high voltage, the second control signal and the third control signal are at a low voltage, and the data signal is at a low voltage.
Optionally, the voltage of the first preset voltage is greater than or equal to the gate turn-on voltage of the second active switch.
The application also discloses a display panel which comprises the pixel driving circuit.
The application also discloses a compensation method of the pixel driving circuit, wherein the pixel driving circuit uses the pixel driving circuit, and the compensation method comprises the following steps:
entering a reset phase: the first control signal and the third control signal are high voltage, the second control signal is low voltage, the first active switch and the third active switch are conducted, and the data input circuit provides a first preset voltage for the first node;
entering a compensation stage: the second control signal and the third control signal are high voltages, the first control signal is low voltage, the fourth active switch is turned on, the first active switch and the third active switch are turned off, the data input circuit continuously provides a first preset voltage for the first node, the second active switch is turned on, the first preset voltage of the first node is compensated and charged for the second node through the fourth active switch and the second active switch, and when the voltage difference between the voltage of the first node and the voltage of the second node is equal to the threshold voltage of the second active switch, the second active switch is turned off;
entering a data writing phase: the first control signal and the second control signal are low voltage, the third control signal is high voltage, the first active switch, the third active switch and the fourth active switch are all turned off, the data input circuit continuously provides data voltage for the first node, and the capacitance circuit compensates the difference between the data voltage and the first preset voltage for the second node;
and (3) entering a light-emitting stage: the first control signal and the third control signal are high voltage, the second control signal is low voltage, the first active switch, the second active switch and the third active switch are switched on, the fourth active switch and the fifth active switch are switched off, and the light-emitting device emits light.
This application is through setting up compensating circuit, compensates lighting circuit. After the data signal input by the data input circuit is transmitted to the fourth node under the action of the second control signal, the fourth node carries out compensation charging on the second node. The threshold voltage of the second active switch of each pixel is effectively compensated, and the second node can be directly compensated and charged under the action of the second control signal without designing a threshold voltage monitoring circuit of the second active switch. The compensation circuit of the pixel driving circuit has a simple structure, reduces the number of used active switches, improves PPI, can reduce granular sensation of the display panel, and improves display effect. Secondly, the design of the compensating circuit can eliminate the influence of threshold voltage on the circuit, reduce the occurrence of afterimage and improve the display quality.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the application, are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is obvious that the drawings in the following description are only some embodiments of the application, and that for a person skilled in the art, other drawings can be derived from them without inventive effort. In the drawings:
FIG. 1 is a schematic diagram of a pixel drive circuit of the present application;
FIG. 2 is a timing diagram of a pixel driving circuit of the present application;
FIG. 3a is a circuit schematic diagram of a pixel driving circuit of the present application during a reset phase;
FIG. 3b is a circuit schematic diagram of the pixel driving circuit of the present application during the compensation phase;
FIG. 3c is a circuit diagram of the pixel driving circuit of the present application during a data writing phase;
FIG. 3d is a circuit schematic of the pixel driving circuit of the present application during the light emitting phase;
FIG. 4 is another timing diagram of the pixel driving circuit of the present application;
FIG. 5 is a schematic diagram illustrating the steps of a compensation method of a pixel driving circuit according to the present application;
fig. 6 is a schematic diagram of a display panel of the present application.
100, a display panel; 110. a pixel drive circuit; 111. a capacitive circuit; 112. a light emitting circuit; 113. a data input circuit; 114. a compensation circuit.
Detailed Description
It is to be understood that the terminology, the specific structural and functional details disclosed herein are for the purpose of describing particular embodiments only, and are representative, but that the present application may be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein. In the description of the present application, the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating relative importance or as implicitly indicating the number of technical features indicated. Thus, unless otherwise specified, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature; the specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
The present application is described in detail below with reference to the figures and alternative embodiments.
As shown in fig. 1, fig. 1 shows a schematic diagram of a pixel driving circuit 110 of the present application, disclosing a pixel driving circuit 110, the pixel driving circuit 110 comprising: a capacitor circuit 111, a light-emitting circuit 112, a data input circuit 113, and a compensation circuit 114; the capacitor circuit 111 is electrically connected to a first node G, a second node S, and a third node a, and the capacitor circuit 111 stores a voltage of the first node G, a voltage of the second node S, and a voltage of the third node a; the light emitting circuit 112 is electrically connected to the first node G, the second node S, the third node a and the fourth node B, and the light emitting circuit 112 is connected to a first control signal S1 to emit light under the control of the first control signal S1 and the voltage of the first node G; the data input circuit 113 is electrically connected to the first node G, the data input circuit 113 receives a third control signal S3 and a data signal, and transmits the data signal to the first node G under the control of the third control signal S3; the compensation circuit 114 is electrically connected to the first node G and the fourth node B, the compensation circuit 114 is connected to a second control signal S2, and transmits the voltage of the first node G to the fourth node B under the control of the second control signal S2, and compensates and charges the second node S by the voltage of the fourth node B under the control of the voltage of the first node G.
The present application compensates the light emitting circuit 112 by providing the compensation circuit 114. After the data signal input by the data input circuit 113 is transmitted to the fourth node B by the second control signal S2, the second node S is complementarily charged by the fourth node B. That is, the threshold voltage of the second active switch T2 of each pixel is effectively compensated, and the second node S can be directly compensated and charged under the action of the second control signal S2 without designing a threshold voltage monitoring circuit of the second active switch T2. The compensation circuit of the pixel driving circuit 110 has a simple structure, reduces the number of active switches used in practice, and further reduces the design space, so that the area of each pixel can be further reduced, the total number of pixels in a display panel with the same size is increased, that is, ppi (pixel in) is increased, the granular sensation of the display panel can be reduced, and the display effect is improved. PPI (pixels per inch) is the unit of image resolution, which represents the number of pixels (pixels) per inch. Thus, a higher PPI value means that the display screen can display images with higher density. The higher the display density is, the higher the fidelity is, so as to realize high-definition and ultrahigh-definition display. Secondly, the design of the compensation circuit 114 can eliminate the influence of the threshold voltage on the circuit, reduce the occurrence of the afterimage, and improve the display quality.
Specifically, the light emitting circuit 112 includes a first active switch T1, a second active switch T2, a third active switch T3, and a light emitting device; a control terminal of the first active switch T1 is connected to the first control signal S1, an input terminal of the first active switch T1 is electrically connected to the third node a, an output terminal of the first active switch T1 is electrically connected to the fourth node B, and the third node a is electrically connected to a first power signal VDD; a control terminal of the second active switch T2 is electrically connected to the first node G, an input terminal of the second active switch T2 is electrically connected to the fourth node B, and an output terminal of the second active switch T2 is electrically connected to the second node S; a control terminal of the third active switch T3 is connected to the first control signal S1, an input terminal of the third active switch T3 is electrically connected to the second node S, an output terminal of the first active switch T1 is electrically connected to an anode of the light emitting device, and a cathode of the light emitting device is electrically connected to a second power signal VSS.
The data input circuit 113 inputs a data signal from the control terminal of the second active switch T2, that is, the data signal is input to the first node G, and the potential change of the second node S is changed by the potential change of the first node G, so that the voltage of the second node S is different when the voltage of the first node G is different, and the luminance of the light emitting device is different, thereby achieving the purpose that the luminance of the light emitting device is different under different data signals. However, the threshold voltage of the second active switch T2 is affected by the process, and the threshold voltages of two different second active switches T2 under different processes or the same process may have a slight difference, so that there may be a problem that the brightness of two pixels is different due to the difference of the threshold voltages of the second active switch T2 under the same data signal, thereby causing uneven brightness. The present application primarily compensates the threshold voltage by the compensation circuit 114, and the compensation circuit 114 is described in detail below. It should be noted that the light emitting device may be an active light emitting device, such as an organic light emitting diode, where the organic light emitting diode corresponding to each pixel is a red organic light emitting diode, a green organic light emitting diode, a blue organic light emitting diode, and may further include a white organic light emitting diode.
Specifically, the compensation circuit 114 includes a fourth active switch T4, a control terminal of the fourth active switch T4 is connected to the second control signal S2, an input terminal of the fourth active switch T4 is electrically connected to the first node G, and an output terminal of the fourth active switch T4 is electrically connected to the fourth node B.
Specifically, the timing of the pixel driving circuit 110 includes a compensation phase; in the compensation phase, the first control signal S1 is low voltage, the second control signal S2 is high voltage, the third control signal S3 is high voltage, and the data input circuit 113 inputs the first data signalA preset voltage is output to the first node G, when the second control signal S2 is a high voltage, the fourth active switch T4 is turned on, and a first preset voltage of the first node G is output to the fourth node B; when the first preset voltage is a high voltage, the second active switch T2 is turned on, the voltage of the fourth node B charges the second node S, and when the voltage difference between the voltage of the first node G and the second node S is equal to the threshold voltage of the second active switch T2, the second active switch T2 is turned off. In the compensation phase, the voltage of the second node S is raised to a level different from the voltage of the first node G by the threshold voltage of the second active switch T2. At this time, the voltage of the first node G is V1The potential of the second node S is V1-Vth
Specifically, the capacitor circuit 111 includes a first capacitor C1 and the second capacitor C2, one end of the first capacitor C1 is electrically connected to the first node G, and the other end is electrically connected to the second node S; one end of the second capacitor C2 is electrically connected to the second node S, and the other end is electrically connected to the third node a.
Specifically, the data input circuit 113 includes a fifth active switch T5, a control terminal of the fifth active switch T5 is connected to the third control signal S3, an input terminal of the fifth active switch T5 is connected to the data signal, and an output terminal of the fifth active switch T5 is electrically connected to the first node G.
It should be noted that the first active switch T1, the second active switch T2, the third active switch T3, the fourth active switch T4, and the fifth active switch T5 mentioned above are Thin Film Transistors (TFTs), respectively, the TFTs are IZGO (Indium Gallium Zinc Oxide) TFTs, and compared with conventional a-Si (amorphous silicon) TFTs, the IZGO-TFTs have three main advantages in performance, namely, high precision, low power consumption, and high touch performance, and the main supply targets are flat panel computers and super products. Unlike low-temperature LTPS (polycrystalline silicon) TFTs, there is no need to crystallize the semiconductor layer by laser irradiation, and therefore, the glass substrate can be easily increased in size. The IGZO process has extremely high similarity with the a-Si process, and the IZGO has high electron mobility, so the method can be applied to producing OLED display panels.
As shown in fig. 2, fig. 2 shows a timing diagram of the pixel driving circuit 110, and the timing of the pixel driving circuit 110 includes: a reset stage, a compensation stage, a data writing stage and a light-emitting stage; in the reset phase, the first control signal S1 and the third control signal S3 are high voltages, the second control signal S2 is low voltage, and the data signal is a first preset voltage; in the compensation phase, the first control signal S1 is at a low voltage, the second control signal S2 and the third control signal S3 are at a high voltage, and the data signal is at a first preset voltage; in the data writing phase, the first control signal S1, the second control signal S2, the third control signal S3 are low voltages, and the data signal is a data voltage; in the light-emitting phase, the first control signal S1 is at a high voltage, the second control signal S2 and the third control signal S3 are at a low voltage, and the data signal is at a low voltage. Fig. 2 shows a timing chart in which only one row of pixels in one scanning period corresponds to the time for charging through the data line.
As shown in fig. 3a, fig. 3a shows a circuit schematic diagram of the pixel driving circuit 110 in the reset phase, the first control signal S1 and the third control signal S3 are high voltages, the second control signal S2 is low voltage, and the data signal is a first preset voltage; the first active switch T1 and the third active switch T3 are turned on, the data input circuit 113 provides a first predetermined voltage to the first node G, the second active switch T2 is also turned on, and the fourth active switch T4 is turned off. In the reset phase, the light emitting device emits light for a short time after the first active switch T1, the second active switch T2 and the third active switch T3 are turned on. This time is extremely short and is not perceptible to the naked eye. The voltage of the first node G at this time is VG=V1Second node S voltage VS=VSS+VOLED
As shown in fig. 3b, fig. 3b shows a circuit schematic diagram of the pixel driving circuit 110 in the compensation phase, the first control signal S1 is a low voltage, and the voltage is lower than the first control signal S1The second control signal S2 and the third control signal S3 are high voltages, and the data signal is a first preset voltage; at this time, the first active switch T1 and the third active switch T3 are turned off, and the light emitting device does not emit light; the fourth active switch T4 is turned on, and the voltage V1 of the first node G charges the fourth node B through the fourth active switch T4 and the second active switch T2; when the voltage difference between the first node G and the second node S is equal to the threshold voltage of the second active switch T2, the second active switch T2 is turned off, at this time, the second active switch T2 is in a critical off state, and the voltage difference between the control terminal and the output terminal of the second active switch T2 is the threshold voltage of the second active switch T2, that is, the voltage difference between the first node G and the second node S is the threshold voltage of the second active switch T2. The voltage of the first node G is VG=V1Second node S voltage VS=V1-Vth
As shown in fig. 3c, fig. 3c is a schematic circuit diagram of the pixel driving circuit 110 during a data writing phase, the first control signal S1 and the second control signal S2 are low voltages, the third control signal S3 is high voltage, the first active switch T1, the third active switch T3 and the fourth active switch T4 are all turned off, and the data input circuit 113 continuously provides the data voltage V to the first node GdataThe capacitance circuit 111 compensates the second node S for a difference between the data voltage and a first predetermined voltage. During the data writing phase, the voltage of the first node G is changed from V1Change to VdataThe voltage at the first node G varies by V due to the coupling of the first capacitor C1 and the second capacitor C2data-V1(ii) a The variation of the second node S is (V)data-V1) C1/(C1+ C2), wherein the voltage of the first node G is V during the data writing phaseG=VdataThe voltage of the second node S is VS=V1-Vth+(Vdata-V1)*C1/(C1+C2)。
As shown in FIG. 3d, FIG. 3d is a schematic circuit diagram of the pixel driving circuit 110 during the light-emitting period, and the first control signal S1 and the third control signal S3 areThe second control signal S2 is a low voltage, the first active switch T1, the second active switch T2 and the third active switch T3 are turned on, and the light emitting device emits light; and the fourth active switch T4 and the fifth active switch T5 are turned off. At this stage, the light emitting device emits light, and the voltage of the second node S is VS=VOLED+ VSS, the voltage variation of the second node S compared to the previous stage is: vOLED+VSS-[V1-Vth+(Vdata-V1)*C1/(C1+C2)](ii) a The voltage of the first node G varies by an amount equal to that of the second node S due to the coupling effect of the first capacitor C1 and the second capacitor C2. Therefore, the variation of the voltage of the first node G is also: vOLED+VSS-[V1-Vth+(Vdata-V1)*C1/(C1+C2)](ii) a Voltage V of corresponding first node GG=Vdata+VOLED+VSS-[V1-Vth+(Vdata-V1)*C1/(C1+C2)](ii) a Voltage V of second node SS=VOLED+VSS。
The circuit according to the light emitting device is as follows: i isOLED=1/2*K*(VGS-Vth) 2, wherein VGS=VG-VS
The following can be obtained: i isOLED=1/2*K*(1-a)(Vdata-V1)]2; a ═ C1/(C1+ C2); k ═ μ n × Cox (W/L), where μ is electron mobility, Cox is capacitance per unit area of the FTT device, and W/L represents the ratio of TFT channel width to length; these parameters are relatively stable, and the variables are only equal to V1,VdataThese circuit input parameters; the two parameters are controllable, and Vth-shift, VDD difference and OLED aging are uncontrollable factors, so the circuit can reduce the number of TFTs, improve PPI and eliminate VthAnd aging of the OLED. It should be noted that the voltage of the first preset voltage is greater than or equal to the gate turn-on voltage of the second active switch T2. VdataThe voltage is a data signal actually displayed and is provided by an external data chip. And the first control signal S1, the second control signal S2, and the third control signal S3 are respectively provided by sequential circuits.
In the present application, each row of pixels of the same data line has different driving manners, and the first way, taking the pixel in fig. 2 as an example, after S3 is finished, S3 of the next row is turned on, so that it is necessary to change the same data line to the one at a low voltage of-V1-Vdata(present line) -Low Voltage-V1-Vdata(next row) … …. The timing of FIG. 2 is the time a row of pixels in a frame is on. In another embodiment of the present application, taking the pixel in fig. 2 as an example, the turn-on time of S3 of the pixel in the next row of the same data line connected to the pixel can be V of the pixel in fig. 2dataVoltage input stage is turned on, wherein V of the pixeldataV as the next row of pixels1I of the corresponding next row of pixelsOLED=1/2*K*(1-a)(Vdata-V1)]2, the V1V of the pixels of the previous rowdata. I.e. the voltage on the same data line is at a low voltage-V1-Vdata(current line) -Vdata(next row) … … changes, which reduces some loss. As shown in fig. 4, the diagram illustrates a schematic diagram of the current row control signal S3 and the next row control signal S3', wherein, at time t3 of S3, Vdata of the corresponding data line of the current row of pixels is transmitted to the first node G of the current row of pixels in the corresponding data writing phase. At this time, the control signal S3 for the next row of pixels is turned on synchronously to turn on the V of the corresponding data line of the current row of pixelsdataTo the first node G of the next row of pixels, at which point V isdataI.e. V1 for the next row of pixels, and the t3 phase for the next row of pixels is the corresponding V for the next row of pixelsdata' to the first node G of the next row of pixels. Thereby making the voltage on the same data line at a low voltage-V1-Vdata(current line) -Vdata(next row) … … changes. In addition, the V isdataShould be greater than or equal to V1.
As shown in fig. 5, fig. 5 is a schematic diagram illustrating a step of a compensation method for a pixel driving circuit, where the corresponding pixel driving circuit uses the pixel driving circuit stated in any one of the above embodiments, and the compensation method includes:
s1: entering a reset phase: the first control signal and the third control signal are high voltage, the second control signal is low voltage, the first active switch and the third active switch are conducted, and the data input circuit provides a first preset voltage for the first node;
s2: entering a compensation stage: the second control signal and the third control signal are high voltages, the first control signal is low voltage, the fourth active switch is turned on, the first active switch and the third active switch are turned off, the data input circuit continuously provides a first preset voltage for the first node, the second active switch is turned on, the first preset voltage of the first node is compensated and charged for the second node through the fourth active switch and the second active switch, and when the voltage difference between the voltage of the first node and the voltage of the second node is equal to the threshold voltage of the second active switch, the second active switch is turned off;
s3: entering a data writing phase: the first control signal and the second control signal are low voltage, the third control signal is high voltage, the first active switch, the third active switch and the fourth active switch are all turned off, the data input circuit continuously provides data voltage for the first node, and the capacitance circuit compensates the difference between the data voltage and the first preset voltage for the second node;
s4: and (3) entering a light-emitting stage: the first control signal and the third control signal are high voltage, the second control signal is low voltage, the first active switch, the second active switch and the third active switch are switched on, the fourth active switch and the fifth active switch are switched off, and the light-emitting device emits light.
The pixel drive circuit of the present application is composed of 5T2C, 3 TFTs are reduced compared to the exemplary 8T2C pixel circuit, and there is no VrefSignal line and VICAnd a signal line. This saves design space, and the pixel size can be designed to be small, so that the total number of pixels in the display panel with the same size is increased, i.e. the larger the PPI (per pixel in), the particles of the display panel are greatly reducedSense, enhance the display effect.
As shown in fig. 6, fig. 6 shows a schematic diagram of a display panel, and correspondingly discloses a display panel 100 including the pixel driving circuit 110 of any of the above embodiments. The display panel is suitable for OLED display panels, Mini-LED display panels, Micro-LED display panels and the like, and is an active light-emitting display panel.
It should be noted that the inventive concept of the present application can form many embodiments, but the present application has a limited space and cannot be listed one by one, so that, on the premise of no conflict, any combination between the above-described embodiments or technical features can form a new embodiment, and after the embodiments or technical features are combined, the original technical effect will be enhanced.
The foregoing is a more detailed description of the present application in connection with specific alternative embodiments, and the specific implementations of the present application are not to be considered limited to these descriptions. For those skilled in the art to which the present application pertains, several simple deductions or substitutions may be made without departing from the concept of the present application, and all should be considered as belonging to the protection scope of the present application.

Claims (10)

1. A pixel driving circuit, comprising:
the capacitor circuit is electrically connected with a first node, a second node and a third node, and stores the voltage of the first node, the voltage of the second node and the voltage of the third node;
the light-emitting circuit is electrically connected with the first node, the second node, the third node and the fourth node, is accessed to a first control signal and emits light under the control of the first control signal and the voltage of the first node;
the data input circuit is electrically connected with the first node, is accessed with a third control signal and a data signal, and transmits the data signal to the first node under the control of the third control signal; and
the compensation circuit is electrically connected with the first node and the fourth node, is connected with a second control signal, transmits the voltage of the first node to the fourth node under the control of the second control signal, and performs compensation charging on the second node through the voltage of the fourth node under the control of the voltage of the first node.
2. The pixel driving circuit according to claim 1, wherein the light emitting circuit comprises a first active switch, a second active switch, a third active switch, and a light emitting device;
the control end of the first active switch is connected to the first control signal, the input end of the first active switch is electrically connected to the third node, the output end of the first active switch is electrically connected to the fourth node, and the third node is electrically connected to the first power signal;
the control end of the second active switch is electrically connected with the first node, the input end of the second active switch is electrically connected with the fourth node, and the output end of the second active switch is electrically connected with the second node;
the control end of the third active switch is connected to the first control signal, the input end of the third active switch is electrically connected to the second node, the output end of the first active switch is electrically connected to the anode of the light-emitting device, and the cathode of the light-emitting device is electrically connected to the second power signal.
3. The pixel driving circuit according to claim 2, wherein the compensation circuit comprises a fourth active switch, a control terminal of the fourth active switch is connected to the second control signal, an input terminal of the fourth active switch is electrically connected to the first node, and an output terminal of the fourth active switch is electrically connected to the fourth node.
4. The pixel driving circuit according to claim 3, wherein the timing of the pixel driving circuit comprises a compensation phase; in the compensation stage, the first control signal is a low voltage, the second control signal is a high voltage, the third control signal is a high voltage, the data input circuit outputs a first preset voltage of the data signal to the first node, when the second control signal is a high voltage, the fourth active switch is turned on, and the first preset voltage of the first node is output to the fourth node; when the first preset voltage is a high voltage, the second active switch is turned on, the voltage of the fourth node charges the second node, and when the voltage difference between the voltage of the first node and the voltage of the second node is equal to the threshold voltage of the second active switch, the second active switch is turned off.
5. The pixel driving circuit according to claim 3, wherein the capacitor circuit comprises a first capacitor and a second capacitor, one end of the first capacitor is electrically connected to the first node, and the other end of the first capacitor is electrically connected to the second node; one end of the second capacitor is electrically connected with the second node, and the other end of the second capacitor is electrically connected with the third node.
6. The pixel driving circuit according to claim 5, wherein the data input circuit comprises a fifth active switch, a control terminal of the fifth active switch is connected to the third control signal, an input terminal of the fifth active switch is connected to the data signal, and an output terminal of the fifth active switch is electrically connected to the first node.
7. The pixel driving circuit of claim 6, wherein the timing of the pixel driving circuit comprises: a reset stage, a compensation stage, a data writing stage and a light-emitting stage;
in the reset stage, the first control signal and the third control signal are high voltages, the second control signal is low voltage, and the data signal is a first preset voltage;
in the compensation stage, the first control signal is a low voltage, the second control signal and the third control signal are high voltages, and the data signal is a first preset voltage;
in the data writing phase, the first control signal, the second control signal and the third control signal are low voltages, and the data signal is a data voltage;
in the light-emitting stage, the first control signal is a high voltage, the second control signal and the third control signal are low voltages, and the data signal is a low voltage.
8. The pixel driving circuit according to claim 4, wherein a voltage of the first preset voltage is greater than or equal to a gate turn-on voltage of the second active switch.
9. A display panel comprising the pixel driving circuit according to any one of claims 1 to 8.
10. A compensation method for a pixel driving circuit, wherein the pixel driving circuit uses the pixel driving circuit of any one of claims 3 to 8, the compensation method comprising:
entering a reset phase:
the first control signal and the third control signal are high voltage, the second control signal is low voltage, the first active switch and the third active switch are conducted, and the data input circuit provides a first preset voltage for the first node;
entering a compensation stage:
the second control signal and the third control signal are high voltages, the first control signal is low voltage, the fourth active switch is turned on, the first active switch and the third active switch are turned off, the data input circuit continuously provides a first preset voltage for the first node, the second active switch is turned on, the first preset voltage of the first node is used for compensating and charging the second node through the fourth active switch and the second active switch, and when the voltage difference between the voltage of the first node and the voltage of the second node is equal to the threshold voltage of the second active switch, the second active switch is turned off;
entering a data writing phase:
the first control signal and the second control signal are low voltage, the third control signal is high voltage, the first active switch, the third active switch and the fourth active switch are all turned off, the data input circuit continuously provides data voltage for the first node, and the capacitance circuit compensates the difference between the data voltage and the first preset voltage for the second node;
and (3) entering a light-emitting stage:
the first control signal and the third control signal are high voltage, the second control signal is low voltage, the first active switch, the second active switch and the third active switch are switched on, the fourth active switch and the fifth active switch are switched off, and the light-emitting device emits light.
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