CN114201439B - Server signal identification optimization method, system and storage medium - Google Patents
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Abstract
The application relates to a server signal identification optimization method, a device and a storage medium. The method is applied to a signal identification system, and the system comprises a backboard and a baseboard management controller, wherein the backboard is connected with the baseboard management controller through a bus. The method comprises the following steps: judging the state of the server, wherein the state comprises a power-on initialization state and an initialization completion state; when the server is in a power-on initialization state, identifying backboard address information through a high-speed signal line; and sending the backboard address information to a baseboard management controller. The method can improve the utilization rate of transmission resources of the high-speed signal wires, reduce the number of the low-speed signal wires, reduce the difficulty of assembly and maintenance links, and is favorable for improving the competitiveness of products.
Description
Technical Field
The present disclosure relates to the field of computer technologies, and in particular, to a method, a system, and a storage medium for identifying and optimizing a server signal.
Background
With the explosive growth of services such as cloud computing and the like, servers are more and more dense and diversified, in order to accurately identify each health state of the servers, each backboard of the servers is provided with an I2C bus to capture information such as health and FRU of each backboard, and the backboard is connected with a main board, so that high-speed SAS/SATA data service is carried out, and state service carried out at low speed through I2C capture is also carried out.
SAS is a disk connection technology, integrates the advantages of the existing parallel SCSI and serial connection technologies, uses serial communication as a protocol infrastructure, adopts SCSI-3 expansion instruction set and is compatible with SATA devices, and the port is named as a four-way wide port, and can reach a bandwidth of 12Gb according to the current SAS standard of 3 Gb; SATA is an abbreviation of Serial ATA, that is, serial ATA, and has stronger error correction capability by using an embedded clock signal, and SATA3.0 has a data bandwidth of 600MBps, that is, 6 Gbps; the I2C bus is a simple, bi-directional two-wire synchronous serial bus. The I2C bus can have 3.4Mbps bandwidth capability in a high speed mode.
As shown in fig. 1, the signal recognition of the conventional server design is completed by a low-speed signal line (thin line), and the signal frequency can be satisfied at several Mhz because of the recognized information such as the backplate information, the FRU, the health status of the hard disk, etc., so that the overall design is free of participation of a high-speed signal line (bold line), and thus, when the BMC grabs and recognizes the backplate, it is required to design a considerable number of independent I2C cables, and each backplate is connected with the BMC through an independent I2C signal, which results in very complex and inefficient hardware design.
As shown in fig. 2, the high-speed signal line does not participate in the backboard information acquisition in the power-on process, and the BMC performs information identification with independent handshakes of each backboard through independent I2C, so that the whole hardware design needs a plurality of mutually independent I2C to participate.
The high-speed signal line and the low-speed signal line of the conventional design are completely independent, the high-speed signal is mainly used for transmitting service data, IO throughput is reflected, the main state of the low-speed signal is grabbed, and the BMC is convenient to independently identify the position and the state of each backboard device. The design is in a bloated shape on the upper surface of hardware, each backboard needs to be matched with a corresponding interface of the mainboard, so that development difficulty is high, a plurality of cables are required to be connected in production and assembly, assembly efficiency is low, mistakes are easy to occur, and the like.
Disclosure of Invention
Based on the above, it is necessary to provide a method, a system and a storage medium for optimizing server signal identification, which can improve the utilization rate of transmission resources of high-speed signal lines, reduce the number of low-speed signal lines, reduce the difficulty of assembly and maintenance links, and facilitate the improvement of product competitiveness.
In one aspect, a method for optimizing server signal identification is provided, the method is applied to a signal identification system, the system includes a back plate and a baseboard management controller, the back plate and the baseboard management controller are connected through a bus, the method includes:
judging the state of the server, wherein the state comprises a power-on initialization state and an initialization completion state;
when the server is in a power-on initialization state, identifying backboard address information through a high-speed signal line;
and sending the backboard address information to a baseboard management controller.
In one embodiment, the method comprises:
and when the server enters an initialization completion state, releasing the high-speed signal line for traffic data transmission, and acquiring back plate state information through the low-speed signal line.
In one embodiment, the method comprises:
the high-speed signal is an SAS bus, the low-speed signal is an I2C bus, and the baseboard management controller is respectively communicated with different backboard in turn through a single I2C bus.
In one embodiment, the method comprises:
and sending the backboard address information to a baseboard management controller, wherein the baseboard management controller communicates with the backboard corresponding to the address identifier by calling the address identifier in different backboard address information so as to acquire backboard state information.
In one embodiment, the method comprises:
judging whether the backboard is abnormal or not according to the backboard state information, and locating the position of the backboard where the abnormality occurs in response to the occurrence of the backboard.
In one embodiment, the method comprises:
judging whether the hard disk backboard is in an in-place state or not according to the backboard state information;
and if the hard disk backboard is in an in-place state, generating a hard disk state table corresponding to the hard disk backboard according to the hard disk port number information.
In another aspect, there is provided a server signal recognition optimizing apparatus, the apparatus being applied to a signal recognition system, the system including a back plate and a baseboard management controller, the back plate and the baseboard management controller being connected by a bus, the apparatus comprising:
the judging module is used for judging the state of the server, wherein the state comprises a power-on initialization state and an initialization completion state;
the acquisition module is used for identifying the backboard address information through the high-speed signal line when the server is in a power-on initialization state;
and the communication module is used for sending the backboard address information to the baseboard management controller.
In one embodiment, the acquiring module is configured to:
and when the server enters an initialization completion state, releasing the high-speed signal wire for flow data transmission, and acquiring the state information of the backboard, the field replaceable unit and the health state information of the hard disk through the low-speed signal wire.
In one embodiment, the communication module is configured to:
and sending the backboard address information to a baseboard management controller, wherein the baseboard management controller communicates with the backboard corresponding to the address identifier by calling the address identifier in different backboard address information so as to acquire backboard state information.
In yet another aspect, a computer readable storage medium is provided, having stored thereon a computer program which when executed by a processor performs the steps of:
judging the state of the server, wherein the state comprises a power-on initialization state and an initialization completion state;
when the server is in a power-on initialization state, identifying backboard address information through a high-speed signal line;
and sending the backboard address information to a baseboard management controller.
According to the server signal identification optimization, device and storage medium, when the server is electrified and initialized, the host high-speed signal wire is in an idle state, the high-speed signal wire is used for carrying out backboard address identification to synchronize addresses to the BMC, after the electrification is started normally, the high-speed signal wire is released for transmission of flow data, the backboard state and the identification and acquisition of the field replaceable unit FRU are released to the low-speed signal wire, the low-speed signal wire is used for carrying out normal management of backboard information and state, the number of the low-speed signal wire can be greatly reduced, precious high-speed transmission resources of the high-speed signal wire can not be wasted, the high-speed signal wire and the low-speed signal wire of a product can be effectively and reasonably matched in consideration of respective characteristics, the software development difficulty and hardware required resources are reduced, the product development cost is reduced, the number of wires can be reduced in the development and production process, the difficulty of assembly and maintenance links is reduced, and the product competitiveness is favorably improved.
Drawings
FIG. 1 is a schematic diagram of a prior art server signal identification design layout;
FIG. 2 is a schematic diagram of a backboard information identification process in the prior art;
FIG. 3 is a schematic flow chart of a method for optimizing server signal identification in the present invention;
FIG. 4 is a schematic diagram of a server signal identification layout according to the present invention;
FIG. 5 is a schematic diagram of a backboard information identification process according to the present invention;
fig. 6 is a block diagram showing the structure of the server signal recognition optimizing apparatus according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
In one embodiment, as shown in fig. 3, there is provided a server signal recognition optimization method, which is applied to a signal recognition system, the system including a back plane and a baseboard management controller, the back plane and the baseboard management controller being connected through a bus, the method including:
s1: and judging the state of the server, wherein the state comprises a power-on initialization state and an initialization completion state.
Specifically, in determining the state of the server, whether the server is in the initialization process or has completed the initialization process may be determined according to whether the operation of the server in the power-on initialization process is completed, where the operation of the server in the initialization process includes, but is not limited to: the hardware detection of the server comprises a disk, a CPU, a memory, a disk array, a network card and the like; connecting a power supply, a network cable, checking whether the power supply and a network jack are normal or not; configuration or acquisition of IP addresses, etc.
And when the operation required by the server in the initialization process is determined to be completed, judging that the server is in an initialization completion state, otherwise, judging that the server is in a power-on initialization state.
S2: and when the server is in a power-on initialization state, identifying the backboard address information through a high-speed signal line.
Specifically, when the server is powered on and initialized, the high-speed signal wire is in an idle state, and the high-speed signal wire is used for identifying the backboard address at the moment to acquire backboard address information, so that the utilization rate of the high-speed signal wire can be improved.
S3: and sending the backboard address information to a baseboard management controller.
Specifically, after the backplane address information is obtained through the high-speed signal line, the backplane address information is synchronously sent to the baseboard management controller BMC, and the specific sending mode may be performed by a mode conforming to a transmission standard of the high-speed signal line in the prior art, where the high-speed signal line is, for example, an SAS bus, and the method is not limited herein.
According to the server signal identification optimization method, when the server is electrified and initialized, the host high-speed signal wire is in an idle state, the address is synchronously given to the BMC through the high-speed signal cable by carrying out backboard address identification, after the electrification is started normally, the high-speed signal wire is released for transmission of flow data, the backboard state and the identification and acquisition of the field replaceable unit FRU are released to the low-speed signal wire, the low-speed signal wire is used for carrying out normal management of backboard information and state, the number of the low-speed signal wires can be greatly reduced, precious high-speed transmission resources of the high-speed signal wire can be not wasted, the high-speed signal and the low-speed signal of a product can be effectively and reasonably matched in consideration of respective characteristics, the software development difficulty and hardware required resources are reduced, the product development cost is reduced, the number of cables is reduced in the development and production processes, the difficulty of assembly and maintenance links is reduced, and the product competitiveness is improved.
In one embodiment, the method comprises:
and when the server enters an initialization completion state, releasing the high-speed signal line for traffic data transmission, and acquiring back plate state information through the low-speed signal line.
Specifically, when the server enters an initialization completion state, or after the backboard address information is obtained and sent to the BMC, the high-speed signal line can be released for transmission of flow data, and meanwhile, identification and obtaining of the backboard state and the FRU are released to the low-speed signal line, and the low-speed signal line is used for normal management of backboard information and state. The low-speed signal line is, for example, an I2C bus, and is not limited herein.
In one embodiment, the method comprises:
the baseboard management controller communicates with different backplanes in turn via a single I2C bus.
As shown in fig. 4, the BMC is connected with the front-mounted backboard and the rear-mounted backboard through a single I2C bus (i.e. the thin line in fig. 4), and uses a single I2C line (thin line) of 1 min to communicate, so that only a single I2C cable needs to be reserved, each device shares the I2C bus, and the BMC communicates with different backboard in turn through IDs to obtain the state, thus greatly simplifying the design of hardware circuits and fully utilizing the information interaction between high-speed and low-speed signal lines.
In one embodiment, the method comprises:
and sending the backboard address information to a baseboard management controller, wherein the baseboard management controller communicates with the backboard corresponding to the address identifier by calling the address identifier in different backboard address information so as to acquire backboard state information.
Specifically, as shown in fig. 4 and 5, in the power-on initialization of the server, each backplane ID is acquired by using an idle state of a high-speed signal line (bold line), each backplane ID is transferred to the BMC, then the high-speed signal line is released, and the IDs of different backplanes are called to communicate with each other to acquire information such as relevant backplane information, health states of the FRU, hard disk, and the like.
In one embodiment, the method comprises:
judging whether the backboard is abnormal or not according to the backboard state information, and locating the position of the backboard where the abnormality occurs in response to the occurrence of the backboard.
Specifically, the time threshold may be set to N seconds, and if the corresponding execution result is not received within N seconds after the BMC receives the command to be executed by the backboard, the backboard is considered to be abnormal. Alternatively, the expected execution result may be preset according to the command, for example, the interval of the expected execution result is [ a, b ], and the execution result finally obtained from the host does not fall into the interval, and the backboard is considered to be abnormal. After the backboard is abnormal, the position where the fault occurs can be determined according to the specific execution result, and then the fault can be rapidly solved.
In one embodiment, the method comprises:
judging whether the hard disk backboard is in an in-place state or not according to the backboard state information;
and if the hard disk backboard is in an in-place state, generating a hard disk state table corresponding to the hard disk backboard according to the hard disk port number information.
Specifically, taking the hard disk backboard as an example, the hard disk status table may only include a table corresponding to a hard disk on the hard disk backboard in a working state, that is, when a certain hard disk backboard on the storage server is in a non-working state, it is not necessary to generate a hard disk status table corresponding to each hard disk on the hard disk backboard. Specifically, when the hard disk backboard is in the non-working state, the fact that each hard disk on the hard disk backboard is in the non-working state is indicated, so that the state of each hard disk is not required to be monitored, at the moment, a part of the hard disks in the non-working state are filtered out, state display of a part of the non-working hard disks is relatively reduced, and a user can know related information of the hard disks in the working state more conveniently. Therefore, after the backboard state information and the number information of the hard disk ports are obtained, the state of the hard disk backboard can be judged according to the backboard state information, and when the hard disk backboard is in an out-of-place state, the hard disk backboard is not required to be monitored; when the hard disk backboard is in the in-place state, a hard disk state table corresponding to each hard disk on each hard disk backboard can be generated according to the hard disk port number information.
It should be understood that, although the steps in the flowchart of fig. 3 are shown in sequence as indicated by the arrows, the steps are not necessarily performed in sequence as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in fig. 3 may include multiple sub-steps or stages that are not necessarily performed at the same time, but may be performed at different times, nor do the order in which the sub-steps or stages are performed necessarily performed in sequence, but may be performed alternately or alternately with at least a portion of the sub-steps or stages of other steps or other steps.
In one embodiment, as shown in fig. 6, there is provided a server signal recognition optimizing apparatus, where the apparatus is applied to a signal recognition system, the system includes a back board and a baseboard management controller BMC, the back board is connected to the baseboard management controller through a bus, and the apparatus may be located in the BMC or may be independently disposed outside the BMC, and the apparatus includes:
the judging module 601 is configured to judge a state of the server, where the state includes a power-on initialization state and an initialization completion state;
an acquisition module 602, configured to identify, when the server is in a power-on initialization state, backplane address information through a high-speed signal line;
and the communication module 603 is configured to send the backplane address information to a baseboard management controller.
In one embodiment, the obtaining module 602 is configured to:
and when the server enters an initialization completion state, releasing the high-speed signal line for traffic data transmission, and acquiring back plate state information through the low-speed signal line.
In one of the embodiments of the present invention,
the high-speed signal is an SAS bus, the low-speed signal is an I2C bus, and the baseboard management controller is respectively communicated with different backboard in turn through a single I2C bus.
In one embodiment, the communication module 603 is configured to:
and sending the backboard address information to a baseboard management controller, wherein the baseboard management controller communicates with the backboard corresponding to the address identifier by calling the address identifier in different backboard address information so as to acquire backboard state information.
In one embodiment, the illustrated determination module 601 is configured to:
judging whether the backboard is abnormal or not according to the backboard state information, and locating the position of the backboard where the abnormality occurs in response to the occurrence of the backboard.
In one embodiment, the illustrated determination module 601 is configured to:
judging whether the hard disk backboard is in an in-place state or not according to the backboard state information;
and if the hard disk backboard is in an in-place state, generating a hard disk state table corresponding to the hard disk backboard according to the hard disk port number information.
The specific limitation of the server signal recognition optimizing device can be referred to the limitation of the server signal recognition optimizing method hereinabove, and will not be described herein. The respective modules in the above-described server signal recognition optimizing apparatus may be implemented in whole or in part by software, hardware, and a combination thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.
In one embodiment, a computer readable storage medium is provided having stored thereon a computer program which when executed by a processor performs the steps of:
judging the state of the server, wherein the state comprises a power-on initialization state and an initialization completion state;
when the server is in a power-on initialization state, identifying backboard address information through a high-speed signal line;
and sending the backboard address information to a baseboard management controller.
In one embodiment, the computer program when executed by the processor further performs the steps of:
and when the server enters an initialization completion state, releasing the high-speed signal line for traffic data transmission, and acquiring back plate state information through the low-speed signal line.
In one embodiment, the computer program when executed by the processor further performs the steps of:
the baseboard management controller communicates with different backplanes in turn via a single I2C bus.
In one embodiment, the computer program when executed by the processor further performs the steps of:
and sending the backboard address information to a baseboard management controller, wherein the baseboard management controller communicates with the backboard corresponding to the address identifier by calling the address identifier in different backboard address information so as to acquire backboard state information.
In one embodiment, the computer program when executed by the processor further performs the steps of:
judging whether the backboard is abnormal or not according to the backboard state information, and locating the position of the backboard where the abnormality occurs in response to the occurrence of the backboard.
In one embodiment, the computer program when executed by the processor further performs the steps of:
judging whether the hard disk backboard is in an in-place state or not according to the backboard state information;
and if the hard disk backboard is in an in-place state, generating a hard disk state table corresponding to the hard disk backboard according to the hard disk port number information.
Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the various embodiments provided herein may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), memory bus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples merely represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the invention. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.
Claims (8)
1. A method for optimizing server signal identification, the method being applied to a signal identification system, the system comprising a back plate and a baseboard management controller, the back plate and the baseboard management controller being connected by a bus, the method comprising:
judging the state of the server, wherein the state comprises a power-on initialization state and an initialization completion state;
when the server is in a power-on initialization state, identifying backboard address information through a high-speed signal line;
transmitting the backboard address information to a baseboard management controller;
and when the server enters an initialization completion state, releasing the high-speed signal line for traffic data transmission, and acquiring back plate state information through the low-speed signal line.
2. The method of claim 1, wherein the method comprises:
the high-speed signal is an SAS bus, the low-speed signal is an I2C bus, and the baseboard management controller is respectively communicated with different backboard in turn through a single I2C bus.
3. The method according to claim 2, wherein the method comprises:
and sending the backboard address information to a baseboard management controller, wherein the baseboard management controller communicates with the backboard corresponding to the address identifier by calling the address identifier in different backboard address information so as to acquire backboard state information.
4. The method of claim 1, wherein the method comprises:
judging whether the backboard is abnormal or not according to the backboard state information, and locating the position of the backboard where the abnormality occurs in response to the occurrence of the backboard.
5. The method of claim 4, wherein the method comprises:
judging whether the hard disk backboard is in an in-place state or not according to the backboard state information;
and if the hard disk backboard is in an in-place state, generating a hard disk state table corresponding to the hard disk backboard according to the hard disk port number information.
6. A server signal recognition optimizing apparatus, the apparatus being applied to a signal recognition system, the system including a back plate and a baseboard management controller, the back plate and the baseboard management controller being connected by a bus, the apparatus comprising:
the judging module is used for judging the state of the server, wherein the state comprises a power-on initialization state and an initialization completion state;
the acquisition module is used for identifying the backboard address information through the high-speed signal line when the server is in a power-on initialization state;
the communication module is used for sending the backboard address information to the baseboard management controller;
the acquisition module is further configured to:
and when the server enters an initialization completion state, releasing the high-speed signal wire for flow data transmission, and acquiring the state information of the backboard, the field replaceable unit and the health state information of the hard disk through the low-speed signal wire.
7. The apparatus of claim 6, wherein the communication module is to:
and sending the backboard address information to a baseboard management controller, wherein the baseboard management controller communicates with the backboard corresponding to the address identifier by calling the address identifier in different backboard address information so as to acquire backboard state information.
8. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 5.
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