CN114189638A - Row scanning circuit of rolling shutter, image sensor and electronic equipment - Google Patents

Row scanning circuit of rolling shutter, image sensor and electronic equipment Download PDF

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Publication number
CN114189638A
CN114189638A CN202111470711.1A CN202111470711A CN114189638A CN 114189638 A CN114189638 A CN 114189638A CN 202111470711 A CN202111470711 A CN 202111470711A CN 114189638 A CN114189638 A CN 114189638A
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China
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row
input
charge transfer
switch
transfer switch
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张盛阳
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Twenty First Century Beijing Microelectronics Technology Co ltd
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Twenty First Century Beijing Microelectronics Technology Co ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/40—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50—Control of the SSIS exposure
    • H04N25/53—Control of the integration time
    • H04N25/531—Control of the integration time by controlling rolling shutters in CMOS SSIS

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  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

A row scanning circuit for a rolling shutter, comprising: a scan circuit, the scan circuit comprising: the first end of the first charge transfer switch is connected with the direct current bus, the second end of the first charge transfer switch is connected with the first end of the second charge transfer switch, and the first end of the second charge transfer switch is connected with the first end of the second charge transfer switch; the output end of the photodiode and the second end of the second charge transfer switch are connected with the sensing node; a first end of the pixel reset switch is connected with a second end of the second charge transfer switch, and a second end of the pixel reset switch is connected with the direct current bus; the input end of the source follower is connected with the direct current bus, and the control end of the source follower is connected with the second end of the second charge transfer switch; the row selection switch, the first end of row selection switch links to each other with the source follower output, and row selection switch second end is as row scanning circuit output, and this circuit structure is simple, and circuit design cost is lower.

Description

Row scanning circuit of rolling shutter, image sensor and electronic equipment
Technical Field
The invention relates to the technical field of electronic circuits, in particular to a row scanning circuit of a rolling shutter, an image sensor and electronic equipment.
Background
In the field of image acquisition, shutters of image sensors are mainly divided into rolling shutters and global shutters, and most of the image sensors in the market at present adopt rolling shutters. According to the implementation mode, the rolling shutter can be divided into a mechanical type, an electronic type or a mechanical and electronic mixed mode, but the rolling shutter in the prior art has structural load of a scanning circuit, and the cost is higher.
Disclosure of Invention
Embodiments of the present invention provide a row scanning circuit of a rolling shutter, an image sensor and an electronic device, so as to provide a row scanning circuit of a rolling shutter with low cost.
In order to achieve the above purpose, the embodiments of the present invention provide the following technical solutions:
a row scanning circuit for a rolling shutter, comprising: a scan circuit, the scan circuit comprising:
the first end of the first charge transfer switch is connected with the direct current bus, the second end of the first charge transfer switch is connected with the first end of the second charge transfer switch, and the first end of the second charge transfer switch is connected with the first end of the second charge transfer switch;
the output end of the photodiode and the second end of the second charge transfer switch are connected with the sensing node;
a first end of the pixel reset switch is connected with a second end of the second charge transfer switch, and a second end of the pixel reset switch is connected with the direct current bus;
the input end of the source follower is connected with the direct current bus, and the control end of the source follower is connected with the second end of the second charge transfer switch;
and the first end of the row selection switch is connected with the output end of the source follower, and the second end of the row selection switch is used as the output end of the row scanning circuit.
Optionally, in the row scanning circuit of the rolling shutter, the source follower is of a control switch type.
Optionally, in the above-mentioned line scanning circuit of the rolling shutter, the line scanning circuit of the rolling shutter is applied to an image sensor, a readout window of the image sensor is an nth row to an N + W th row, each row corresponds to one scanning circuit, and the line scanning circuit further includes:
a controller for switching on and off the row select switch, the first charge transfer switch, and the second charge transfer switch.
Optionally, in the row scanning circuit of the rolling shutter, the controller is specifically configured to:
when the Mth row of the pixels is read, controlling a row selection switch of a scanning circuit corresponding to the Mth row to be closed, and controlling a first charge control switch of a scanning circuit of the M + K th row to be closed, wherein K is less than or equal to W.
Optionally, in the line scanning circuit of the rolling shutter, when an M + N + W-K + H line of a pixel is read, a line selection switch of the scanning circuit corresponding to the M + N + W-K + H line is controlled to be closed, and a first charge control switch of the scanning circuit of the H line of the readout window is controlled to be closed.
Optionally, in the line scanning circuit of the rolling shutter, K is an adjustable value.
Optionally, in the row scanning circuit of the rolling shutter, the controller includes:
a synchronization signal generation circuit;
a first input end of the counter is used for acquiring a first input signal, a second input end of the counter is connected with a first input end of the synchronous signal generating circuit, and a signal output by an output end of the counter is a control signal used for controlling the working state of the row selecting switch;
a first input end of the first adder is connected with a first input end of the counter, and a second input end of the first adder is used for acquiring a second input signal;
a first input end of the first subtractor is connected with an output end of the first adder, and a second input end of the first subtractor is used for acquiring a third input signal;
a second subtractor, a first input end of which is used for obtaining the second input signal, and a second input end of which is used for obtaining a third input signal;
a second adder, a first input end of the second adder being configured to obtain the third input signal, and a second input end of the second adder being configured to obtain a fourth input signal;
a first input end of the third subtracter is connected with the output end of the counter, and a second input end of the third subtracter is connected with the output end of the second subtracter;
a first input end of the third adder is connected with the output end of the counter, and a second input end of the third adder is connected with the output end of the second adder;
a first input end of the digital comparator is connected with the output end of the counter, and a second input end of the digital comparator is connected with the output end of the first subtracter;
and a 2-path selector, a first input end of the 2-path selector being connected to an output end of the third subtractor, a second input end of the 2-path selector being connected to an output end of the third adder, and an output signal of the 2-path selector being a control signal for controlling a working state of the first charge transfer switch.
Optionally, in the line scanning circuit of the rolling shutter, the second input signal and the third input signal are clock signals provided by an off-chip FPGA, an input of the first input signal is N, a value of the fourth input signal is me, and a value of the fifth input signal is K-1.
An image sensor to which a row scanning circuit having the rolling shutter according to any one of the above is applied.
An electronic device to which a row scanning circuit having the rolling shutter according to any one of the above is applied.
Based on the above technical solution, the line scanning circuit of a rolling shutter according to the above technical solution provided by the embodiment of the present invention includes a first charge transfer switch and a second charge transfer switch, a first end of the first charge transfer switch is connected to a dc bus, a second end of the first charge transfer switch is connected to a first end of the second charge transfer switch, and a first end of the second charge transfer switch; the output end of the photodiode is connected with the second end of the second charge transfer switch and the sensing node, and the first end of the pixel reset switch is connected with the second end of the second charge transfer switch; the input end of the source follower is connected with the direct current bus, the control end of the source follower is connected with the second end of the second charge transfer switch, and the source follower is a control switch in the scheme; the row selection switch, the first end of row selection switch with the output of source follower links to each other, the second end of row selection switch is as scanning circuit's output, this circuit structure is simple, and circuit design cost is lower.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a row scanning circuit of a rolling shutter with a simple circuit structure disclosed in an embodiment of the present application;
FIG. 2 is a schematic diagram of a rolling shutter to which a row scan circuit disclosed in an embodiment of the present application is applied;
fig. 3 is a schematic circuit diagram of a controller according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, the present application discloses a row scanning circuit of a rolling shutter with a simple circuit structure, which may also be referred to as a 5T pixel, and specifically, the circuit may include: a scan circuit 100, see fig. 1, comprising:
a first charge transfer switch TXF having a first terminal connected to the dc bus VDD and a second terminal connected to a first terminal of the second charge transfer switch TX;
the output end of the photodiode PPD and the second end of the second charge transfer switch TX are connected with a sensing node;
a pixel reset switch RST, a first end of the pixel reset switch RST being connected to a second end of the second charge transfer switch TX, a second end of the pixel reset switch RST being connected to the dc bus VDD;
a source follower SF, an input end of the source follower SF being connected to the dc bus VDD, a control end of the source follower SF being connected to a second end of the second charge transfer switch TX, in this embodiment, the source follower SF is a control switch;
and a first end of the row selection switch SEL is connected with the output end of the source follower SF, and a second end of the row selection switch SEL is used as the output end of the scanning circuit.
The switching states of the first charge transfer switch TXF, the second charge transfer switch TX, the pixel reset switch RST and the row select switch SEL are controlled by control signals, and the control signals are control signals output by a preset control module based on preset logic. The image sensor is provided with a plurality of reading windows, the control modes of the scanning circuits corresponding to each reading window can be different, when a certain row scanning window needs to be controlled, the controller 200 closes the row selection switch SEL so as to read the pixel signals corresponding to the circuit through the row selection switch SEL, meanwhile, the first charge transfer switch TXF of the scanning circuit is controlled to be closed when the target scanning window corresponding to the row scanning window is controlled based on a preset rule, and the circuit is simple to implement and low in cost.
Fig. 2 is a schematic diagram of a rolling shutter to which a line scanning circuit disclosed in an embodiment of the present application is applied, and an operation process of the line scanning circuit of the present application is described with reference to fig. 2, where a certain readout window of the image sensor is set to be an nth row to an N + W th row, the readout window is a pixel row to be read out, and an integration window of the pixel is K, where the integration window refers to an equivalent time required for reading out pixels of K rows, and K is less than or equal to W in the present solution. When the Mth row (M is a row between N and N + W) of the pixels is read, the row selection switch SEL corresponding to the row is closed, signals of the pixels of the row are read, meanwhile, the first charge transfer switch TXF of the pixels of the M + K row is closed, at the moment, the first charge transfer switches TXF of the M to M + K-1 rows are in an open state, and therefore charges integrated in the row diode PPD are cleared. When the sensor needs to read the signals of the M +1 th row of pixels, the row select switch SEL of the M +1 th row and the first charge transfer switch TXF of the M + K th row are opened, i.e. the row scan switch of the M +1 th row and the first charge transfer of the M + K +1 th row are closed, which is equivalent to moving the whole integration window one row down. The whole readout window is scanned in analogy, and the integration time of all pixels is the time that the image sensor needs to read K rows of pixels, and since the time for reading one row of pixels is fixed, the integration time of the pixels can also be changed by changing the K value, in the process, the switch TX is only applied when reading a certain row of pixels. For switch RST, the RST of the read row is set to 0, while the RST of all other non-read rows is 1.
When the pixel reads the N + W-K +1 th row, that is, when the row selection switch SEL is closed, the first charge transfer switch TXF of the N + W +1 th row is closed according to the method described above, but the row address already exceeds the maximum row address (N + W) of the readout window, so this scheme needs to close the first charge transfer switch TXF of the scan circuit of the first row of the readout window (that is, the nth row of the entire pixel array), and this row address is equivalent to the row address of the pixel read row minus W-K +1, and similarly, if the pixel reads the N + W-K +2 th row, that is, when the row selection switch SEL is closed, the first charge transfer switch TXF of the N + W +2 th row is closed, that is, the first charge transfer switch TXF of the scan circuit of the second row of the readout window is closed. This process can be summarized as closing the first charge transfer switch TXF of the scanning circuit of the H-th row in the aforementioned manner when the pixel reads the N + W-K + H-th row, that is, when the row selection switch SEL is closed.
In the technical solution disclosed in the above embodiment of the present application, the line scanning circuit of the rolling shutter is applied to an image sensor, the readout window of the image sensor is from nth line to N + W th line, each line corresponds to one scanning circuit, the control state of each switch in the line scanning circuit is controlled by a controller 200, and the controller 200 is used for switching on and off of a line selection switch SEL, a first charge transfer switch TXF and a second charge transfer switch TX.
Corresponding to the above scanning process, the controller 200 is specifically configured to:
when the Mth row of the pixels is read, controlling a row selection switch SEL of a scanning circuit corresponding to the Mth row to be closed, controlling a first charge control switch of the scanning circuit of the M + K row to be closed, wherein K is less than or equal to W, when the Mth + N + W-K + H row of the pixels is read, controlling the row selection switch SEL of the scanning circuit corresponding to the M + N + W-K +1 row to be closed, and controlling a first charge control switch of the scanning circuit of the H row of the reading window to be closed, wherein H is a positive integer.
In the technical solution disclosed in the embodiment of the present application, the value of K is an adjustable value, and the size of the value of K can be adjusted by the controller 200, and in this solution, the adjustment of K can be realized by changing the size of the register value K in the controller 200.
Specifically, the present application discloses a specific structure of a circuit of the controller 200, which can include, referring to fig. 3:
the synchronous signal generating circuit SYNC _ GEN is used for acquiring an input signal Y _ SYNC, generating and inputting a synchronous signal matched with the Y _ SYNC signal, and sending the synchronous signal to the counter;
a counter, a first input end of which is configured to obtain a first input signal START _ ADDRESS ═ N, a second input end of which is connected to a first input end of the synchronization signal generation circuit SYNC _ GEN, and obtain a synchronization signal output by the synchronization signal generation circuit SYNC _ GEN, a control end of which is configured to obtain a CLOCK control signal Y _ CLOCK, when obtaining the first input signal and the synchronization signal, the counter is specifically configured to perform a technique on the first input signal when obtaining the synchronization signal, and configure a count result as a value of the first input signal, and a signal output by an output end of the counter is a control signal for controlling an operating state of the row selection switch SEL;
a first adder A1, a first input of the first adder A1 being connected to a first input of the counter for obtaining the first input signal START _ ADDRESS ═ N, a second input of the first adder A1 being used for obtaining a second input signal ROI _ SIZW ═ W, and the first adder a1203 being used for performing an addition operation on the first input signal and the second input signal and inputting the result to a first subtractor S1;
a first subtractor S1, a first input terminal of the first subtractor S1 is connected to the output terminal of the first adder a1, and is configured to obtain a calculation result of the first adder a1, a second input terminal of the first subtractor S1 is configured to obtain a third input signal WINDOW _ SIZE — K-1, and subtract the input signal obtained at the first input terminal of the first subtractor S1 from the third input signal WINDOW _ SIZE — K-1;
a second subtractor S2, the first input terminal of the second subtractor S2 being configured to obtain the second input signal, the second input terminal of the second subtractor S2 being configured to obtain a third input signal, perform a subtraction operation on the second input signal and the third input signal, and output a calculation result to the third subtractor S3;
a second adder a2, a first input terminal of the second adder a2 is configured to obtain the third input signal, a second input terminal of the second adder a2 is configured to obtain a fourth input signal, in this embodiment, a value of the fourth input signal may be 1, the third input signal and the fourth input signal are added, and a calculation result is sent to the third adder A3;
a third subtractor S3207, a first input terminal of the third subtractor S3 is connected to the output terminal of the counter, a second input terminal of the third subtractor S3 is connected to the output terminal of the second subtractor S2, and the third subtractor S3207 is configured to subtract the calculation results of the counter and the third subtractor S3 and send the calculation result to the 2-way gate;
a third adder A3, a first input terminal of the third adder A3 is connected to an output terminal of the counter, a second input terminal of the third adder A3 performs a clipping operation with an output terminal of the second adder a2, and sends a calculation result to a Digital Comparator;
a Digital Comparator, a first input terminal of the Digital Comparator is connected with an output terminal of the counter, a second input terminal of the Digital Comparator is connected with an output terminal of the first subtractor S1, the Digital Comparator compares two paths of data, when an output result of the counter is smaller than an output result of the first subtractor S1, the Digital Comparator sends a first trigger signal to the 2-path selector MUX210, otherwise, the Digital Comparator sends a second trigger signal to the 2-path selector MUX 210;
a 2-path selector MUX, a first input terminal of the 2-path selector MUX is connected to the output terminal of the third subtractor S3, a second input terminal of the 2-path selector MUX is connected to the output terminal of the third adder A3, a control terminal of the 2-path selector MUX210 is connected to the output terminal of the Digital Comparator, an output signal of the 2-path selector MUX is a control signal for controlling the operating state of the first charge transfer switch TXF, specifically, when the 2-path selector MUX210 receives the first trigger signal, the 2-path selector MUX210 outputs the output value of the third adder A3, and when the 2-path selector MUX210 receives the second trigger signal, the 2-path selector MUX210 outputs the output value of the third subtractor S3.
In the scheme, the input signals Y _ SYNC and Y _ CLOCK are CLOCK signals provided by an off-chip FPGA, the input of the first input signal is N, the value of the fourth input signal is me, and the value of the fifth input signal is K-1.
As can be seen from the above solution, the controller 200 comprises a counter, a synchronization signal generating circuit SYNC _ GEN, three adders, three subtractors, a 2-way selection period and a Digital Comparator, and the circuit has 5 input signals and 2 output signals, wherein the input signals are Y _ SYNC, Y _ CLOCK, START _ ADDRESS, ROI _ SIZE and WINDOW _ SIZE. The output signals are ADDR _ SEL and ADDR _ TXF. The input signals Y _ SYNC and Y _ CLOCK are fed by the off-chip FPGA, and the values of START _ ADDRESS (═ N), ROI _ SIZE (═ W), and WINDOW _ SIZE (═ K-1) are given by on-chip registers, and the values are adjustable. The ADDR _ SEL signal and the ADD _ TXF signal are respectively connected to an address decoder corresponding to each row of pixels, the address decoder determines the address information of a scanning row required to be controlled based on the ADDR _ SEL signal, and when the ADDR _ SEL points to a certain row, a row selection control switch corresponding to the row is closed, and the pixels of the row are read. The address decoder determines the address information of a target row to be controlled based on the ADDR _ SEL signal, and when ADDR _ TXF points to a certain row, controls the first charge transfer switch TXF of the target scanning circuit corresponding to the row to be closed, and the charges stored in the pixels of the row are cleared.
Specifically, in the above scheme, when it is necessary to START reading a certain read window, the off-chip FPGA will give a Y _ SYNC pulse, and at this time, START reading the nth row of pixels (which are the first row of pixels of the read window), where N is set by START _ ADDDRESS. After all the W rows of pixels in the read window are read, a Y _ SYNC pulse is fed again to start reading the next read window. In specific operation, when the input signal Y _ SYNC fed by the off-chip FPGA is a rising edge, the SYNC signal generator SYNC _ GEN generates a synchronous internal pulse signal, and sets the value of the counter, i.e., ADDR _ SEL, to the value N of START _ ADDRESS, in this embodiment, there are two control signals of the counter: a clock signal and a reset signal. The input signal Y _ CLK is a clock, and the input signal Y _ SYNC is recorded as a reset signal. The general reset is to set all registers of the counter to 0 and then start counting. In this solution, a data selector is placed before each register in the counter so that, at the arrival of the Y _ SYNC pulse, not all register values are set to 0, but the value of the register is equal to the value of START _ ADDRESS. The counter is then incremented by 1 each time a rising edge of an input signal Y _ CLOCK arrives. After W clock cycles (after all pixel rows of the readout window are scanned completely), a Y _ SYNC rising edge is given again, so that all pixels of the readout window can be scanned line by line again. During the reading scan of the pixel, the Digital Comparator compares the address bit with the output value v1 (N + W-K +1) of the first subtractor S1. When the output value ADDR _ SEL < v1 of the counter is obtained, the 2-way gate will send the output value v5 (ADDR _ SEL + K) of the third adder A3 to ADDR _ TXF, that is, the first charge transfer switch TXFTXF switch corresponding to ADDR _ TXF is closed, and the charges in the pixels of the row are emptied; when the value of the output signal ADDR _ SEL of the counter is increased and is greater than or equal to v1, the 2-way gate will send the output signal v4(ADDR _ SEL-W + K-1) of the third subtractor S3 to ADDR _ TXF, that is, the first charge transfer switch TXFTXF corresponding to ADDR _ TXF is closed, and the charges in the pixels of the row are emptied. The rolling shutter can be realized by the cyclic reciprocating, and the pixel integration time K can be adjusted according to the requirement.
In summary of the above embodiments, in the above solution disclosed in the embodiments of the present application, the readout window of the pixels may START from any row of the array (determined by the value of the signal START _ address) or end from any row (determined by the input signal Y _ SYNC); the pixel integration time of the conventional general rolling shutter is equal to the reading time of the array, while the pixel integration time of the invention can be adjusted at will (determined by the value of K), so that the shortest time can be required for reading one row of pixels, and the longest time can be required for reading all pixels in the whole window; in addition, most circuit devices in the above scheme in the present application may be static elements, and the main dynamic circuit is a counter, so that the overall power consumption of the circuit is small.
Corresponding to the circuit, the application also discloses an image sensor, and the image sensor can be applied to a line scanning circuit of the rolling shutter.
Corresponding to the above circuit, the present application also discloses an electronic device to which the line scanning circuit of the rolling shutter described in any one of the above can be applied.
For convenience of description, the above system is described with the functions divided into various modules, which are described separately. Of course, the functionality of the various modules may be implemented in the same one or more software and/or hardware implementations of the invention.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, the system or system embodiments are substantially similar to the method embodiments and therefore are described in a relatively simple manner, and reference may be made to some of the descriptions of the method embodiments for related points. The above-described system and system embodiments are only illustrative, wherein the units described as separate parts may or may not be physically separate, and the parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A row scan circuit for a rolling shutter, comprising: a scan circuit, the scan circuit comprising:
the first end of the first charge transfer switch is connected with the direct current bus, the second end of the first charge transfer switch is connected with the first end of the second charge transfer switch, and the first end of the second charge transfer switch is connected with the first end of the second charge transfer switch;
the output end of the photodiode and the second end of the second charge transfer switch are connected with a sensing node;
a first end of the pixel reset switch is connected with a second end of the second charge transfer switch, and a second end of the pixel reset switch is connected with the direct current bus;
the input end of the source follower is connected with the direct current bus, and the control end of the source follower is connected with the second end of the second charge transfer switch;
and the first end of the row selection switch is connected with the output end of the source follower, and the second end of the row selection switch is used as the output end of the row scanning circuit.
2. The row scan circuit of a rolling shutter according to claim 1, wherein the source follower is of the type of a control switch.
3. The row scan circuit of claim 1, wherein the row scan circuit of the rolling shutter is applied to an image sensor, and a readout window of the image sensor is from nth row to N + W row, each row corresponding to one of the scan circuits, and the row scan circuit further comprises:
a controller for switching on and off the row select switch, the first charge transfer switch, and the second charge transfer switch.
4. The line scan circuit of a rolling shutter according to claim 3,
the controller is specifically configured to:
when the Mth row of the pixels is read, controlling a row selection switch of a scanning circuit corresponding to the Mth row to be closed, and controlling a first charge control switch of a scanning circuit of the M + K th row to be closed, wherein K is less than or equal to W.
5. The line scanning circuit of claim 4, wherein when the M + N + W-K + H line of the pixel is read, the line selection switch of the scanning circuit corresponding to the M + N + W-K + H line is controlled to be closed, and the first charge control switch of the scanning circuit of the H line of the readout window is controlled to be closed.
6. The line scan circuit of a rolling shutter according to claim 5, wherein K is an adjustable value.
7. The line scan circuit of a rolling shutter according to claim 5, wherein the controller comprises:
a synchronization signal generation circuit;
a first input end of the counter is used for acquiring a first input signal, a second input end of the counter is connected with a first input end of the synchronous signal generating circuit, and a signal output by an output end of the counter is a control signal used for controlling the working state of the row selecting switch;
a first input end of the first adder is connected with a first input end of the counter, and a second input end of the first adder is used for acquiring a second input signal;
a first input end of the first subtractor is connected with an output end of the first adder, and a second input end of the first subtractor is used for acquiring a third input signal;
a second subtractor, a first input end of which is used for obtaining the second input signal, and a second input end of which is used for obtaining a third input signal;
a second adder, a first input end of the second adder being configured to obtain the third input signal, and a second input end of the second adder being configured to obtain a fourth input signal;
a first input end of the third subtracter is connected with the output end of the counter, and a second input end of the third subtracter is connected with the output end of the second subtracter;
a first input end of the third adder is connected with the output end of the counter, and a second input end of the third adder is connected with the output end of the second adder;
a first input end of the digital comparator is connected with the output end of the counter, and a second input end of the digital comparator is connected with the output end of the first subtracter;
and a 2-path selector, a first input end of the 2-path selector being connected to an output end of the third subtractor, a second input end of the 2-path selector being connected to an output end of the third adder, and an output signal of the 2-path selector being a control signal for controlling a working state of the first charge transfer switch.
8. The row scan circuit of a rolling shutter according to claim 7, wherein the second input signal and the third input signal are clock signals provided by an off-chip FPGA, the input of the first input signal is N, the value of the fourth input signal is me, and the value of the fifth input signal is K-1.
9. An image sensor characterized by a line scanning circuit to which the rolling shutter according to claims 1 to 8 is applied.
10. An electronic device characterized by a line scanning circuit to which the rolling shutter according to claims 1-8 is applied.
CN202111470711.1A 2021-12-03 2021-12-03 Row scanning circuit of rolling shutter, image sensor and electronic equipment Pending CN114189638A (en)

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