CN114187872A

CN114187872A - Display panel driving method and display device

Info

Publication number: CN114187872A
Application number: CN202111467259.3A
Authority: CN
Inventors: 张蒙蒙; 匡建; 周星耀; 李玥; 吴员涛
Original assignee: Wuhan Tianma Microelectronics Co Ltd
Current assignee: Wuhan Tianma Microelectronics Co Ltd
Priority date: 2021-12-03
Filing date: 2021-12-03
Publication date: 2022-03-15
Anticipated expiration: 2041-12-03
Also published as: CN114187872B

Abstract

The invention provides a driving method of a display panel and a display device, comprising a plurality of pixel driving circuits; the pixel driving circuit comprises a driving transistor, a first light-emitting control module, a data writing module, a light-emitting element and a first resetting module; each picture displayed by the display panel is maintained in at least one display frame, and the display frame comprises a first stage and at least one second stage; the first stage comprises an initialization stage, a data writing stage and a light-emitting stage, and the second stage maintains a data signal of the data writing stage; the display panel displays pictures including a first picture and a second picture which are adjacent, wherein in the last display frame before the first picture is switched to the second picture, a first reset signal in a first stage has a first voltage; in a display frame after the first picture is switched to the second picture, the first reset signal in the first stage has a second voltage which is not equal to the first voltage. The embodiment of the invention aims to improve the flicker problem and the display smear problem in the low-frequency mode.

Description

Display panel driving method and display device

Technical Field

The present invention relates to the field of display technologies, and in particular, to a driving method of a display panel and a display device.

Background

With the development of Display technology, an Active Matrix Organic Light Emitting Diode (AMOLED) Display panel gradually enters the market, and compared with a conventional Thin Film Transistor Liquid Crystal Display (TFT LCD), the AMOLED Display panel has the advantages of low energy consumption, self-luminescence, wide viewing angle, fast response speed, easy application to a flexible Display technology, and the like. The AMOLED display panel may generally adopt current driving, i.e. control the light emitting module to emit light by using the driving current.

The variable frequency driving technique is gradually applied to a display panel, for example, a driving method with a higher refresh rate is adopted to drive and display a dynamic picture (for example, a sports event or a game scene) so as to ensure the fluency of the display picture: the slow-lens image or the static picture is driven and displayed by adopting a driving mode with a lower refresh rate so as to reduce the power consumption. In the low frequency mode, the display panel is more prone to flicker.

Disclosure of Invention

The invention provides a driving method of a display panel and a display device, which are used for improving the flicker problem and the display smear problem in a low-frequency mode.

In a first aspect, an embodiment of the present invention provides a driving method for a display panel, where the display panel includes a plurality of pixel driving circuits;

the pixel driving circuit comprises a driving transistor, a first light-emitting control module, a data writing module, a light-emitting element and a first resetting module; the driving transistor is used for generating a driving current; the first light emitting control module is used for transmitting the driving current to the light emitting element according to a light emitting control signal; the data writing module is used for writing a data signal into the grid electrode of the driving transistor according to a second scanning signal; the first reset module is used for providing a first reset signal;

each picture displayed by the display panel is maintained in at least one display frame, and the display frame comprises a first phase and at least one second phase; the first phase comprises an initialization phase, a data writing phase and a light-emitting phase, and the second phase maintains a data signal of the data writing phase;

the pictures displayed by the display panel comprise a first picture and a second picture which are adjacent, the first picture is switched to the last display frame before the second picture, and a first reset signal in the first stage has a first voltage; in the display frame after the first frame is switched to the second frame, the first reset signal in the first phase has a second voltage that is not equal to the first voltage.

In a second aspect, an embodiment of the present invention provides a display device, including a display panel and a pixel driving circuit, where the pixel driving circuit is configured to drive the display panel according to the driving method of the first aspect.

In the driving method of the display panel provided by the embodiment of the invention, when the first picture is displayed, the first reset signal in the first stage has the first voltage. When displaying the second picture, the first reset signal in the first phase has the second voltage. The second voltage is not equal to the first voltage, so that the voltage value of the first reset signal is correspondingly adjusted according to the switching of the picture, the reset degree of the first reset signal to one or more nodes in the pixel driving circuit is controlled, and the brightness of the picture corresponds to the reset degree. For example, in the case of resetting one node, the higher the luminance of the screen is, the lower the voltage of the first reset signal is, the lower the luminance of the screen is, and the higher the voltage of the first reset signal is; in the case of resetting the other node, the higher the luminance of the screen is, the higher the voltage of the first reset signal is, and the lower the luminance of the screen is, the lower the voltage of the first reset signal is. In summary, the flicker problem in the low frequency mode and the display smear problem are improved by corresponding the brightness of the picture to the reset degree.

Drawings

Fig. 1 is a schematic top view of a display panel according to an embodiment of the present invention;

fig. 2 is a schematic diagram of a pixel driving circuit according to an embodiment of the invention;

FIG. 3 is a timing diagram of a pixel driving circuit according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 5 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 6 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 7 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 8 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 9 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 10 is a diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 11 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 12 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 13 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 14 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 15 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 16 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention;

fig. 17 is a timing diagram of another pixel driving circuit according to an embodiment of the invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

Fig. 1 is a schematic top view of a display panel according to an embodiment of the present invention, and referring to fig. 1, the display panel includes a substrate 100 and a plurality of pixel driving circuits 200 disposed on the substrate 100, where the pixel driving circuits 200 are used for driving light emitting elements to emit light, so as to implement a light emitting display function of the display panel.

Fig. 2 is a schematic diagram of a pixel driving circuit according to an embodiment of the present invention, fig. 3 is a timing diagram of the pixel driving circuit according to the embodiment of the present invention, and referring to fig. 2 and fig. 3, the pixel driving circuit 200 includes a driving transistor M0, a first light emitting control module 11, a data writing module 12, a light emitting element 13, and a first resetting module 14. The driving transistor M0 is used to generate a driving current. The first light emitting control module 11 is configured to transmit a driving current to the light emitting element 13 according to a light emitting control signal EMIT. The data write module 12 is used for writing a data signal to the gate of the driving transistor M0 according to the second SCAN signal SCAN 2. The first reset module 14 is configured to provide a first reset signal VREF 1. One or more nodes in the pixel driving circuit may be reset according to the first reset signal VREF 1. For example, the gate of the driving transistor M0 may be reset according to the first reset signal VREF 1.

Each picture displayed by the display panel is maintained in at least one display frame. The display frame includes a first stage T1 and at least one second stage T2. The first phase T1 includes an initialization phase, a data writing phase, and a light emitting phase. In the initialization stage, the gate of the driving transistor M0 may be reset. In the data writing phase, a data signal may be written to the gate of the driving transistor M0. In the light-emitting phase, the light-emitting luminance of the light-emitting element 13 can be controlled in accordance with the data signal of the gate of the driving transistor M0. The second phase T2 does not include the data writing phase, and does not write the data signal to the gate of the driving transistor M0, but maintains the data signal of the data writing phase in the first phase T1, and controls the light emission luminance of the light emitting element 13 by the data signal in the first phase T1. Thus, in the low frequency mode, power consumption of the display panel can be reduced.

The pictures displayed by the display panel comprise a first picture and a second picture which are adjacent, in the last display frame before the first picture is switched to the second picture, the first reset signal VREF1 in the first stage T1 has a first voltage. In a display frame after the first screen is switched to the second screen, the first reset signal VREF1 in the first period T1 has a second voltage that is not equal to the first voltage.

In the driving method of the display panel according to the embodiment of the invention, when the first screen is displayed, the first reset signal VREF1 in the first stage T1 has the first voltage. When the second screen is displayed, the first reset signal VREF1 in the first period T1 has the second voltage. The second voltage is not equal to the first voltage, so that the voltage value of the first reset signal VREF1 is correspondingly adjusted according to the switching of the picture, the reset degree of the first reset signal VREF1 to one or more nodes in the pixel driving circuit is controlled, and the brightness of the picture corresponds to the reset degree. For example, in the case of resetting one node, the higher the luminance of the screen, the lower the voltage of the first reset signal VREF1, and the lower the luminance of the screen, the higher the voltage of the first reset signal VREF 1; in the case of resetting the other node, the higher the luminance of the screen, the higher the voltage of the first reset signal VREF1, and the lower the luminance of the screen, the lower the voltage of the first reset signal VREF 1. In summary, the flicker problem in the low frequency mode and the display smear problem are improved by corresponding the brightness of the picture to the reset degree.

Referring to fig. 2 and 3, the first reset module 14 writes the first reset signal VREF1 to the gate of the driving transistor M0 according to the first SCAN signal SCAN 1. Setting the second voltage to be smaller than the first voltage, after the first image is switched to the second image, pulling down the voltage value of the first reset signal VREF1 in the first stage T1, reducing the voltage value of the gate of the driving transistor M0 in the initialization stage, increasing the driving current, and increasing the light emitting brightness of the light emitting element 13, so that the dark state after the first image is switched to the second image is not pulled too low, i.e., the brightness of the dark state is not particularly dark, thereby reducing the brightness difference between the first stage T1 and the second stage T2, so as to improve the flicker problem in the low frequency mode and the display smear problem.

Fig. 4 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention, fig. 5 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention, and referring to fig. 4 and 5, the first reset module 14 applies the first reset signal to the anode of the light emitting element 13 according to the additional scan signal SN. Setting the second voltage to be greater than the first voltage, after the first picture is switched to the second picture, pulling up the voltage value of the first reset signal VREF1 in the first stage T1, increasing the voltage value of the anode of the light emitting element 13, increasing the driving current, and increasing the light emitting brightness of the light emitting element 13, so that the dark state after the first picture is switched to the second picture is not pulled too low, i.e., the brightness of the dark state is not particularly dark, thereby reducing the brightness difference between the first stage T1 and the second stage T2, so as to improve the flicker problem in the low frequency mode and the display smear problem.

The voltage value of the first reset signal VREF1 jumps according to the variation of the picture, and is related to the node reset by the first reset signal VREF 1. taking the first reset signal VREF1 for resetting the gate of the driving transistor M0 as an example, the first reset signal VREF1 may also have various embodiments.

Fig. 6 is a timing diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 6, the second frame is maintained in at least two display frames. In the process of displaying the second picture, the second voltages in at least two adjacent display frames are the same.

Illustratively, as illustrated in fig. 6, the at least two display frames include a first display frame and a second display frame. The second screen is maintained in the first display frame and the second display frame. The second voltage in the first display frame is denoted as V21, the second voltage in the second display frame is denoted as V22, and V21 is denoted as V22. It can be understood that V21 and V22 are both smaller than the first voltage, and after the first frame is switched to the second frame, the voltage value of the first reset signal VREF1 in the first period T1 is lowered in both the first display frame and the second display frame, so as to improve the flicker problem in the low frequency mode and the display smear problem.

Fig. 7 is a timing diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 7, the second frame is maintained in at least two display frames. And in the process of displaying the second picture, the second voltage in at least two adjacent display frames is gradually increased.

Exemplarily, referring to fig. 7, the at least two display frames include a first display frame and a second display frame. The second screen is maintained in the first display frame and the second display frame. The second voltage in the first display frame is denoted as V21, the second voltage in the second display frame is denoted as V22, and V21 < V22. After the first picture is switched to the second picture, the voltage value of the first reset signal VREF1 in the first stage T1 is reduced in the first display frame and the second display frame, so that the flicker problem and the display smear problem in the low-frequency mode are improved. The difference from fig. 6 is that in the process of displaying the second frame, the second voltage gradually rises as the time interval from the first frame is longer, and gradually reaches the preset brightness of the second frame.

Fig. 8 is a timing diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 8, the display frame for maintaining the second frame includes a first display frame, a second display frame, a third display frame and a fourth display frame which are sequentially arranged. The second voltage in the first display frame is marked as V21, the second voltage in the second display frame is marked as V22, the second voltage in the third display frame is marked as V23, the second voltage in the fourth display frame is marked as V24, and V21 < V22 < V23 < V24. In the embodiment of the invention, the second picture is maintained in four display frames, and in the four display frames, the second voltage is gradually increased along with the longer time interval with the first picture, so as to gradually reach the preset brightness of the second picture, the jump value of the second voltage in the adjacent display frames can be set smaller, the brightness difference between the adjacent display frames is also smaller, and the display effect is improved.

Illustratively, when the first screen is displayed, the first voltage of the first reset signal VREF1 at the first period T1 is-2V. In the first display frame, the second voltage (V21) of the first reset signal VREF1 at the first period T1 is-3V. In the second display frame, the second voltage (V22) of the first reset signal VREF1 at the first period T1 is-2.7V. In the third display frame, the second voltage (V23) of the first reset signal VREF1 at the first period T1 is-2.4V. In the fourth display frame, the second voltage (V24) of the first reset signal VREF1 at the first period T1 is-2.1V. Alternatively, in one embodiment, V24 may also be set to-2V, i.e., the voltage value at which the screen is restored to normal ignition.

Alternatively, referring to fig. 2 and 3, in the second phase T2, the first reset signal VREF1 cannot be applied to the gate of the driving transistor M0, otherwise, the gate of the driving transistor M0 is reset by the first reset signal VREF1, the data signal stored in the gate of the driving transistor M0 is cleared, and the data signal required for the second phase T2 to emit light cannot be maintained. The first reset signal VREF1 is not applied to the gate of the driving transistor M0 during the second phase T2, and the voltage value of the first reset signal VREF1 during the second phase T2 does not affect the luminance of the light emitting element 13, but can be used as a reference value of the voltage of the first reset signal VREF1 at the transition to the first phase T1. The voltage value of the first reset signal VREF1 in the second stage T2 may have various embodiments.

With continued reference to fig. 3, in the same display frame, the voltage value of the first reset signal VREF1 in the first phase T1 is less than the voltage value of the first reset signal VREF1 in the second phase T2. In the last display frame before the first frame is switched to the second frame, the first reset signal VREF1 in the second stage T2 has the third voltage. In a display frame after the first screen is switched to the second screen, the first reset signal VREF1 in the second stage T2 has a fourth voltage. The second voltage is less than the fourth voltage, and the first voltage is less than the third voltage. Taking the setting of the second voltage and the fourth voltage as an example, the voltage jump of the first reset signal VREF1 in the same display frame is exemplarily illustrated. In the first stage T1, the gate of the driving transistor M0 is supplied with the second voltage which is lower than the fourth voltage as a reference, the voltage value of the gate of the driving transistor M0 in the initialization stage is lowered, the driving current is increased, and the light emission luminance of the light emitting element 13 is increased, so that the dark state in the first stage T1 is not pulled too low, so that the dark state in the first stage T1 is not pulled too low, and the luminance difference between the first stage T1 and the second stage T2 is reduced.

As shown in fig. 3, in order to simplify the timing control, and to provide less kinds of voltage values, the fourth voltage may be set equal to the third voltage. In other embodiments, the fourth voltage may not be equal to the third voltage.

Fig. 9 is a timing diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 9, a difference between the first voltage and the third voltage is Δ V1, and a difference between the second voltage and the fourth voltage is Δ V2. Δ V1 ═ Δ V2. In this way, the first voltage is pulled up to the third voltage by the additional amount of Δ V1, the second voltage is also pulled up to the fourth voltage by the additional amount of Δ V1(Δ V1 is Δ V2), the first reset signal VREF1 has the same jump value in the first stage T1 and the second stage T2 in the same display frame, the difference between the light-emitting luminance of the first stage T1 and the light-emitting luminance of the second stage T2 is the same in the display frame of the first picture and the display frame of the second picture, the luminance change in each display frame is the same, and the display effect is improved.

Exemplarily, referring to fig. 9, the second voltage is less than the first voltage, Δ V1 ═ Δ V2. The fourth voltage is less than the third voltage.

Fig. 10 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention, and fig. 11 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention, and referring to fig. 10 and fig. 11, the pixel driving circuit includes a first reset module 14 and a second reset module 15. The first reset module 14 writes the first reset signal VREF1 to the gate of the driving transistor M0 according to the first SCAN signal SCAN 1. The second reset module 15 is configured to apply a second reset signal VREF2 to the anode of the light emitting element 13 according to the additional scan signal SN. In the following embodiments, the description of the first reset signal VREF1 will not be repeated, and the description of the second reset signal VREF2 will be emphasized.

In the last display frame before the first screen is switched to the second screen, the second reset signal VREF2 in the first period T1 has the fifth voltage. In a display frame after the first screen is switched to the second screen, the second reset signal VREF2 in the first period T1 has the sixth voltage. The sixth voltage is greater than the fifth voltage. In the embodiment of the present invention, the sixth voltage is set to be greater than the fifth voltage, after the first frame is switched to the second frame, the voltage value of the second reset signal VREF2 in the first stage T1 is pulled up, the voltage value of the anode of the light emitting device 13 is increased, the driving current is increased, and the light emitting brightness of the light emitting device 13 is increased, so that the dark state after the first frame is switched to the second frame is not pulled too low, that is, the brightness of the dark state is not particularly dark, thereby reducing the brightness difference between the first stage T1 and the second stage T2, so as to improve the flicker problem in the low frequency mode and the display smear problem.

Fig. 12 is a timing diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 12, the second frame is maintained in at least two display frames. And in the process of displaying the second picture, the sixth voltages in at least two adjacent display frames are the same.

Illustratively, as illustrated in fig. 12, the at least two display frames include a first display frame and a second display frame. The second screen is maintained in the first display frame and the second display frame. The sixth voltage in the first display frame is denoted as V61, the second voltage in the second display frame is denoted as V62, and V61 is denoted as V62. It can be understood that V61 and V62 are both greater than the fifth voltage, and after the first frame is switched to the second frame, the voltage value of the second reset signal VREF2 in the first period T1 is raised in both the first display frame and the second display frame, so as to improve the flicker problem in the low frequency mode and the display smear problem.

Fig. 13 is a timing diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 13, the second frame is maintained in at least two display frames. And in the process of displaying the second picture, the sixth voltage in at least two adjacent display frames is gradually reduced.

Exemplarily, referring to fig. 13, the at least two display frames include a first display frame and a second display frame. The second screen is maintained in the first display frame and the second display frame. The sixth voltage in the first display frame is denoted as V61, the sixth voltage in the second display frame is denoted as V62, and V61 > V62. Both the V61 and the V62 are greater than the fifth voltage, and after the first picture is switched to the second picture, the voltage value of the second reset signal VREF2 in the first stage T1 is increased in the first display frame and the second display frame, so that the flicker problem and the display smear problem in the low-frequency mode are improved. The difference from the example shown in fig. 12 is that in the process of displaying the second picture, the sixth voltage gradually decreases as the time interval from the first picture is longer, and the preset brightness of the second picture is gradually reached.

Fig. 14 is a timing diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 14, the display frame for maintaining the second frame includes a first display frame, a second display frame, a third display frame and a fourth display frame which are sequentially arranged. The sixth voltage in the first display frame is denoted as V61, the sixth voltage in the second display frame is denoted as V62, the sixth voltage in the third display frame is denoted as V63, the sixth voltage in the fourth display frame is denoted as V64, and V61 < V62 < V63 < V64. In the embodiment of the invention, the second picture is maintained in four display frames, and in the four display frames, the sixth voltage is gradually reduced along with the longer time interval with the first picture, so that the preset brightness of the second picture is gradually reached, the jump value of the sixth voltage in the adjacent display frames can be set smaller, the brightness difference between the adjacent display frames is smaller, and the display effect is improved.

Alternatively, referring to fig. 10 and 11, in the second phase T2, the second reset signal VREF2 is applied to the anode of the light emitting element 13 without affecting the data signal stored at the gate of the driving transistor M0, and in both the first phase T1 and the second phase T2, the second reset signal VREF2 may be applied to the anode of the light emitting element 13. The voltage value of the second reset signal VREF2 in the second stage T2 can be used as a reference value of the voltage of the second reset signal VREF2 at the transition to the first stage T1. The voltage value of the second reset signal VREF2 in the second stage T2 may have various embodiments.

With continued reference to fig. 11, in the same display frame, the voltage value of the second reset signal VREF2 in the first phase T1 is greater than the voltage value of the second reset signal VREF1 in the second phase T2. In the last display frame before the first screen is switched to the second screen, the second reset signal VREF2 in the second stage T2 has the seventh voltage. In a display frame after the first screen is switched to the second screen, the second reset signal VREF2 in the second stage T2 has the eighth voltage. The sixth voltage is greater than the eighth voltage and the fifth voltage is greater than the seventh voltage. Taking the setting of the sixth voltage and the eighth voltage as an example, the voltage jump of the second reset signal VREF2 in the same display frame is exemplarily illustrated. In the first phase T1, a sixth voltage is supplied to the anode of the light emitting element 13, the sixth voltage is higher than the eighth voltage as a reference, the voltage value of the anode of the light emitting element 13 is increased, the driving current is increased, and the light emitting luminance of the light emitting element 13 is increased, so that the dark state in the first phase T1 is not pulled too low, so that the dark state in the first phase T1 is not pulled too low, and the luminance difference between the first phase T1 and the second phase T2 is reduced.

As shown in fig. 11, in order to simplify the timing control, and to provide less kinds of voltage values, the eighth voltage may be set equal to the seventh voltage. In other embodiments, the eighth voltage may not be equal to the seventh voltage.

Fig. 15 is a timing diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 15, a difference between the fifth voltage and the seventh voltage is Δ V3, and a difference between the sixth voltage and the eighth voltage is Δ V4. Δ V3 ═ Δ V4. In this way, the fifth voltage is reduced to the seventh voltage by the additional amount of Δ V3, the sixth voltage is reduced to the eighth voltage by the additional amount of Δ V3(Δ V3 is Δ V4), the second reset signal VREF2 has the same jump value in the first stage T1 and the second stage T2 in the same display frame, the difference between the light emission luminance of the first stage T1 and the light emission luminance of the second stage T2 is the same in the display frame of the first screen and the display frame of the second screen, and the luminance changes in the display frames are the same, so that the display effect is improved.

Exemplarily, referring to fig. 9, the sixth voltage is greater than the fifth voltage, Δ V3 ═ Δ V3. The eighth voltage is greater than the seventh voltage.

Fig. 16 is a timing diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 16, the display frame includes at least two second phases T2. During the process of displaying the second picture and within the same display frame, there are at least two adjacent eighth voltages of the second phase T2 that gradually increase.

Exemplarily, referring to fig. 16, when the second screen is displayed, in the same display frame, the eighth voltages in the three second phases T2 are sequentially denoted as V811, V812, and V813. V811 < V812 < V813, and V811, V812, V813 are all less than the sixth voltage. The plurality of second stages T2 in one display frame displaying the second picture gradually increase the eighth voltage and gradually decrease the difference with the sixth voltage as the time interval with the first picture is longer, so as to decrease the brightness difference of the first stage T1 and each second stage T2 as a whole, and to improve the flicker problem in the low frequency mode.

With continued reference to fig. 10, the pixel driving circuit 200 further includes a threshold compensation module 16 and a second light emission control module 17. The first terminal of the DATA writing module 12 is electrically connected to the DATA signal terminal DATA, the second terminal of the DATA writing module 12 is electrically connected to the first pole of the driving transistor M0, and the control terminal of the DATA writing module 12 is used for receiving the second SCAN signal SCAN 2. A first terminal of the first light emitting control module 11 is electrically connected to the second pole of the driving transistor M0, a second terminal of the first light emitting control module 11 is electrically connected to the anode of the light emitting element 13, and a control terminal of the first light emitting control module 13 is configured to receive the light emitting control signal EMIT. A first end of the second light-emitting control module 17 is electrically connected to the first power voltage terminal PVDD, a second end of the second light-emitting control module 17 is electrically connected to the first pole of the driving transistor M0, and a control end of the second light-emitting control module 17 is configured to receive the light-emitting control signal EMIT. The first terminal of the first reset module 14 is configured to receive a first reset signal VREF1, the second terminal of the first reset module 14 is electrically connected to the gate of the driving transistor M0, and the control terminal of the first reset module 14 is configured to receive a first SCAN signal SCAN 1. A first terminal of the second reset module 15 is configured to receive the second reset signal VREF2, a second terminal of the second reset module 15 is electrically connected to the anode of the light emitting element 13, and a control terminal of the second reset module 15 is configured to receive the additional scan signal SN. The first terminal of the threshold compensation module 16 is electrically connected to the gate of the driving transistor M0, the second terminal of the threshold compensation module 16 is electrically connected to the second pole of the driving transistor M0, and the control terminal of the threshold compensation module 16 is configured to receive the second SCAN signal SCAN 2. The cathode of the light emitting element 13 is electrically connected to the second power supply voltage terminal PVEE. It should be noted that the pixel driving circuit 200 may have various circuit structures, and as a modified embodiment, the data writing module 12 may also be directly connected to the gate of the driving transistor M0, or connected to the gate of the driving transistor M0 through a feed-through capacitor.

Exemplarily, referring to fig. 10, the first light emission control module 11 includes a first transistor M1, the data write module 12 includes a second transistor M2, the first reset module 14 includes a third transistor M3, the second reset module 15 includes a fourth transistor M4, the threshold compensation module 16 includes a fifth transistor M5, and the second light emission control module 17 includes a sixth transistor M6. The gate of the first transistor M1 and the gate of the sixth transistor M6 are both configured to receive the emission control signal EMIT. A first pole of the first transistor M1 is electrically connected to a second pole of the driving transistor M0, and a second pole of the first transistor M1 is electrically connected to the anode of the light emitting element 13. A gate of the second transistor M2 and a gate of the fifth transistor M5 are both configured to receive the second SCAN signal SCAN2, a first pole of the second transistor M2 is electrically connected to the DATA signal terminal DATA, and a second pole of the second transistor M2 is electrically connected to the first pole of the driving transistor M0. A gate of the third transistor M3 is for receiving the first SCAN signal SCAN1, a first pole of the third transistor M3 is for receiving the first reset signal VREF1, and a second pole of the third transistor M3 is electrically connected to a gate of the driving transistor M0. A gate of the fourth transistor M4 is for receiving the additional scan signal SN, a first pole of the fourth transistor M4 is for receiving the second reset signal VREF2, and a second pole of the fourth transistor M4 is electrically connected to the anode of the light emitting element 13. A first pole of the fifth transistor M5 is electrically connected to the gate of the driving transistor M0, and a second pole of the fifth transistor M5 is electrically connected to the second pole of the driving transistor M0. A first pole of the sixth transistor M6 is electrically connected to the first power supply voltage terminal PVDD, and a second pole of the sixth transistor M6 is electrically connected to the first pole of the driving transistor M0.

Fig. 17 is a timing diagram of another pixel driving circuit according to an embodiment of the present invention, and referring to fig. 10 and 17, taking an example that each transistor in the pixel driving circuit is a P-type transistor, in other embodiments, at least one transistor in the pixel driving circuit may also be an N-type transistor. For a P-type transistor, the enable signal is low and the disable signal is high. The first phase T1 includes an initialization phase T1, a data writing phase T2, and a light emitting phase T3. In the initialization stage t1, the emission control signal EMIT is high, the first SCAN signal SCAN1 is low, the second SCAN signal SCAN2 is high, the additional SCAN signal SN is high, the third transistor M3 is turned on, and the first reset signal VREF1 is applied to the gate of the driving transistor M0, thereby performing reset initialization of the driving transistor M0. In the DATA writing phase t2, the emission control signal EMIT is high, the first SCAN signal SCAN1 is high, the second SCAN signal SCAN2 is low, the additional SCAN signal SN is low, the second transistor M2 and the fifth transistor M5 are turned on, and the DATA signal of the DATA signal terminal DATA is written to the gate of the driving transistor M0 through the second transistor M2, the driving transistor M0 and the fifth transistor M5. In the light-emitting period t3, the light-emitting control signal EMIT is low, the first SCAN signal SCAN1 is high, the second SCAN signal SCAN2 is high, the additional SCAN signal SN is high, the first transistor M1 and the sixth transistor M6 are turned on, and the driving current generated by the driving transistor M0 passes through the light-emitting element 13, thereby driving the light-emitting element 13 to EMIT light.

As shown in fig. 17, in the second phase T2, the first SCAN signal SCAN1 is maintained at a high level, the third transistor M3 is turned off, and the first reset signal VREF1 cannot be applied to the gate of the driving transistor M0. In the second stage T2, the additional SCAN signal SN exists in a period of a low level, at which the fourth transistor M4 is turned on, and the second SCAN signal SCAN2 may be applied to the anode of the light emitting element 13.

As shown in fig. 17, the first SCAN signal SCAN1 in the first period T1 has a low level period, and at this time, the second transistor M2 is turned on, the data signal can be written to the gate of the driving transistor M0, the first SCAN signal SCAN1 in the second period T2 is maintained at a high level, the second transistor M2 is maintained in an off state, and the data signal is not written to the gate of the driving transistor M0, and a low frequency display is performed. In other embodiments, the gate of the second transistor M2 may receive an additional scan signal, and at this time, in both the first period T1 and the second period T2, there are periods for controlling the second transistor M2 to be turned on, and a data signal can be written into the gate of the driving transistor M0 for high frequency display.

Optionally, the brightness of the first picture is less than the brightness of the second picture.

Illustratively, when the first frame is a black frame and the second frame is a white frame, and when the black frame is switched to the white frame, if the dark state in the first several display frames after switching is relatively low and the brightness is relatively dark, the problem of frame smear occurs. By adopting the driving method of the display panel provided by the embodiments of the invention, the flicker problem and the display smear problem in the low-frequency mode are improved by corresponding the brightness of the picture to the reset degree.

The embodiment of the invention also provides a display device, which comprises a display panel and a pixel driving circuit, wherein the pixel driving circuit is used for driving the display panel according to the driving method in the embodiment. The display device can be a computer, a mobile phone, a tablet computer and the like.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A driving method of a display panel, wherein the display panel comprises a plurality of pixel driving circuits;

2. The driving method according to claim 1, wherein the first reset module writes the first reset signal to the gate of the driving transistor according to a first scan signal; the second voltage is less than the first voltage.

3. The driving method according to claim 1, wherein the second picture is maintained within at least two of the display frames;

in the process of displaying the second picture, the second voltages in at least two adjacent display frames are the same.

4. The driving method according to claim 1, wherein the second picture is maintained within at least two of the display frames;

in the process of displaying the second picture, the second voltage in at least two adjacent display frames gradually rises.

5. The driving method according to claim 4, wherein maintaining the display frames of the second screen includes a first display frame, a second display frame, a third display frame, and a fourth display frame arranged in this order;

the second voltage within the first display frame is less than the second voltage within the second display frame, the second voltage within the second display frame is less than the second voltage within the third display frame, and the second voltage within the third display frame is less than the second voltage within the fourth display frame.

6. The driving method according to claim 1, wherein the first reset signal in the second phase has a third voltage in a last display frame before the first frame is switched to the second frame; in the display frame after the first picture is switched to the second picture, the first reset signal in the second stage has a fourth voltage;

the fourth voltage is equal to the third voltage.

7. The driving method according to claim 1, wherein the first reset signal in the second phase has a third voltage in a last display frame before the first frame is switched to the second frame; in the display frame after the first picture is switched to the second picture, the first reset signal in the second stage has a fourth voltage;

a difference between the first voltage and the third voltage is equal to a difference between the second voltage and the fourth voltage.

8. The driving method according to claim 7, wherein the second voltage is smaller than the fourth voltage, and the first voltage is smaller than the third voltage.

9. The driving method according to claim 2, wherein the pixel driving circuit further comprises a second reset module for applying a second reset signal to the anode of the light emitting element in accordance with an additional scan signal;

in the last display frame before the first picture is switched to the second picture, the second reset signal in the first stage has a fifth voltage; in the display frame after the first picture is switched to the second picture, the second reset signal in the first stage has a sixth voltage; the sixth voltage is greater than the fifth voltage.

10. The driving method according to claim 9, wherein the second picture is maintained within at least two of the display frames;

in the process of displaying the second picture, the sixth voltages in at least two adjacent display frames are the same.

11. The driving method according to claim 9, wherein the second picture is maintained within at least two of the display frames;

in the process of displaying the second picture, the sixth voltage in at least two adjacent display frames is gradually reduced.

12. The driving method according to claim 11, wherein maintaining the display frames of the second screen includes a first display frame, a second display frame, a third display frame, and a fourth display frame arranged in this order;

the sixth voltage within the first display frame is greater than the sixth voltage within the second display frame, the sixth voltage within the second display frame is greater than the sixth voltage within the third display frame, and the sixth voltage within the third display frame is greater than the sixth voltage within the fourth display frame.

13. The driving method according to claim 9, wherein in a last display frame before the first frame is switched to the second frame, the second reset signal in the second phase has a seventh voltage; in the display frame after the first picture is switched to the second picture, the second reset signal in the second stage has an eighth voltage;

the eighth voltage is equal to the seventh voltage.

14. The driving method according to claim 9, wherein in a last display frame before the first frame is switched to the second frame, the second reset signal in the second phase has a seventh voltage; in the display frame after the first picture is switched to the second picture, the second reset signal in the second stage has an eighth voltage;

a difference between the fifth voltage and the seventh voltage is equal to a difference between the sixth voltage and the eighth voltage.

15. The driving method according to claim 14, wherein the sixth voltage is larger than the eighth voltage, and the fifth voltage is larger than the seventh voltage.

16. The driving method according to claim 9, wherein in the display frame after the first frame is switched to the second frame, the second reset signal in the second phase has an eighth voltage;

the display frame comprises at least two of the second stages;

in the process of displaying the second picture, and in the same display frame, there are at least two adjacent eighth voltages of the second stage that gradually increase.

17. The driving method according to claim 9, wherein the pixel driving circuit further includes a threshold compensation module and a second light emission control module;

the first end of the data writing module is electrically connected with a data signal end, the second end of the data writing module is electrically connected with the first electrode of the driving transistor, and the control end of the data writing module is used for receiving the second scanning signal;

a first end of the first light emitting control module is electrically connected with a second pole of the driving transistor, a second end of the first light emitting control module is electrically connected with an anode of the light emitting element, and a control end of the first light emitting control module is used for receiving the light emitting control signal;

a first end of the second light-emitting control module is electrically connected with a first power voltage end, a second end of the second light-emitting control module is electrically connected with the first electrode of the driving transistor, and a control end of the second light-emitting control module is used for receiving the light-emitting control signal;

the first end of the first reset module is used for receiving the first reset signal, the second end of the first reset module is electrically connected with the grid electrode of the driving transistor, and the control end of the first reset module is used for receiving the first scanning signal;

the first end of the second reset module is used for receiving the second reset signal, the second end of the second reset module is electrically connected with the anode of the light-emitting element, and the control end of the second reset module is used for receiving the additional scanning signal;

a first end of the threshold compensation module is electrically connected with the gate of the driving transistor, a second end of the threshold compensation module is electrically connected with the second pole of the driving transistor, and a control end of the threshold compensation module is used for receiving the second scanning signal;

and the cathode of the light-emitting element is electrically connected with a second power supply voltage end.

18. The driving method according to claim 1, wherein the luminance of the first picture is smaller than the luminance of the second picture.

19. A display device comprising a display panel and a pixel drive circuit for driving the display panel in accordance with the driving method as claimed in any one of claims 1 to 18.