CN1141823C - Parallel exchange method for multi-stage cells - Google Patents

Parallel exchange method for multi-stage cells Download PDF

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CN1141823C
CN1141823C CNB011082402A CN01108240A CN1141823C CN 1141823 C CN1141823 C CN 1141823C CN B011082402 A CNB011082402 A CN B011082402A CN 01108240 A CN01108240 A CN 01108240A CN 1141823 C CN1141823 C CN 1141823C
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cell
length
stage
exchange
cells
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CN1305292A (en
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陈相宁
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Abstract

The present invention discloses a parallel exchange method for multi-stage cells, which is a hierarchical cell exchange method. Cells are classified into 2 to 4 cell stages for exchange respectively, and the cell exchange of each cell stage is only suitable for the same cell length. After being exchanged respectively, the cells are merged by an output merger and then are output. The cell stages are classified by the lengths of the cells. The cell length of the high cell stage is at least two times longer than that of the adjacent low cell stage, but not more than 64 KB. The present invention has the advantages of high exchange speed and transmission efficiency of data and large service speed range supported by networks.

Description

Parallel exchange method for multi-stage cells
Technical field
The invention belongs to a kind of packet switching method, especially the cell switching method of the parallel exchange of rank in a kind of minute.
Background technology
An important debate when definition ATM (asynchronous transfer mode) notion is exactly about " actually or fixedly variable choice of block length (" asychronous transfer mode Broadband ISDN technology " revised edition; Martin Depew Rake work; Cheng Shiduan, Liu Binyi; People's Telecon Publishing House's publication; ISBN 7-115-08198-0/TP1539; November in 1999 the 2nd edition, 43-45 page or leaf) ".In the original definition of ATD (asynchronous time-division multiplex), adopting length is the fixed length grouping of 16 bytes; In initial FPS (fast packet switching), adopt the grouping of variable-length.The conclusion of debate is that for broadband networks, because main foreseeable application is voice, image and batch data, it is limited to use variable-length packets that efficiency of transmission is improved, and uses the fixed length grouping but can reduce the exchange complexity greatly, improves exchange velocity.In order to satisfy the requirement of speech, the excursion of block length is limited in addition.Therefore 1988 CCITT (International Telecommunications Union) the expert think that the fixed length scheme is better, and decision adopts this speech of cell to replace grouping, with the grouping of expression regular length.Determined again according to the influence of network overall delay, efficiency of transmission and implementation complexity that this fix information block length was 48 bytes in 1989.
Yet find in the practice, use the cell of single regular length to exist limitation.Consider the situation in the high speed fibre network.The present the highest support 622 megaline road transmission rates of atm standard.Under this transmission rate, just there is an ATM cell to arrive switch every 0.68 microsecond.Switch goes out in the cell content of letter head in 0.68 microsecond with inner analysis, and according to analysis result cell to be forwarded to corresponding ports be feasible.If but line speed is improved, forwarding time will shorten so.Along with the progress of optical fiber fabrication technology and the development of laser modulation technique, on single optical wavelength, realized the line speed of 40 gigabits at present.If the line speed of atm network is brought up to 40 gigabits, just mean that cell forwarding time of ATM switch must be less than 11 nanoseconds.High like this cell switching rate request is difficult to realize.A feasible solution of head it off is exactly the length of lengthening ATM cell.For example ATM cell length is increased to 4000 bytes, the transmitting continuous time of a cell just extends to 0.8 microsecond, just can realize believing the analysis and the cell forwarding of head with present technology.
Consider to support the situation of low speed business again.The speech coding scheme speed that is widely adopted has at present dropped to per second 8 kilobits (for example G.729) even 8 kilobits following (for example G.723.1).For the speech coding data of per second 8 kilobits, fill up 48 milliseconds of times of cell payload space requirement of 48 bytes, surpassed the requirement of 25 milliseconds of unidirectional transmission time delays, not only must use " echo neutralizer ", and speech quality also has been subjected to influence.If the cell payload length is reduced to 10 bytes, so only need the 10 milliseconds of cells that just can finish vocoded data adaptive, for providing condition, improved the speech quality of transmission simultaneously without echo neutralizer.
Even the situation of moderate rate business, the ATM cell payload is 48 bytes at present, considers that each cell has the letter head of 5 bytes, and the adaptive maximum theoretical efficiency of ATM cell has only 48/53 ≈ 90%.If consider the expense of adaptation layer, efficient will be lower.This makes that the link utilization of atm network can not be satisfactory.In order to improve link utilization, must increase cell length.
As seen the cell with single regular length transmits all information and improper.
Summary of the invention
Purpose of the present invention just provides the parallel exchange method for multi-stage cells that a kind of exchange velocity is fast, efficiency of transmission is high, easy to implement.
Parallel exchange method for multi-stage cells of the present invention is: cell is categorized as 2 to 4 cell ranks exchanges respectively, arrive cell and at first be classified in the cell grader, deliver to affiliated separately Switching Module by class then and exchange; Each other cell switching of cell level is only carried out at a kind of cell length, outputs to different stage cell output again after the interflow in an output mixer of the same line road output port after exchanging respectively on the different cell ranks.
The improved method of the present invention is: cell length is constituted the system of a classification, and carry out the cell grade classification according to cell length.Same other cell of cell level has identical and fixing cell length, and the length of higher level (cell length is longer) cell is adjacent 2 times than low level (cell length is shorter) cell length at least, is no more than 64 kilobytes (referring to 65536 bytes) at the most.Under normal conditions, use the cell transfer information of standard size (referring to cell length).In special fiber backbone network at a high speed, earlier the standard size cell is combined into longer huge cell (high-level cell), be that unit of transfer transmits with huge cell.When transmission low speed real time business, use the little cell (low level cell) littler to transmit data than standard size cell.Cell switching is then carried out respectively on each cell rank.
In above-mentioned cell staging hierarchy, a kind of hierarchical policy of cell preferably is suitably to choose cell lengths at different levels, make the higher level cell can in its payload, comprise just 16 adjacent than the low level cell.
The invention has the advantages that:
1. efficiency of transmission height:
The present invention increases to 264 bytes with the optimum length of standard size cell, wherein believes 8 byte, payload 256 bytes.The payload length owing to extended greatly, the efficient when using the standard size cell to transmit can reach more than 96%, far surpasses the theoretical efficiency of transmission of present ATM and TCP/IP.
2. exchange velocity is fast:
The present invention separately exchanges the cell classification respectively by the cell rank later, other cell switching of each grade all only needs to carry out at the cell of same size, there is not the problem of management different size cell hybrid cache in crosspoint, cell switching still can realize with hardware, thus obtain hardware-level than high switching speed.
3. supporting rate wide ranges:
The present invention makes improved atm network can select suitable cell sizes as required when transmission information for switch provides the ability that exchanges multiple different size rank cell at a high speed.Need by special high-speed line information transmitted, can be encapsulated in the cell of large-size and transmit; The information of low speed business can use the cell of reduced size to transmit in the link than low speed.No matter network has used a kind of cell still is the cell of several different stages, and the switch of each switching node can exchange to them at a high speed destination separately.Compare with the single cell sizes of existing ATM like this, owing to can use the higher transmission rate of cell support of large-size, with the lower service rate of the cell support of reduced size, adopt the network of the parallel exchange of multi-stage cells can support wideer speed range.
4. easy to implement:
When adopting method of the present invention,, just finished whole exchange processs, need not to increase a large amount of hardware devices, existing switching equipment is had compatibility, so to implement present technique be easier as long as cell is classified automatically, exchange, collaborated.
Fig. 1 is the parallel switching fabric schematic diagram of two-stage cell of the present invention.Comprising cell grader 1, standard size cell switching device 21, little cell switching device 22 and output mixer 3.
Fig. 2 is the parallel switching fabric schematic diagrames of three grades of cells of the present invention.Compared to Figure 1, wherein increased huge cell switching device 23.
Fig. 3 is the parallel switching fabric schematic diagram of level Four cell of the present invention.Compare with Fig. 2, wherein increased current standard ATM switch 24.
Fig. 4 is a cell content encapsulation schematic diagram of the present invention.
Embodiment
Embodiment of the present invention are as follows:
The essence of atm technology is, by adopting single cell sizes (referring to cell length) and simplifying the letter header structure, so that realize the quick forwarding of cell at link layer with hardware mode, thereby alleviates the processing pressure of network node.Consider that single cell sizes is significant for reducing the exchange complexity, the present invention proposes to adopt the parallel exchange of a plurality of cell ranks, realizes the hardware-switch of single cell sizes on each cell rank.
The same with the cell of existing atm standard definition, cell of the present invention also is made up of letter 41 and cell payload 42 two parts, letter 41 part have comprised the required information field 412 of identification cell, these information fields comprise all territories in the existing atm standard letter head, and payload part is carried the effective information of cell.In addition, the present invention also is provided with a cell type code territory 411 in each cell letter starting position, and be that the cell of each different stage is specified different non-zero distinguishing mark number in this territory, so only number just can determine the Class Type of cell according to distinguishing mark.15 different non-0 signs can be set in the type code territory 411 of one 4 bit, distinguish 15 kinds of different cell types, are enough to satisfy the requirement of cell classification usually.
The present invention divides the cell rank according to cell length.The present invention proposes following cell length selection principle, so that can simplify the else satisfied simultaneously bigger cell length excursion requirement of cell level.At first, with each other cell length of cell level (being cell sizes) ordering, the present invention claims that the short cell of cell length is than the low level cell, and the long cell of cell length is the higher level cell, and the length of higher level cell is adjacent 2 times than the low level cell length at least.Secondly, because in packet switching, the maximum packet of general acquiescence is 64 kilobytes, so highest level cell payload size should not surpass 64 kilobytes.
The best cell that adopts three size class of the present invention: huge cell, standard size cell and little cell.The system of unit of transfer that they form a classification finishes the exchange and the transmission of the network information jointly.
The length of little cell can be between 8 to 32 bytes, and optimum length is 16 bytes, wherein believe 4 byte, payload 12 bytes.The payload part of little cell can be supported the low speed real time business better much smaller than 48 bytes.Consider the extensive at present low speed speech coding standard that adopts G.729, every frame comprises the coded data of 10 bytes.A little cell has encapsulated after the frame speech coding data, also has 2 bytes can be used for error correction coding.This class business is insensitive to the low volume data mistake, need not to retransmit for the error data that can not correct.
The length of standard size cell can be between 64 to 1K bytes, and optimum length is 264 bytes, wherein believe 8 byte, payload 256 bytes.At this moment the payload part of each standard size cell can be held 16 little cells.
The length of huge cell can be between 1K to 16K byte, and best cell length is 4232 bytes, wherein believes 8 byte, payload 4224 bytes.At this moment the payload part of each huge cell can be held 16 standard-sized cells.Adopt bigger cell sizes to prolong the transmitting continuous time of each huge cell, this is to finish the letter head to handle desired in the ultrahigh speed link.
Cell switching can be carried out on above-mentioned 3 cell sizes ranks, and they are huge cell switching, standard size cell switching and little cell switching.Because each cell rank all only exists a unique a kind of cell length and a letter form, cell switching only needs to carry out at single cell sizes, the operation principle of this and existing atm standard switch is on all four, therefore the design and production method of switch is also identical, only need the cell sizes in the switch is modified as from 53 present bytes that corresponding cell length gets final product on each cell rank, and this amending method was just grasped generally by ATM switch production firm as far back as the eighties.Can directly use MPLS (multiprotocol label switching) switch in addition, just the MPLS switch is in order to exchange variable block length, and complexity improves greatly, and exchange velocity has decline.
If link-speeds is not high especially, can not use huge cell, therefore can adopt two-stage cell-switch fabric shown in Figure 1.It comprises cell grader 1, standard size cell switching device 21, little cell switching device 22 and output mixer 3.
When a cell arrived the multi-stage cells switch, it at first entered cell grader 1.The cell grader is according to the distinguishing mark in the cell letter cell type code territory, starting position 411 number, can determine and arrive cell type and cell length, exchanger module under being sent to separately then: the standard size cell is admitted to standard size cell switching device 21 and exchanges, and little cell is admitted to little cell switching device 22 and exchanges.Again need be after these are exchanged respectively at the cell of same output port output, at first interflow output more later in output mixer 3.Usually the output mixer is the formation buffer of a first in first out.
For the general networking switching node, it need exchange the cell of all three kinds of sizes.At this moment the structure of multi-stage cells switch can be as shown in Figure 2, and it comprises cell grader 1, standard size cell switching device 21, little cell switching device 22, huge cell switching device 23 and output mixer 3.
A cell arrives after the multi-stage cells switch, and it at first enters cell grader 1.The cell grader is according to the distinguishing mark in the cell letter cell type code territory, starting position 411 number, can determine cell type and cell length, Switching Module under being sent to separately then: huge cell is sent to huge cell switching device 23 and exchanges, the standard size cell is sent to standard size cell switching device 21 and exchanges, and little cell is sent to little cell switching device 22 and exchanges.Again need be after being exchanged respectively at last at the cell of same output port output, interflow output more later in output mixer 3.
The present invention can be well and existing ATM switching network compatibility.The method that realizes this compatibility can be described with switching fabric shown in Figure 3.At this moment switch comprises cell grader 1, standard size cell switching device 21, little cell switching device 22, huge cell switching device 23, current standard ATM switch 24 and output mixer 3.
In existing atm standard, beginning 4 bits of the ATM cell transmitted between user and edge switch letter head all are 0, are equivalent to the distinguishing mark number always 0 in the cell type code territory 411.Therefore as long as the distinguishing mark of the defined huge cell of the present invention, standard size cell and little cell number is not 0, the cell grader just can identify existing atm standard cell from the arrival cell, deliver in the current standard ATM switch 24 to exchange.The last cell that exchanges output on each cell rank respectively need be when same output port be exported, interflow output more later in the output mixer.
From the workflow of above-mentioned three kinds of typical exchange scenes as can be seen, adopt the multi-stage cells exchange, realized the application requirements of multiple cell length, still can realize that high-speed information element transmits simultaneously with hardware.Have only 3 kinds of cell sizes (adding that original ATM cell is 4 kinds) and 3 cell switching ranks (adding that existing ATM switch is 4 ranks) altogether, the increase of system complexity is very limited.

Claims (3)

1. parallel exchange method for multi-stage cells, it is characterized in that cell is categorized as 2 to 4 cell ranks to be exchanged respectively, arriving cell at first is classified in the cell grader, Switching Module under delivering to separately by class then exchanges, each other cell switching of cell level is only carried out at a kind of cell length, outputs to different stage cell output again after the interflow in an output mixer of the same line road output port after exchanging respectively on the different cell ranks.
2. parallel exchange method for multi-stage cells according to claim 1 is characterized in that the length division of described cell grade classification by cell, and the length of more senior cell is 2 times of adjacent more rudimentary cell length at least, is no more than 64 kilobytes at the most.
3. parallel exchange method for multi-stage cells according to claim 1 and 2, it is characterized in that the length division of described cell grade classification by cell, the best cell length of more senior cell makes this grade cell can comprise 16 adjacent more rudimentary cells just in payload.
CNB011082402A 2001-02-27 2001-02-27 Parallel exchange method for multi-stage cells Expired - Fee Related CN1141823C (en)

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