CN114169113A - Transmission line time domain equivalent macro model generation method based on delay extraction - Google Patents

Transmission line time domain equivalent macro model generation method based on delay extraction Download PDF

Info

Publication number
CN114169113A
CN114169113A CN202111419382.8A CN202111419382A CN114169113A CN 114169113 A CN114169113 A CN 114169113A CN 202111419382 A CN202111419382 A CN 202111419382A CN 114169113 A CN114169113 A CN 114169113A
Authority
CN
China
Prior art keywords
matrix
transmission line
frequency
pole
time domain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111419382.8A
Other languages
Chinese (zh)
Inventor
童美松
王星宇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tongji University
Original Assignee
Tongji University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tongji University filed Critical Tongji University
Priority to CN202111419382.8A priority Critical patent/CN114169113A/en
Publication of CN114169113A publication Critical patent/CN114169113A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/10—Geometric CAD
    • G06F30/18—Network design, e.g. design based on topological or interconnect aspects of utility systems, piping, heating ventilation air conditioning [HVAC] or cabling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • G06F30/373—Design optimisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Computational Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

A transmission line time domain equivalent macro model generation method based on delay extraction is used for carrying out frequency domain and time domain simulation on high-speed interconnection lines. The method comprises the following specific steps: (a) establishing a frequency domain mathematical model of a transmission line impedance form based on a given unit length parameter resistor R, an inductance L, a capacitance C and a conductance G; calculating the pole and the residue of the m-order of the low frequency band, and continuously adjusting the value of m according to a given error threshold delta until an error condition is met; (b) constructing an approximate expression of high-frequency-band impedance response based on pole residue obtained by calculation in the step (a), discretizing the signal, converting the signal into a frequency-domain pure delay item, and finishing delay explicit extraction; (c) and (c) optimizing to obtain a frequency domain state space model of the transmission line based on the calculation results in the step (a) and the step (b), and generating a corresponding time domain equivalent circuit netlist.

Description

Transmission line time domain equivalent macro model generation method based on delay extraction
Technical Field
The invention belongs to the field of integrated circuits, and particularly relates to a transmission line time domain equivalent macro model generation method under computer aided design.
Background
The transmission line mainly plays a role in connecting devices and signal transmission, and in order to accurately simulate the behavior of the transmission line, a series of effects brought by the transmission line must be considered: delay, crosstalk, ringing, etc. With the increase of the system clock frequency and the scale complexity of the integrated circuit, the requirement of accurate simulation modeling of a high-speed transmission line is gradually increased so as to ensure the reliability and the signal integrity of the whole system. Unreliable transmission line designs can adversely affect overall system performance. The traditional SPICE simulation tool can provide accurate simulation results for early design for reference, but the calculation cost is high.
The transmission line system has huge scale, more nodes and high analysis complexity. According to the traditional model reduction technology, a transmission line set total parameter model is reduced into a mathematical model with smaller dimensionality through a numerical method, and physical characteristics such as stability, passivity and the like can be maintained while the input-output relation of an original system is maintained mathematically. The method is represented by a model order reduction method [1] [2] based on a singular value decomposition method, and a model order reduction method [3] [4] based on a Krylov subspace.
The order reduction method based on the Krylov subspace mainly utilizes the Krylov subspace iterative computation to obtain an approximate order reduction system in a moment matching mode. The system kth moment is the coefficient of the kth derivative of the transfer function at the frequency point ω. The moment matching means: at a specific frequency point, the moment of the original transfer function is reserved by the transfer function of the order-reduced system, and the approximate effect of frequency response is achieved. For a wide-band long transmission line, matching is performed only at a single frequency point, and high-precision approximation of a frequency band far from the matching frequency point cannot be achieved, so that a moment matching method of multiple frequency points is required. This also makes it necessary to approximate or calculate more poles at higher orders to capture the delay effect of the transmission line in practical use. Especially for lossy transmission lines and variable parameter transmission lines, this order reduction method consumes a large amount of computational resources [5 ].
The main idea of the order reduction method based on singular value decomposition is as follows: all singular values of the system are solved, and the effect of reducing the dimensionality of the model is achieved by reserving the singular value with a larger numerical value and abandoning the smaller singular value. However, when singular value solving needs Cholesky decomposition on the energy-viewing control matrix and a system gram matrix is solved, the operation complexity is high, the iterative computation robustness is weak, and the method is not suitable for large-scale circuit systems and is often used for processing high-order control system models.
In order to solve a series of problems in the traditional order reduction method, a transmission line model based on delay explicit extraction is provided. The frequency domain transfer function of the transmission line is calculated by the time delay explicit extraction method, so that a low-order rational expression with pure time delay items in the frequency domain can be obtained, the calculation complexity is reduced, and the calculation cost is saved. Meanwhile, the consumption of time domain simulation computing resources is correspondingly reduced.
Disclosure of Invention
The invention aims to provide an optimized transmission line time domain equivalent macro model and provides a method for establishing a transmission line network time domain equivalent model formed by resistors, inductors, capacitors, conductances and power supply devices.
In order to realize the effect, the invention adopts the specific technical scheme that:
a transmission line time domain equivalent macro model generation method based on delay extraction is characterized by comprising the following steps:
(a) establishing a frequency domain mathematical model of a transmission line impedance form based on a given unit length parameter resistor R, an inductance L, a capacitance C and a conductance G; calculating m-order poles and residuals of the low-frequency band, and determining the low-frequency band frequency response of the impedance transfer function matrix by a denominator polynomial formed by the poles and the corresponding residuals;
(b) constructing an approximate expression of high-frequency-band impedance response based on pole residue obtained by calculation in the step (a), discretizing the signal, converting the signal into a frequency-domain pure delay item, and finishing delay explicit extraction;
(c) and (c) optimizing to obtain a frequency domain state space model of the transmission line based on the calculation results in the step (a) and the step (b), and generating a corresponding time domain equivalent circuit netlist.
Advantageous effects
The poles and the residue contained in the high-frequency response signal are not required to be obtained by solving a linear equation, but are obtained by constructing based on the poles and the residue of the low-frequency signal, so that a large amount of frequency domain data calculation cost is saved.
Compared with the traditional reduced-order model, the characteristic delay of the transmission line is extracted explicitly, most of pole polynomials are replaced, the time domain equivalent model is greatly reduced in scale, and the time domain simulation efficiency is improved.
The generation method of the state space model adopts a state space minimum realization method, and the optimized diagonal standard state space model can be generated by using the algorithm: the elements in the matrix a only appear on the diagonal and are a sparse diagonal matrix.
The whole model has passivity, stability and comprehensiveness; the transmission line without loss, loss and frequency variation parameters can be processed.
Drawings
FIG. 1 is a vector diagram of an input/output port of a transmission line system
FIG. 2 is a schematic diagram showing the combination of the input signal and the external device in example 1
FIG. 3 is the result of the first 20 pole calculation in example 1
FIG. 4 is the result of the construction of the high frequency pole in example 1
FIG. 5 is a netlist composition and time domain simulation computation consumption
FIG. 6 is a waveform diagram of an output voltage signal in example 1
Detailed Description
The embodiments of the present invention that may be used with the present invention will be discussed in detail herein with reference to the accompanying drawings.
A method for establishing a transmission line network time domain equivalent model is characterized in that a transmission line time domain equivalent circuit model consisting of resistors, inductors, capacitors, conductances and power devices is established, and the establishing method comprises the following specific steps:
(a) determining the number of coupled transmission lines forming a transmission line network, and establishing a frequency domain mathematical model in the form of transmission line network impedance according to known unit length parameters of resistance R, inductance L, capacitance C and conductance G, wherein the frequency domain mathematical model is expressed as follows:
Figure BDA0003376300620000031
wherein: x represents the position coordinates of the transmission line; v (x, s), I (x, s) respectively represent the voltage vector and the current vector at the transmission line x position. R(s), L(s), G(s), C(s) respectively represent the parameters of transmission line resistance, inductance, conductance and capacitance in the frequency domain.
Two equations in the formula are combined to obtain a transfer function matrix in the form of impedance. For a system of N transmission lines, the impedance transfer function matrix is represented as follows:
Figure BDA0003376300620000032
wherein, V0(s)，I0(s) are respectively expressed as a voltage vector and a current vector of an input port at the coordinate 0, and the dimensions are both N; vl(s)，Il(s) respectively representing a voltage vector and a current vector of an output port at a coordinate l, wherein the dimensions are N; the dimension of the impedance matrix Z(s) is 2N x 2N, and each sub-matrix block ZmnThe dimension is N × N.
And respectively calculating the top m-order poles and the residue numbers of each impedance submatrix, and determining the low-frequency-band frequency response of the impedance transfer function matrix by a denominator polynomial formed by the poles and the corresponding residue numbers. In order to solve the pole and the residue, the impedance matrix Z(s) is divided into infinite series expressions, and a specific pole P of the mth order can be obtainedk,mCalculating the formula:
det[ZS]＝0
Figure BDA0003376300620000033
wherein det represents the value of the determinant, and YP，ZSIs represented as follows:
Figure BDA0003376300620000034
corresponding residue Rk,mThe calculation formula is as follows:
Figure BDA0003376300620000041
Figure BDA0003376300620000042
and determining the numerical value of the modulus m which needs to be actually calculated according to the error convergence judgment condition and a given error threshold value delta.
The specific pole iterative calculation steps are as follows:
(i) inputting data: δ, R(s), L(s), G(s), C(s)
(ii) Let m equal to 1, calculate the pole according to equation (1.3), and record as Pk,1(ii) a And calculating the residue corresponding to the pole according to the formula (1.5) and recording as Rk,1。
Let m be 2, calculate the pole according to equation (1.3), and record as Pk,2(ii) a And calculating the residue corresponding to the pole according to the formula (1.5) and recording as Rk,2。
(iii) Let m be m +1, calculate the pole, and note as Pk,m(ii) a Calculating the residue, denoted as Rk,m。
(iv) Calculating an error determination condition:
Figure BDA0003376300620000043
if the judgment condition is met, jumping out of the loop; otherwise, jump to step (iii).
(v) Outputting data: first m pole Pk,mAnd the residue Rk,m。
From this, the front is obtained by calculation
Figure BDA0003376300620000048
A low-band transfer function expression formed by an order polynomial:
Figure BDA0003376300620000044
Figure BDA0003376300620000045
(b) and (b) constructing a frequency domain response expression of a high frequency band according to the top m-order pole and the residue obtained by calculation in the step (a), and performing delay explicit extraction on the expression to obtain a low-order rational expression with a pure delay term.
Substep 1 a high-band signal expression is constructed based on the calculation result in step (a). Excessive computational costs are consumed compared to step (a) where no solution of linear equations is required. Since the error in step (a) has converged below the threshold δ, which can be obtained by means of a periodic, fit of the high-band response signal,
Figure BDA0003376300620000046
Figure BDA0003376300620000047
the mth order parameter in the above formula satisfies the following formula:
Figure BDA0003376300620000051
Figure BDA0003376300620000052
and (2) carrying out delay explicit extraction on the high-frequency band signal in the substep 2, discretizing the high-frequency band signal to obtain a discrete frequency spectrum, and carrying out Laplace transformation on the frequency spectrum to obtain a low-order polynomial with a pure delay term.
The specific steps of delayed extraction are as follows:
1. for time domain signal sd(t) discretization
sn(t)＝sd(t-nTk) (1.10)
Wherein the content of the first and second substances,
Figure BDA0003376300620000053
2. fourier transform is carried out on the discrete signal to obtain a discrete Fourier spectrum
Figure BDA0003376300620000054
3. Calculating a frequency response in the s-domain based on a discrete Fourier spectrum
Figure BDA0003376300620000055
After the time delay extraction, the approximate calculation formula of the high-frequency signal is as follows:
Figure BDA0003376300620000056
Figure BDA0003376300620000057
(c) in the step (a) and the step (b), a response signal of a low frequency band and a response signal of a high frequency band are obtained respectively, wherein the low frequency band response is composed of a top m-order pole and a corresponding residue, the high frequency band signal is composed of an expression with a pure delay term, and the sum of the two forms the response signal in the required frequency band:
Z11＝Z22＝Zl11+Zh11
Z12＝Z21＝Zl12+Zh12 (1.14)
and expanding the state space model into a state space model in the frequency domain based on the expression, and generating a corresponding time domain equivalent circuit netlist according to the state space model. Neutron matrix block Z of equation (1.11)11，Z12，Z21，Z22All are composed of polynomials, the sub-matrixes are converted into equivalent state space models,is represented as follows:
Figure BDA0003376300620000058
where the vector i (t) is the current signal at the transmission line port, x (t) is the internal state variable, and v (t) is the voltage signal at the transmission line port.
The transfer function matrix z(s) expressed by the formula (1.11) does not include repeated poles, and a state space minimum implementation algorithm is used for the repeated poles, so that a state space model including a dimensionality minimum state variable can be obtained. And generating the equivalent circuit netlist with the least number of nodes based on the minimized state space model. The concrete implementation steps are as follows:
(i) express the transfer function as
Figure BDA0003376300620000061
Wherein p is1,…pqIs the pole of the transfer function, RiIs a pole piAnd (4) corresponding to the residue matrix, wherein the matrix dimension is consistent with the transfer function matrix.
(ii) According to the corresponding residue matrix R of each poleiAnd rank r of the residue matrixiRespectively constructing poles piDiagonal normal form substate space (A)i,Bi,Ci,Di). Matrix array
Figure BDA0003376300620000064
Is a diagonal matrix formed by poles piRepeat r at opposite cornersiSub-formation, matrix AiIs represented as follows:
Figure BDA0003376300620000062
matrix BiAnd Ci together form a residue matrix Ri. Matrix BiRepresenting input-output port mapping matrices, matrix CiRepresenting a pole corresponding residue matrix and satisfying the following formula:
Ri＝CiBi (1.17)
(iii) sub-state space (A) corresponding to each polei,Bi,Ci,Di) And merging to obtain the minimum realization of the diagonal standard type state space of the system transfer function matrix G(s). Expressed as:
Figure BDA0003376300620000063
v(t)＝[C1 … Ci]x(t) (1.18)
compared with a general state space model, the generated netlist has fewer nodes and fewer devices, and the transmission line can be subjected to rapid time domain simulation by using the netlist.
The state space model represented by equation (1.15) consists of two equations:
Figure BDA0003376300620000065
the matrix A is a diagonal matrix formed by poles in an impedance matrix, and the matrix B is an input selection matrix.
v (t) ═ cx (t) + di (t) is an input-output equation, indicating the relationship between the output and input and state variables at a certain time in the system. Matrix C is a symmetric matrix made up of the various residuals in the impedance matrix and matrix D is a direct connection input and output matrix.
The transmission line standard synthesis method synthesizes two equations in a state space into two sub-networks, namely an input-output network and a state variable network, respectively, and the two independent networks are connected through an independent source and a controlled source. The independent source and the controlled source share the coupling relation of the state variables between the input vector and the output vector.
The following is a single-pole example, a specific integration method.
The single-pole state space network is represented as follows:
Figure BDA0003376300620000071
Figure BDA0003376300620000072
1) state variable network synthesis
In the state space model, the state variables x (t) tightly tie the input and output signals, typically using energy storage elements. The value of the state variable can be represented as the voltage value at two ends of the capacitor or the current in the inductor at a certain time. In the transfer function in the impedance matrix form, since the input vector is the current at the port and the output vector is the voltage at the port, x (t) is integrated into the current value i flowing in the inductor at time tL，
Figure BDA0003376300620000073
The voltage value of the two ends of the unit inductor is integrated. Is recorded as:
Figure BDA0003376300620000074
where i is 1, …, N is the number of state variables in the state space. For each state variable x in the equationiAnd (t) integrating the parameters into an independent state network representation according to the parameter matrix.
Taking equation (1.19) as an example, the state equation can be split into the following four sub-equations:
Figure BDA0003376300620000075
synthesizing into a corresponding state variable x based on kirchhoff's voltage law according to each sub-equationi(t) a sub-network.
The matrix a represents the transitions of the various state variables of the system at time T: diagonal element reflecting variable xiState transition of itself, represented by resistance; off-diagonal element reflecting variable xjFor variable xiIs represented by a controlled source. The matrix B represents the transitions of the input variables to the state variables, all represented by the controlled sources.
In the simulation tool HSPICE, H is used to denote the current controlled voltage source. Component H _ s1 represents the input i1To variable quantity
Figure BDA0003376300620000076
Component H _ d1 represents the state variable x3To variable quantity
Figure BDA0003376300620000077
The contribution of (1); the component Vst _1 is a zero-value voltage source and is used for sampling the current value flowing through the unit inductor L _1 in real time, namely the state variable x1。
2) Input output network synthesis
According to the input-output equation in equation (1.15), the output variable v (t) is composed of two parts, one part is directly influenced by the input variable i (t) through the matrix D, and the other part is contributed by the state variable x (t) through the matrix C.
Also taking equation (1.19) as an example, the input-output equation can be split into the following two sub-equations:
Figure BDA0003376300620000081
similarly, the current value x sampled by the zero voltage source Vst _ i in each state networkiMultiplying the coefficients in the matrix C to form the output of the state variable contribution; and multiplying the input current sampled by the Vio _1 in the self network by the coefficient in the matrix D to form an output directly contributed by the input current. Because all the input and output networks are source devices, in order to avoid simulation error reporting, a minimum value resistor R _1 is embedded in the input and output networks.
The device values in the netlists may be negative, but so long as the passivity of the impedance matrix is guaranteed, the device values in the netlists may be allowed to be negative.
The following analysis and validation are carried out with specific numerical examples:
example one: the transmission line system is composed of a single conductor transmission line, and the input signal and the external device are composed as shown in fig. 2. The value of the input end resistor R1 is 30 ohms, and the capacitance value of the terminal capacitor C2 is 1.5 pF. The input signal is a step signal, and the rising time is 200 ps.
The input unit length parameter is expressed by scientific notation as:
R＝8.5646
L＝4.7876e-009
C＝2.24e-12
G＝0 (1.23)
and carrying out specific numerical calculation according to the implementation steps according to the input parameters.
And (c) calculating the first 20 th-order pole in the step (a), and stopping calculation when the error convergence condition is met. The first 20 pole calculations are shown in fig. 3.
Step (b), construct the high frequency response pole in equation (1.13), the result is shown in fig. 4. And calculates the delay Tk＝2.07136e-09。
And (c) converting the transfer function matrix in the impedance matrix form into a state space model, synthesizing into a netlist, and performing time domain simulation verification in SPICE simulation software. The number of individual devices in the netlist, and the simulation time memory consumption are shown in fig. 5. The waveform diagram of the terminal output voltage signal driven by the input signal is shown in fig. 6.

Claims (6)

1. A transmission line time domain equivalent macro model generation method based on delay extraction is characterized by comprising the following steps:
(a) establishing a frequency domain mathematical model of a transmission line impedance form based on a given unit length parameter resistor R, an inductance L, a capacitance C and a conductance G; calculating m-order poles and residuals of the low-frequency band, and determining the low-frequency band frequency response of the impedance transfer function matrix by a denominator polynomial formed by the poles and the corresponding residuals;
(b) constructing an approximate expression of high-frequency-band impedance response based on pole residue obtained by calculation in the step (a), discretizing the signal, converting the signal into a frequency-domain pure delay item, and finishing delay explicit extraction;
(c) and (c) optimizing to obtain a frequency domain state space model of the transmission line based on the calculation results in the step (a) and the step (b), and generating a corresponding time domain equivalent circuit netlist.
2. The method for generating the transmission line time domain equivalent macro model based on the delay extraction as claimed in claim 1, wherein the frequency domain mathematical model in the form of the transmission line network impedance is expressed as follows:
Figure FDA0003376300610000011
wherein: x represents the position coordinates of the transmission line; v (x, s), I (s, s) represent the voltage vector and the current vector, respectively, at the transmission line x location. R(s), L(s), G(s), C(s) respectively represent transmission line resistance, inductance, conductance and capacitance parameters in a frequency domain;
two equations in the formula are combined to obtain a transfer function matrix in the form of impedance; for a system of N transmission lines, the impedance transfer function matrix is represented as follows:
Figure FDA0003376300610000012
wherein, V0(s)，I0(s) are respectively expressed as a voltage vector and a current vector of an input port at the coordinate 0, and the dimensions are both N; vl(s)，Il(s) respectively representing a voltage vector and a current vector of an output port at a coordinate l, wherein the dimensions are N; the dimension of the impedance matrix Z(s) is 2N x 2N, and each sub-matrix block ZmnThe dimension is N × N.
3. The method for generating the transmission line time domain equivalent macro model based on the delay extraction as claimed in claim 1, wherein the method for calculating the low-frequency band frequency response of the impedance transfer function matrix is as follows:
solving poles and residuals
Splitting the impedance matrix Z(s) into infinite series expressions to obtain a specific pole P of the mth orderk,mCalculating the formula:
det[ZS]＝0
Figure FDA0003376300610000021
wherein det represents the value of the determinant, and YP，ZSIs represented as follows:
Figure FDA0003376300610000022
corresponding residue Rk,mThe calculation formula is as follows:
Figure FDA0003376300610000023
Figure FDA0003376300610000024
determining the numerical value of the actual needed calculation module m according to the error convergence judgment condition and a given error threshold value delta;
the specific pole iterative calculation steps are as follows:
(i) inputting data: δ, R(s), L(s), G(s), C(s)
(ii) Let m equal to 1, calculate the pole according to equation (1.3), and record as Pk,1(ii) a And calculating the residue corresponding to the pole according to the formula (1.5) and recording as Rk,1；
Let the modulus m be 2 according to the formula(1.3) calculating the pole, noted as Pk,2(ii) a And calculating the residue corresponding to the pole according to the formula (1.5) and recording as Rk,2；
(iii) Let m be m +1, calculate the pole, and note as Pk,m(ii) a Calculating the residue, denoted as Rk,m；
(iv) Calculating an error determination condition:
Figure FDA0003376300610000025
if the judgment condition is met, jumping out of the loop; otherwise, jumping to step (iii);
(v) outputting data: first m pole Pk,mAnd the residue Rk,m；
Then is front
Figure FDA0003376300610000028
A low-band transfer function expression formed by an order polynomial:
Figure FDA0003376300610000026
Figure FDA0003376300610000027
4. the method for generating the transmission line time domain equivalent macro model based on the delay extraction as claimed in claim 1, wherein the specific process of the step (b) is as follows:
by means of the periodicity of the high-band response signal, fitting results,
Figure FDA0003376300610000031
Figure FDA0003376300610000032
the mth order parameter in the above formula satisfies the following formula:
Figure FDA0003376300610000033
Figure FDA0003376300610000034
performing delay explicit extraction on the high-frequency band signal, discretizing the high-frequency band signal to obtain a discrete frequency spectrum, and performing Laplace transformation on the frequency spectrum to obtain a low-order polynomial with a pure delay term;
the specific steps of delayed extraction are as follows:
s1. time domain signal sd(t) discretization
sn(t)＝sd(t-nTk) (1.10)
Wherein the content of the first and second substances,
Figure FDA0003376300610000035
s2, carrying out Fourier transform on the discrete signal to obtain a discrete Fourier spectrum
Figure FDA0003376300610000036
S3, calculating frequency response in s domain based on discrete Fourier spectrum
Figure FDA0003376300610000037
After the time delay extraction, the approximate calculation formula of the high-frequency signal is as follows:
Figure FDA0003376300610000038
Figure FDA0003376300610000039
5. the method for generating the transmission line time domain equivalent macro model based on the delay extraction as claimed in claim 1, wherein the specific process of the step (c) is as follows:
the low-frequency-band response and the high-frequency-band response obtained in the step (a) and the step (b) are combined to form a response signal in a required frequency band:
Z11＝Z22＝Zl11+Zh11
Figure FDA00033763006100000310
expanding the state space model into a state space model in a frequency domain based on the expression, and generating a corresponding time domain equivalent circuit netlist according to the state space model; neutron matrix block Z of equation (1.11)11，Z12，Z21，Z22Each of the sub-matrices is composed of a polynomial, and the sub-matrices are converted into equivalent state space models, which are expressed as follows:
Figure FDA0003376300610000041
wherein, the vector i (t) is a current signal at the transmission line port, x (t) is an internal state variable, and v (t) is a voltage signal at the transmission line port;
the transfer function matrix Z(s) expressed by the formula (1.11) does not contain repeated poles, and a state space minimum implementation algorithm is used for the repeated poles, so that a state space model containing dimension minimum state variables can be obtained; and generating the equivalent circuit netlist with the least number of nodes based on the minimized state space model. The concrete implementation steps are as follows:
(i) express the transfer function as
Figure FDA0003376300610000042
Wherein p is1,…pqIs the pole of the transfer function, RiIs a pole piCorresponding number remaining matrix, the matrix dimension is consistent with the transfer function matrix;
(ii) according to the corresponding residue matrix R of each poleiAnd rank r of the residue matrixiRespectively constructing poles piDiagonal normal form substate space (A)i,Bi,Ci,Di) (ii) a Matrix array
Figure FDA0003376300610000043
Is a diagonal matrix formed by poles piRepeat r at opposite cornersiSub-formation, matrix AiIs represented as follows:
Figure FDA0003376300610000044
matrix Bi，CiTogether forming a residue matrix Ri(ii) a Matrix BiRepresenting input-output port mapping matrices, matrix CiRepresenting a pole corresponding residue matrix and satisfying the following formula:
Ri＝CiBi (1.17)
(iii) sub-state space (A) corresponding to each polei,Bi,Ci,Di) Merging to obtain the minimum realization of the diagonal standard state space of the system transfer function matrix G(s); expressed as:
Figure FDA0003376300610000045
v(t)＝[C1…Ci]x(t) (1.18)
6. the method for generating the transmission line time domain equivalent macro model based on the delay extraction as claimed in claim 5, wherein the method for generating the state space model adopts a state space minimum implementation method, and an optimized diagonal standard state space model can be generated by using the algorithm: the elements in the matrix a only appear on the diagonal and are a sparse diagonal matrix.
CN202111419382.8A 2021-11-26 2021-11-26 Transmission line time domain equivalent macro model generation method based on delay extraction Pending CN114169113A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111419382.8A CN114169113A (en) 2021-11-26 2021-11-26 Transmission line time domain equivalent macro model generation method based on delay extraction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111419382.8A CN114169113A (en) 2021-11-26 2021-11-26 Transmission line time domain equivalent macro model generation method based on delay extraction

Publications (1)

Publication Number Publication Date
CN114169113A true CN114169113A (en) 2022-03-11

Family

ID=80480952

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111419382.8A Pending CN114169113A (en) 2021-11-26 2021-11-26 Transmission line time domain equivalent macro model generation method based on delay extraction

Country Status (1)

Country Link
CN (1) CN114169113A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115795233A (en) * 2022-11-17 2023-03-14 北京华大九天科技股份有限公司 Method and device for extracting time delay item of frequency domain data and storage medium
CN116305766A (en) * 2022-12-30 2023-06-23 北京华大九天科技股份有限公司 Modeling method for transmission line simulation and circuit simulation system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115795233A (en) * 2022-11-17 2023-03-14 北京华大九天科技股份有限公司 Method and device for extracting time delay item of frequency domain data and storage medium
CN115795233B (en) * 2022-11-17 2024-06-21 北京华大九天科技股份有限公司 Method, device and storage medium for extracting time delay term of frequency domain data
CN116305766A (en) * 2022-12-30 2023-06-23 北京华大九天科技股份有限公司 Modeling method for transmission line simulation and circuit simulation system

Similar Documents

Publication Publication Date Title
Kim et al. Time-domain macromodels for VLSI interconnect analysis
Raghavan et al. AWE-inspired
Wang et al. On projection-based algorithms for model-order reduction of interconnects
US6789237B1 (en) Efficient model order reduction via multi-point moment matching
CN114169113A (en) Transmission line time domain equivalent macro model generation method based on delay extraction
Li et al. Parameterized interconnect order reduction with explicit-and-implicit multi-parameter moment matching for inter/intra-die variations
Kahng et al. Efficient gate delay modeling for large interconnect loads
CN102467593A (en) Nonlinear circuit time domain model reduction method and device
CN114004191A (en) Method, system, device and medium for extracting delay circuit macro model
Daniel et al. Geometrically parameterized interconnect performance models for interconnect synthesis
Olivadese et al. Compressed passive macromodeling
Feldmann et al. Interconnect-delay computation and signal-integrity verification using the SyMPVL algorithm
Brachtendorf et al. A simulation tool for the analysis and verification of the steady state of circuit designs
Ismail Improved model-order reduction by using spacial information in moments
Ismail Efficient model order reduction via multi-node moment matching
Jain et al. Fast simulation of VLSI interconnects
Ye et al. Domain-alternated optimization for passive macromodeling
Zhao et al. An adaptive word-length selection method to optimize hardware resources for FPGA-based real-time simulation of power converters
Ye et al. Fast variational interconnect delay and slew computation using quadratic models
Roychowdhury Algorithmic macromodelling methods for mixed-signal systems
Mei et al. Stable parallelizable model order reduction for circuits with frequency-dependent elements
Coelho et al. Generating high-accuracy simulation models using problem-tailored orthogonal polynomials basis
de Oliveira Numerical Simulation of Electronic Systems Based on Circuit-Block Partitioning Strategies
CN117787092A (en) Parameter acquisition method and device for interdigital capacitor
Samuel et al. A Hybrid Adaptive Sampling Algorithm for Multipoint MOR

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination