CN114157615A - AFDX (avionics full Duplex switched Ethernet) end system and method for improving virtual link scheduling efficiency - Google Patents
AFDX (avionics full Duplex switched Ethernet) end system and method for improving virtual link scheduling efficiency Download PDFInfo
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- CN114157615A CN114157615A CN202010833820.4A CN202010833820A CN114157615A CN 114157615 A CN114157615 A CN 114157615A CN 202010833820 A CN202010833820 A CN 202010833820A CN 114157615 A CN114157615 A CN 114157615A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/70—Virtual switches
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- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
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Abstract
The invention discloses an AFDX (avionics full Duplex switched Ethernet) end system and a method for improving the scheduling efficiency of a virtual link, which comprise a virtual link memory, a memory read interface, a virtual link scheduler, a sending state machine and a physical PHY (physical layer), wherein the virtual link memory, the memory read interface, the sending state machine and the physical PHY are sequentially connected, and the virtual link scheduler is respectively connected with the virtual link memory and the sending state machine. The invention has the beneficial effects that: the scheduling cycle of the sending state machine is flexibly adjusted according to the frame length of the effective data, the scheduling efficiency of the virtual link scheduler is greatly improved, and the AFDX end system can accommodate more virtual links.
Description
Technical Field
The invention relates to the field of avionic full-duplex switched Ethernet, in particular to an AFDX (avionics full-duplex switched Ethernet) end system and a method for improving the scheduling efficiency of a virtual link.
Background
Avionics full duplex switched Ethernet (AFDX) is an electrical and protocol standard established for data exchange between avionics systems. With the increasing demands on bus carrying capacity and certainty of on-board communication, AFDX is increasingly widely used in its high-rate, high-load, strong-certainty on-board communication.
At present, the scheduling mode adopted by the existing AFDX end system generally performs query scheduling on each virtual link periodically. And if the scheduler adopts a periodic scheduling mode, the period of the scheduler needs to adopt the time for sending the maximum frame length in the virtual links as the period for scheduling, and for most of the virtual links with shorter frame lengths, the scheduling efficiency of the scheduler is greatly reduced, the accommodating capacity of the number of VL virtual links is reduced, and the overall performance of the AFDX end system is also reduced.
Disclosure of Invention
The invention provides a novel AFDX (avionics full Duplex switched Ethernet) end system and a novel AFDX end system method for improving the scheduling efficiency of a virtual link, aiming at solving the problem that the AFDX end system in the prior art is low in scheduling efficiency.
In order to achieve the purpose, the technical scheme of the invention is as follows: the AFDX end system for improving the scheduling efficiency of the virtual link comprises a virtual link memory, a memory read interface, a virtual link scheduler, a sending state machine and a physical PHY (physical layer), wherein the virtual link memory, the memory read interface, the sending state machine and the physical PHY are sequentially connected, and the virtual link scheduler is respectively connected with the virtual link memory and the sending state machine.
The present invention also provides a method of an AFDX end-system for improving the efficiency of virtual link scheduling, comprising the following steps and executed in sequence,
step S1 of providing an AFDX end system according to claim 1;
step S2, initializing the virtual link scheduler and the sending state machine: setting a scheduling success signal of the virtual link scheduler and a busy state signal of the sending state machine as invalid;
step S3, the virtual link scheduler obtains the busy state signal from the sending state machine and determines whether the busy state signal is invalid, and if the busy state signal is invalid, further determines whether valid data exists in the virtual link memory: if the effective data exists in the virtual link memory, executing a scheduling process and setting the scheduling success signal as effective after the scheduling process is executed;
step S4, the sending state machine acquires the scheduling success signal from the virtual link scheduler and determines whether the scheduling success signal is valid: if the scheduling success signal is valid, executing a sending process, setting the busy state signal as valid in the execution process of the sending process, and setting the busy state signal and the scheduling success signal as invalid after the sending process is executed; and the number of the first and second groups,
and step S5, repeating the step S3 and the step S4 until the AFDX end system stops working.
As a preferred solution of the method of the AFDX end system for improving the scheduling efficiency of the virtual link, in step S3, the scheduling process is to send the valid data from the virtual link memory to the memory read interface.
As a preferred method of the AFDX end system for improving the efficiency of virtual link scheduling, if the busy signal is active in step S3, the method goes to step S4.
As a preferred scheme of the method of the AFDX end system for improving the virtual link scheduling efficiency, in step S3, if the scheduling success signal is valid, the method goes to step S4.
As a preferable scheme of the method of the AFDX end-system for improving the virtual link scheduling efficiency, in step S4, the sending process is to send the valid data from the memory read interface to the physical PHY through the sending state machine.
As a preferred scheme of the method for an AFDX end system for improving virtual link scheduling efficiency, in step S4, the sending state machine reads the frame length of the valid data from the memory read interface, and then reads the valid data according to the frame length of the valid data.
As a preferred scheme of the method of the AFDX end system for improving the efficiency of virtual link scheduling, in step S4, if the scheduling success signal is invalid, the method goes to step S5.
Compared with the prior art, the invention has the beneficial effects that: the scheduling cycle of the sending state machine is flexibly adjusted according to the frame length of the effective data, the scheduling efficiency of the virtual link scheduler is greatly improved, and the AFDX end system can accommodate more virtual links.
In addition to the technical problems solved by the present invention, the technical features constituting the technical solutions, and the advantageous effects brought by the technical features of the technical solutions described above, other technical problems solved by the present invention, other technical features included in the technical solutions, and advantageous effects brought by the technical features will be described in further detail with reference to the accompanying drawings.
Drawings
FIG. 1 is a schematic structural diagram of the present invention.
FIG. 2 is a flow chart of the method of the present invention.
Detailed Description
The invention will be described in further detail below with reference to specific embodiments and drawings. Here, the description of the embodiments is provided to help understanding of the present invention, but the present invention is not limited thereto. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Referring to fig. 1, an AFDX end system for improving the efficiency of virtual link scheduling is shown. The AFDX end system comprises a virtual link memory 1, a memory read interface 2, a sending state machine 3, a physical PHY4, a virtual link scheduler 5 and the like. Wherein the virtual link memory 1, the memory read interface 2, the transmission state machine 3, and the physical PHY4 are connected in sequence. The virtual link scheduler 5 is connected to the virtual link memory 1 and the sending state machine 3, respectively, that is, the sending state machine 3 and the virtual scheduler 4 are connected by two signal lines to communicate with each other.
The data of each virtual link is stored in the virtual link memory 1 before being scheduled and transmitted by the virtual link scheduler 5, and then waits for the scheduler to schedule.
The virtual link memory 1: for storing virtual link data waiting to be scheduled.
The memory read interface 2: when the data of a virtual link is successfully scheduled, the module is responsible for reading the data in the memory 1 of the virtual link. And reads out the data length in the ip header to identify the end point of data transmission.
The virtual link scheduler 5: when detecting that the sendmachine _ busy signal is 0 (i.e. the sending state machine is in an idle state), a scheduling process is started, and if valid data exists in the memory and the requirement of traffic shaping is met, the virtual link scheduler 5 will schedule successfully, and set the schedule _ success signal to 1 (i.e. scheduling successfully).
The transmission state machine 3: when detecting that the Schedule _ success signal is valid, that is, 1, starting a sending process, and sending data to a data bus through the physical PHY 4.
The physical PHY 4: is the physical interface for data transmission. 4bits are sent every clock cycle, the bus rate is 100M/s.
A method of an AFDX-end system for improving the efficiency of virtual link scheduling, comprising the following steps and executed in sequence,
step S1, providing an AFDX end system;
step S2, initializing the virtual link scheduler and the sending state machine: setting a scheduling success signal of the virtual link scheduler and a busy state signal of the sending state machine as invalid;
step S3, the virtual link scheduler obtains the busy state signal from the sending state machine and determines whether the busy state signal is invalid, and if the busy state signal is invalid, further determines whether valid data exists in the virtual link memory: if the effective data exists in the virtual link memory, executing a scheduling process and setting the scheduling success signal as effective after the scheduling process is executed;
step S4, the sending state machine acquires the scheduling success signal from the virtual link scheduler and determines whether the scheduling success signal is valid: if the scheduling success signal is valid, executing a sending process, setting the busy state signal as valid in the execution process of the sending process, and setting the busy state signal and the scheduling success signal as invalid after the sending process is executed; and the number of the first and second groups,
and step S5, repeating the step S3 and the step S4 until the AFDX end system stops working.
The foregoing merely represents embodiments of the present invention, which are described in some detail and detail, and therefore should not be construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (8)
1. The AFDX end system for improving the scheduling efficiency of the virtual link is characterized by comprising a virtual link memory, a memory read interface, a virtual link scheduler, a sending state machine and a physical PHY (physical layer), wherein the virtual link memory, the memory read interface, the sending state machine and the physical PHY are sequentially connected, and the virtual link scheduler is respectively connected with the virtual link memory and the sending state machine.
2. A method of an AFDX-end system for improving the efficiency of virtual link scheduling, characterized in that it comprises the following steps and is executed in sequence,
step S1 of providing an AFDX end system according to claim 1;
step S2, initializing the virtual link scheduler and the sending state machine: setting a scheduling success signal of the virtual link scheduler and a busy state signal of the sending state machine as invalid;
step S3, the virtual link scheduler obtains the busy state signal from the sending state machine and determines whether the busy state signal is invalid, and if the busy state signal is invalid, further determines whether valid data exists in the virtual link memory: if the effective data exists in the virtual link memory, executing a scheduling process and setting the scheduling success signal as effective after the scheduling process is executed;
step S4, the sending state machine acquires the scheduling success signal from the virtual link scheduler and determines whether the scheduling success signal is valid: if the scheduling success signal is valid, executing a sending process, setting the busy state signal as valid in the execution process of the sending process, and setting the busy state signal and the scheduling success signal as invalid after the sending process is executed; and the number of the first and second groups,
and step S5, repeating the step S3 and the step S4 until the AFDX end system stops working.
3. The AFDX-end system method according to claim 2, wherein in step S3, the scheduling process sends the valid data from the virtual link memory to the memory read interface.
4. The method of an AFDX end system according to claim 2, wherein the busy state signal is asserted at step S3, then jumping to step S4.
5. The AFDX-end system according to claim 2, wherein in step S3, if the scheduling success signal is asserted, jumping to step S4.
6. The AFDX-end system method according to claim 2, wherein the sending process sends the valid data from the memory read interface to the physical PHY via the sending state machine in step S4.
7. The AFDX end system according to claim 6, wherein in step S4, the sending state machine reads the frame length of the valid data from the memory read interface, and then reads the valid data according to the frame length of the valid data.
8. The AFDX end system according to claim 2, wherein in step S4, if the scheduling success signal is invalid, jumping to step S5.
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