CN114157396A - RS encoder and RS encoding and decoding method - Google Patents
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- CN114157396A CN114157396A CN202111469533.0A CN202111469533A CN114157396A CN 114157396 A CN114157396 A CN 114157396A CN 202111469533 A CN202111469533 A CN 202111469533A CN 114157396 A CN114157396 A CN 114157396A
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Abstract
The invention belongs to the technical field of data coding, and particularly relates to an RS coder and an RS coding and decoding method, wherein the coding method comprises the following steps: the method comprises the following steps: calculating generator polynomial coefficients g 0-g 7; step two: constructing an encoder according to the polynomial coefficient; step three: setting all eight registers to be zero; step four: the two multiplexers are switched to be gated by the first input end; inputting data to be encoded; step five: and after twenty-seven symbols are output, the two multiplexers are switched to be gated by the second input end, eight check symbols are output, and a group of RS (35,27) data coding is completed.
Description
Technical Field
The invention belongs to the technical field of data coding, and particularly relates to an RS coder and an RS coding and decoding method.
Background
With the rapid development of the wireless communication field, people are always researching a data transmission method with low delay, high bandwidth and high reliability, and the reliability of data transmission is the key point of the whole wireless communication transmission. Therefore, in the field of wireless transmission, forward error correction technology is usually adopted to improve the reliability of transmission, and the purpose of correcting errors is achieved by sacrificing certain transmission efficiency.
RS codes are a class of linear block codes with strong forward error correction capability, which can correct random errors, burst errors, and a combination of both. The linear block code is simple in algebraic theory, and the coding and decoding are easy to realize by hardware circuits, so that the linear block code is widely applied to various communication systems. The RS code has the highest error correction capability and coding efficiency among all linear block codes, and has the highest error correction capability with the same coding efficiency as other linear block codes. Particularly, the performance of the antenna is close to a theoretical value in a short medium code length, and the antenna is widely applied to the field of wireless communication.
For RS coding, a coding method of adding a check code after an information code is usually adopted to complete the implementation of the whole coding. A series of input serial data corresponds to a serial information polynomial, a check code corresponds to a check polynomial, and the check polynomial is formed by dividing the remainder of the information polynomial by a generator polynomial. Therefore, for RS encoding, the process of finding the generator polynomial g (x) and calculating the check polynomial p (x) is obtained.
And the RS decoding process is the process of restoring the original sequence, the receiving end receives the information sequence, finds out the dislocation position polynomial through calculation, obtains the root of the dislocation position polynomial, acquires the dislocation position and the dislocation pattern, and finally corrects the dislocation position to finish the RS decoding process.
The RS coding and decoding process involves more mathematical theory knowledge, and the existing design has less available scenes due to low coding and decoding efficiency, poor error correction capability and long system processing delay.
Disclosure of Invention
The purpose of the invention is as follows:
aiming at the problems of low error correction capability, low realization efficiency and large transmission delay of RS coding and decoding in the background technology, the invention provides an RS coding and decoding method applied to a wireless communication system, which can quickly realize the coding of RS and the decoding of RS and can carry out the encoding of Galois field GF (2)8) The RS (35,27) code of (2) can correct errors of 4 symbols at maximum.
The technical scheme adopted by the invention for solving the technical problems is as follows:
an RS encoder for RS (35,27) encoding; each set of RS (35,27) data has a total length of 35 symbols, including 27 valid symbols and 8 check symbols, each symbol being represented by an 8-bit binary value;
the encoder includes: eight multipliers M1-M8, eight adders C1-C8, eight registers R0-R7, two multiplexers MUX1, and MUX 2;
the first input end of the multiplexer MUX1 is connected with the output end of the adder C8, and the second input end of the multiplexer MUX is constantly 0; the output end of the MUX1 is respectively connected with one input end of the eight multipliers M1-M8; k1 controls multiplexer MUX1 to gate;
the other input ends of the eight multipliers M1-M8 are polynomial coefficients g 0-g 7 respectively;
the output end of the multiplier M1 is connected with the input end of the register R0, the output ends of the multipliers M2 to M8 are respectively connected with one input end of adders C1 to C7, and the output ends of the registers R0 to R6 are respectively connected with the other input end of the adders C1 to C7; the output ends of the adders C1 to C7 are respectively connected with the input ends of the registers R1 to R7; the output end of the register R7 is connected with one input end of an adder C8, and the other input end of the adder C8 is connected with data to be encoded;
the first input end of the multiplexer MUX2 is connected with data to be encoded, the second input end of the multiplexer MUX2 is connected with the output end of the register R7, the output end of the MUX2 outputs encoded data, and the k2 controls the gating of the multiplexer MUX 2.
An RS encoding method for said RS encoder, said method being for RS (35,27) encoding; each set of RS (35,27) data has a total length of 35 symbols, including 27 valid symbols and 8 check symbols, each symbol being represented by an 8-bit binary value;
the method comprises the following steps:
the method comprises the following steps: calculating generator polynomial coefficients g 0-g 7;
step two: constructing an encoder according to the polynomial coefficient;
step three: setting all eight registers to be zero;
step four: the two multiplexers are switched to be gated by the first input end; inputting data to be encoded;
step five: and after twenty-seven symbols are output, the two multiplexers are switched to be gated by the second input end, eight check symbols are output, and a group of RS (35,27) data coding is completed.
Further, in the first step, a polynomial g (x) is generated as follows:
g(x)＝(x-α)(x-α2)...(x-α7)(x-α8)
＝x8+α176x7+α240x6+α211x5+α253x4+α220x3+α3x2+α203x+α36；
the generator polynomial coefficients are respectively as follows:
g0＝α36＝8'h25 g1＝α203＝8'he0 g2＝α3＝8'h08 g3＝α220＝8'hac
g4＝α253＝8'h47 g5＝α211＝8'hb2 g6＝α240＝8'h2c g7＝α176＝8'he3；
α is represented as 00000001 in binary.
An RS decoding method for RS (35,27) decoding; each set of RS (35,27) data has a total length of 35 symbols, including 27 valid symbols and 8 check symbols, each symbol being represented by an 8-bit binary value; the method comprises the following steps:
the method comprises the following steps: calculating an adjoint polynomial from each set of encoded RS (35,27) data and Galois field element α; and calculating coefficients of the error location polynomial from the adjoint polynomial;
step two: calculating the root of the error location polynomial according to the coefficients of the error location polynomial and the galois field elements;
step three: generating an error location matrix according to the root of the error location polynomial;
step four: calculating an error location from the error location matrix and the adjoint polynomial;
step five: and correcting errors according to the error positions and the roots of the error position polynomials and outputting decoded data.
Further, in the first step, a syndrome is calculated by a syndrome generator; the adjoint polynomial generator includes: eight companion adders, eight companion multipliers, and eight companion registers;
one input end of each of the eight adjoint adders is connected with data to be decoded, and the other input end of each of the eight adjoint adders is connected with the output ends of the eight adjoint multipliers; eight adjoint adder output ends are respectively connectedEight adjoint register input ends are connected, eight adjoint register output ends are respectively connected with one input end of eight adjoint multipliers, and the other input ends of the eight adjoint multipliers are respectively fixed at alpha, alpha2……α8(ii) a Setting the initial values of the eight adjoint registers to zero;
the adjoint polynomial coefficient calculation process is as follows: inputting each group of RS (35,27) data into the syndrome generator from high to low in sequence, and after all symbols in each group of RS (35,27) data are input again, the values in the eight syndrome registers are coefficients s of the syndrome polynomial1～s8。
Further, in the first step, the error location polynomial is calculated as follows:
sequentially changing j to 1.2, … …, 8; substituting the following formula to obtain eight error location polynomial coefficients sigma1～σ8The formula (1); solving error position polynomial coefficients according to the eight equations;
sj+t+σ1sj+t-1+...+σtsj＝0
wherein t is 8; sy＝0，y＝9.10.……16。
Further, in the second step, the root of the error location polynomial is calculated by the error location polynomial generator;
the error location polynomial generator comprises: eight error multipliers, eight error registers, and one error adder; setting the initial values of the eight error registers to be zero;
the first input ends of the eight error multipliers are respectively sigma1～σ8The second input ends are respectively alpha and alpha2……α8(ii) a The output ends of the eight error multipliers are respectively connected with the input ends of the eight error registers, and the output ends of the eight error registers are connected with the third input ends of the eight error multipliers;
the output ends of the eight error registers are also connected with the input end of the error adder;
the root calculation process of the error location polynomial is as follows, and the following calculation process is repeatedly performed: after each multiplication by eight error multipliers, the error adder performs an addition for a total of eight,
if the nth error adder calculates the sum to zero, then xn＝αnIs the root of the error location polynomial.
Further, in the third step, the error location matrix is as follows:
further, in the fourth step, the error position Y is calculated according to the following formulai：
Has the advantages that:
the invention provides a high-efficiency coding and decoding method aiming at RS (35,27) codes applied to wireless communication transmission, which can quickly realize that errors of 4 transmission symbols are corrected for each 35 transmission symbols by adding check codes on the basis of information code streams and adopting a parallel transmission scheme, can obtain higher error correction efficiency under the premise of sacrificing certain coding efficiency, and has wide application prospect.
Drawings
FIG. 1 is a schematic diagram of the overall scheme for RS (35,27) encoding and decoding;
FIG. 2 is a schematic diagram of an RS encoder;
FIG. 3 is a schematic diagram of an RS decoder;
FIG. 4 is a schematic diagram of a syndrome generator;
FIG. 5 is a schematic diagram of an error location polynomial generator;
FIG. 6 is a schematic view of calibration.
Detailed Description
The invention provides an RS encoding and decoding method applied to a wireless communication system, which can rapidly realize the encoding of RS and the decoding of RS and is used for Galois field GF (2)8) RS (35,27) code capable of correcting a maximum of 4 symbolsIs detected.
The RS encoding and decoding method applied to the wireless communication system in the embodiment of the present invention is shown in fig. 1. The method comprises an encoding method and a decoding method, wherein the encoding method is used for encoding the transmitted code stream, and the RS (35,27) encoding is completed by adding a check code behind the information code. In a wireless communication system, noise is superimposed on signal transmission, data can be wrong, and the RS (35,27) decoding process is to find the wrong in the transmission process, including the position where the wrong occurs and the value of the wrong, and then correct the value of the wrong position to realize the function of decoding and correcting errors. RS (35,27) indicates that each group of data includes 27 valid symbols, 8 check symbols, and 35 symbols in total length.
For RS (35,27) encoding, a specific encoder implementation circuit structure is built, and encoding of a code stream with 27 input data symbols and 8 bit wide of each data symbol can be rapidly achieved. In a specific implementation, first, through GF (2)8) The primitive polynomial p (x) constructs a generator polynomial g (x), and the coefficients of the generator polynomial g (x) are obtained through the calculation of finite field elements, including the addition and multiplication operations of a finite field; secondly, constructing a coding structure circuit through the coefficients of g (x); then, the output of the coding circuit is controlled through a state switch; and finally, the coding circuit outputs an information sequence firstly and then outputs a check sequence to finish the whole coding process.
For RS (35,27) decoding, the working contents of the present invention mainly include the following aspects: firstly, according to the received 35 symbol lengths, the obtained receiving polynomial r (x) is calculated, and the adjoint polynomial s is calculatedj(x) (ii) a Then, an error position polynomial delta (x) is obtained according to the syndrome polynomial; then, the root of the error position polynomial is obtained by a search algorithm, the number of error positions is obtained, and the error positions are determined; calculating an error value of the dislocation position on the premise of finding the error position, and obtaining an error pattern; and finally, correcting the error pattern at the error position to finish the decoding of the data stream.
In one aspect, the work of RS (35,27) encoding is focused on computing the check code, 8 check symbols per 27 information symbols, computingThe detailed process of (2) is shown in fig. 2. The galois field GF (2) is introduced for the specific coefficients g0, g1, g2, g3, g4, g5, g6, g7 in the figure8) The related concepts in (1). First computing the Galois field GF (2)8) Of a primitive polynomial of, GF (2)8) The element composition in the finite field constructs a generator polynomial through a primitive polynomial, and the coefficients of the generator polynomial are the values of g0, g1, g2, g3, g4, g5, g6 and g7 in the figure. GF (2)8) The primitive polynomial of the finite field is p (x) ═ x8+x4+x3+x2+1, the generator polynomial and its coefficients are as follows.
g(x)＝(x-α)(x-α2)...(x-α7)(x-α8)
＝x8+α176x7+α240x6+α211x5+α253x4+α220x3+α3x2+α203x+α36
g0＝α36＝8'h25 g1＝α203＝8'he0 g2＝α3＝8'h08 g3＝α220＝8'hac
g4＝α253＝8'h47 g5＝α211＝8'hb2 g6＝α240＝8'h2c g7＝α176＝8'he3。
The specific encoding circuit is shown in fig. 2, and comprises eight multipliers M1-M8, eight adders C1-C8, eight registers R0-R7, two multiplexers MUX1 and MUX 2. The first input end of the multiplexer MUX1 is connected with the output end of the adder C8, and the second input end of the multiplexer MUX is constantly 0; the output end of the MUX1 is respectively connected with one input end of the eight multipliers M1-M8; the other input ends of the eight multipliers M1-M8 are polynomial coefficients g 0-g 7 respectively; the output end of the multiplier M1 is connected with the input end of the register R0, the output ends of the multipliers M2 to M8 are respectively connected with one input end of adders C1 to C7, and the output ends of the registers R0 to R6 are respectively connected with the other input end of the adders C1 to C7; the output ends of the adders C1 to C7 are respectively connected with the input ends of the registers R1 to R7; the output end of the register R7 is connected with one input end of an adder C8, and the other input end of the adder C8 is connected with data to be encoded; the first input end of the multiplexer MUX2 is connected with data to be encoded, the second input end is connected with the output end of the register R7, and the output end of the MUX2 outputs encoded data.
The serial data stream to be coded passes through the coding device, the output of the serial data stream is switched through multiplexer switches K1 and K2, and 27 data symbols and 8 check symbols are sequentially output to complete RS coding.
The encoding process is as follows: 1. in the initial state, all of R0, R1, R2, R3, R4, R5, R6, and R7 are set to zero, and the multiplexers K1 and K2 select the lower input to be valid. 2. In the first stage, the coefficients of the information polynomial m (x) are sequentially input from high to low according to the clock beat. At this stage, the output end directly outputs the information code elements, and the information code elements sequentially enter the coding module, and a remainder is obtained after the 26 th clock beat, and the remainder is also the check code element, and at this time, the check code element is stored in 8 registers. 3. In the second stage, the input m (x) is set to zero, the selection multiplexers K1 and K2 select the upper input to be valid, and then the coefficients of the check polynomial r (x) are shifted out through the shift register, i.e. the check symbols.
On the other hand, as shown in fig. 3, the RS decoding operation mainly includes caching the encoded input code stream, calculating a corresponding syndrome, obtaining an error position polynomial, obtaining a specific error position by solving the root of the error position polynomial, calculating an error value of an error in the error position, forming a final error pattern, and performing error correction at the receiving end to complete the decoding function.
The method comprises the following steps:
the method comprises the following steps: calculating an adjoint polynomial from each set of encoded RS (35,27) data and Galois field element α; and calculating coefficients of the error location polynomial from the adjoint polynomial;
step two: calculating the root of the error location polynomial according to the coefficients of the error location polynomial and the galois field elements;
step three: generating an error location matrix according to the root of the error location polynomial;
step four: calculating an error location from the error location matrix and the adjoint polynomial;
step five: and correcting errors according to the error positions and the roots of the error position polynomials and outputting decoded data.
RS decoding calculation of syndromes as shown in fig. 4, a syndrome is calculated by a syndrome generator; the adjoint polynomial generator includes: eight companion adders, eight companion multipliers, and eight companion registers; one input end of each of the eight adjoint adders is connected with data to be decoded, and the other input end of each of the eight adjoint adders is connected with the output ends of the eight adjoint multipliers; eight output ends of the accompanying adders are respectively connected with eight input ends of the accompanying registers, eight output ends of the accompanying registers are respectively connected with one input end of eight accompanying multipliers, and the other input ends of the eight accompanying multipliers are respectively fixed at alpha and alpha2……α8。
The formula for calculating the syndrome is realized by information code elements and a finite field, the embodiment in the figure is a concrete implementation of the formula, and the calculation of the syndrome is completed in an accumulation form. Firstly, the initial value of the register in the figure is all zero, the received code elements are sequentially input into the module from the high-order code element to the low-order code element, and the corresponding code elements are sequentially written in each clock period along with the beat of the clock period. Then, each code element is subjected to multiplication and addition operation inside the module, the result is stored in a register for buffering, and the next clock cycle can be used continuously. Finally, when the last symbol c0 is input, the value of each register is the value of the corresponding syndrome.
As shown in fig. 5, the RS decoding error location polynomial is calculated by searching the root of the error location polynomial. To solve the number of error positions, an error position polynomial σ (x) ═ 1-x is introduced1x)(1-x2x)...(1-xtx) its ith root
Finding the error location is the root of solving the error location polynomial. The coefficients in the map are the corresponding error locationsThe coefficients of the polynomial, for the calculation of the coefficients, require the calculation results of the syndrome by which the specific coefficients, s, can be solvedj+t+σ1sj+t-1+...+σtsj＝0,j＝1,2,...,t，t＝8。
Sequentially changing j to 1.2, … …, 8; substituting the following formula to obtain eight error location polynomial coefficients sigma1～σ8The formula (1); solving error position polynomial coefficients according to the eight equations;
sj+t+σ1sj+t-1+...+σtsj＝0
wherein t is 8; sy＝0，y＝9.10.……16。
After the coefficients of the error location polynomial are obtained, the next work is to find the root of the error location polynomial and obtain the root value through global search.
The root of the error location polynomial is calculated by the error location polynomial generator;
the error location polynomial generator comprises: eight error multipliers, eight error registers, and one error adder; setting the initial values of the eight error registers to be zero;
the first input ends of the eight error multipliers are respectively sigma1～σ8The second input ends are respectively alpha and alpha2……α8(ii) a The output ends of the eight error multipliers are respectively connected with the input ends of the eight error registers, and the output ends of the eight error registers are connected with the third input ends of the eight error multipliers;
the output ends of the eight error registers are also connected with the input end of the error adder;
the root calculation process of the error location polynomial is as follows, and the following calculation process is repeatedly performed: after each multiplication by eight error multipliers, the error adder performs an addition for a total of eight,
if the nth error adder calculates the sum to zero, then xn＝αnIs the root of the error location polynomial.
The RS decoding error position value can be calculated through the error position valueAnd the correlation syndrome is calculated, and the specific formula is shown as follows. Wherein xiCorresponding to the error position, YiValue corresponding to error position, siCorresponding to the syndrome.
As shown in fig. 6, when the error position and the value corresponding to the error position are obtained, an error pattern can be formed, and the error correction process is an error correction process of performing addition calculation in a limited domain on the originally received code stream and the error pattern.
Claims (9)
1. An RS encoder, characterized by: the encoder is used for RS (35,27) encoding; each set of RS (35,27) data has a total length of 35 symbols, including 27 valid symbols and 8 check symbols, each symbol being represented by an 8-bit binary value;
the encoder includes: eight multipliers M1-M8, eight adders C1-C8, eight registers R0-R7, two multiplexers MUX1, and MUX 2;
the first input end of the multiplexer MUX1 is connected with the output end of the adder C8, and the second input end of the multiplexer MUX is constantly 0; the output end of the MUX1 is respectively connected with one input end of the eight multipliers M1-M8; k1 controls multiplexer MUX1 to gate;
the other input ends of the eight multipliers M1-M8 are polynomial coefficients g 0-g 7 respectively;
the output end of the multiplier M1 is connected with the input end of the register R0, the output ends of the multipliers M2 to M8 are respectively connected with one input end of adders C1 to C7, and the output ends of the registers R0 to R6 are respectively connected with the other input end of the adders C1 to C7; the output ends of the adders C1 to C7 are respectively connected with the input ends of the registers R1 to R7; the output end of the register R7 is connected with one input end of an adder C8, and the other input end of the adder C8 is connected with data to be encoded;
the first input end of the multiplexer MUX2 is connected with data to be encoded, the second input end of the multiplexer MUX2 is connected with the output end of the register R7, the output end of the MUX2 outputs encoded data, and the k2 controls the gating of the multiplexer MUX 2.
2. An RS encoding method for an RS encoder as claimed in claim 1, characterized in that: the method is for RS (35,27) encoding; each set of RS (35,27) data has a total length of 35 symbols, including 27 valid symbols and 8 check symbols, each symbol being represented by an 8-bit binary value;
the method comprises the following steps:
the method comprises the following steps: calculating generator polynomial coefficients g 0-g 7;
step two: constructing an encoder according to the polynomial coefficient;
step three: setting all eight registers to be zero;
step four: the two multiplexers are switched to be gated by the first input end; inputting data to be encoded;
step five: and after twenty-seven symbols are output, the two multiplexers are switched to be gated by the second input end, eight check symbols are output, and a group of RS (35,27) data coding is completed.
3. The RS encoding method of claim 2, wherein: in the first step, a polynomial g (x) is generated as follows:
g(x)＝(x-α)(x-α2)...(x-α7)(x-α8)
＝x8+α176x7+α240x6+α211x5+α253x4+α220x3+α3x2+α203x+α36；
the generator polynomial coefficients are respectively as follows:
g0＝α36＝8'h25 g1＝α203＝8'he0 g2＝α3＝8'h08 g3＝α220＝8'hac
g4＝α253＝8'h47 g5＝α211＝8'hb2 g6＝α240＝8'h2c g7＝α176＝8'he3；
α is represented as 00000001 in binary.
4. An RS decoding method, characterized by: the method is for RS (35,27) decoding; each set of RS (35,27) data has a total length of 35 symbols, including 27 valid symbols and 8 check symbols, each symbol being represented by an 8-bit binary value; the method comprises the following steps:
the method comprises the following steps: calculating an adjoint polynomial from each set of encoded RS (35,27) data and Galois field element α; and calculating coefficients of the error location polynomial from the adjoint polynomial;
step two: calculating the root of the error location polynomial according to the coefficients of the error location polynomial and the galois field elements;
step three: generating an error location matrix according to the root of the error location polynomial;
step four: calculating an error location from the error location matrix and the adjoint polynomial;
step five: and correcting errors according to the error positions and the roots of the error position polynomials and outputting decoded data.
5. The RS decoding method of claim 4, wherein: in the first step, a adjoint polynomial is calculated through an adjoint polynomial generator; the adjoint polynomial generator includes: eight companion adders, eight companion multipliers, and eight companion registers;
one input end of each of the eight adjoint adders is connected with data to be decoded, and the other input end of each of the eight adjoint adders is connected with the output ends of the eight adjoint multipliers; eight output ends of the accompanying adders are respectively connected with eight input ends of the accompanying registers, eight output ends of the accompanying registers are respectively connected with one input end of eight accompanying multipliers, and the other input ends of the eight accompanying multipliers are respectively fixed at alpha and alpha2……α8(ii) a Setting the initial values of the eight adjoint registers to zero;
the adjoint polynomial coefficient calculation process is as follows: inputting each set of RS (35,27) data into the syndrome generator from high to low in sequence, and when each set of RS (35,27) dataAfter all symbols in (1) are re-input, the values in the eight adjoint registers are the coefficients s of the adjoint polynomial1～s8。
6. The RS decoding method of claim 5, wherein: in the first step, the error location polynomial calculation process is as follows:
sequentially changing j to 1.2, … …, 8; substituting the following formula to obtain eight error location polynomial coefficients sigma1～σ8The formula (1); solving error position polynomial coefficients according to the eight equations;
sj+t+σ1sj+t-1+...+σtsj＝0
wherein t is 8; sy＝0，y＝9.10.……16。
7. The RS decoding method of claim 6, wherein: in the second step, the root of the error position polynomial is calculated by the error position polynomial generator;
the error location polynomial generator comprises: eight error multipliers, eight error registers, and one error adder; setting the initial values of the eight error registers to be zero;
the first input ends of the eight error multipliers are respectively sigma1～σ8The second input ends are respectively alpha and alpha2……α8(ii) a The output ends of the eight error multipliers are respectively connected with the input ends of the eight error registers, and the output ends of the eight error registers are connected with the third input ends of the eight error multipliers;
the output ends of the eight error registers are also connected with the input end of the error adder;
the root calculation process of the error location polynomial is as follows, and the following calculation process is repeatedly performed: after each multiplication by eight error multipliers, the error adder performs an addition for a total of eight,
if the nth error adder calculates the sum to zero, then xn＝αnIs the root of the error location polynomial.
8. The RS decoding method of claim 7, wherein: in the third step, the error position matrix is as follows:
9. the RS decoding method of claim 8, wherein: in the fourth step, the error position Y is calculated according to the following formulai：
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