CN114157243B - White noise generation method based on adjustable heterojunction - Google Patents

White noise generation method based on adjustable heterojunction Download PDF

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CN114157243B
CN114157243B CN202111424445.9A CN202111424445A CN114157243B CN 114157243 B CN114157243 B CN 114157243B CN 202111424445 A CN202111424445 A CN 202111424445A CN 114157243 B CN114157243 B CN 114157243B
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heterojunction
adjustable
voltage
resistor
white noise
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CN114157243A (en
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郑雅宁
张竑
汤珏瑤
邹丽
庄颖
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Wuxi Ningfeng Medical Equipment Co.,Ltd.
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Nanjing Drum Tower Hospital
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B29/00Generation of noise currents and voltages

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Abstract

The invention discloses a white noise generating circuit based on an adjustable heterojunction, which comprises an adjustable heterojunction, a resistor, a direct current voltage source, a comparator, a high-frequency pulse source, an AND gate, a counter, a digital-to-analog converter and a low-noise amplifier, wherein the adjustable heterojunction is connected with the resistor; the adjustable heterojunction and the resistor are connected in series, the upper end of the adjustable heterojunction is connected with a direct-current voltage source, and the lower end of the resistor is grounded; the adjustable heterojunction presents opposite rectification characteristics by adjusting the back box back gate voltage of the adjustable heterojunction to change alternately; setting a counting time period T of a counter, obtaining the total number of pulses generated by an AND gate in the period by the counter, inputting the total number into a digital-to-analog converter for digital-to-analog conversion, and resetting the counter to zero when the period is finished so as to perform the counting process of the next period and generate random numbers; after the power is increased by the low-noise amplifier, the white noise audio can be finally output by the loudspeaker. The invention provides a method for generating true random numbers, which is used for a white noise generator and can improve the quality of generating white noise.

Description

White noise generation method based on adjustable heterojunction
Technical Field
The invention belongs to a digital method for generating white noise, and particularly relates to the field of signal processing.
Background
White noise means that the power spectral density of frequency components in a piece of sound is uniform in the whole audible range (20 to 20000 Hz) (since white light is formed by mixing monochromatic lights of various frequencies, the property of the signal with an even power spectrum is called "white", and the signal is also called white noise), while the so-called white gaussian noise means that not only the power spectral density is subject to uniform distribution, but also the amplitude distribution is subject to gaussian distribution. In contrast, other noise signals that do not have this property are referred to as colored noise.
Effect of white noise: (1) soothing effect: relieving insomnia symptoms, concentrating attention, and stopping crying of infants, due to similarity between white noise and noisy sound in uterus; (2) shadowing effects: other noise is attenuated (neutralized), creating "false quietness". However, the points to be noted are: (1) The white noise of nature is the first choice, and no harm or side effect exists; (2) Artificially manufactured white noise cannot be used every day, and certain dependence can be generated; (3) When artificially made white noise is used, a sound source is far away from a user and an infant as much as possible, and the volume is reduced; (4) it is not preferable to listen to white noise with a headphone.
The generation mechanism of noise is roughly classified into three types: thermal noise, shot noise, and cosmic noise. The thermal noise is caused by the irregular movement of free electrons in passive devices such as resistors, feeders and the like, and the movement is more violent when the temperature is higher; shot noise is caused by non-uniformity of electron emission in active devices such as vacuum tubes and semiconductor devices (in circuits, the effective value of shot noise voltage is much larger than that of thermal noise, and thermal noise can be disregarded when both shot noise and thermal noise are present); cosmic noise is caused by cosmic celestial radiation to the receiver and is not normally used to generate noise.
The existing white noise generation methods are roughly divided into three types: physical, digital and mechanical methods.
The physical method comprises the following steps: there is an invention patent, named white noise generator as shown in fig. 1 (a), which is a white noise generator of MOSFET operating in its linear region and having zero source-drain DC bias current.
The digital method comprises the following steps: there are several utility model patents, as shown in fig. 1 (b), named as "white noise generator", as shown in fig. 1 (c), "gaussian white noise generator", as shown in fig. 1 (d), "white noise generator based on orthogonal frequency division multiplexing", etc., and the idea is to generate pseudo-random sequence (m sequence) first and then convert it into white noise.
The mechanical method comprises the following steps: there are several utility model patents, as shown in fig. 1 (e), named as "a mechanical white noise sleeping apparatus", etc., which drive a fan by a motor to generate mechanical noise.
The existing digital method generates white noise, namely, a pseudo-random sequence is generated firstly, and then subsequent processes such as digital-to-analog conversion and the like are carried out, naturally, the quality of the generated white noise is determined by the quality of the sequence randomness, however, the name of the sequence can show that the generated sequence is pseudo-random, namely, the sequence is obtained by a starting seed and a fixed recursion algorithm, or the sequence has a period which is long, the sequence is random when a short period of time is taken, and the sequence starts to circulate when the time exceeds the period. The pseudo-randomness of the sequence limits the quality of the white noise produced and its applicability.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a white noise generation method based on an adjustable heterojunction, which is a method for generating a true random number, is used for a white noise generator and can improve the quality of generating white noise.
In order to achieve the purpose, the invention adopts the following technical scheme:
a white noise generating circuit based on an adjustable heterojunction comprises an adjustable heterojunction, a resistor, a direct current voltage source, a comparator, a high-frequency pulse source, an AND gate, a counter, a digital-to-analog converter and a low-noise amplifier, wherein the adjustable heterojunction is connected with the resistor in series, the upper end of the adjustable heterojunction is connected with the direct current voltage source, and the lower end of the resistor is grounded; the back brake back gate voltage of the adjustable heterojunction is adjusted to be changed alternately, so that the adjustable heterojunction presents opposite rectification characteristics; when the back gate voltage is larger than the threshold voltage V th When the voltage is increased, the voltage at the junction of the heterojunction and the resistor can be adjusted to be increased; setting a reference voltage of a comparator, and outputting a high potential by the comparator when the voltage at the joint of the adjustable heterojunction and the resistor is greater than the reference voltage; the output end of the comparator and the high-frequency pulse source are respectively connected with two input ends of the AND gate, and the comparator is taken out to output pulses in a high potential period; setting a time period T of a counter, obtaining the total number of pulses generated by an AND gate in the period by the counter as an output signal of the period of the counter, inputting the output signal into a digital-to-analog converter for digital-to-analog conversion, resetting the counter to zero when the period is finished so as to count the next period, and so on, wherein the number of the pulses in each period is random, namely random numbers are generated; the analog signal is output by the D/A converter, and the analog signal is amplified by the low-noise amplifier to be finally output as white noise by the loudspeakerAnd (4) audio frequency.
Further, when the back gate voltage of the adjustable heterojunction changes alternately, the adjustable heterojunction is continuously switched between an on state and an off state, the time of the switching process is random, and when the back gate voltage is larger than the threshold voltage V th When the adjustable heterojunction is used, the adjustable heterojunction is equivalent to a diode which is conducted from top to bottom and two resistors which are connected in series, namely the adjustable heterojunction is in an on state, namely a high-conductivity low-resistance state; when the back gate voltage is less than the threshold voltage V th When the adjustable heterojunction is connected in series with two resistors from bottom to top, namely in an off state, namely in a high-resistance low-conduction state, the voltage value at the connection position of the adjustable heterojunction and the resistors is from V min Becomes V max Process or from V max Becomes V min The required time of the process is different, the comparator acts to cause the voltage pulse width at the output end of the comparator to be different, and the AND gate acts to take out parts with different lengths and positions from the high-frequency clock pulse source, the number of pulses contained in each part is random, and in a longer counting time period T, the number of pulses of a plurality of parts is accumulated together to obtain the random total number of pulses.
Further, a back gate terminal threshold voltage V th is-20V, the back gate end preferably changes the maximum voltage to be 60V, and the minimum voltage to be-60V.
Further, the reference voltage of the comparator is between the maximum voltage and the minimum voltage at the connection of the adjustable heterojunction and the resistor.
The beneficial effects of the invention are: the invention relates to a method for generating true random numbers, which is used for a white noise generator and can improve the quality of generating white noise. The randomness of the invention is basically derived from the uncertainty of the adjustable heterojunction switch in the physical process, is a physical entropy source, has better randomness, and can be concretely realized by the tests of NIST-SP 800-22, including frequency test, intra-block frequency test, run test, intra-block longest run test, binary matrix rank test, discrete Fourier transform test, non-overlapping module matching test, maurer general statistical test, linear complexity test, sequence test, approximate entropy test, accumulation and test, random walk test and random walk state frequency test which are 15 test methods, the corresponding P values of the test methods all meet the randomness requirement, and the randomness of the generated random numbers is verified.
Drawings
FIG. 1 (a) is a schematic diagram of a white noise generator, and FIG. 1 (b) is a schematic diagram of a white noise generator: fig. 1 (c) is a schematic diagram of a gaussian white noise generator, fig. 1 (d) is a schematic diagram of a white noise generator based on orthogonal frequency division multiplexing, and fig. 1 (e) is a schematic diagram of a mechanical white noise sleeping instrument:
FIG. 2 is an equivalent circuit schematic of a tunable heterojunction;
FIG. 3 is a circuit diagram of a random number generation module;
the voltage relationships at various points in the circuit of fig. 4.
Detailed Description
The present invention will now be described in further detail with reference to the accompanying drawings.
Fig. 2 is a schematic diagram of an equivalent circuit of the tunable heterojunction, wherein when the back gate voltage of the tunable heterojunction is alternatively 60V and-60V, the tunable heterojunction exhibits opposite rectification characteristics, and the rectification direction is shown in fig. 2, for example, when the back gate voltage is 60V, the tunable heterojunction is equivalent to a diode which is conducted from top to bottom and is connected in series with two resistors, and is in an on state, i.e., a high-conductivity low-resistance state; when the back gate voltage is-60V, the adjustable heterojunction is equivalent to a diode which is conducted from bottom to top and two resistors which are connected in series, and is in an off state, namely a high-resistance low-conduction state.
As shown in fig. 3, the main part of the circuit is an adjustable heterojunction and a standard resistor connected in series, the standard resistor has a voltage dividing function, the lower end of the standard resistor is grounded, and the upper end of the adjustable heterojunction is connected with a direct-current voltage source; the back gate voltage of the adjustable heterojunction is adjusted to be 60V and-60V alternately, so that the adjustable heterojunction presents opposite rectification characteristics; when the back gate voltage is 60V, the standard resistance partial voltage is increased, namely the voltage at 2 is increased; properly selecting the reference voltage of the comparator to be between the maximum and minimum voltage at the connection position of the adjustable heterojunction and the resistor, and outputting the reference voltage when the voltage at the connection position of the adjustable heterojunction and the resistor, namely 2, is greater than the reference voltageA high potential is generated; then the high-frequency pulse source is connected with an AND gate, and the comparator is taken out to output pulses in a high potential period; finally, in a longer fixed time period T, the total number of pulses generated in the period is obtained by a counter and is used as an output signal of the counter in the period, the output signal is input into a digital-to-analog converter to carry out a digital-to-analog conversion process, when the period is ended, the counter is reset to zero so as to carry out a counting process of the next period, and by analogy, the number of the pulses in each period is random, namely a random number is generated; the digital-to-analog converter outputs an analog signal, the analog signal can be finally output as white noise audio by a loudspeaker through processes such as amplification and the like, the amplification process can be realized through a low-noise amplifier, and the purpose of the amplification process is to increase power and the like. The adjustable heterojunction is used as a physical entropy source in the invention to fundamentally ensure randomness, particularly, because of uncertainty of the adjustable heterojunction switch in the physical process, when the back gate voltage is alternately changed between +60V and-60V, the adjustable heterojunction is continuously switched between an on state and an off state, and the switching speed is uncertain, namely, the adjustable heterojunction is random in the switching process, so that the voltage value of the connection part of the adjustable heterojunction and the resistor is changed from V min Becomes V max Process or from V max Becomes V min The required time of the process is different, the comparator acts to cause that the output end of the comparator, namely the voltage pulse width at 3 positions is different, the AND gate acts to further take out parts with different lengths or positions from the high-frequency clock pulse source, the number of pulses contained in each part is random, and in a longer time period T, the number of pulses of a plurality of parts is accumulated together to obtain the random total pulse number. In the figure DCVS represents DC voltage source, M represents adjustable heterojunction, R 0 Denotes the standard resistance, V ref Denotes a reference voltage, comparator, clock denotes a high frequency clock source, and denotes an and gate, counter denotes a counter, and DAV denotes a digital-to-analog converter.
Fig. 4 (a) illustrates a waveform of constant period square wave voltage of the adjustable heterojunction back gate end with time, wherein the maximum voltage of the back gate end is preferably changed to 60V, and the minimum voltage is-60V.
Fig. 4 (b) illustrates the waveform of the voltage at the junction of the tunable heterojunction and the dc voltage source, i.e., 1, as a function of time, with DCVS at the top and therefore the voltage is unchanged.
FIG. 4 (c) illustrates the waveform of the voltage at the junction of the tunable heterojunction and the resistor, i.e. 2, as the voltage at the junction of the tunable heterojunction and the resistor changes with time, because the tunable heterojunction switches (changes in resistance) with the change of the back gate voltage, the voltage at the junction of the tunable heterojunction and the resistor correspondingly increases or decreases, and the time of the increase or decrease is random, i.e. the voltage at the junction of the tunable heterojunction and the resistor changes from V min Becomes V max Process or from V max Becomes V min The time required for the process varies.
Fig. 4 (d) illustrates the waveform of the voltage at the output terminal of the comparator, i.e. 3, as a function of time, when the voltage at 2 is greater than the reference voltage, 3 is at a high level, and when the voltage at 2 is less than the reference voltage, 3 is at a low level, and the pulse width at 3 is random because the increasing or decreasing process at 2 is random in time.
Fig. 4 (e) is a waveform diagram illustrating the variation of the voltage at the junction of the high-frequency pulse source and the and gate, i.e., at 4, with time, and the high-frequency pulse signal is presented because the high-frequency pulse source is above.
Fig. 4 (f) illustrates the waveform of the voltage at the output 5 of the and gate over time, with the output 5 of the and gate, so that 5 is high only when 3 and 4 are both high (the waveform is similar to that at 4).
It should be noted that the terms "upper", "lower", "left", "right", "front", "back", etc. used in the present invention are for clarity of description only, and are not intended to limit the scope of the present invention, and the relative relationship between the terms and the terms is not limited by the technical contents of the essential changes.
The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above-mentioned embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention. It should be noted that modifications and embellishments within the scope of the invention may be made by those skilled in the art without departing from the principle of the invention.

Claims (4)

1. A white noise generation method based on an adjustable heterojunction is generated by a white noise generation circuit of the adjustable heterojunction, and is characterized in that the white noise generation circuit of the adjustable heterojunction comprises an adjustable heterojunction, a resistor, a direct current voltage source, a comparator, a high-frequency pulse source, an AND gate, a counter, a digital-to-analog converter and a low-noise amplifier; the adjustable heterojunction and the resistor are connected in series, the upper end of the adjustable heterojunction is connected with a direct-current voltage source, and the lower end of the resistor is grounded; the adjustable heterojunction presents opposite rectification characteristics by adjusting the back box back gate voltage of the adjustable heterojunction to change alternately; when the back gate voltage is larger than the threshold voltage
Figure DEST_PATH_IMAGE001
When the voltage is increased, the voltage at the junction of the heterojunction and the resistor can be adjusted to be increased; setting the reference voltage of the comparator between the maximum value and the minimum value of the voltage at the connection position of the adjustable heterojunction and the resistor, and outputting a high potential by the comparator when the voltage at the connection position of the adjustable heterojunction and the resistor is greater than the reference voltage; the output end of the comparator and the high-frequency pulse source are respectively connected with two input ends of the AND gate, and the comparator is taken out to output pulses in a high potential period; setting a counting time period T of a counter, obtaining the total number of pulses generated by an AND gate in the period by the counter as an output signal of the counter in the period, inputting the output signal into a digital-to-analog converter for a digital-to-analog conversion process, resetting the counter to zero when the period is finished so as to perform the counting process of the next period, and repeating the steps until the number of pulses in each period is random, namely generating a random number; the digital-to-analog converter outputs an analog signal, and the analog signal is amplified by the low-noise amplifier to finally output white noise audio by the loudspeaker;
when the back gate voltage of the adjustable heterojunction changes alternately, the adjustable heterojunction is continuously switched between an on state and an off state, the time of the switching process is random, and when the back gate voltage is larger than the threshold voltage
Figure 914253DEST_PATH_IMAGE001
When the adjustable heterojunction is used, the adjustable heterojunction is equivalent to a diode which is conducted from top to bottom and two resistors which are connected in series, namely the adjustable heterojunction is in an on state, namely a high-conductivity low-resistance state; when the back gate voltage is less than the threshold voltage
Figure 126928DEST_PATH_IMAGE001
When the adjustable heterojunction is connected in series with two resistors from bottom to top, namely in an off state, namely a high-resistance low-conductivity state, the voltage value at the connection position of the adjustable heterojunction and the resistors is reduced
Figure 190699DEST_PATH_IMAGE002
Become into
Figure DEST_PATH_IMAGE003
Processes or from
Figure 435605DEST_PATH_IMAGE003
Become into
Figure 232047DEST_PATH_IMAGE004
The required time of the process is different, the comparator acts to cause the voltage pulse width at the output end of the comparator to be different, and the AND gate acts to take out parts with different lengths and positions from the high-frequency clock pulse source, the number of pulses contained in each part is random, and in a longer counting time period T, the number of pulses of a plurality of parts is accumulated together to obtain the random total number of pulses.
2. The method as claimed in claim 1, wherein the back gate threshold voltage is set as the threshold voltage of back gate
Figure 553307DEST_PATH_IMAGE001
is-20V, the maximum voltage of the back gate end is 60V, and the minimum voltage is-60V.
3. The tunable heterojunction-based white noise generation method of claim 1, wherein the reference voltage of the comparator is between the maximum voltage and the minimum voltage at the junction of the tunable heterojunction and the resistor.
4. The method of claim 1, wherein the counter time period T is a fixed time.
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Publication number Priority date Publication date Assignee Title
US4169249A (en) * 1977-05-06 1979-09-25 Societe Nationale Industrielle Aerospatiale Analog noise generator
JPH08265109A (en) * 1995-03-27 1996-10-11 Yuragi Kenkyusho:Kk Pulse generating circuit
CN102386849A (en) * 2011-11-16 2012-03-21 贵州航天计量测试技术研究所 10MHz bandwidth noise signal generating device and noise signal generating method

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JP3318291B2 (en) * 1999-08-31 2002-08-26 株式会社環境電磁技術研究所 Pseudo noise generator
US6756854B2 (en) * 2002-10-31 2004-06-29 Aeroflex Powell, Inc. Digitally controlled angle noise signal generator
JP4365872B2 (en) * 2007-05-31 2009-11-18 株式会社東芝 Random number generator

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US4169249A (en) * 1977-05-06 1979-09-25 Societe Nationale Industrielle Aerospatiale Analog noise generator
JPH08265109A (en) * 1995-03-27 1996-10-11 Yuragi Kenkyusho:Kk Pulse generating circuit
CN102386849A (en) * 2011-11-16 2012-03-21 贵州航天计量测试技术研究所 10MHz bandwidth noise signal generating device and noise signal generating method

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