RU2440602C2 - Generating random numbers using continuous-time chaos - Google Patents

Abstract

FIELD: information technology.

SUBSTANCE: in one of the versions of the invention, the device has three comparators, a chaotic oscillator, D flip-flops, digital-to-analogue converters, a frequency divider, an XOR element, single-bit test and sequence test units.

EFFECT: high efficiency, high statistical quality of the output sequence, ensuring robustness to parameter fluctuations and external effects, high rate of transmitting data without subsequent processing.

17 cl, 42 dwg, 4 tbl

Description

Over the past decade, the growing need for electronic official and financial transactions, the use of digital signature applications, and the requirements for the secrecy of information have led to greater attention to random number generators (RNGs). In this regard, RNGs, which in the past were commonly used for military cryptography, currently play an important role in the development of conventional digital communications equipment.

Almost all cryptographic systems require unpredictable values; therefore, one of the main components of cryptographic mechanisms is the RNG. Generating public / private key pairs for asymmetric algorithms and keys for symmetric and hybrid cryptographic systems requires random numbers. One-time notepad, calls, nonces, bytes filling the block, and masking values are created using true random number generators (GISCH) [1]. Pseudorandom number generators (PRNGs) generate bits in a deterministic manner. In order to be generated by GISCH, pseudorandom sequences must be seeded from a shorter, truly random sequence [2]. In addition, RNGs are used in many areas, including the Monte Carlo method, computer modeling, statistical sampling, stochastic optimization methods, watermarking for image authentication, authentication procedure between two nodes of cryptographic equipment and hashing of the initial values of a cryptographic module that implements algorithm.

Even if the design of the RNG is known, it is impossible to make any effective prediction of the yield. In order to meet the requirements of secrecy of a one-time notepad, key generation, and any other cryptographic applications, the GISCH must have the following properties: the output bitstream of the GISCH must meet all statistical randomness criteria; the next random bit should be unpredictable [3]; the possibility of reproducing the same output bit stream [4] should be excluded. The best way to generate truly random numbers is to use the natural randomness of the real world by finding a random event that happens regularly [4]. Examples of such an event that can be used include the time elapsed during the period of radioactive decay, thermal and shot noise, jitter (“jitter”) of the generator, and the amount of charge of the semiconductor capacitor [2].

The scientific and technical literature describes several RNG designs; however, four different methods are mainly mentioned for generating random numbers: amplification of a noise source [5, 6], discretization using two oscillators with jitter [1, 7–9], chaotic mappings with discrete time [10-14] and chaotic continuous time generators [15, 18]. Despite the fact that the use of chaotic mappings with discrete time for the implementation of the RNG has been well known for some time, it has only recently been shown that chaotic generators with continuous time can also be used to implement the RNG. Following in this direction, we investigated the effectiveness of the proposed innovations in the generation of random binary data from random generators with continuous time.

The transmission speeds in the RNG bits, which can usually be found in the literature and commercially available products, have become insufficient due to the increased data rates of digital communication equipment. Compared to RNGs based on chaotic mappings with discrete time, amplification of a noise source and sampling using two oscillators with jitter, it turns out that RNGs based on chaotic generators with continuous time can provide much higher and constant data rates without subsequent processing with less complex integrated circuits. In conclusion, we can conclude that chaotic generators with continuous time can be integrated into the current process in the GHz range, and that the use of chaos with continuous time with the proposed innovations is very promising for the generation of random numbers with very high performance.

To ensure compatibility with other elements of the system, it is preferable to use chaotic generators that can be integrated on silicone. A number of attempts have been made to introduce chaotic oscillators with discrete as well as continuous time based on CMOS technology. In most of these attempts, the resulting circuits were complex and took up a large area of silicone. Discrete time chaotic oscillators typically use capacitor or current switching techniques. Using a multiplier in addition to many capacitors and operational amplifiers leads to a large circuit. Compared to RNGs based on discrete time chaos sources, it turns out that RNGs based on continuous time chaos sources can provide much higher data rates with less complex and less noisy integrated circuits, especially due to the lack of subsequent steps sampling and remembering.

In the noise source amplification method shown in FIG. 1, a high gain wideband amplifier is used to process white noise having a low AC voltage. This noise must be amplified to a level where it is possible to precisely set the threshold for it without biasing by the clocked comparator. This is the most common way to generate random numbers for single-chip and board-level solutions.

In low-voltage CMOS ICs, broadband white noise is generated by two different noise mechanisms: shot noise (generated by the current flow through the pn junction) and thermal noise (generated by the random movement of electrons in the resistor). Avalanche multiplication noise is not a practical choice for a noise source due to the usual high breakdown voltage (> 6 V DC) of zener diodes manufactured by CMOS technology on monolithic substrates. As shown in FIG. 1, the integrated topology of the noise source uses a large resistor as a thermal noise generator. Resistors are easily made from polysilicon or diffusion layers and do not require a bias current to generate noise, as is the case with semiconductor junctions. In addition, the polysilicon resistor has a low flicker noise index (typically -30 dB), providing low 1 / f noise levels.

где k - постоянная Больцмана, Т - абсолютная температура, R_Src - сопротивление и Δf - ширина полосы шумов. Ширина полосы шумов для E_t обычно ограничивается фильтром нижних частот первого порядка, образованным R_Src и эквивалентной входной емкостью усилителя C_Amp. При условии, что ширина полосы частот -3 дБ усилителя больше ширины полосы шумов, общее эквивалентное напряжение шума E_ni из-за E_t на входе усилителя будет

, где есть теоретический предел для теплового шума, генерируемого резистором, шунтированным конденсатором. Амплитуду напряжения теплового шума в полосе частот шириной 1 Гц можно повысить путем увеличения значения R_Src, но за счет уменьшения ширины полосы теплового шума, так что при данной C_Amp E_ni будет оставаться постоянным.If noise 1 / f is taken to be negligible, the thermal noise voltage of the source resistor R _Src will be

where k is the Boltzmann constant, T is the absolute temperature, R _Src is the resistance, and Δf is the noise bandwidth. The noise bandwidth for E _{t is} usually limited by a first-order low-pass filter formed by R _Src and the equivalent input capacitance of the amplifier C _Amp . Provided that the −3 dBr bandwidth of the amplifier is greater than the noise bandwidth, the total equivalent noise voltage E _ni due to E _t at the amplifier input will be

where there is a theoretical limit to the thermal noise generated by a resistor shunted by a capacitor. The amplitude of the thermal noise voltage in the frequency band of 1 Hz wide can be increased by increasing the value of R _Src , but by reducing the thermal noise bandwidth, so that at a given C _Amp E _ni will remain constant.

In the method of sampling using two generators with jitter, a random source is used, obtained from two generators in the free generation mode - one fast and the other slower. Published RNG designs using this method indicate that typical generator jitter levels are not nearly sufficient for statistical randomness. Therefore, the noise source is used to modulate the frequency of the slower generator, and the fast generator is sampled by the rising edge of the noise modulated slower generator. The drift between the two generators serves as a source of random binary characters. Like a method of amplifying a noise source, noise must be amplified to a level where it can be used to modulate the frequency of a slower generator. The frequency of the slower generator, which determines the data transfer rate, is mainly limited by the bandwidth of the noise signal used for modulation, the main reason for this limitation is the bandwidth of the amplifier.

In the proposed innovation, the signal of a chaotic generator of the order of several volts with a nominal average (central) frequency in the GHz range was converted into binary sequences directly by a comparator without using an amplifier, and the theoretical limit for the data transfer rate is determined by the nominal average (central) frequency of a chaotic generator, which yields a speed of the order of several Gbps. Such high data rates can provide attractive RNGs with continuous time compared to RNGs based on other methods. Both the stand-alone and non-stand-alone chaotic generator can be used as the core of the proposed RNG design, and random data can be obtained from a one-dimensional cross-section or by periodic sampling of one of the state of a chaotic system.

When comparing the proposed innovation with the previous design of the RNG, based on the chaotic generator with continuous time given in [15], the proposed innovation, as shown by numerical verification, provides speeds 7 times higher. In addition, the approximate bit sequence given on the website http://www.esat.kuleuven.ac.be/~mey/Ds2RbG/Ds2RbG.html does not pass the tests for the block frequency, sequences and approximate entropy of the complete test set of the National Institute of Standards and technology (USA). In addition, the shift compensation loop, which was used in the proposed innovation to maximize the statistical quality of the output sequence and ensure robustness to parameter fluctuations and attacks, is not feasible for the previous construction given in [15], because the obtained bit sequence can pass the complete Diehard test suite (a set of statistical tests to measure the quality of a random number set, developed by George Marsaglia) thanks to von Neumann abotke.

First, we performed a numerical check that the bit streams generated by the proposed innovation pass four main random number tests from the FIPS-140-2 test set [16]. External interference is one of the main problems in the development of the RNG, since interference signals and random signals have comparable levels. In order to solve this problem and provide robustness to parameter fluctuations and hacking attacks, we proposed shift compensation and frequency correction loops that enhance the statistical quality of the generated bit sequences. In addition, we experimentally verified that binary data obtained from the proposed innovations pass the tests of the full set of tests of the National Institute of Standards and Technology (USA) to measure the quality of a set of random numbers [17].

Because of their extreme sensitivity to initial conditions and having a positive Lyapunov exponent and a noise-like energy spectrum, chaotic systems can be used to generate random numbers. In order to obtain random binary data from a chaotic system with continuous time, we proposed an interesting method based on the generation of irreversible binary data from the signal of this chaotic generator. It should be noted that the main characteristic for generating pseudorandom numbers is irreversibility [19]. In the proposed innovation for obtaining random bits from an autonomous or non-autonomous chaotic generator, we used the following:

1. Samples of state x ₁ from a one-dimensional cross section obtained upon transition from another state (x ₂ , x ₃ , ... or x _n ), defined as x _2..n (t) = x _{2..n (0)} c dx _2..n / dt> 0 or dx _2..n / dt <0.

2. Periodic samples of the state x ₁ , x ₂ , ..., or x _n obtained at rising edges of an external periodic pulse signal, that is, at times t satisfying the condition ωtmod2π = 0, where ω is the frequency of the pulse signal.

In the case of using a non-autonomous chaotic generator as the core of the proposed RNG design:

3. To obtain random bits, we also used a one-dimensional cross section of the state x ₁ obtained at rising edges of an external periodic pulse signal (at time t satisfying the condition ωtmod2π = t ₀ , where ω is the frequency of the pulse signal and 0 <t ₀ <1), used to excite a non-autonomous chaotic generator.

In the sections defined above x ₁ , x ₂ , ... or x _n are the normalized values of the chaotic generator used as the core of the proposed RNG. It should be noted that although n-dimensional trajectories in the plane x ₁ -x ₂ - ... -x _n are reversible, one can also obtain an irreversible section, taking into account values corresponding to only one of the states, say, x ₁ .

First, we numerically generated x ₁ and examined the distribution of the selected values to determine the corresponding cross sections, where the distribution looks like a random signal. Although we could not find cross sections whose x ₁ values have a single normal or X ² distribution [2] for an excellent set of parameters, we determined various cross sections where the x ₁ distribution has at least two regions. For the corresponding set of parameters, the distribution of the state x ₁ in the cross sections defined above looks as shown in FIG. 2.

The distribution of x ₁ , which has two regions, led us to generate random binary data from the regional values of x ₁ for regional thresholds. Following in this direction, we generated binary data S _{(top) i} and S _{(bottom) i} from one-dimensional sections according to formula (1):

where sgn (.) is the sign function, x _1i are the values of x ₁ obtained from one of the sections defined above, q _top and q _bottom are the thresholds for the upper and lower distributions, respectively, and q _middle is the boundary between the distributions. In order to be able to choose the thresholds appropriately, we examined the upper and lower distributions, as shown in Fig. 2, and then q _top and q _bottom were defined as the medians of the upper and lower distributions, respectively.

The generation of the binary sequence obtained in this way does not depend so much on the q _middle value, since the distribution density x is minimal for this boundary value. However, for threshold values (q _top , q _bottom ), the distribution density x is maximum, so the resulting binary sequence can be biased. In order to remove an unknown bias in this sequence, the well-known von Neumann alignment method can be used [20]. This method consists of converting a pair of bits 01 to output 0, 10 to output 1, and excluding pairs of bits 00 and 11. However, this method reduces performance because it generates approximately 1 bit out of 4 bits.

In order to eliminate this bias, so as not to reduce performance, instead of von Neumann processing, another method was used - operation ⊗ (exclusive OR). A potential problem associated with the exclusive OR method is that a small amount of correlation between the input bits will give the output a significant offset [4]. The correlation coefficients of the generated binary sequences S _top and S _bottom obtained from the cross sections defined above were calculated very close to 0, and it was established that the generated binary sequences are independent. This, in fact, was expected, since chaotic systems are characterized by the fact that they have a positive Lyapunov exponent [21], and the autocorrelation of the chaotic time series sharply disappears. In accordance with this result, we generated new binary data S _{(xor) i} using the above formula (2):

The average value ψ of the binary sequence S _xor obtained in this way can be calculated according to the given formula (3):

where the average value of S _top = µ, and the average value of S _bottom = ν. Thus, if µ and ν are close to ½, then ψ is very close to ½. As a result, we numerically verified that the sequence of bits S _xor , which was obtained from various sections defined above for the corresponding threshold values, passed the tests from the test set of the Federal Information Processing Standard (USA) using the procedure given in formula (2) FIPS-140-2 without von Neumann processing. We called random number generation according to the aforementioned methodology “regional RNG”.

Due to the lack of access to suitable manufacturing equipment, we decided to manufacture the proposed innovations using discrete components to demonstrate the feasibility of these circuits. In addition, we experimentally generated bit streams.

At the regional RNG, in order to obtain an irreversible cross section, only one variable x ₁ was used, and the voltage ν ₁ corresponding to the variable x ₁ was converted into binary sequences. In order to obtain random bits from an autonomous or non-autonomous chaotic generator by using periodic samples x ₁ , the circuit shown in FIG. 3 was used. The output bitstream of the comparators was discretized and stored in binary format on the rising edge of the external periodic generator of rectangular pulses ν _p (t) to obtain the values of ν ₁ in the section defined as ωtmod2π = 0.

In order to implement a technique in which x ₁ samples were used from a one-dimensional cross section of an autonomous or non-autonomous chaotic generator obtained upon transition from another state (x ₂ , x ₃ , ... or x _n ), defined as x _2..n (t) = x _2..n (0) with dx _2..n / dt> 0 or dx _2..n / dt <0, the output bit stream of the comparators ν _{1 was} discretized and stored in binary format on the rising or _{falling edges of the} comparator of another state ν _{2 ... n} using the circuit shown in Fig.4.

In the proposed innovation, one-dimensional cross-section x ₁ from a non-autonomous chaotic generator obtained at time t satisfying the condition ωtmod2π = t ₀ can also be used to generate random bits. In order to obtain the values of x ₁ in a certain section, the output bitstream of the comparators was sampled and stored in binary format after the delay logic element at the corrected time inside the period of the sequence of external periodic pulses ν _p (t), which was also used to excite a non-autonomous chaotic generator. The implementation scheme is presented in figure 5.

In the above schemes of regional random number generation, comparators were implemented on LM211 chips, and voltage levels V _top , V _middle, and V _bottom, respectively, were used to implement thresholds in formula (1). V _top and V _bottom were generated by two 12-bit digital-to-analog voltage converters (DACs). Each DAC can be adjusted in steps of 0.5859375 mV, and the reference voltage of the DAC is 2.4 V. When implemented, formula (1) and formula (2) are converted to the following:

To download binary data to a computer, hardware was developed based on a matrix of logical elements with operational programming having an interface of peripheral devices. In the matrix of logical elements with operational programming, shift compensation for thresholds V _top and V _bottom , frequency correction, were implemented; delay logic element and exclusive OR operation. After the shift compensation and frequency correction and the exclusive-OR operation, random numbers were downloaded to the computer through the interface of peripheral devices. The maximum data storage speed of our hardware based on a matrix of logical elements with operational programming is 62 Mbit / s.

We experimentally determined that for the corresponding set of parameters and with adjusted sampling delays, there are different sections, where the distribution ν ₁ has two regions, which looks similar to that shown in Fig. 2.

In order to be able to determine the initial threshold values appropriately, like the generation of numerical bits, the upper and lower distributions were investigated. Then, the initial values of V _top and V _bottom were determined as the medians of the upper and lower distributions, respectively. The sampling frequency for ν ₁ was determined by dividing the frequency ν _p (t) or the output of the comparator ν _{2 ... n} by the value of the preliminary frequency divider in the matrix of logical elements with operational programming. To determine the initial value of the preliminary frequency divider in an appropriate manner, a frequency spectrum ν ₁ was observed, which looks like that shown in FIG. 6. As shown in this figure, the chaotic signal ν ₁ has a noise-like energy spectrum. The average (central) frequency of the chaotic generator is shown by a solid marker. Prior to the dotted marker, in the region where the energy spectrum is flat, the chaotic signal ν ₁ contains all frequencies in equal amounts, and the power spectral density is at its maximum. Therefore, without loss of generality, ν ₁ (t) and ν ₁ (t + t ₀ ) can be considered uncorrelated for all t ₀ not equal to 0, and ν ₁ can be sampled to the sampling frequency f _sampling , shown by a dashed marker as a source of random signals. Finally, the initial value of the preliminary frequency divider was determined by dividing the frequency ν _p (t) or the output of the comparator ν _{2 ... n} by f _sampling .

The shift compensations for the thresholds V _top and V _bottom were implemented by implementing a one-bit test from the test set of the Federal Information Processing Standard (USA) FIPS-140-2 [16] for binary sequences S _top and S _bottom . For each sequence, bit streams of 20,000 bits were obtained; if the number of zeros> 10275, then the corresponding threshold decreased, and if the number of zeros <9725, then the corresponding threshold increased. The frequency correction loop was implemented by implementing the sequence test from the test set of the Federal Information Processing Standard (USA) FIPS-140-2 for the binary sequence S _xor . If 3 S _xor bit streams with a length of 20,000 bits, which were obtained sequentially, did not pass the sequence test, which indicated a sampling of ν ₁ with a frequency margin, then the sampling frequency ν _{1 was} reduced by increasing the value of the preliminary frequency divider. If necessary, the sampling rate could be increased externally through the interface of peripheral devices.

After the values of the preliminary frequency divider and thresholds became stable, a bit stream of at least 500 Mbit in length was obtained from the cross sections determined using the circuits shown in FIG. 3, FIG. 4 and FIG. 5 and subjected to a complete test set National Institute of Standards and Technology (USA). As a result, we experimentally verified that the S _xor bit sequence passed tests from a test set to measure the quality of a set of random numbers without von Neumann processing. P values were uniform, and the proportion of passing sequences was greater than the minimum degree of passage for each statistical test.

The data rate S _xor effectively becomes equal (f _sampling / 2) due to the division of ν ₁ into two areas according to the distribution. The data transfer rate S _xor can be calculated as f _xor ≈0.05 / τ, where τ is the time constant for a chaotic generator. We can conclude that chaotic generators can be easily integrated into today's process with a nominal average (central) frequency in the GHz range. However, it should be noted that the scientific and technical literature reports on chaotic schemes operating at significantly higher frequencies. For example, in [18], the results of clock modeling of a variant of a chaotic generator made on a bipolar junction transistor operating at a frequency of 5.3 GHz are presented. So, all this indicates that the use of chaos with continuous time is very promising in the generation of random numbers with very high performance. As a result, the proposed method is also a reinforced architecture, in which shear compensation and frequency correction loops are added to maximize the statistical quality of the output sequence and ensure robustness to external noise, parameter fluctuations and hacking attacks.

INDUSTRIAL APPLICABILITY

2. RANDOM NUMBER GENERATOR WITH SHIFT COMPENSATION AND FREQUENCY CORRECTION, BASED ON THE AUTONOMOUS CHAOTIC GENERATOR, FOR APPLICATION IN CRYPTOGRAPHY

In the proposed design, we obtained random data by periodically sampling one of the states of a chaotic system and numerically verified that the bit streams generated by the proposed RNG pass four basic random number tests from the test set of the Federal Information Processing Standard (USA) FIPS-140-2. External interference is one of the main problems in the development of the RNG, since interference signals and random signals have comparable levels. In order to solve this problem and provide robustness to parameter fluctuations and hacking attacks, we proposed shift compensation and frequency correction loops that enhance the statistical quality of the generated bit sequences. In addition, we experimentally verified that binary data obtained from a chaotic generator passes the tests of the full set of tests of the National Institute of Standards and Technology (USA) to measure the quality of a set of random numbers.

3. AUTONOMOUS CHAOTIC GENERATOR

An autonomous chaotic generator used as the RNG core was proposed in [18]. A random generator on MOS structures is shown in Fig. 7 and is constructed according to the scheme of a classical sinusoidal generator with cross-links with the addition of an RC ₃ link and a differential pair cascade (M ₃ -M ₄ ). Pairs of transistors M ₉ -M ₈ and M ₁₀ -M ₁₁ are used to implement simple current mirrors with a current gain in a circuit with a common emitter k. Assuming that C ₁ = C ₂ = C ₃ = C, a conventional analysis of the circuit gives the following formula (5):

,

, β=µ_nC_ox(W/L)_1,2; V_TH - пороговое напряжение n-канальной МОП-структуры, µ_n - подвижность электронов, С_ох - емкость оксида МОП-структуры и W/L - отношение ширины канала к его длине для пары транзисторов М₁-М₂.where Δi _L = i _L -i _R (differential current of the chokes),

,

, β = µ _n C _ox (W / L) _1,2 ; V _TH is the threshold voltage of the n-channel MOS structure, μ _n is the electron mobility, C _oh is the oxide capacity of the MOS structure, and W / L is the ratio of the channel width to its length for a pair of M ₁ -M ₂ transistors.

x₁=(ν_C2-ν_C1)/2V_ref, х₂=(ν_C2+ν_C1)/2V_ref, y=Δi_LR/2V_ref, z=ν_C3/2V_ref, t_n=t/RC, и принимая V_ref=V_TH, уравнения системы в формуле (5) преобразуются следующим образом:Using normalized values:

x ₁ = (ν _C2- ν _C1 ) / 2V _ref , x ₂ = (ν _C2 + ν _C1 ) / 2V _ref , y = Δi _L R / 2V _ref , z = ν _C3 / 2V _ref , t _n = t / RC, and assuming V _ref = V _TH , the system equations in formula (5) are transformed as follows:

.where b = βRV _TH , c = I ₀ R / 2V _TH , d = (kI ₀ -I _B ) R / 2V _TH and

.

The equations in formula (6) generate chaos for an excellent set of parameters. For example, the chaotic attractor shown in Fig. 8 is obtained from a numerical analysis of the system at b = 0.9, c = 0.15, d = 0.7, and k = 8 using the 4th-order Runge-Kutta algorithm with adaptive step size.

Used chaotic generator has some significant advantages over existing generators. To ensure the required nonlinearity, a differential pair is used in the circuit, which, due to its high characteristics, is the most widely used analog building block. In addition, the chaotic generator is balanced; therefore, it provides better power suppression and noise immunity.

4. MODELING THE SCHEME

, R=1000 Ом, и токи смещения были I₀=240 мкА, I_B=100 мкА соответственно. Наблюдавшееся фазовое пространство, соответствующее зависимости между ν_C2-ν_C1 и ν_C3, показано на фиг.9.In order to demonstrate the ability of high-frequency operation of a chaotic generator on MOS structures, the circuit layout shown in Fig. 7 was developed using Cadence, and the circuit was modeled using the SPICE program (simulation program with orientation to integrated circuits) (level 3) with model parameters of 1.5 microns CMOS technology. The circuit was biased with a power source of ± 2.5 V. The values of the passive components were as follows: L = 4.7 μH, C = 4.7 pF

, R = 1000 Ohms, and bias currents were I ₀ = 240 μA, I _B = 100 μA, respectively. The observed phase space corresponding to the relationship between ν _C2 −ν _C1 and ν _C3 is shown in FIG. 9.

It is clear that this version of the chaotic generator on MOS structures requires external chokes (with respect to the chip). Trying to reduce the magnitude of the chokes while maintaining functionality was impossible without increasing the supply voltages, bias currents and the ratio of the channel width to its length for transistors. However, a similar chaotic attractor was also obtained by modeling using the SPICE program with L = 20 nH, C = 0.3 pF, (f ₀ ≈ 2 GHz), R = 258 Ohms and with the model parameters 0.35 μm bipolar CMOS technology moreover, the supply voltage was ± 2.5 V, and the bias currents were I ₀ = 1300 μA, I _B = 400 μA. Finally, the chaotic oscillator circuit is very suitable for monolithic execution and is able to operate at very high frequencies.

5. RANDOM NUMBER GENERATION

Because of their extreme sensitivity to initial conditions and having a positive Lyapunov exponent and a noise-like energy spectrum, chaotic systems can be used to generate random numbers. In order to obtain random binary data from a chaotic system with continuous time, we proposed an interesting method based on the generation of irreversible binary data from the signal of this chaotic generator. It should be noted that the main characteristic for generating pseudorandom numbers is irreversibility.

To obtain random binary bits from a chaotic generator, we used samples of the state x _{1 of the} system in formula (6) obtained at rising edges of an external periodic pulse signal, i.e., at time t satisfying the condition ωtmod2π = 0, where ω is the frequency of the pulse signal. It should be noted that although the 4-dimensional trajectories in the x ₁ -y-x ₂ -z plane are reversible, an irreversible section can be obtained, taking into account the values corresponding to only one of the states, say, x ₁ .

First, we examined the distribution of periodically selected values of x ₁ to determine the corresponding cross sections, where the distribution looks like a random signal. Although we could not find cross sections whose x ₁ values have a single normal or X ² distribution for the excellent set of parameters given in formula (6), we determined various cross sections where the x ₁ distribution has at least two regions. For b = 0.9, c = 0.15, d = 0.7, and k = 8, the distribution of the state x ₁ in the cross sections defined above is shown in FIG. 10.

The distribution of x ₁ , which has two regions, led us to generate random binary data from the regional values of x ₁ for regional thresholds. Following in this direction, we generated binary data S _{(top) i} and S _{(bottom) i} from a one-dimensional section according to formula (7):

where sgn (.) is the sign function, x _1i are the values of x ₁ in the one-dimensional section obtained for ωtmod2π = 0, q _top and q _bottom are the thresholds for the upper and lower distributions, respectively, and q _middle is the boundary between the distributions. In order to be able to choose the thresholds appropriately, we examined the upper and lower distributions, as shown in Fig. 10, and then q _top and q _bottom were defined as the medians of the upper and lower distributions, which were 0.70569678515 and -0.7932956192, respectively when q _middle was defined as 0.

The generation of the binary sequence obtained in this way does not depend so much on the q _middle value, since the distribution density x is minimal for this boundary value. However, for threshold values (q _top , q _bottom ), the distribution density x is maximum, so the resulting binary sequence can be biased. In order to remove an unknown bias in this sequence, the well-known von Neumann alignment method can be used. This method consists of converting a pair of bits 01 to output 0, 10 to output 1, and excluding pairs of bits 00 and 11. However, this method reduces performance because it generates approximately 1 bit out of 4 bits.

In order to eliminate this bias and not decrease performance, instead of von Neumann processing, another method was used - operation ⊗ (exclusive OR). A potential problem with the exclusive OR method is that a small amount of correlation between the input bits will give the output a significant offset. The correlation coefficient of the generated binary sequences S _top and S _bottom with a length of 196 kbps was calculated equal to 0.00446, and it was found that the generated binary sequences are independent. This, in fact, was expected, since chaotic systems are characterized by the fact that they have a positive Lyapunov exponent, and the autocorrelation of the chaotic time series sharply disappears. In accordance with this result, we generated new binary data S _{(xor) i} using the above formula (8):

The average value ψ of the binary sequence S _xor obtained in this way can be calculated using the above formula (9):

where the average value of S _top = µ, and the average value of S _bottom = ν. Thus, if µ and ν are close to ½, then ψ is very close to ½. As a result, we numerically verified that the sequence of bits S _xor , which was obtained from various sections defined above for the corresponding threshold values, passed the tests from the test set of the Federal Information Processing Standard (USA) using the technique given in formula (8) FIP S-140-2 without von Neumann processing. We called random number generation according to the aforementioned methodology “regional RNG”.

6. EXPERIMENTAL CHECK AND IMPLEMENTATION OF RNG HARDWARE

- была отрегулирована до низкого значения частоты 16,77 кГц во избежание влияния на схему паразитических емкостей. Схема была смещена с источником питания ±5 В, и наблюдавшийся аттрактор показан на фиг.11. В порядке, описанном в разделе 5, мы сгенерировали случайные биты по областям путем периодической дискретизации одного из состояний хаотического генератора.Due to the lack of access to suitable manufacturing equipment, we decided to manufacture the proposed innovations using discrete components to demonstrate the feasibility of these circuits. For Fig. 7, the values of the passive components were as follows: L = 9 mH, C = 10 nF, R = 1000 Ohm, I _B = 100 μA and I ₀ = 250 μA. MOS transistors and current sources that were implemented using simple current mirrors based on the LM4007 CMOS transistor arrays. k was set equal to 8 by adjusting the ratio of the load resistors of the current mirrors. The average (central) operating frequency of a chaotic generator is

- was adjusted to a low frequency value of 16.77 kHz in order to avoid the influence of parasitic capacitances on the circuit. The circuit was biased with a ± 5 V power supply, and the observed attractor is shown in FIG. 11. In the order described in section 5, we generated random bits by region by periodically sampling one of the states of a chaotic generator.

6.1 REGIONAL RNG

In the regional RNG, in order to obtain an irreversible cross section, only one variable x ₁ was used, and the voltage ν ₁ = ν _C2 -ν _C1 corresponding to the variable x ₁ was converted into binary sequences. In order to implement this technique, the circuit shown in FIG. 18 was used. In this scheme, the comparators were implemented on LM211 chips, and voltage levels V _top , V _middle, and V _bottom, respectively, were used to implement thresholds in formula (7). V _top and V _bottom were generated by two 12-bit digital-to-analog voltage converters (DACs). Each DAC can be adjusted in steps of 0.5859375 mV, and the reference voltage of the DAC is 2.4 V. When implemented, formula (7) and formula (8) are converted to the following:

To download binary data to a computer, hardware was developed based on a matrix of logical elements with operational programming having an interface of peripheral devices. To obtain the values of x in the cross section defined as tmod2π = 0, the output bitstream of the comparators was sampled and stored in binary format on the rising edge of the external periodic generator of rectangular pulses ν _p (t). In the matrix of logical elements with operational programming, shift compensation for thresholds V _top and V _bottom and an exclusive OR operation were implemented. After the shift compensation and frequency correction and the exclusive-OR operation, random numbers were downloaded to the computer through the interface of peripheral devices. The maximum data storage speed of our hardware based on a matrix of logical elements with operational programming is 62 Mbit / s.

Using the technique described in Section 5, we investigated the distribution of ν ₁ . As a result, the distribution ν ₁ obtained on the rising front ν _p (t) is shown in Fig. 12.

In order to be able to determine the initial threshold values appropriately, like the generation of numerical bits, the upper and lower distributions were investigated. Then, the initial values of V _top and V _bottom were determined as the medians of the upper and lower distributions, which were 1.114 V and -1.122 V, respectively, and V _middle was defined as 0 mV. The sampling frequency for v ₁ was determined by dividing the frequency ν _p (t) by the value of the preliminary frequency divider in the matrix of logic elements with operational programming. To determine the initial value of the preliminary frequency divider in an appropriate manner, the frequency spectrum ν ₁ shown in FIG. 13 was observed. As shown in this figure, the chaotic signal ν ₁ has a noise-like energy spectrum. The average (central) frequency of the chaotic generator is shown by a solid marker set to 17 kHz. Prior to the dotted marker set to 4 kHz, in the region in which the energy spectrum is flat, the chaotic signal ν ₁ contains all frequencies in equal amounts, and the power spectral density is at its maximum. Therefore, without loss of generality, ν ₁ (t) and ν ₁ (t + t ₀ ) can be considered uncorrelated for all t ₀ not equal to 0, and ν ₁ can be sampled up to 4 kHz, shown as a source of random signals. Finally, the initial value of the preliminary frequency divider was determined equal to 6, and the frequency ν _p (t) was 24 kHz.

The shift compensations for the thresholds V _top and V _bottom were made by implementing a one-bit test from the test set of the Federal Information Processing Standard (USA) FIPS-140-2 for binary sequences S _top and S _bottom . For each sequence, bit streams of 20,000 bits were obtained; if the number of zeros> 10275, then the corresponding threshold decreased, and if the number of zeros <9725, then the corresponding threshold increased. The frequency correction loop was implemented by implementing the sequence test from the test set of the Federal Information Processing Standard (USA) FIPS-140-2 for the binary sequence S _xor . If 3 S _xor bit streams with a length of 20,000 bits, which were obtained sequentially, did not pass the sequence test, which indicated a sampling of ν ₁ with a frequency margin, then the sampling frequency ν _{1 was} reduced by increasing the value of the preliminary frequency divider. If necessary, the sampling rate could be increased externally through the interface of peripheral devices.

After the values of the preliminary frequency divider and thresholds became stable, a bit stream of 503 Mbit in length was obtained, which was subjected to a complete test set of the National Institute of Standards and Technology (USA). As a result, we experimentally verified that the S _xor bit sequence passed tests from the test set of the National Institute of Standards and Technology (USA) to measure the quality of a set of random numbers without von Neumann processing. The results for the uniformity of the P values and the fraction of the passing sequences of the regional RNG scheme are shown in Table 1. With a sample size of 503 × 1 Mbit, the minimum degree of passage for each statistical test with the exception of the random deviation test (option) is approximately 0.976691.

(new - нов.). В разделе 4 мы представили результаты моделирования схемы, которое приводит к средней (центральной) частоте работы, равной (f₀≈33,9 МГц). Учитывая, что схема была реализована с параметрами модели 0,35 мкм биполярной КМОП-технологии, как приведено в разделе 4 (f₀≈2 ГГц), мы можем заключить, что хаотические генераторы могут легко интегрироваться в сегодняшний процесс с номинальной средней (центральной) частотой в ГГц-диапазоне. Следует, однако, отметить, что в научно-технической литературе сообщается о хаотических схемах, действующих на намного более высоких частотах. Например, в работе [18] представлены результаты тактового моделирования варианта хаотического генератора, выполненного на биполярном плоскостном транзисторе, работающего на частоте 5,3 ГГц. Итак, все это указывает на то, что использование хаоса с непрерывным временем является очень перспективным в генерации случайных чисел с очень высокой производительностью, порядка сотен Мбит/сек.When the average (central) frequency of the chaotic generator was 16.77 kHz, the values of the preliminary frequency divider became stable at 7, and the data transfer rate S _xor effectively becomes equal to (24 kHz / 7/2) 1714 bit / s due to the division ν ₁ into two areas according to the distribution. The maximum data rate S _xor can be calculated as

(new - new). In section 4, we presented the results of a circuit simulation, which leads to an average (central) frequency of operation equal to (f ₀ ≈33.9 MHz). Given that the circuit was implemented with the model parameters of 0.35 μm bipolar CMOS technology, as described in Section 4 (f ₀ ≈2 GHz), we can conclude that chaotic generators can easily be integrated into the current process with a nominal average (central) frequency in the GHz range. However, it should be noted that the scientific and technical literature reports on chaotic schemes operating at much higher frequencies. For example, in [18], the results of clock modeling of a variant of a chaotic generator made on a bipolar junction transistor operating at a frequency of 5.3 GHz are presented. So, all this indicates that the use of chaos with continuous time is very promising in the generation of random numbers with very high performance, of the order of hundreds of Mbit / s.

Table 1 The results of the test set of the National Institute of Standards and Technology (USA) for the regional RNG STATISTICAL TESTS S _xor P value Share Frequency Test 0.465415 0.9881 Block Frequency Test 0.382115 0,9920 Cumulative Sums Test 0.717714 0.9861 Sequence Test (Runs) 0.869278 0.9781 Test the longest sequence (Longest Run) 0.556460 0.9861 Rank Test 0.818343 0,9901 Fast Fourier Transform Test (FFT) 0.614226 0,9920 Nonperiodic Templates Test 0.697257 1,0000 Overlapping Templates Test 0.548314 0.9841 Universal test (Universal) 0.250558 0,9920 Approximate Entropy Test (Apen) 0.382115 0,9901 Random Excursions Test 0.425817 1,0000 Random Excursions Test 0.961765 0.9969 Variant) Sequential Test (Serial) 0.399442 0.9881 Linear Complexity Test 0.305599 0,9940

7. COMPENSATED RANDOM NUMBER GENERATOR BASED ON A TWO-TURN ATTRACTOR

In the proposed design, we first obtained random data by periodically sampling one of the states of the chaotic system and numerically verified that the bit streams generated by the proposed RNG pass four basic random number tests from the test set of the Federal Information Processing Standard (USA) FIPS-140-2 . External interference is one of the main problems in the development of the RNG, since interference signals and random signals have comparable levels. In order to solve this problem and provide robustness to parameter fluctuations and hacking attacks, we proposed shift compensation and frequency correction loops that enhance the statistical quality of the generated bit sequences. Finally, we experimentally verified that the binary data obtained from the proposed scheme passes the tests of the full set of tests of the National Institute of Standards and Technology (USA) to measure the quality of a set of random numbers without further processing.

8. TWO-TYPE ATTRACTOR

The two-turn attractor used as the RNG core is obtained from a simple model given in [22], expressed by formula (11). It should be noted that when nonlinearity is replaced by continuous nonlinearity, the system is “quantitatively similar” to the Chua generator.

where sgn (.) is a sign function. The equations in formula (11) generate chaos for an excellent set of parameters. For example, the chaotic attractor shown in Fig. 14 is obtained from a numerical analysis of the system at a = 0.666 ... using the 4th order Runge-Kutta algorithm with adaptive step size.

9. RANDOM BITS GENERATION

In order to obtain random binary data from a chaotic system with continuous time, we proposed an interesting method based on the generation of irreversible binary data from the signal of this chaotic system. It should be noted that the main characteristic for generating pseudorandom numbers is irreversibility.

To obtain random bits from a chaotic attractor, we used samples of the x state of the system in formula (11) obtained at rising edges of an external periodic pulse signal, i.e., at time t satisfying the condition ωtmod2π = 0, where ω is the frequency of the pulse signal. It should be noted that although the 3-dimensional trajectories in the x-y-z plane are reversible, an irreversible section can be obtained, taking into account the values corresponding to only one of the states, say, x.

First, we examined the distribution of periodically selected x values to determine the corresponding cross sections, where the distribution looks like a random signal. Although we could not find cross sections whose x values have a single normal or X ² distribution for different values of a in formula (11), we determined various cross sections where the x distribution has at least two regions. At a = 0.666 ... the distribution of the state x in the section defined above is shown in Fig. 15.

The distribution of x, which has two regions, has led us to the idea of generating random binary data from regional values of x for regional thresholds. Following in this direction, we generated binary data S _{(top) i} and S _{(bottom) i} from a one-dimensional section according to formula (12):

where x ₁ are the values of x in the one-dimensional section obtained for ½tmod2π = 0 (ω = 1/2), q _top and q _bottom are the thresholds for the upper and lower distributions, respectively, and q _middle is the boundary between the distributions. In order to be able to choose the thresholds appropriately, we examined the upper and lower distributions, as shown in Fig. 15, and then q _top and q _bottom were defined as the medians of the upper and lower distributions, which were 0.9656158849 and -0.9640518966, respectively when q _middle was defined as 0.

The generation of the binary sequence obtained in this way does not depend so much on the q _middle value, since the distribution density x is minimal for this boundary value. However, for threshold values (q _top , q _bottom ), the distribution density x is maximum, so the resulting binary sequence can be biased. In order to remove an unknown bias in this sequence, the well-known von Neumann alignment method can be used. This method consists of converting a pair of bits 01 to output 0, 10 to output 1, and excluding pairs of bits 00 and 11. However, this method reduces performance because it generates approximately 1 bit out of 4 bits.

In order to eliminate this bias and not decrease performance, instead of von Neumann processing, another method was used - operation ⊗ (exclusive OR). A potential problem with the exclusive OR method is that a small amount of correlation between the input bits will give the output a significant offset. The correlation coefficient of the generated binary sequences S _top and S _bottom with a length of 152 kbps is calculated equal to 0.00018, and it was found that the generated binary sequences are independent. This, in fact, was expected, since chaotic systems are characterized by the fact that they have a positive Lyapunov exponent, and the autocorrelation of the chaotic time series sharply disappears. In accordance with this result, we generated new binary data S _{(xor) i} using the above formula (13):

The average value ψ of the binary sequence S _xor obtained in this way can be calculated using the above formula (14):

where the average value of S _top = µ, and the average value of S _bottom = ν. Thus, if µ and ν are close to ½, then ψ is very close to ½. As a result, we numerically verified that the sequence of bits S _xor , which was obtained from various sections defined above for the corresponding threshold values, in accordance with the methodology given in formula (13), passed tests from the test set of the Federal Information Processing Standard ( USA) FIPS-140-2 without von Neumann processing. We called random number generation according to the aforementioned methodology “regional RNG”.

10. SALES OF HARDWARE RNG

Due to the lack of access to suitable manufacturing equipment, we decided to fabricate the proposed circuit using discrete components to demonstrate the feasibility of the circuit.

10.1. EXPERIMENTAL CHECK OF CHAOTIC GENERATOR

The circuit diagram that implements a two-turn attractor is shown in Fig.16. The AD844 amplifier is used as a high-speed operational amplifier, and the voltage comparator LM211 is used to implement the necessary nonlinearity. The values of the passive components were taken as follows: R ₁ = R ₂ = a R ₃ = R = 10 kOhm, R ₃ = 15 kOhm at a = 0.666 ..., C ₁₇ = C ₁₈ = C ₁₉ = C = 2.2 nF and R _K = 100 kOhm.

Therefore, the average (central) working frequency of the chaotic generator f ₀ = 1 / 2πτ, corresponding to the time constant τ, where τ = RC, was adjusted to a low frequency value of 7.234 kHz in order to avoid the influence of parasitic capacitances on the circuit. The circuit was biased by a ± 5 V power supply, and the observed attractor is shown in FIG.

10.2 REGIONAL RNG

At the regional RNG, the voltage ν ₁ corresponding to the variable x was converted into binary sequences according to the method described in section 9. In order to implement this method, the circuit shown in Fig. 18 was used. In this scheme, the comparators were implemented on LM211 chips, and voltage levels V _top , V _middle, and V _bottom, respectively, were used to implement thresholds in formula (12). V _top and V _bottom were generated by two 12-bit digital-to-analog voltage converters (DACs). Each DAC can be adjusted in steps of 0.5859375 mV, and the reference voltage of the DAC is 2.4 V.

To download binary data to a computer, hardware was developed based on a matrix of logical elements with operational programming having an interface of peripheral devices. To obtain the values of x in the cross section defined as ωtmod2π = 0, the output bitstream of the comparators was sampled and stored in binary format on the rising edge of the external periodic generator of rectangular pulses ν _p (t). In the matrix of logical elements with operational programming, shift compensation for thresholds V _top and V _bottom and an exclusive OR operation were implemented. After the shift compensation and frequency correction and the exclusive-OR operation, random numbers were downloaded to the computer through the interface of peripheral devices. The maximum data storage speed of our hardware based on a matrix of logical elements with operational programming is 62 Mbit / s.

10.3 SHIFT COMPENSATION AND FREQUENCY CORRECTION

Using the technique described in Section 9, we investigated the distribution of ν ₁ . As a result, the distribution ν ₁ obtained on the rising front ν _p (t) is shown in Fig. 19.

In order to be able to determine the initial threshold values appropriately, like the generation of numerical bits, the upper and lower distributions were investigated. Then, the initial values of V _top and V _bottom were determined as the medians of the upper and lower distributions, which were 470 mV and -470 mV, respectively, and V _middle was defined as 0 mV. The sampling frequency for ν ₁ was determined by dividing the frequency ν _p (t) by the value of the preliminary frequency divider in the matrix of logical elements with operational programming.

To determine the initial value of the preliminary frequency divider in a suitable manner, the frequency spectrum ν ₁ shown in FIG. 20 was observed. As shown in FIG. 20, the chaotic signal ν ₁ has a noise-like energy spectrum. The average (central) frequency of the chaotic generator is shown by a solid marker set to 7.234 kHz. Prior to the dotted marker set to 1.55 kHz, in the region where the energy spectrum is flat, the chaotic signal ν ₁ contains all frequencies in equal amounts, and the power spectral density is at its maximum. Therefore, without loss of generality, ν ₁ (t) and ν ₁ (t + t ₀ ) can be considered uncorrelated for all t ₀ not equal to 0, and ν ₁ can be sampled to 1.55 kHz as a source of random signals. Finally, the initial value of the preliminary frequency divider was determined to be 3, and the frequency ν _p (t) was 4.65 kHz.

The shift compensations for the thresholds V _top and V _bottom were made by implementing a one-bit test from the test set of the Federal Information Processing Standard (USA) FIPS-140-2 for binary sequences S _top and S _bottom . For each sequence, bit streams of 20,000 bits were obtained; if the number of zeros> 10275, then the corresponding threshold decreased, and if the number of zeros <9725, then the corresponding threshold increased.

The frequency correction loop was implemented by implementing the sequence test from the test set of the Federal Information Processing Standard (USA) FIPS-140-2 for the binary sequence S _xor . If 3 S _xor bit streams with a length of 20,000 bits, which were obtained sequentially, did not pass the sequence test, which indicated a sampling of ν ₁ with a frequency margin, then the sampling frequency ν _{1 was} reduced by increasing the value of the preliminary frequency divider. The value of the preliminary frequency divider, the initial value of which was determined to be 3, became stable at 4. If necessary, the sampling frequency could increase from the outside through the interface of peripheral devices. The shift compensation effect for V _top , similar to the shift compensation effect for V _bottom , is shown in FIG. despite the fact that the initial threshold value was not set appropriately, the average value of the bit stream with a length of 20,000 bits was reached and became stable at 1/2 by compensation.

10.4 TEST RESULTS

After the values of the preliminary frequency divider and thresholds became stable, a bit stream of 223 Mbit in length was obtained, which was subjected to a complete test set of the National Institute of Standards and Technology (USA). As a result, we experimentally verified that the S _xor bit sequence passed tests from the test set of the National Institute of Standards and Technology (USA) to measure the quality of a set of random numbers without von Neumann processing. The results for the uniformity of the P values and the fraction of the passing sequences of the regional RNG scheme are shown in Table 2, where the P value (0 ≤ the value of P ≤ 1) is a real number that estimates the probability that the ideal RNG will produce a sequence that is less random than this sequence. With a sample size of 223 × 1 Mbit, the minimum degree of passage for each statistical test, with the exception of the random deviation test (option), is approximately 0.970011.

When the average (central) frequency of the chaotic generator was 7.234 kHz, the data rate S _xor effectively becomes ((4.65 kHz / 4) / 2) 581 bit / s (divider 4) due to the division of ν ₁ into two regions according to distribution. The bit rate S _xor can be summarized as S _xor = 581 τ / τ _new = 0.012782 / τ _new , where τ _new = R _new C _new (new - new). In [22], a chip implementation of a two-turn system with R _new = 28.5 kOhm and C _new = 15 pF is presented, which leads to the average (central) frequency of operation f = 1 / 2πτ _new = 500 kHz. Considering that the circuit in [22] was implemented using the relatively slow 1.2 μm CMOS technology, we can conclude that this circuit can be easily integrated into the current process at 10 MHz and can generate a bit stream close to Mbit / s . However, it should be noted that the scientific and technical literature reports on chaotic schemes operating at much higher frequencies. For example, in [18], the results of clock simulation of a chaotic circuit operating at a frequency of 5.3 GHz are presented.

table 2 The results of the test set of the National Institute of Standards and Technology (USA) for the regional RNG STATISTICAL TESTS S _xor P value Share Frequency Test 0.084879 0,9955 Block Frequency Test 0,020612 0.9821 Cumulative Sums Test 0.186566 0,9955 Sequence Test (Runs) 0.392456 0.9776 Test the longest sequence (Longest Run) 0.813470 0.9821 Rank Test 0.298151 0.9865 Fast Fourier Transform Test (FFT) 0.231847 0.9865 Nonperiodic Templates Test 0.716974 1,0000 Overlapping Templates Test 0,053938 0.9776 Universal test (Universal) 0.941144 0,9955 Approximate Entropy Test (Apen) 0.449956 0.9821 Random Excursions Test 0.725540 1,0000 Random Excursions Variant Test 0.901761 1,0000 Sequential Test (Serial) 0.744459 0,9955 Linear Complexity Test 0.797289 0.9865

When comparing our design of the regional RNG with the previous structure given in [15], we experimentally verified that for the same chaotic generator, the data transfer rate of the RNG method given in [15] was 385 bit / s. In addition, the sequence of bits obtained by the RNG method described in [15] can pass the complete set of Diehard tests with von Neumann processing only.

As a result of the proposed designs, compensated random number generators based on a non-autonomous chaotic generator and a two-turn attractor are reinforced architectures, in which shear compensation and frequency correction loops are added to maximize the statistical quality of the output sequences and ensure robustness to external noise, parameter fluctuations and attacks aimed at hacking.

11. RANDOM NUMBER GENERATOR BASED ON A TWO-TYPE ATTRACTOR

In the proposed random number generator, we obtained random data from the Poincare section of the chaotic system and numerically verified that the bit streams generated by the proposed random number generator pass four basic random number tests from the test set of the Federal Information Processing Standard (USA) FIPS-140-2 . In addition, we experimentally verified that binary data obtained from the proposed scheme passes the tests of the full set of tests of the National Institute of Standards and Technology (USA) to measure the quality of a set of random numbers.

12. TWO-TYPE ATTRACTOR

The two-turn attractor used as the RNG core is obtained from a simple model given in [22], expressed by formula (15). It should be noted that when nonlinearity is replaced by continuous nonlinearity, the system is “quantitatively similar” to the Chua generator.

The equations in formula (15) generate chaos for an excellent set of parameters. For example, the chaotic attractor shown in Fig. 22 is obtained from a numerical analysis of the system at a = 0.666 using the 4th order Runge-Kutta algorithm with an adaptive step size.

13. RANDOM BITS GENERATION

In order to obtain random binary data from a chaotic system with continuous time, we proposed an interesting method based on the generation of irreversible binary data from the signal of this chaotic system. It should be noted that the main characteristic for generating pseudorandom numbers is irreversibility.

To obtain random bits from a chaotic attractor, we used the Poincare section, defined as z (t) = 0 of the system in formula (15). It should be noted that although the 2-dimensional Poincare section in the x-y plane is reversible, it is possible to obtain an irreversible section, taking into account values corresponding to only one of the states, say, x.

First, we examined the distribution of periodically selected x values in the Poincare section, defined as z (t) = zn for dz / dt> 0, where zn varies from z _min to z _max to determine suitable sections, where the distribution looks like a random signal. Although we could not find Poincare sections whose x values have a single normal or X ² distribution for different values of z ₀ , we determined different Poincare sections where the distribution x has at least two regions. For this chaotic system, the values of the state x in the above Poincare section for z (t) = 0 and its distribution are shown in Fig. 23 and Fig. 24, respectively.

The distribution of x, which has two regions, has led us to the idea of generating random binary data from regional values of x for regional thresholds. Following in this direction, we generated binary data S _{(top) i} and S _{(bottom) i} from the Poincare section according to formula (16):

where sgn (.) is the sign function, x _i are the values of x in the Poincare section, q _top and q _bottom are the thresholds for the upper and lower distributions, respectively, and q _middle is the boundary between the distributions. In order to be able to choose the thresholds appropriately, we examined the upper and lower distributions, as shown in Fig. 24, and then q _top and q _bottom were defined as the medians of the upper and lower distributions, which were 0.8158 and -1.0169, respectively when q _middle was defined as 0.

The generation of the binary sequence obtained in this way does not depend so much on the q _middle value, since the distribution density x is minimal for this boundary value. However, for threshold values (q _top , q _bottom ), the distribution density x is maximum, so the resulting binary sequence can be biased. In order to remove an unknown bias in this sequence, the well-known von Neumann alignment method can be used. This method consists of converting a pair of bits 01 to output 0, 10 to output 1, and excluding pairs of bits 00 and 11. However, this method reduces performance because it generates approximately 1 bit out of 4 bits.

In order to eliminate this bias and not reduce performance at the same time, instead of von Neumann processing, we used another method - operation ⊗ (exclusive OR). A potential problem with the exclusive OR method is that a small amount of correlation between the input bits will give the output a significant offset. We calculated the correlation coefficient of the generated binary sequences S _top and S _{bottom of} length 32,000 equal to approximately 0,00087 and determined that the generated binary sequences are independent. In accordance with this result, we generated new binary data S _{(xor) i} using the above formula (17):

The average value ψ of the binary sequence S _xor obtained in this way can be calculated using the above formula (18):

where the average value of S _top = µ, and the average value of S _bottom = ν. Thus, if µ and ν are close to ½, then ψ is very close to ½. As a result, we numerically verified that the S _xor bit sequence that was obtained for the corresponding threshold values, in accordance with the procedure given in formula (17), passed the tests from the test set of the Federal Information Processing Standard (USA) FIPS-140- 2 without von Neumann processing. We called random number generation according to the aforementioned methodology “regional RNG”.

14. IMPLEMENTATION OF RANGE HARDWARE

Due to the lack of access to suitable manufacturing equipment, we decided to fabricate the proposed circuit using discrete components to demonstrate the feasibility of the circuit.

The circuit was biased by a ± 5 V power supply. A circuit diagram realizing a two-turn attractor is shown in FIG. 25. The AD844 amplifier is used as a high-speed operational amplifier, and the voltage comparator LM211 is used to implement the necessary nonlinearity. The values of the passive components were taken as follows: R ₁ = R ₂ = a R ₃ = R = 10 kOhm, R ₃ = 15 kOhm at a = 0.666 ..., C ₁₇ = C ₁₈ = C ₁₉ = C = 2.2 nF and R _K = 100 kOhm.

Therefore, the average (central) working frequency of the chaotic generator f = 1 / 2πτ, corresponding to the time constant τ, where τ = RC, was adjusted to a low frequency value of 7.234 kHz in order to avoid the influence of parasitic capacitances on the circuit. The observed attractor is shown in FIG.

14.1 REGIONAL RNG

At the regional RNG, in order to obtain an irreversible mapping, only variables x of the Poincare section were used. The voltage ν ₁ corresponding to the variable x was converted into binary sequences according to the procedure described in section 13. In order to implement this method, the circuit shown in Fig. 27 was used. In this scheme, the comparators were implemented on LM211 chips, and voltage levels V _top , V _middle, and V _bottom, respectively, were used to implement thresholds in formula (16). When implemented, formula (16) and formula (17) are converted to the following:

To download binary data to a computer, hardware was developed based on a matrix of logical elements with operational programming having an interface of peripheral devices. To obtain the values of x in the Poincare section, defined as z (t) = 0, for dz / dt> 0, the voltage ν ₃ corresponding to the variable z was compared with 0 V, and the output signal was discretized and stored in binary format on the rising edge of this comparator bit stream of other comparators. An exclusive OR operation for the S _xor sequence was implemented in the matrix of logical elements with operational programming, and after the exclusive OR operation, random numbers - candidates were downloaded to the computer through the interface of peripheral devices. The maximum data storage speed of our hardware based on a matrix of logical elements with operational programming is 62 Mbit / s.

Using the technique described in Section 13, we investigated the distribution of ν ₁ . As a result, a screenshot of the oscilloscope showing the distribution of ν ₁ obtained with ν ₃ (t) = 0, with dν ₃ / dt> 0, is shown in Fig. 28.

In order to be able to determine the thresholds appropriately, like generating numerical bits, we examined the upper and lower distributions. Then, the initial values of V _top and V _bottom were determined as the medians of the upper and lower distributions, which were 524 mV and -417 mV, respectively, and V _middle was defined as 0 mV.

Then, from the regional RNG circuit for data of the corresponding threshold values, a bit stream S _{xor of} length 105 Mbit was obtained. The resulting bits were subjected to the full test set of the National Institute of Standards and Technology (USA) and did not pass the sequence test, the longest sequence test and the approximate entropy test. This indicated a discretization of ν ₁ with a margin in frequency. Then, in order to improve the results, we got a second sequence of bits by implementing a counter in a matrix of logic elements with operational programming. The output bit stream of the other comparators ν _{1 is} discrete on the second rising edges of the comparator ν ₃ .

As a result, we experimentally verified that the S _xor bit sequence generated on the second rising edges passed the tests of the full set of tests of the National Institute of Standards and Technology (USA) to measure the quality of a set of random numbers without von Neumann processing for data of corresponding threshold values with tolerance ± 2 mV.

The test results for the fraction of the passage through the regional RNG circuit are given in Table 3. If the main frequency of the chaotic generator is 7.234 kHz, the data rate of the S _xor bit sequence generated on the second rising edges effectively becomes 1820 bits / sec. The bit rate S _xor can be generalized as S _xor = 1820τ / τ _new = 0,04004 / τ _new , where τ _new = R _new C _new (new - new). In [22], a chip implementation of a two-turn system with an average (central) frequency of operation f = 1 / 2πτ _new = 500 kHz is presented. Considering that the circuit in [22] was implemented using the relatively slow 1.2 μm CMOS technology, we can conclude that this circuit can be easily integrated into the current process at 10 MHz and can generate a bit stream of the order of several Mbit / s. However, it should be noted that the scientific and technical literature reports on chaotic schemes operating at much higher frequencies. For example, in [18], the results of clock simulation of a chaotic circuit operating at a frequency of 5.3 GHz are presented.

When comparing our design of the regional RNG with the previous one given in [15], we experimentally verified that for the same chaotic generator, the data transfer rate of the RNG method given in [15] was 1634 bits per 100,000 units of normalized time, and the data rate of the regional sequence S _xor was 7719 bits per 100,000 units of normalized time. In addition, the bit sequence obtained by the RNG method described in [15] can pass the complete set of Diehard tests with von Neumann processing only, and the approximate bit sequence given on the website http://www.esat.kuleuven.ac. be / ~ mey / Ds2RbG / Ds2RbG.html, does not pass the tests for block frequency, sequences and approximate entropy of the full test set of the National Institute of Standards and Technology (USA).

Table 3 The results of the test set of the National Institute of Standards and Technology (USA) for the regional RNG STATISTICAL TESTS S _xor bit sequence Minimum Pass Rates Test 0.9807 Frequency Test 0.9819 Block Frequency Test 0.9819 Cumulative Sums Test 0.9833 Sequence Test (Runs) 0,9924 Test the longest sequence (Longest Run) 0.9838 Rank Test 0,9914 Fast Fourier Transform Test (FFT) 1,0000 Nonperiodic Templates Test 0.9844 Overlapping Templates Test 0.9838 Universal test (Universal) 1,0000 Approximate Entropy Test (Apen) 0.9885 Random Excursions Test 1,0000 Random Excursions Variant Test 1,0000 Sequential Test (Serial) 0.9890 Linear Complexity Test 0.9828

In conclusion, we experimentally verified that if the main frequency of the chaotic generator is 7.234 kHz and without von Neumann processing, the data rate of the regional bit sequence S _xor is 1820 bits / sec. Considering that the core of the proposed RNG in the IS uses a chaotic generator with continuous time with a fundamental frequency, for example, 40 MHz, the data transfer rates of the regional RNG can probably be increased to 10 Mbit / s. In conclusion, we can conclude that the use of chaos with continuous time with the proposed innovations is very promising for generating random numbers with very high and constant data rates without further processing.

15. RANDOM NUMBERS GENERATED ON CHAOS WITH CONTINUOUS TIME

Despite the fact that the use of chaotic mappings with discrete time for the implementation of the RNG has been well known for some time, it has only recently been shown that chaotic generators with continuous time can also be used to implement the RNG. Following in this direction, we investigated the efficiency of the proposed chaotic generators as the core of the RNG.

Although many chaotic generators are described in the scientific and technical literature, only a few of them are designed with attention to issues of high-performance ICs, such as low energy consumption, high-frequency operation, and the ability to work at low voltage levels. In this work, we present simple non-autonomous chaotic generators that are suitable for implementing highly efficient ICs.

First, we obtained random data from the one-dimensional stroboscopic Poincare map of the proposed chaotic systems and numerically verified that after dividing the map into regions according to the distribution, the bit streams generated by the RNG constructed on the proposed schemes passed four basic random number tests from the federal standard test set for information processing (USA) FIPS-140-2. In addition, we experimentally verified that binary data obtained from chaotic schemes pass the tests of the full set of tests of the National Institute of Standards and Technology (USA) to measure the quality of a set of random numbers.

16. SUGGESTED GENERATORS

The proposed bipolar chaotic generator is presented in Fig.29. If the parasitic capacitance arising between the collectors of bipolar transistors and the ground, designate C _p , a conventional analysis of the circuit gives the following equations of state:

where i ₃ = i _R -i _L and ν _p (t) is the external periodic sequence of pulses, defined as ν _p (t) = sgn (sinΩt), and V _T is the thermal voltage (V _T = kT / q), at room temperature equal to 25.8 mV.

, х=ν₁/V_s, y=i₃R₀/V_s, z=ν₂/V_s, с₀=I₀R₀/V_s, α=R₀/R_p, β=R₀/R,

и принимая V_p=0,5V_s=V_T и t_n=t/RC, где V_s - произвольное напряжение масштабирования, уравнения системы в формуле (20) преобразуются следующим образом:Using normalized values:

, x = ν ₁ / V _s , y = i ₃ R ₀ / V _s , z = ν ₂ / V _s , s ₀ = I ₀ R ₀ / V _s , α = R ₀ / R _p , β = R ₀ / R,

and taking V _p = 0.5V _s = V _T and t _n = t / RC, where V _s is an arbitrary scaling voltage, the system equations in formula (20) are transformed as follows:

The equations in formula (21) generate chaos for an excellent set of parameters. For example, the chaotic attractor shown in Fig. 30 is obtained from a numerical analysis of the system with c ₀ = 25, α = 4, β = 12, ω = 0.27, ε = 0.3 using the 4th-order Runge algorithm Kutta with adaptive stride size.

The proposed chaotic generator on CMOS structures is presented in Fig. 31. The pairs of transistors T ₃ -T ₄ and T ₅ -T ₆ are used to implement simple current mirrors, where the ratio of the currents of the mirrors is designated as K. If the parasitic capacitance arising between the gates of the pair of transistors T ₁ -T ₂ and ground, denote C _p , normal analysis of the circuit gives the following equations (22):

,

и W/L -отношение ширины канала к его длине для пары транзисторов T₁-Т₂.where i ₃ = i _R -i _L , ν _p (t) = sgn (sinΩt),

,

and W / L is the ratio of the channel width to its length for a pair of transistors T ₁ -T ₂ .

, х=ν_G1/V_s, y=i₃R₀/V_s, z=ν_G2/V_s, с₀=2I₀R₀/V_s, α=R₀/R_p, β=R₀/R, b₀=R₀βV_s/2,

и принимая V_p=0,5V_s и t_n=t/RC, где V_s - произвольное напряжение масштабирования, уравнения системы в формуле (22) преобразуются следующим образом:Using normalized values:

, x = ν _G1 / V _s , y = i ₃ R ₀ / V _s , z = ν _G2 / V _s , s ₀ = 2I ₀ R ₀ / V _s , α = R ₀ / R _p , β = R ₀ / R, b ₀ = R ₀ βV _s / 2,

and assuming V _p = 0.5V _s and t _n = t / RC, where V _s is an arbitrary scaling voltage, the system equations in formula (22) are transformed as follows:

The equations in formula (23) generate chaos for an excellent set of parameters. For example, the chaotic attractor shown in Fig. 32 is obtained from a numerical analysis of the system with c ₀ = 1.5, α = 2.67, β = 3.38, ω = 0.33, b ₀ = 0.9, ε = 0.1 using the 4th order Runge-Kutta algorithm with adaptive step size.

The proposed chaotic generators have some significant advantages over existing generators. To ensure the required non-linearity, both circuits use a differential pair, which, due to its high characteristics, is the most widely used analog building block. The resistors used in these circuits are very small and therefore can be effectively implemented in the IC. In addition, the proposed chaotic generators are balanced; therefore, they provide better noise suppression and noise immunity. Finally, the external source used to drive the circuits is a periodic sequence of pulses, which can be accurately and easily implemented using the synchronization signal already in the chip.

17. CHAOS GENERATION MECHANISM

It is known that to show the presence of horseshoes in almost Hamiltonian forced plane dissipative systems, one can use Melnikov's conditions. According to the Smale-Birkhoff theorem, for a given plane perturbed nonlinear system of the form

,

,

where f and g are smooth functions, and g is periodic in time with a period T _γ if the following conditions are satisfied:

1. For µ = 0, the system is Hamiltonian and has a homoclinic orbit passing through a saddle-shaped critical point.

2. For μ = 0, the system has one family of parameters of periodic orbits θ _γ (t) with period T _γ , on the inside of the homoclinic orbit with ∂θ _γ (0) / ∂γ ≠ 0

3. For t ₀ ∈ [0, T], the Melnikov function

has simple zeros,

then the system has chaotic movements and horseshoes.

It is easy to verify that for ε = 0 (parasitic capacitances are taken negligibly small), the system in formula (21) can be written as follows:

where x _p (t) = sgn (sin (ωt)), a = c ₀ / (α + β) and μ = 1 / (α + β). In this case, one can easily verify that the unperturbed system obtained at μ = 0 has a saddle-shaped critical point in the source for α> 1. In addition, the unperturbed system is Hamiltonian and has a homoclinic orbit passing through the critical point. After replacing the non-smooth function x _p (t) = sgn (sin (ωt)) with its smooth approximation x _p (t) = tanh (10sin (ωt)), we numerically calculated the Melnikov function given in formula (25):

in the homoclinic orbit of formula (24) shown in the upper right corner in FIG. As shown in FIG. 33, we checked that for t ₀ ∈ [0, T], the Melnikov function has simple zeros, and the system according to formula (24) has chaotic motions and horseshoes. The results of a numerical analysis of the system show that for nonzero and small values of ε the system remains chaotic. For example, the largest Lyapunov exponent of the system is determined to be 0.9 at ε = 0.27.

18. RANDOM BITS GENERATION

In order to obtain random binary data from an autonomous chaotic system, an interesting method is proposed based on the generation of irreversible binary data from a signal of a given chaotic system. It should be noted that the main characteristic for generating pseudorandom numbers is irreversibility.

To obtain random bits from the proposed chaotic attractors, we used stroboscopic Poincare maps of chaotic systems according to formulas (21) and (23). It should be noted that although the 2-dimensional Poincare section in the x-y plane is reversible, an irreversible map can also be obtained, taking into account the values corresponding to only one of the states, say, x.

First, we examined the distribution of x values in the Poincaré map over one period of the external periodic impulse signal to determine suitable mappings where the distributions look like random signals. Although we could not find mappings whose x values have a single normal or X ² distribution, we determined suitable Poincare sections where the distribution x has at least two regions. For this bipolar system, the Poincaré map at ωtmod2π = 0.30 and the corresponding distribution are shown in Fig. 34 and Fig. 35, respectively. Like a bipolar system, the Poincaré map at ωtmod2π = 0.55 and the corresponding distribution are shown in Fig. 36 and Fig. 37, respectively, for a CMOS system.

The distribution of x, which has two regions, has led us to the idea of generating random binary data from regional values of x for regional thresholds. Following in this direction, we generated binary data S _{(top) i} and S _{(bottom) i} from the Poincare section according to formula (26):

where sgn (.) is the sign function, x _i are the values of x in the Poincare section, q _top and q _bottom are the thresholds for the upper and lower distributions, respectively, and q _middle is the boundary between the distributions. In order to be able to choose the thresholds appropriately, we examined the upper and lower distributions, as shown in Fig. 35 and Fig. 37. Then, for the bipolar system, q _top and q _bottom were defined as the medians of the upper and lower distributions, which were -0.593 and -2.183, respectively, when q _middle was defined as -1.394. Like the bipolar system, for the CMOS system, q _top and q _bottom were defined as the medians of the upper and lower distributions, which were 0.549 and -1.576, respectively, when, q _middle was defined as -0.610.

The generation of the binary sequence obtained in this way does not depend so much on the q _middle value, since the distribution density x is minimal for this boundary value. However, for threshold values (q _top , q _bottom ), the distribution density x is maximum, so the resulting binary sequence can be biased. In order to remove an unknown bias in this sequence, the well-known von Neumann alignment method can be used. This method consists in converting a pair of bits 01 to output 0, 10 to output 1 and to exclude pairs of bits 00 and 11.

Using the aforementioned method, bit sequences (S _top and S _bottom ) were obtained with a length of 240,000 for both the bipolar and CMOS systems, which were subjected to four tests (single-bit, poker, sequences and a long sequence) from the test set of the Federal Information Processing Standard ( USA) FIPS-140-2. We verified that these bit sequences pass these tests at given threshold values with a tolerance of ± 0.03.

In order to eliminate this bias, instead of von Neumann processing, we used another method - operation ⊗ (exclusive OR). A potential problem with the exclusive OR method is that a small amount of correlation between the input bits will give the output a significant offset. We calculated the correlation coefficient of the generated binary sequences S _top and S _bottom with a length of 32000 equal to approximately 0.00011 and determined that the generated binary sequences are independent. In accordance with this result, we generated new binary data S _{(xor) i} using the above formula (27):

The average value ψ of the binary sequence S _xor obtained in this way can be calculated using the above formula (28):

where the average value of S _top = µ, and the average value of S _bottom = ν. Thus, if µ and ν are close to ½, then ψ is very close to ½. As a result, we numerically verified that, for both the bipolar and the CMOS systems, the S _xor bit sequences that were obtained for the corresponding threshold values, in accordance with the procedure given in formula (27), passed tests from the test set of the Federal Standard for information processing (USA) FIPS-140-2 without von Neumann processing. We called random number generation (S _top , S _bottom , S _xor ) according to the aforementioned methodology “regional RNG”.

19. EXPERIMENTAL CHECK

Due to the lack of access to suitable manufacturing equipment, we decided to fabricate the proposed chaotic generator circuits using discrete components to demonstrate the feasibility of these circuits. Both the bipolar and CMOS circuits were biased by a ± 5 V power supply, and an external signal ν _p (t) was generated by a square-wave generator.

The values of the passive components of the bipolar generator were as follows: L = 10 mH, C = 10 nF, R = 180 Ohm, R _p = 120 Ohm and I ₀ = 1.2 mA. In FIG. 29, bipolar transistors and a current source designated I ₀ and implemented using a simple current mirror were implemented on arrays of npn transistors and pnp transistors CA3046 and CA3096. The amplitude ν _p (t) was 26 mV. We experimentally verified that the proposed bipolar scheme has chaotic motions at the following frequencies ν _p (t): 5.95 kHz, 6.23 kHz, 7.12 kHz, 13.03 kHz, 14.48 kHz, 14.91 kHz , 17.07 kHz, 17.23 kHz, 18.08 kHz.

The values of the passive components of the generator on the CMOS structures were as follows: L = 10 mH, C = 10 nF, R = 340 Ohm, R _p = 430 Ohm and I ₀ = 0.5 mA. On Fig CMOS transistors and the current source, denoted by I ₀ and implemented using a simple current mirror, were implemented on the matrices of CMOS transistors LM4007. The amplitude ν _p (t) was 383 mV. We experimentally verified that the proposed CMOS-based circuit has chaotic motions at the following frequencies ν _p (t): 5.95 kHz, 10 kHz, 11.1 kHz, 12.6 kHz.

For a bipolar generator and a generator on CMOS structures, the frequency ν _p (t) was adjusted to a low frequency value of 5.95 kHz in order to avoid the influence of parasitic capacitances on the circuit. The observed attractors are shown in Fig. 38 and Fig. 39 for a bipolar generator and a generator on CMOS structures, respectively.

20. SALES OF HARDWARE RNG

We generated random bits over regions from the stroboscopic Poincare maps of the proposed chaotic generators.

20.1 REGIONAL RNG

At the regional RNG, in order to obtain an irreversible mapping, only variables x of the Poincare section were used. The voltage ν ₁ corresponding to the variable x was converted into binary sequences according to the procedure described in section 18. In order to implement this method, the circuit shown in Fig. 40 was used. In this scheme, the comparators were implemented on LM311 chips, and voltage levels V _top , V _middle, and V _bottom, respectively, were used to implement thresholds in formula (26). When implemented, formula (26) and formula (27) are converted to the following:

To download binary data to a computer, hardware was developed based on a matrix of logical elements with operational programming having an interface of peripheral devices. At a set point in time during the period of the external periodic sequence of pulses ν _p (t), the output bit stream of the comparators was sampled and stored in binary format. The Von Neumann processing for S _top and S _bottom and the exclusive OR operation for the S _xor sequence were also implemented in the matrix of logical elements with operational programming. After the von Neumann processing and the “exclusive OR” operation, random numbers - the candidates were downloaded to the computer through the interface of peripheral devices. The maximum data storage speed of our hardware based on a matrix of logical elements with operational programming is 62 Mbit / s.

Using the technique described in Section 18, we investigated the distribution of ν ₁ for one period of ν _p (t). As a result, the distribution ν ₁ obtained 46 μs after the rising edges ν _p (t) for the bipolar scheme and the distribution ν ₁ obtained 35 μs before the rising edges ν _p (t) for the circuit on CMOS structures are shown in Fig. 41 and Fig. 42, respectively.

In order to be able to determine the thresholds appropriately, like generating numerical bits, we investigated the upper and lower distributions of the bipolar circuit and the CMOS circuit. Then, for the bipolar system, V _top and V _bottom were defined as the medians of the upper and lower distributions, which were 103 mV and -287 mV, respectively, and V _middle was defined as -107 mV. Like the bipolar circuit, for the circuit on CMOS structures, V _top and V _bottom were defined as the medians of the upper and lower distributions, which were 999 mV and -217 mV, respectively, and V _middle was defined as 560 mV.

Then, at the corresponding threshold values, from the bipolar chaotic scheme and the chaotic scheme on CMOS structures, bit streams S _top , S _bottom, and S _xor of 2 Gbit length were obtained. The received bits were subjected to a complete test set of the National Institute of Standards and Technology (USA). As a result, we experimentally verified that the S _top and S _bottom bit sequences thus obtained pass the tests of the full test set of the National Institute of Standards and Technology (USA) after von Neumann processing, and that the S _xor bit sequence generated by the S bit sequences _top and S _bottom , passes the tests of the full test suite of the National Institute of Standards and Technology (USA) without von Neumann processing. The test results related to the degrees of passage of the chaotic scheme on CMOS structures are shown in Table 4.

Assuming that the upper and lower distributions have approximately the same density, the bit rates of the sequences S _top and S _bottom are equal to half the external periodic pulse sequence. As explained in Section 18, von Neumann processing generates approximately 1 bit out of 4. At a frequency of ν _p (t) 5.95 kHz, the data rates of the sequences S _top and S _bottom decrease to (5.95 kHz / 2/4) 743 bit / s, and the data rate of the S _xor sequence effectively becomes (5.95 kHz / 2) 2975 bit / s.

Above are two continuous-time chaotic generators - bipolar and CMOS structures, acceptable for implementation on IC, and GISCH based on these generators. The numerical and experimental results presented in this section not only confirm the techno-economic feasibility of the proposed schemes, but also stimulate their use as a GISCH core on highly efficient ICs. In conclusion, we experimentally verified that if the frequency of the external periodic pulse signal is set to 5.95 kHz, the data transfer rates of the regional sequences and the output sequence S _xor are 743 bps after von Neumann processing and 2975 bps without von Neumann processing accordingly.

Table 4 STATISTICAL TESTS Bit sequences S _top S _bottom S _xor Frequency Test 0.9957 1,0000 0.9881 Block Frequency Test 0.9829 0.9831 0.9890 Cumulative Sums Test 0.9957 1,0000 0.9885 Sequence Test (Runs) 0.9573 0.9718 0,9919 Test the longest sequence (Longest Run) 0.9829 0.9831 0.9847 Rank Test 0,9915 0.9774 0,9909 Fast Fourier Transform Test (FFT) 1,0000 1,0000 0,9995 Nonperiodic Templates Test 0.9846 0.9845 0.9852 Overlapping Templates Test 0,9915 0,9944 0.9847 Universal test (Universal) 1,0000 1,0000 1,0000 Approximate Entropy Test (Apen) 0.9444 0.9322 0.9840 Random Excursions Test 0,9925 0.9877 1,0000 Random Excursions Variant Test 0.9856 0.9869 1,0000 Sequential Test (Serial) 0.9893 0,9915 0.9897 Lempel ziv 1,0000 1,0000 1,0000 Linear Complexity Test 1,0000 0.9718 0.9785

Explanations for the drawings

Figure 1. A method of amplifying a noise source.

Figure 2. Distribution x ₁ .

Figure 3. Regional random number generation through the use of periodic samples.

Figure 4. Regional generation of random numbers from a one-dimensional cross section obtained by transitions from other states.

Figure 5. Regional random number generation from a one-dimensional cross section of a non-autonomous chaotic generator obtained on the rising front ν _p (t).

6. Frequency spectrum ν ₁ .

7. Autonomous chaotic generator on MOS structures.

Fig. 8. Results of a numerical analysis of a chaotic generator.

Fig.9. A chaotic attractor from modeling a post-layout scheme.

Figure 10. The histogram x ₁ obtained at ωtmod2π = 0.

11. Experimental results of a chaotic generator.

Fig. 12. The histogram ν ₁ obtained on the rising front ν _p (t).

Fig.13. Frequency spectrum ν ₁ .

Fig.14. Results of a numerical analysis of a chaotic generator.

Fig.15. The histogram x obtained at ωtmod2π = 0 (ω = 1 = 2).

Fig.16. Implementation of a two-turn attractor circuit.

Fig.17. Experimental results of a chaotic generator.

Fig. 18. Regional random number generation using a chaotic generator.

Fig.19. The histogram ν ₁ obtained on the rising front ν _p (t).

Fig.20. Frequency spectrum ν ₁ .

Fig.21. Shift compensation effect for V _top .

Fig.22. Results of a numerical analysis of a chaotic generator.

Fig.23. The Poincare section for a chaotic system defined as z (t) = 0.

Fig.24. The histogram x obtained at z (t) = 0.

Fig.25. Implementation of a two-turn attractor circuit.

Fig.26. Experimental results of a chaotic generator.

Fig.27. Regional random number generation using a chaotic generator.

Fig.28. The histogram v ₁ obtained for ν ₃ (t) = 0 for dν3 / dt> 0.

Fig.29. Suggested bipolar generator.

Fig.30. Results of numerical analysis of a bipolar generator.

Fig.31. The proposed generator on CMOS structures.

Fig. 32. Results of numerical analysis of a generator on CMOS structures.

Fig. 33. Zeros of the Melnikov function calculated in the homoclinic orbit shown in the upper right corner.

Fig. 34. The Poincare map of the bipolar system with ωtmod2π = 0.30.

Fig. 35. The histogram x obtained from the bipolar system at ωtmod2π = 0.30.

Fig. 36. The Poincaré map of a CMOS system with ωtmod2π = 0.55.

Fig.37. The histogram x obtained from the CMOS system at ωtmod2π = 0.55.

Fig. 38. Experimental results of a bipolar chaotic generator.

Fig. 39. Experimental results of a chaotic generator on CMOS structures.

Fig.40. Regional random number generation using only the proposed chaotic generator.

Fig. 41. The histogram ν ₁ , obtained after 46 μs after the rising edges ν _p (t), for the bipolar scheme.

Fig. 42. The histogram ν ₁ , obtained 35 μs before the rising edges ν _p (t), for a circuit on CMOS structures.

Claims (17)

1. A method of generating random bits, which is based on a random generator with continuous time and on the generation of irreversible random bits in areas in accordance with the distribution from one of the states corresponding to one of the signals of the chaotic generator, comprising the following stages:
but. the stage at which irreversible suitable sections are determined, where the distribution of the samples has two regions, given the samples belonging to only one of the states, say, x ₁ , which corresponds to v ₁ , by
i. determining an appropriate set of parameters of normalized quantities, where the sample of states x ₁ from a one-dimensional cross section, which is obtained upon transition from another state (x ₂ , x ₃ , ... or x _n ) defined as x _{2 ... n} (t) = x _{2 ... n} (0) with dx _{2 ... n} / dt> 0 or dx _{2 ... n} / dt <0, have two regions, or
ii. fitting suitable values x _{2 ... n} (0) that correspond to v _{2 ... n} (0), where the samples of states x _{1 are} from a one-dimensional cross section, which is obtained upon transition from another state (x ₂ , x ₃ , _... or x _n ), defined as x _{2 ... n} (t) = x _{2 ... n} (0) with dx _{2 ... n} / dt> 0 or dx _{2 ... n} / dt <0, have two regions, or
iii. determining an appropriate set of parameters of normalized quantities, where periodic samples of the state x ₁ , which are obtained on the rising or falling edges of an external periodic pulse signal, that is, at times t satisfying the condition ωtmod2π = t ₀ (ω is the frequency of the pulse signal), , or
iv. fitting a suitable t ₀ , where periodic samples of the state x ₁ , which are received on the rising or falling edges of an external periodic pulse signal, that is, at times t satisfying the condition ωtmod2π = t ₀ (ω is the frequency of the pulse signal), have two regions, or
v. determining an appropriate set of parameters of normalized values, where state samples x ₁ from a one-dimensional cross section, which are obtained at the rising or falling edges of a periodic pulse signal (at time t satisfying the condition ωtmod2π = t ₀ , where ω is the frequency of the pulse signal, and 0≤t ₀ ≤1), which are used to excite a non-autonomous chaotic generator, have two areas, or
vi. fitting a suitable t ₀ , where samples of states x ₁ from a one-dimensional cross section, which are obtained at the rising or falling edges of an external periodic pulse signal (at time t satisfying the condition ωtmod2π = t ₀ , where ω is the frequency of the pulse signal, and 0≤t ₀ ≤1), which is used to excite a non-autonomous chaotic generator, have two areas;
b. the stage at which random binary sequences S ( _top ) _i and S ( _bottom ) _i are generated from the regional values x _1i ,
which are obtained from a suitable section according to claim 1a for regional thresholds according to the following formula:
S _{(top) i} = sgn (x _1i -q _top ) if x _1i ≥q _middle
S _{(bottom) i} = sgn (x _1i -q _bottom ), if x _li <q _middle ,
where sgn (.) is the sign function, q _top and q _bottom are the thresholds for the upper and lower distributions, respectively, whose initial values are medians, and q _middle is the boundary between the distributions;
c. the stage at which shift compensation is performed for the thresholds q _top and q _bottom according to claim 1b by implementing a one-bit test;
d. the stage at which frequency adjustment is carried out for the sampling frequency x ₁ by implementing a sequence test to avoid sampling x ₁ with a margin in frequency;
e. the stage at which binary data S _{(xor) i} is generated using the binary sequences S _{(top) i} and S _{(bottom) i} according to claim 1b according to the following formula:
S ( _xor ) i = S ( _top ) _i (Exor) S ( _bottom ) _i ,
where an exclusive OR operation is used to eliminate bias so as not to degrade performance. 2. The method according to claim 1, in which the used state x ₁ may be another state x ₂ , x ₃ , _... or x _n . 3. The method according to claim 1, wherein the single-bit test is a single-bit test selected from a set of statistical tests FIPS-140-1, FIPS-140-2, or NIST 800-22. 4. The method according to claim 1, wherein the sequence test is a sequence test selected from a set of statistical tests FIPS-140-1, FIPS-140-2, or NIST 800-22. 5. A method for generating random bits (S ( _xor ) _i ) over regions according to a distribution based on an autonomous chaotic generator with continuous time, comprising the following steps:
but. the stage at which irreversible suitable sections are determined, where the distribution of the samples has two regions, given the samples belonging to only one of the states, say x ₁ , which corresponds to v ₁ , by
i. determining an appropriate set of parameters of normalized quantities, where the sample of states x ₁ from a one-dimensional cross section, which is obtained upon transition from another state (x ₂ , x ₃ , _... or x _n ), defined as x _{2 ... n} (t) = x _{2 ... n} (0) with dx _{2 ... n} / dt> 0 or dx _{2 ... n} / dt <0, have two regions, or
ii. fitting suitable values x _{2 ... n} (0) that correspond to v _{2 ... n} (0), where the samples of states x _{1 are} from a one-dimensional cross section, which is obtained upon transition from another state (x ₂ , x ₃ , _... or x _n ), defined as x _{2 ... n} (t) = x _{2 ... n} (0) with dx _{2 ... n} / dt> 0 or dx _{2 ... n} / dt <0, have two area, or
iii. determining an appropriate set of parameters of normalized quantities, where periodic samples of the state x ₁ , x _{2 ...} or x _n , which are received at the rising or falling edges of an external periodic pulse signal, that is, at times t satisfying the condition ωtmod2π = t ₀ (ω - pulse signal frequency), have two areas, or
iv. fitting a suitable t ₀ , where periodic samples of the state x ₁ , x _{2 ...} or x _n , which are received at the rising or falling edges of an external periodic pulse signal, that is, at times t satisfying the condition ωtmod2π = t ₀ (ω is the frequency pulse signal), have two areas;
b. the stage at which random binary sequences S ( _top ) _i and S ( _bottom ) _i are generated from regional values x _1i , which are obtained from a suitable section according to claim 5a for regional thresholds using the following formula:
S _{(top) i} = sgn (x _1i -q _top ) if x _1i ≥q _middle
S _{(bottom) i} = sgn (x _1i -q _bottom ), if x _1i <q _middle ,
where sgn (.) is the sign function, q _top and q _bottom are the thresholds for the upper and lower distributions, respectively, whose initial values are medians, and q _middle is the boundary between the distributions;
c. the stage at which shift compensation is carried out for the thresholds q _top and q _bottom according to claim 5b by implementing a one-bit test;
d. the stage at which frequency adjustment is carried out for the sampling frequency x ₁ by implementing a sequence test to avoid sampling x ₁ with a margin in frequency;
e. the stage at which binary data S ( _xor ) _i is generated using the binary sequences S ( _top ) _i and S ( _bottom ) _i according to claim 5b according to the following formula:
S ( _xor ) i = S ( _top ) _i (Exor) S ( _bottom ) _i ,
where an exclusive OR operation is used to eliminate bias so as not to degrade performance. 6. The method according to claim 5, in which the used state x ₁ mentioned in paragraphs 1 and 2, may be another state x ₂ , x ₃ , ... or x _n . 7. The method according to claim 5, in which the one-bit test is a one-bit test selected from a set of statistical tests FIPS-140-1, FIPS-140-2 or NIST 800-22. 8. The method according to claim 5, in which the sequence test is a sequence test selected from a set of statistical tests FIPS-140-1, FIPS-140-2 or NIST 800-22. 9. A device for generating irreversible random bits over regions according to the distribution, based on an autonomous or non-autonomous chaotic generator with continuous time, consisting of:
a. three comparators for generating regional binary sequences S ( _top ) _i and S ( _bottom ) _i using thresholds V _top , V _bottom, and V _middle from the signal of a chaotic generator with continuous time v ₁ that corresponds to x ₁ , which has two regions;
b. a generator of periodic pulse signals and two delay triggers (D-trigger) for periodically sampling regional binary sequences S ( _top ) _i and S ( _bottom ) _i ;
c. two blocks of one-bit test (one-bit test) and two digital-to-analog converters (DACs) for generating and compensating thresholds V _top and V _bottom , corresponding to q _top and q _bottom used for the upper and lower distributions, respectively;
d. a sequence test block (sequence test) and a preliminary frequency divider block (frequency divider) for correcting a sampling frequency v ₁ that corresponds to x ₁ ;
e. an exclusive OR (XOR) logic element to eliminate bias and generate random binary data S _{(xor) i} using the binary sequences S _{(top) i} and S _{(bottom) i} . 10. The device according to claim 9, in which the single-bit test is a single-bit test selected from a set of statistical tests FIPS-140-1, FIPS-140-2 or NIST 800-22. 11. The device according to claim 9, in which the sequence test is a sequence test selected from a set of statistical tests FIPS-140-1, FIPS-140-2 or NIST 800-22. 12. A device for generating random bits over regions according to the distribution, based on an autonomous or non-autonomous chaotic generator with continuous time, consisting of:
a. three comparators for generating regional binary sequences S _{(top) i} and S _{(bottom) i} using thresholds V _top , V _bottom, and V _middle from the signal of a chaotic generator with continuous time v ₁ that corresponds to x ₁ , which has two regions;
b. two delay triggers (D-trigger) and another comparator for discretization of regional binary sequences S _{(top) i} and S _{(bottom) i} from a one-dimensional cross-section v ₁ , which corresponds to x ₁ obtained when the state of another signal (v ₂ , v ₃ , _... or v _n ), which corresponds to another state (x ₂ , x ₃ , _... or x _n ), defined as v _{2 ... n} (t) = v _{2 ... n} (0), which corresponds to x _{2 ... n} (t) = x _{2 ... n} (0) with dx _{2 ... n} / dt> 0 or dx _{2 ... n} / dt <0;
c. two blocks of one-bit test (one-bit test) and two digital-to-analog converters (DACs) for generating and compensating thresholds V _top and V _bottom , corresponding to q _top and q _bottom , used for the upper and lower distributions, respectively;
d. a sequence test block (sequence test) and a preliminary frequency divider block (frequency divider) for correcting a sampling frequency v ₁ that corresponds to x ₁ ;
e. an exclusive OR element (XOR) to eliminate bias and generate random binary data S ( _xor ) _i using binary sequences S ( _top ) _i and S ( _bottom ) _i . 13. The device according to item 12, in which the single-bit test is a single-bit test selected from a set of statistical tests FIPS-140-1, FIPS-140-2 or NIST 800-22. 14. The device according to item 12, in which the sequence test is a sequence test selected from a set of statistical tests FIPS-140-1, FIPS-140-2 or NIST 800-22. 15. A device for generating irreversible random bits over regions according to the distribution, based on a non-autonomous chaotic generator with continuous time, consisting of:
a. three comparators for generating regional binary sequences S ( _top ) _i and S ( _bottom ) _i using thresholds V _top , V _bottom and V _middle from the signal of a non-autonomous chaotic generator v ₁ that corresponds to x ₁ , which has two regions;
b. a generator of periodic pulsed signals (v _p (t)), which is used to excite a non-autonomous chaotic generator; delay unit (delay) for setting the corresponding t ₀ ; and two delay triggers (D-trigger) for discretization of regional binary sequences S ( _top ) _i and S ( _bottom ) _i ;
c. two blocks of one-bit test (one-bit test) and two digital-to-analog converters (DACs) for generating and compensating thresholds V _top and V _bottom , corresponding to q _top and q _bottom , used for the upper and lower distributions, respectively;
d. a sequence test block (sequence test) and a preliminary frequency divider block (frequency divider) for correcting a sampling frequency v ₁ that corresponds to x ₁ ;
e. an exclusive OR element (XOR) to eliminate bias and generate random binary data S _{(xor) i} using binary sequences S _{(top) i} and S _{(bottom) i} . 16. The device according to clause 15, in which the one-bit test is a one-bit test selected from a set of statistical tests FIPS-140-1, FIPS-140-2 or NIST 800-22. 17. The device according to clause 15, in which the sequence test is a sequence test selected from a set of statistical tests FIPS-140-1, FIPS-140-2 or NIST 800-22.

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