CN114156840A

CN114156840A - Current protection circuit and totem-pole PFC circuit

Info

Publication number: CN114156840A
Application number: CN202111657269.3A
Authority: CN
Inventors: 孟祥翰
Original assignee: Shenzhen Huntkey Electric Co Ltd
Current assignee: Shenzhen Huntkey Electric Co Ltd
Priority date: 2021-12-31
Filing date: 2021-12-31
Publication date: 2022-03-08

Abstract

The invention discloses a current protection circuit, which is applied to a totem-pole PFC circuit and comprises: the sampling circuit is connected with a switching tube of the totem-pole PFC circuit to collect the working current of the switching tube; the comparison circuit is connected with the sampling circuit and is used for comparing the working voltage corresponding to the working current with the threshold voltage; the first feedback adjusting circuit is connected between the comparison circuit and a control chip of the totem pole PFC circuit and is used for outputting a protection reporting signal to the control chip when the working voltage is greater than the threshold voltage so as to trigger the control chip to interrupt; and the second feedback regulating circuit is connected with the comparison circuit so as to pull down the driving signal of the switching tube of the totem-pole PFC circuit when the working voltage is greater than the threshold voltage so as to close the switching tube. The current protection circuit can not only realize the rapid turn-off of the driving signal when the current is over-current, but also realize the function of reporting the protection state. A totem pole PFC circuit is also disclosed.

Description

Current protection circuit and totem-pole PFC circuit

Technical Field

The invention relates to the technical field of circuits, in particular to a current protection circuit and a totem-pole PFC circuit.

Background

The totem pole power factor correcting circuit is a topology capable of realizing high efficiency and low electromagnetic interference, and consists of two switching tubes connected in series and two rectifying diodes connected in series. In recent years, to meet the requirement of high power density of power supplies, the switching frequency of totem-pole PFC tends to be high, so that the switching period of a power device becomes smaller and smaller, the current change rate becomes larger and larger, that is, the rise time of current becomes shorter and shorter. The traditional current protection circuit applied to the totem-pole bridgeless power factor correction circuit adopts a mode of controlling protection current by digital sampling, because a current sampling signal is transmitted to a control chip, and a comparator in the control chip judges whether the current level is greater than a threshold value or not, if so, a driving signal is switched off, the response period is longer, and in a high-frequency system, a plurality of switching periods are passed, so that the risk of current protection is avoided. In order to solve the problem, at present, people adopt a hardware protection circuit mode, that is, a current sampling signal passes through an amplifying circuit and then a comparator to judge whether the current is greater than a threshold value, if so, the drive is switched off, so the response period can be very fast, but only instantaneous current can be switched off, only one of two switching tubes is switched off, the circuit working condition is abnormal, a control chip cannot know the condition, the chip end still sends out the drive, the risk of sudden change of a control mode exists, and the system works abnormally easily.

Disclosure of Invention

The technical problem to be solved by the invention is to provide a current protection circuit and a totem-pole PFC circuit which can quickly turn off the drive and keep the control mode.

To solve the above technical problem, according to an aspect of the present invention, there is provided a current protection circuit applied to a totem-pole PFC circuit, the current protection circuit including:

the sampling circuit is connected with a switching tube of the totem-pole PFC circuit to collect the working current of the switching tube;

the comparison circuit is connected with the sampling circuit and is used for comparing the working voltage corresponding to the working current with the threshold voltage;

the first feedback adjusting circuit is connected between the comparison circuit and a control chip of the totem pole PFC circuit and is used for outputting a protection reporting signal to the control chip when the working voltage is greater than the threshold voltage so as to trigger the control chip to interrupt;

and the second feedback regulating circuit is connected with the comparison circuit so as to pull down the driving signal of the switching tube of the totem-pole PFC circuit when the working voltage is greater than the threshold voltage so as to close the switching tube.

The further technical scheme is as follows: the first feedback regulating circuit comprises a fourth NAND gate, one input end of the fourth NAND gate is connected with the comparison circuit, the other input end of the fourth NAND gate is connected with one output end of the control chip to receive the driving signal of the switching tube, and the output end of the fourth NAND gate is connected with one input end of the control chip.

The further technical scheme is as follows: the second feedback regulating circuit comprises a first NAND gate, a second NAND gate, a third NAND gate, a first AND gate and a second AND gate, wherein one input end of the first NAND gate is connected with the comparison circuit, the output end of the first NAND gate is connected with one input end of the second NAND gate, the other input end of the first NAND gate and the two input ends of the first AND gate are respectively connected with one output end of the control chip so as to respectively receive a main switching tube enable signal, a driving enable signal and a switching tube driving signal, the two input ends of the third NAND gate are respectively connected with the output ends of the second NAND gate and the first AND gate, the other input end of the second NAND gate is connected with the output end of the third NAND gate, the two input ends of the second AND gate are respectively connected with the output ends of the third NAND gate and the first AND gate, and the output end of the second AND gate is connected with the driving end of the switching tube of the totem-pole PFC circuit.

The further technical scheme is as follows: the comparator circuit comprises a comparator, the inverting input end of the comparator is connected with the sampling circuit through a third resistor, the non-inverting input end of the comparator is connected with one output end of the control chip to receive the threshold voltage, and the output end of the comparator is connected with the first feedback regulating circuit and the second feedback regulating circuit.

The further technical scheme is as follows: the comparator circuit further comprises a threshold value adjusting circuit, the threshold value adjusting circuit comprises a first capacitor, an adjustable resistor and a first resistor, the first capacitor and the adjustable resistor are connected between the comparator in-phase input end and the ground in parallel, and the comparator in-phase input end and the sampling circuit are connected to the two ends of the first resistor respectively.

The further technical scheme is as follows: the sampling circuit comprises a current transformer, a first diode, a second diode, a tenth resistor and an eleventh resistor, wherein two ends of the first diode and the second diode are connected with the secondary side of the current transformer after being connected in series in the reverse direction, the tenth resistor and the eleventh resistor are connected between the secondary sides of the current transformer in parallel, one end of the tenth resistor and one end of the eleventh resistor are connected with a comparison circuit, and the primary side of the current transformer is connected with a totem-pole PFC circuit.

In order to solve the above technical problem, according to an aspect of the present invention, a totem-pole PFC circuit is further provided, which includes a third diode, a fourth diode, a first switching tube, a second switching tube, a control chip, and two of the above current protection circuits, where the control chip is connected to the current protection circuit, an anode of the third diode is connected to a cathode of the fourth diode and is connected to an ac power supply, a cathode of the third diode and a drain of the first switching tube are connected to a sampling circuit of one of the current protection circuits, a source of the first switching tube and a drain of the second switching tube are connected to a sampling circuit of another one of the current protection circuits and are connected to the ac power supply, gates of the first switching tube and the second switching tube are respectively connected to a second feedback regulating circuit of one of the current protection circuits, and a cathode of the fourth diode and a source of the second switching tube are grounded.

The invention has the beneficial technical effects that: compared with the prior art, the invention compares the working voltage corresponding to the collected working current of the switching tube with the threshold voltage through the comparison circuit, triggers protection when the working voltage is greater than the threshold voltage, namely, when overcurrent occurs, namely, when overcurrent occurs, the driving signal of the switching tube of the totem pole PFC circuit is pulled down through the second feedback adjusting circuit so as to close the switching tube, meanwhile, the first feedback regulating circuit outputs a protection reporting signal to the control chip to trigger the control chip to interrupt and control the working state of a synchronous switching tube in the totem-pole PFC circuit to be kept unchanged, therefore, the current protection circuit of the invention not only can realize the rapid cut-off of the driving signal when the current is over-current, meanwhile, the function of reporting the protection state can be realized, the jump of the current PFC control mode caused by the fluctuation of the PFC output voltage due to current protection is avoided, and deeper protection can be formed.

Drawings

Fig. 1 is a block diagram of a current protection circuit according to an embodiment of the present invention.

Fig. 2 is a circuit diagram of a current protection circuit according to an embodiment of the invention.

Fig. 3 is a circuit diagram of a totem-pole PFC circuit according to an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, wherein like reference numerals represent like elements in the drawings. It is apparent that the embodiments to be described below are only a part of the embodiments of the present invention, and not all of them. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1, the current protection circuit of the present invention is used for overcurrent protection of a totem-pole PFC circuit, and includes a sampling circuit 10, a comparison circuit 20, a first feedback regulation circuit 30, and a second feedback regulation circuit 40, where the sampling circuit 10 is connected to a switching tube of the totem-pole PFC circuit to collect a working current of the switching tube and output the working current in a voltage form; the comparison circuit 20 is connected with the sampling circuit 10, and is configured to receive a working voltage V corresponding to the acquired working current of the switching tube, and compare the working voltage V with a threshold voltage U0; the first feedback regulating circuit 30 is connected between the comparison circuit 20 and the control chip of the totem pole PFC circuit, so as to output a protection reporting signal P to the control chip when the working voltage V is greater than the threshold voltage U0, so as to trigger the control chip to interrupt; the second feedback adjusting circuit 40 is connected to the comparing circuit 20, so as to pull down the driving signal of the main switch tube of the totem-pole PFC circuit when the working voltage V is greater than the threshold voltage U0, that is, in this embodiment, the pull-down signal may be output to the driving end of the switch tube of the totem-pole PFC circuit, so as to turn off the switch tube. Preferably, in this embodiment, the second feedback regulating circuit 40 may further output a normal operation signal to the driving terminal of the switching tube of the totem-pole PFC circuit when the operation voltage V is not greater than the threshold voltage U0, so that the switching tube operates normally. Based on the above design, when the working voltage V is greater than the threshold voltage U0, i.e. when overcurrent occurs, the protection is triggered, i.e. when overcurrent occurs, the second feedback regulating circuit 40 outputs a pull-down signal to the driving end of the totem-pole PFC circuit switching tube to turn off the switching tube, and simultaneously the first feedback regulating circuit 30 outputs a protection reporting signal P to the control chip to trigger the control chip to interrupt, so that the working state of another switching tube in the totem-pole PFC circuit, i.e. the synchronous switching tube, remains unchanged.

Referring to fig. 2, in the embodiment shown in the drawing, the first feedback regulating circuit 30 and the second feedback regulating circuit 40 may be constructed by using digital logic gates, where the first feedback regulating circuit 30 includes a fourth nand gate G4, one input end of the fourth nand gate G4 is connected to the comparing circuit 20, the other input end of the fourth nand gate G4 is connected to one output end of the control chip to receive the switching tube driving signal PWM1, and the output end of the fourth nand gate G4 is connected to one input end of the control chip. Based on the design, when the working voltage V is greater than the threshold voltage U0, the comparison circuit 20 outputs a high level, the switching tube driving signal PWM1 is a high level, and the protection reporting signal P with a low level is output to the control chip through the fourth nand gate G4, so that the protection reporting signal P generates a falling edge at this time, and the control chip is triggered to interrupt.

In some embodiments, the second feedback regulating circuit 40 includes a first nand gate G1, a second nand gate G2, a third nand gate G3, a first and gate G5, and a second and gate G6, an input of the first nand gate G1 is connected to the comparing circuit 20, an output is connected to an input of the second nand gate G2, another input of the first nand gate G1 and two inputs of the first and gate G5 are respectively connected to an output of the control chip to respectively receive the main switch enable signal E1, the driving enable signal E2, and the switch driving signal PWM1, two inputs of the third nand gate G3 are respectively connected to outputs of the second nand gate G2 and the first and gate G5, another input of the second nand gate G2 is connected to an output of the third nand gate G3, two inputs of the second and gate G6 are respectively connected to outputs of the third and gate G3 and the first and gate G5, and the output end of the output end is connected with the driving end of the totem-pole PFC circuit switch tube, preferably, the output end can be connected with the driving end of the totem-pole PFC circuit switch tube through a driving amplifying circuit so as to avoid the situation that the driving capability of the voltage output by the second feedback regulating circuit 40 built by the logic gate is insufficient. Based on the above design, when the operating voltage V is greater than the threshold voltage U0, the comparison circuit 20 outputs a high level, at this time, the main switching tube enable signal E1 is a high level, and outputs a low level after passing through the first nand gate G1 together with the high level output by the comparison circuit 20, and the low level outputs a high level after passing through the second nand gate G2; the driving enable signal E2 is high level when working normally, and the switching tube driving signal PWM1 is high level, two high levels output high level after passing through the first and gate G5, then the third nand gate G3 outputs low level, the low level is used as an input of the second nand gate G2, to realize state latch, and the low level output by the third nand gate G3 and the high level output by the first and gate G5 output low level after passing through the second and gate G6, then the switching tube driving signal PWM1 is pulled low at this time, to turn off the switching tube for timely protection, and keep the turn-off state until the end of the switching period; understandably, when the on-time of the switching period of the switching tube is over, namely the switching tube driving signal PWM1 is at low level, the high level is output through the third nand gate G3, the state reset is realized, and the switching tube driving signal PWM1 enters the off-time, the state setting can be realized by the output end of the third nand gate G3 and the input end of the second and gate G6, and the normal operation of the next switching period is not influenced.

In this embodiment, the comparator circuit 20 includes a comparator U1, the inverting input Vi-of the comparator U1 is connected to the sampling circuit 10 through a third resistor R3, the non-inverting input Vi + thereof is connected to an output of the control chip to receive the threshold voltage U0, and the output of the comparator U1 is connected to the first feedback regulating circuit 30 and the second feedback regulating circuit 40. Further, the comparison circuit 20 further includes a threshold adjustment circuit 50, the threshold adjustment circuit 50 includes a first capacitor C1, an adjustable resistor R2 and a first resistor R1, the first capacitor C1 and the adjustable resistor R2 are connected in parallel between the non-inverting input Vi + of the comparator U1 and the ground, and two ends of the first resistor R1 are respectively connected to the non-inverting input Vi + of the comparator U1 and the sampling circuit 10. Preferably, in this embodiment, the comparison circuit 20 further includes a second capacitor C2, one end of the second capacitor C2 is connected to the inverting input Vi ", the other end is grounded, the positive power pin of the comparator U1 is connected to VCC, the positive power pin is connected to the output end of the comparator U1 through a fourth resistor R4, and the negative power pin of the comparator U1 is grounded. Based on the design, after the threshold voltage U0 is subjected to voltage regulation and filtering through the first resistor R1, the adjustable resistor R2 and the first capacitor C1, the threshold voltage is adjustable, the working voltage V is subjected to slight filtering through the third resistor R3 and the second capacitor C2, after the burrs are eliminated, the working voltage V is compared with the threshold voltage U0 through the comparator U1, and then the working voltage V is output.

In some embodiments, the sampling circuit 10 includes a current transformer S, a first diode D3, a second diode D4, a tenth resistor R5, and an eleventh resistor R6, the first diode D3 and the second diode D4 are connected in series in an opposite direction, and then both ends of the first diode D3 and the second diode D4 are connected to the secondary side of the current transformer S, the tenth resistor R5 and the eleventh resistor R6 are connected in parallel between the secondary side of the current transformer S, one end of the tenth resistor R5 and one end of the eleventh resistor R6 are connected to the comparison circuit 20, and the primary side of the current transformer S is connected to the totem PFC circuit.

Referring to fig. 3, fig. 3 is a circuit diagram of a totem-pole PFC circuit according to an embodiment of the present invention. In the embodiment shown in the drawing, the totem pole PFC circuit includes a third diode D1, a fourth diode D2, a first switch tube Q1, a second switch tube Q2, a control chip U10 and two current protection circuits described in the above embodiments, and as can be seen from the above embodiments, each of the current protection circuits includes a sampling circuit 10 connected to the first switch tube Q1/the second switch tube Q2, a comparison circuit 20 connected to the sampling circuit 10, and a first feedback adjustment circuit 30 and a second feedback adjustment circuit 40 connected to the comparison circuit 20, so as to output a protection reporting signal P to the control chip U10 through the first feedback adjustment circuit 30 when the operating voltage V is greater than the threshold voltage U0, so as to trigger the control chip U10 to interrupt; meanwhile, the second feedback regulating circuit 40 outputs a pull-down signal to the driving terminals of the first switch tube Q1/the second switch tube Q2 to turn off the first switch tube Q1/the second switch tube Q2; the anode of the third diode D1 is connected to the cathode of the fourth diode D2 and to the AC power supply AC, the cathode of the third diode D1 and the drain of the first switching tube Q1 are connected to the sampling circuit 10 of one current protection circuit, the source of the first switching tube Q1 and the drain of the second switching tube Q2 are connected to the sampling circuit 10 of the other current protection circuit and to the AC power supply AC, the gates of the first switching tube Q1 and the second switching tube Q2 are connected to the second feedback adjustment circuit 40 of the one current protection circuit, respectively, and the cathode of the fourth diode D2 and the source of the second switching tube Q2 are grounded.

Understandably, the specific circuit structures of the two current protection circuits are the same, and fig. 3 omits a part of pins of the comparison circuit 20, the first feedback regulation circuit 30, the second feedback regulation circuit 40 and the control chip U10 in one of the current protection circuits, specifically, as shown in fig. 3, in the present embodiment, the sampling circuit 10 in one current protection circuit includes a current transformer S1, a first diode D10, a second diode D11, a tenth resistor R10 and an eleventh resistor R11, wherein the comparison circuit 20 in the current protection circuit is connected to one end of the tenth resistor R10 and one end of the eleventh resistor R11, and the primary side of the current transformer S1 is connected to the cathode of the third diode D1 and the drain of the first switching tube Q1; the sampling circuit 10 in another current protection circuit includes a current transformer S2, a first diode D20, a second diode D21, a tenth resistor R20, and an eleventh resistor R21, wherein the comparison circuit 20 in the current protection circuit is connected to one end of the tenth resistor R20 and one end of the eleventh resistor R21, and the current transformer S2 is connected to the source of the first switch Q1 and the drain of the second switch Q2 at the primary side.

Preferably, in this embodiment, the control chip U10 is a DSP, the pins GPIO0 EPWM1A and CPIO1EPWM1B are respectively connected to the first and gate G5 of a current protection circuit to respectively output the switch driving signal PWM1 to the two current protection circuits, the pins GPIO28 EPWM7A and GPIO29 EPWM7B are respectively connected to a current protection circuit, the main switch enable signal E1 is respectively output to the first NAND gate G1 of the two current protection circuits, the pin GPIO8 is connected with the first AND gate G5 to output the driving enable signal E2, the pin GPIO9 outputs the threshold voltage U0, the pins GPIO10 and GPIO11 respectively receive the protection report signals P respectively output by the fourth NAND gate G4 of the two current protection circuits, the signal PWM2 output by a current protection circuit shown in fig. 3 is preferably output to the gate of the first switch Q1 after passing through a driving amplifier circuit, and the input of the gate of the second switch Q2 is the output signal PWM22 of another current protection circuit (not shown in the partial circuit diagram) which is input after passing through the driving amplifier circuit.

As is well known, a totem-pole PFC is one of bridgeless mode active PFCs, and when a voltage current input from an ac input terminal is a positive half cycle, a first switching tube Q1 is a main switching tube, and a second switching tube Q2 is a synchronous switching tube; when the voltage and current input by the ac input terminal is a negative half cycle, the second switching tube Q2 is a main switching tube, and the first switching tube Q1 is a synchronous switching tube.

Understandably, the totem pole PFC circuit of the present invention is driven normally and the drive enable signal E2 is enabled when the first switch Q1 is the main switch, that is, the work is in the positive half cycle of the ac input terminal, at this time, the control chip U10 enables the protection circuit, the current transformer S1 in the sampling circuit 10 samples the working instantaneous current of the totem pole PFC in real time and converts the current into the working voltage V1 through the resistor, and then inputs the working voltage V1 to the comparator U1 to compare with the threshold voltage U0, if the working voltage V1 is less than the threshold voltage U0, the protection state is not required, and if the working voltage V1 is greater than the threshold voltage U0, the protection state is turned on, the first switch Q1 is turned off, and the off state is maintained until the switching cycle is over. When the protection state is started, two processes are synchronously performed, one process is to drive the main switch tube to be closed, and the first switch tube Q1 is switched off; the other is to inform the control chip U10 of the protection state, and lock the current control mode, that is, the driving signal PWM1 of the main switching tube is normally output, and at the same time, the driving output signal Q2 of the synchronous switching tube is also normal, so that the current PFC control mode jump is not affected by the PFC output voltage fluctuation caused by current protection, and deeper protection is caused, so that the device or even the system is damaged due to the failure of protection. Similarly, when the second switching transistor Q2 is the main switching transistor, i.e. the ac input terminal operates in a negative half cycle, the protection principle is the same as above.

Specifically, the working process of the totem-pole PFC circuit of the present invention is described with reference to a specific circuit structure of the current protection circuit:

the following description takes the ac input terminal as a positive half cycle as an example: when the alternating current input end works in a positive half cycle, the first switch tube Q1 is a main switch tube, the second switch tube Q2 is a synchronous switch tube, the threshold voltage U0 is subjected to voltage regulation and filtering through a first resistor R1, an adjustable resistor R2 and a first capacitor C1, the value of the threshold voltage U0 can be adjusted, the working voltage V1 is subjected to filtering through a third resistor R3 and a second capacitor C2 and then is output after being compared with the threshold voltage U0 input through a comparator U1, if the working voltage V1 is greater than the threshold voltage U0, a protection state is triggered, the comparator U1 outputs a high level, the main switch tube enable signal E1 is a high level, on the one hand, the high level output by the comparator U1 and the main switch tube enable signal E1 output a low level after passing through a first NAND gate G1, the low level outputs a high level through a second NAND gate G2, the high level outputs the high level when the drive enable signal E2 works normally, and the switch tube drive signal PWM1 is also high level, the two high levels pass through the first and gate G5 and then output a high level, because the second nand gate G2 and the first and gate G5 both output a high level, the third nand gate G3 outputs a low level, and the low level is used as an input of the second nand gate G2, so as to realize state latching, and the low level output by the third nand gate G3 and the PWM2 output by the first and gate G5 after passing through the second and gate G6 are low levels, so that a switch tube driving signal of the totem pole PFC circuit can be pulled down, and the first switch tube Q1 is closed, so as to perform timely protection; on the other hand, when the protection reporting signal P is at a high level during normal operation, but after the protection state is triggered, the high level output by the comparator U1 and the switching tube driving signal PWM1 (high level) pass through the fourth nand gate G4 together to output a low level, at this time, the protection reporting signal P generates a falling edge, and triggers the control chip U10 to interrupt, thereby completing state reporting; when the on time of the switching period is over, the switching tube driving signal PWM1 is at low level, and is output as high level after passing through the third nand gate G3, so that the state reset can be realized.

It should be understood that if the protection is not triggered, that is, the output of the comparator U1 is low, and the output of the comparator U1 is high after passing through the first nand gate G1, and in the normal operating state, the driving enable signal E2 is high, and passes through the first and gate G5 together with the switching tube driving signal PWM1, and the output level of the first and gate G5 is higher or lower than the output level of the switching tube driving signal PWM 1. In a normal state, the switching tube driving signal PWM1 is at a low level first, at this time, the first and gate G5 outputs a low level, and outputs a high level through the third nand gate G3, at this time, the point outputs a set, and simultaneously outputs a low level through the second and gate G6 together with the low level output by the first and gate G5, which means that the signal input to the driving end of the switching tube, i.e., the level of the PWM2 is consistent with the level of the switching tube driving signal PWM1, and because the third nand gate G3 outputs a high level, one input end of the second and gate G6 is set all the time, the high level is in phase with the switching tube driving signal PWM1, the level of the output signal is determined by the switching tube driving signal PWM1, i.e., the normal operation is performed when the protection is not triggered; in addition, in this case, the comparator U1 outputs a low level together with the switching tube driving signal PWM1 and outputs a high level after passing through the fourth nand gate G4, and at this time, no protection state is reported, and the control chip U10 operates normally. Similarly, the working principle and working process when the input of the ac input terminal is a negative half cycle are similar to those of the above-mentioned working in a positive half cycle, and are not described herein again.

In summary, when an overcurrent occurs, the second feedback regulating circuit pulls down the driving signal of the switching tube of the totem pole PFC circuit to turn off the switching tube, meanwhile, the first feedback regulating circuit outputs a protection reporting signal to the control chip to trigger the control chip to be interrupted and control the working state of a synchronous switching tube in the totem-pole PFC circuit to be kept unchanged, so that the invention not only can realize the rapid turn-off of the driving signal due to overcurrent of current, meanwhile, the abnormal condition is reported to the control chip quickly in a mode of pulse falling edge interruption, the jump of the current PFC control mode is prevented from being influenced by the fluctuation of the PFC output voltage caused by current protection, the invention can form deeper protection, and the invention adopts the logic gate to build the first feedback regulating circuit and the second feedback regulating circuit, the logic gate circuit is very easy to integrate, and can be integrated in the control chip, thus greatly saving space.

The foregoing is considered as illustrative of the preferred embodiments of the invention and is not to be construed as limiting the invention in any way. Various equivalent changes and modifications can be made by those skilled in the art based on the above embodiments, and all equivalent changes and modifications within the scope of the claims should fall within the protection scope of the present invention.

Claims

1. A current protection circuit is applied to a totem-pole PFC circuit, and is characterized by comprising:

2. The current protection circuit of claim 1, wherein: the first feedback regulating circuit comprises a fourth NAND gate, one input end of the fourth NAND gate is connected with the comparison circuit, the other input end of the fourth NAND gate is connected with one output end of the control chip to receive the driving signal of the switching tube, and the output end of the fourth NAND gate is connected with one input end of the control chip.

3. The current protection circuit of claim 1, wherein: the second feedback regulating circuit comprises a first NAND gate, a second NAND gate, a third NAND gate, a first AND gate and a second AND gate, wherein one input end of the first NAND gate is connected with the comparison circuit, the output end of the first NAND gate is connected with one input end of the second NAND gate, the other input end of the first NAND gate and the two input ends of the first AND gate are respectively connected with one output end of the control chip so as to respectively receive a main switching tube enable signal, a driving enable signal and a switching tube driving signal, the two input ends of the third NAND gate are respectively connected with the output ends of the second NAND gate and the first AND gate, the other input end of the second NAND gate is connected with the output end of the third NAND gate, the two input ends of the second AND gate are respectively connected with the output ends of the third NAND gate and the first AND gate, and the output end of the second AND gate is connected with the driving end of the switching tube of the totem-pole PFC circuit.

4. The current protection circuit of claim 1, wherein: the comparator circuit comprises a comparator, the inverting input end of the comparator is connected with the sampling circuit through a third resistor, the non-inverting input end of the comparator is connected with one output end of the control chip to receive the threshold voltage, and the output end of the comparator is connected with the first feedback regulating circuit and the second feedback regulating circuit.

5. The current protection circuit of claim 4, wherein: the comparator circuit further comprises a threshold value adjusting circuit, the threshold value adjusting circuit comprises a first capacitor, an adjustable resistor and a first resistor, the first capacitor and the adjustable resistor are connected between the comparator in-phase input end and the ground in parallel, and the comparator in-phase input end and the sampling circuit are connected to the two ends of the first resistor respectively.

6. The current protection circuit of claim 1, wherein: the sampling circuit comprises a current transformer, a first diode, a second diode, a tenth resistor and an eleventh resistor, wherein two ends of the first diode and the second diode are connected with the secondary side of the current transformer after being connected in series in the reverse direction, the tenth resistor and the eleventh resistor are connected between the secondary sides of the current transformer in parallel, one end of the tenth resistor and one end of the eleventh resistor are connected with a comparison circuit, and the primary side of the current transformer is connected with a totem-pole PFC circuit.

7. A totem-pole PFC circuit is characterized in that: the current protection circuit comprises a third diode, a fourth diode, a first switch tube, a second switch tube, a control chip and two current protection circuits as claimed in any one of claims 1 to 6, wherein the control chip is connected with the current protection circuit, the anode of the third diode is connected with the cathode of the fourth diode and is connected with an alternating current power supply, the cathode of the third diode and the drain of the first switch tube are connected with a sampling circuit of one current protection circuit, the source of the first switch tube and the drain of the second switch tube are connected with a sampling circuit of the other current protection circuit and are connected with the alternating current power supply, the gates of the first switch tube and the second switch tube are respectively connected with a second feedback regulation circuit of one current protection circuit, and the cathode of the fourth diode and the source of the second switch tube are grounded.