CN114153692A - Ampere processor monitoring method and server - Google Patents
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- G—PHYSICS
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- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3024—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3051—Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3065—Monitoring arrangements determined by the means or processing involved in reporting the monitored data
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Abstract
The application discloses a monitoring method and a server of an ampere processor, which are applied to a CPLD and comprise the following steps: acquiring state signals sent by a plurality of state pins of an ampere processor; judging the working state of the ampere processor according to the plurality of state signals; and recording the working state in a working log so as to call the working log for comparison and analysis when a hardware error occurs in a system log of the ampere processor. According to the method and the device, the CPLD is used for monitoring the ampere processor, so that the working state of the ampere processor is recorded in a working log, the working log is convenient to check and call, and the problem that the log of the ampere processor originally does not mark detailed reasons to cause misunderstanding of a user is solved.
Description
Technical Field
The invention relates to the field of servers, in particular to a monitoring method of an ampere processor and a server.
Background
At present, the stability of the long-term operation of the server is an important index of the server, once the server fails and cannot be timely and effectively processed, the server is shut down, so that accidents such as service interruption and data loss are caused, and serious loss is brought to users. The operating state of the server is recorded through Demsg and messages logs under an Ampere platform server system, so that the server is helped to know the problems of the server and recover the health state as soon as possible.
However, currently an ampere processor, a new processor recently developed, has the following logic: except that a power off or reboot command is normally input under the system to execute shutdown or reboot, shutdown or reboot of the system caused by other reasons is recorded as unbow rebot in a Hardware Error form related to BERT (Boot Error Table) in a demosg and messages log, and detailed reasons of the unbow rebot are not listed, so that a user is easy to erroneously estimate the urgency and importance of the unbow rebot when the user is unfamiliar with an ampere processor, and the user is panic.
Therefore, how to provide a solution to the above technical problems is a problem to be solved by those skilled in the art.
Disclosure of Invention
In view of the above, the present invention provides a method for monitoring an ampere processor and a server thereof, which can clarify the state of the processor and eliminate the misunderstanding of the user. The specific scheme is as follows:
a monitoring method of an ampere processor, which is applied to a CPLD, comprises the following steps:
acquiring state signals sent by a plurality of state pins of an ampere processor;
judging the working state of the ampere processor according to the plurality of state signals;
and recording the working state in a working log so as to call the working log for comparison and analysis when a hardware error occurs in a system log of the ampere processor.
Preferably, the monitoring method further includes:
acquiring state signals sent by state pins of other equipment;
judging the working state of the corresponding equipment according to each state signal;
and recording all the working states in the working log.
Preferably, the device comprises a power-on key, and/or a PSU voltage monitoring module, and/or a BMC.
Preferably, the status pins of the power-on key include a current status pin and a trigger status pin, and the operating status of the power-on key includes: shutdown state, trigger startup state, and forced shutdown state.
Preferably, the status pin of the BMC includes: the BMC comprises a starting key pin, a reset key pin and a shutdown key pin, wherein the working state of the BMC comprises: normal state, control mainboard shutdown state, control mainboard reset state and control mainboard startup state.
Preferably, the process of recording the working state in a work log so as to call the work log for comparison and analysis when a hardware error occurs in a system log of the ampere processor includes:
and recording the working state in a working log at the moment of calling the clock module, and storing the working log in a memory so as to call the working log for comparison and analysis when a hardware error occurs in a system log of the ampere processor.
Preferably, the status pins of the ampere processor include an over-temperature early warning pin, a high-temperature early warning pin, an error warning pin, a shutdown signal pin and a restart signal pin, and the operating status of the ampere processor includes: a restart state, a shutdown state, an abnormal warning state, a high temperature early warning state and an overtemperature early warning state.
Correspondingly, the application also discloses a server, including:
an ampere processor;
a CPLD for performing the method of monitoring an ampere processor as claimed in any one of the preceding claims.
Preferably, the server further includes: and other devices monitored by the CPLD comprise a starting button, and/or a PSU voltage monitoring module, and/or a BMC.
Preferably, the server further includes:
the clock module is used for providing time for the CPLD;
and the memory is used for storing the work logs.
The application discloses a monitoring method of an ampere processor, which is applied to a CPLD and comprises the following steps: acquiring state signals sent by a plurality of state pins of an ampere processor; judging the working state of the ampere processor according to the plurality of state signals; and recording the working state in a working log so as to call the working log for comparison and analysis when a hardware error occurs in a system log of the ampere processor. According to the method and the device, the CPLD is used for monitoring the ampere processor, so that the working state of the ampere processor is recorded in a working log, the working log is convenient to check and call, and the problem that the log of the ampere processor originally does not mark detailed reasons to cause misunderstanding of a user is solved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a flow chart illustrating the steps of a method for monitoring an ampere processor in accordance with an embodiment of the present invention;
fig. 2 is a structural distribution diagram of a CPLD and multiple devices connected according to an embodiment of the present invention;
fig. 3a is a structural distribution diagram of a PSU voltage monitoring module according to an embodiment of the present invention;
fig. 3b is a voltage relationship diagram of a PSU voltage monitoring module according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The current ampere processor is a novel recently developed processor, except that a power off or reboot command is normally input under a system to execute shutdown or reboot, system shutdown or reboot caused by other reasons is recorded as an unbowed rebot in a Hardware Error Hardware Error form related to BERT in Demsg and messages logs, detailed reasons of the unbowed rebot cannot be listed, and a user is easy to mistakenly estimate the emergency degree and importance of the unbowed rebot when being familiar with the ampere processor, so that the user is alarmed.
The ampere processor is monitored by a CPLD (Complex Programmable Logic Device), so that the working state of the ampere processor is recorded in a working log to be convenient to check and call, and the problem that the user misunderstands because the original log of the ampere processor does not mark detailed reasons is solved.
The embodiment of the invention discloses a monitoring method of an ampere processor, which is applied to a CPLD (complex programmable logic device), and is shown in figure 1, and comprises the following steps:
s1: acquiring state signals sent by a plurality of state pins of an ampere processor;
s2: judging the working state of the ampere processor according to the plurality of state signals;
it is understood that the status pin of the ampere processor includes at least: OVER-temperature early warning pin OVER _ TEMP _ n, HIGH-temperature early warning pin HIGH _ TEMP _ n, error warning pin FAULT _ ALERT, shutdown signal pin shut down _ ACK, and restart signal pin REBOOT _ ACK, and the operating state of the ampere processor at least includes: a restart state, a shutdown state, an abnormal warning state, a high temperature early warning state and an overtemperature early warning state. Specifically, as shown in Table 1,
TABLE 1 Ampere processor State Signal to operating State correspondence
As shown in the table, the plurality of status signals are written into the register in the form of a bit value in the character string R _ CPU _ D [4:0], if R _ CPU _ D [4:0] corresponding to all the current status signals is 11001, the working state of the current ampere processor can be judged to be a normal restart state; if R _ CPU _ D [4:0] corresponding to all the current state signals is 11010, the working state of the current ampere processor can be judged to be a normal shutdown state; if R _ CPU _ D [4:0] corresponding to all the current state signals is 11100, the working state of the current ampere processor can be judged to be an abnormal alarm state, and the ampere processor sends out an abnormal alarm; if R _ CPU _ D [4:0] corresponding to all the current state signals is 01000, the working state of the current ampere processor can be judged to be a high-temperature early warning state, and the ampere processor sends out a high-temperature early warning; if R _ CPU _ D [4:0] corresponding to all the current state signals is 10000 states, the current working state of the ampere processor can be judged to be an overtemperature early warning state, and the ampere processor sends out overtemperature early warning.
S3: and recording the working state in the working log so as to call the working log for comparison and analysis when a hardware error occurs in the system log of the ampere processor.
Further, the method comprises the following steps: and recording the working state in the working log at the moment of calling the clock module, and storing the working log in a memory so as to call the working log for comparison and analysis when a hardware error occurs in the system log of the ampere processor.
Specifically, the Ampere processor in this embodiment includes an Ampere platform Altra processor, which belongs to a platform core device, and the CPLD implementing the monitoring method in this embodiment may select a CPLD chip LCMXO2-7000HC-4FG484C from LATTIC corporation; the clock module can select a DS1339 real-time clock chip of MAXIM company, the real-time clock chip is an I2C (Inter-Integrated Circuit, two-wire serial bus) interface, and the CPLD can obtain the real-time on the clock module through an I2C bus; the memory can be an EEPROM (Electrically Erasable Programmable read only memory) with the model number of AT24C02, the storage capacity is 2Kbits, the AT24C02 supports the I2C bus data transmission protocol, and the CPLD can read and write the data of the EEPROM through the I2C bus for storing the server state information.
The application discloses a monitoring method of an ampere processor, which is applied to a CPLD and comprises the following steps: acquiring state signals sent by a plurality of state pins of an ampere processor; judging the working state of the ampere processor according to the plurality of state signals; and recording the working state in the working log so as to call the working log for comparison and analysis when a hardware error occurs in the system log of the ampere processor. According to the method and the device, the CPLD is used for monitoring the ampere processor, so that the working state of the ampere processor is recorded in a working log, the working log is convenient to check and call, and the problem that the log of the ampere processor originally does not mark detailed reasons to cause misunderstanding of a user is solved.
The embodiment of the invention discloses a specific ampere processor monitoring method, and compared with the previous embodiment, the embodiment further explains and optimizes the technical scheme. Specifically, besides the CPLD monitoring the ampere processor, the CPLD may also monitor the status of other devices on the server besides the ampere processor, and therefore, the monitoring method further includes:
acquiring state signals sent by state pins of other equipment;
judging the working state of the corresponding equipment according to each state signal;
all operating states are recorded in the working log.
Specifically, the device at least includes a Power button, and/or a Power Supply Unit (PSU) voltage monitoring module, and/or a Baseboard Management Controller (BMC).
Further, the connection of the CPLD to the status pins of each device can be referred to fig. 2.
The starting button can adopt an onboard tact switch for realizing the starting and the shutdown of the ampere processor, the specific starting or shutdown button duration is determined according to actual setting, and the shutdown can be selected as 4s long-time-pressing shutdown. The state pins of the starting-up key comprise a current state pin and a trigger state pin, and the working state of the starting-up key comprises: shutdown state, trigger startup state, and forced shutdown state. It is understood that all status signals of the same device will be recorded in the form of character strings, so that the current status signal of the power-on key is R _ BTN _ D1, the trigger status signal is R _ BTN _ D0, and the overall status signal corresponds to the character string R _ BTN _ D [1:0] in the register, and the corresponding relationship between the status signal and the operating status is shown in table 2.
TABLE 2 correspondence between status signals and operating status of power-on keys
Current state signal (R _ BTN _ D1) | Trigger state signal (R _ BTN _ D0) | Working state |
0 | 0 | Off state |
0 | 1 | Triggering a |
1 | 0 | Boot-up |
1 | 1 | Forced shutdown state |
Specifically, the PSU voltage monitoring module is mainly responsible for monitoring the voltage output state of the PSU power module, and the PSU voltage monitoring module sends a state signal of the PSU power module to the CPLD through the P12V _ ADR _ TRIGGER, where a high level is normal power supply, a low level is under-voltage, and the ampere processor cannot work after the voltage is lower than 3.3V. In this embodiment, the PSU voltage monitoring module may select a voltage monitoring chip TPS3700DCR of TI corporation, seeFIG. 3a shows the internal reference voltage VIT+400mV, INA + is the voltage input terminal connected to the PSU power module voltage output terminal P12V, and OUTA is the status pin P12V _ ADR _ TRIGGER. The voltage at the voltage output end of the PSU is divided by resistors, and when the output voltage of the voltage output end is more than 10.396V, 12 multiplied by 10 divided by (249.9+10)>0.4V, P12V _ ADR _ TRIGGER or OUTA is high level, 12X 10/10 (249.9+10) when the output voltage of the voltage output terminal is lower than 10.396V<0.4V, P12V _ ADR _ TRIGGER or OUTA is low, as shown in FIG. 3 b. It is understood that the above is only one judgment case under the parameter setting of fig. 3a, and the specific circuit parameter setting and judgment case can be adjusted and corrected according to the actual situation.
The BMC of this embodiment may adopt an ordinary scheme in the industry, for example, an ASPEED AST2500 management scheme. Specifically, the status pin of the BMC includes: the system comprises a startup key pin BMC _ PWRBTN _ OUT _ N, a reset key pin BMC _ SYSRST _ OUT _ N and a shutdown key pin BMC _ CPU0_ SHDREQ _ N, wherein corresponding state signals comprise a startup key signal R _ BMC _ D2, a reset key signal R _ BMC _ D1 and a shutdown key signal R _ BMC _ D0, the whole state signal corresponds to a character string R _ BMC _ D [2:0] and is positioned in a register, and the working state of BMC comprises the following steps: the corresponding relationship between the state signal and the working state is shown in table 3.
TABLE 3 corresponding relationship between the state signal and the operating state of BMC
Further, in this embodiment, after the Ampere platform server, that is, the server installed with the Ampere processor, is inserted into the PSU power module to supply power normally, the CPLD first monitors that the power supply voltage of the PSU voltage monitoring module is normal, and the P12V _ ADR _ TRIGGER transmits a high level to the CPLD. When the 220V AC power supply of the PSU power supply module is manually pulled out, the 12V output voltage of the PSU voltage monitoring module is triggered to be powered down, when the voltage drops to below 10.396V, the CPLD monitors that the P12V _ ADR _ TRIGGER is low level, the time when the CPLD reads the clock module and the low level state of the P12V _ ADR _ TRIGGER are stored in the EEPROM 3 and are recorded in a working log as a PSU power pulling event. When the server is in a normal startup state, a startup key is manually pressed for a long time to trigger a shutdown action, the CPLD reads the time of the clock module and the register state R _ BTN _ D [1:0] ═ 11 and stores the time and the register state R _ BTN _ D [1:0] into the EEPROM as an artificial manual forced shutdown event, and the artificial manual forced shutdown event is recorded in a working log. When the server is in a normal starting state, the CPLD monitors a plurality of state pins of the ampere processor, when the working state of the ampere processor is determined to be restart, shutdown, abnormal alarm, high-temperature early warning or overtemperature early warning according to the state signal, the CPLD reads the time of the clock module and stores the state of the R _ CPU _ D [4:0] register into the EEPROM memory as an ampere processor state event to be recorded in a working log, and simultaneously transmits the CPU state of the ampere processor to the BMC so that the BMC can check the CPU state in time. When the server is in a normal startup state, the CPLD monitors a plurality of signal states of BMC _ PWRBTN _ OUT _ N, BMC _ SYSRST _ OUT _ N, BMC _ CPU0_ SHDREQ _ N and the like of the BMC module, and when R _ BMC _ D [2:0] is in a state of 110/101/011, the CPLD reads the time of the clock module and stores the state of the R _ BMC _ D [2:0] register into the EEPROM memory, and the register is used as a BMC to control the startup, restart and shutdown events of the server to be recorded in a working log.
Therefore, the embodiment provides a series of event monitoring such as a PSU power-off event, a manual forced shutdown event, an Ampere processor state monitoring, a BMC control mainboard startup event, a restart event, a shutdown event and the like for the Ampere platform server, records and stores the operation actions and time of each device on the Ampere platform server, and can effectively explain the occurrence reasons of hardware error events in Demsg and messages in the Ampere platform server, thereby improving the robustness of the Ampere platform server in long-time work.
Correspondingly, an embodiment of the present application further discloses a server, as shown in fig. 2, including:
an ampere processor;
a CPLD for performing the method of monitoring an Ampere processor of any of the above embodiments.
Further, the server further includes: and other devices monitored by the CPLD comprise a starting button, and/or a PSU voltage monitoring module, and/or a BMC.
Preferably, the server further comprises:
the clock module is used for providing time for the CPLD;
and the memory is used for storing the work logs.
In the embodiment, a CPLD is used for monitoring a series of events such as a PSU power-off event, a manual forced shutdown event, an Ampere processor state monitoring event, a BMC control mainboard startup event, a restart event, a shutdown event and the like for the Ampere platform server.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing detailed description of the monitoring method and server for an ampere processor according to the present invention is provided, and the principle and the implementation of the present invention are described herein by using specific examples, and the description of the foregoing examples is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. A monitoring method of an ampere processor is applied to a CPLD and comprises the following steps:
acquiring state signals sent by a plurality of state pins of an ampere processor;
judging the working state of the ampere processor according to the plurality of state signals;
and recording the working state in a working log so as to call the working log for comparison and analysis when a hardware error occurs in a system log of the ampere processor.
2. The monitoring method of claim 1, further comprising:
acquiring state signals sent by state pins of other equipment;
judging the working state of the corresponding equipment according to each state signal;
and recording all the working states in the working log.
3. The monitoring method according to claim 2, wherein the device comprises a power-on button, and/or a PSU voltage monitoring module, and/or a BMC.
4. The monitoring method according to claim 3, wherein the status pins of the power-on key include a current status pin and a trigger status pin, and the operating status of the power-on key includes: shutdown state, trigger startup state, and forced shutdown state.
5. The monitoring method of claim 3, wherein the status pin of the BMC comprises: the BMC comprises a starting key pin, a reset key pin and a shutdown key pin, wherein the working state of the BMC comprises: normal state, control mainboard shutdown state, control mainboard reset state and control mainboard startup state.
6. The monitoring method according to any one of claims 1 to 5, wherein the process of recording the working state in a working log so as to call the working log for comparison and analysis when a hardware error occurs in a system log of the ampere processor comprises the following steps:
and recording the working state in a working log at the moment of calling the clock module, and storing the working log in a memory so as to call the working log for comparison and analysis when a hardware error occurs in a system log of the ampere processor.
7. The monitoring method according to claim 6, wherein the status pins of the ampere processor include an over-temperature warning pin, a high-temperature warning pin, an error warning pin, a shutdown signal pin and a restart signal pin, and the operating status of the ampere processor includes: a restart state, a shutdown state, an abnormal warning state, a high temperature early warning state and an overtemperature early warning state.
8. A server, comprising:
an ampere processor;
a CPLD for performing the method of monitoring an ampere processor according to any one of claims 1 to 7.
9. The server of claim 8, further comprising: and other devices monitored by the CPLD comprise a starting button, and/or a PSU voltage monitoring module, and/or a BMC.
10. The server of claim 8, further comprising:
the clock module is used for providing time for the CPLD;
and the memory is used for storing the work logs.
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