CN114141853A

CN114141853A - Display panel, manufacturing method and display device

Info

Publication number: CN114141853A
Application number: CN202111498911.8A
Authority: CN
Inventors: 朱健超
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2021-12-09
Filing date: 2021-12-09
Publication date: 2022-03-04

Abstract

The invention discloses a display panel, a manufacturing method and a display device. The display panel of one embodiment includes: a substrate; the pixel units are arranged on the substrate in an array mode, each pixel unit comprises a top emission pixel unit and a bottom emission pixel unit, and the top emission pixel unit comprises a top emission light-emitting element and a first driving circuit for driving the top emission light-emitting element to emit light; the bottom emission pixel unit comprises a bottom emission light-emitting element and a second driving circuit for driving the bottom emission light-emitting element to emit light, wherein the projection of the top emission pixel unit and the projection of the bottom emission pixel unit on the substrate do not overlap, and the projection of the top emission pixel unit on the substrate covers the projection of the first driving circuit and the second driving circuit on the substrate. The display panel provided by the embodiment of the invention can improve the double-sided display effect of the double-sided display device and effectively improve the display performance.

Description

Display panel, manufacturing method and display device

Technical Field

The invention relates to the technical field of display. And more particularly, to a display panel, a method of manufacturing the same, and a display device.

Background

With the progress of information transmission and the development of electronic products, research and development improvements are continuously made in aspects of response speed, resolution and image quality of organic light emitting display devices, and breakthroughs in functions or display modes are pursued. Therefore, double-sided display is also an important direction for the development of future display devices, can extend the picture space, broaden the visual field, quickly switch and process more works, and has great potential application value in the fields of advertisement display, video conferences and the like.

The OLED, i.e., an Organic Light-Emitting Diode (Organic Light-Emitting Diode), has characteristics of self-luminescence, high brightness, wide viewing angle, high contrast, flexibility, low power consumption, and the like, and thus has attracted much attention, and has begun to gradually replace a conventional LCD (Liquid Crystal Display) as a new generation of Display mode, and is widely applied to a mobile phone screen, a computer monitor, a full-color television, and the like. However, how to realize the OLED display device with double-sided display is a problem to be solved.

Disclosure of Invention

The present invention is directed to a display panel, a method for manufacturing the same, and a display device, so as to solve at least one of the problems in the prior art.

In order to achieve the purpose, the invention adopts the following technical scheme:

a first aspect of the present invention provides a display panel comprising:

a substrate;

pixel units arranged on the substrate in array, each of the pixel units including a top emission pixel unit and a bottom emission pixel unit, wherein

The top emission pixel unit comprises a top emission light emitting element and a first driving circuit for driving the top emission light emitting element to emit light;

the bottom emission pixel unit comprises a bottom emission light emitting element, a second drive circuit for driving the bottom emission light emitting element to emit light,

wherein projections of the top emission pixel unit and the bottom emission pixel unit on the substrate do not overlap, and the projection of the top emission pixel unit on the substrate covers projections of the first driving circuit and the second driving circuit on the substrate.

Further, the method also comprises the following steps:

a first scan line for supplying a scan signal to the first driving circuit and a first data line for supplying a data signal to the first driving circuit;

a second scan line for supplying a scan signal to the second driving circuit and a second data line for supplying a data signal;

wherein projections of the first scanning line, the first data line, the second scanning line and the second data line on the substrate do not overlap with projections of the bottom emission pixel unit on the substrate.

Further, each top emission pixel unit comprises a first red sub-pixel, a first green sub-pixel and a first blue sub-pixel;

each bottom emission pixel unit comprises a second red sub-pixel, a second green sub-pixel and a second blue sub-pixel;

the first driving circuit comprises a first driving TFT transistor, a second driving TFT transistor and a third driving TFT transistor which respectively correspond to the first red sub-pixel, the first green sub-pixel and the first blue sub-pixel;

the second driving circuit comprises a fourth driving TFT transistor, a fifth driving TFT transistor and a sixth driving TFT transistor which respectively correspond to the second red sub-pixel, the second green sub-pixel and the second blue sub-pixel;

the first scanning line comprises a first scanning sub-line, a second scanning sub-line and a third scanning sub-line which respectively provide scanning signals for the first driving TFT transistor, the second driving TFT transistor and the third driving TFT transistor;

the second scanning line comprises a fourth scanning sub-line, a fifth scanning sub-line and a sixth scanning sub-line which respectively provide scanning signals for the fourth driving TFT transistor, the fifth driving TFT transistor and the sixth driving TFT transistor;

the first sub-scanning line and the fourth sub-scanning line are the same scanning line, the second sub-scanning line and the fifth sub-scanning line are the same scanning line, and the third sub-scanning line and the sixth sub-scanning line are the same scanning line.

Further, in the scanning line direction, sub-pixels of the same color in adjacent top emission pixel units and bottom emission pixel units are adjacently disposed.

Further, the area of the first blue sub-pixel is larger than that of the first red sub-pixel or the first green sub-pixel;

the area of the second blue sub-pixel is larger than the area of the second red sub-pixel or the second green sub-pixel.

Further, the top emission light emitting element includes a first anode having a high reflectance with respect to the first cathode, a first light emitting layer, and a first cathode having a high transmittance with respect to the first anode.

Further, the first anode is a laminated structure formed of ITO, Ag, ITO, and the first cathode is a laminated structure formed of Mg and Ag.

Further, the bottom emission light emitting element includes a second anode having a high transmittance with respect to the second cathode, a second light emitting layer, and a second cathode having a high reflectance with respect to the second anode.

Further, the second anode is a laminated structure formed by ITO, Ag and ITO, wherein the thickness of the Ag material layer in the second anode is smaller than that of the Ag material layer in the first anode.

Further, the display panel further includes an auxiliary cathode disposed on the second cathode away from the substrate side, the auxiliary cathode having a higher reflectance than the second cathode.

Further, the display panel further includes:

and the light shielding layer is arranged in the top emission pixel unit, the light shielding layer is arranged between the film layer of the first driving circuit and the second driving circuit close to the substrate and the substrate, and the projection of the light shielding layer on the substrate covers the projection of the first driving circuit and the second driving circuit on the substrate.

A second aspect of the present invention provides a method of manufacturing the display panel of the first aspect of the present invention, the method comprising:

forming pixel units arranged in an array on a substrate, wherein each pixel unit comprises a top emission pixel unit and a bottom emission pixel unit

The top emission pixel unit is formed to include a top emission light emitting element, a first driving circuit driving the top emission light emitting element to emit light;

the bottom emission pixel unit is formed to include a bottom emission light emitting element, a second driving circuit driving the bottom emission light emitting element to emit light,

wherein the projections of the top emission pixel unit and the bottom emission pixel unit on the substrate do not overlap, and the projection of the top emission pixel unit on the substrate covers the projections of the first driving circuit and the second driving circuit on the substrate.

A third aspect of the invention provides a display device comprising a display panel as provided in the first aspect of the invention.

The invention has the following beneficial effects:

according to the technical scheme, the first drive circuit, the second drive circuit and the top emission pixel unit are set, so that the projection of the top emission pixel unit on the substrate covers the projection of the first drive circuit and the second drive circuit on the substrate, the influence of large-range distribution of the drive circuits on the display effect in the double-sided display technology can be reduced, the shielding of the second drive circuit on the bottom emission pixel unit can be avoided, the double-sided display effect of the double-sided display device is improved, the display performance is effectively improved, and the double-sided display device has a wide application prospect.

Drawings

The following describes embodiments of the present invention in further detail with reference to the accompanying drawings.

Fig. 1 shows a pixel arrangement in the prior art;

FIGS. 2a to 2c are schematic views illustrating routing layout of a pixel unit according to an embodiment of the invention;

FIG. 3 shows a schematic diagram of a pixel arrangement according to an embodiment of the invention;

FIG. 4 is a schematic diagram illustrating a layer structure of a display panel according to an embodiment of the present invention;

fig. 5 is a schematic diagram illustrating a distribution of light-shielding layers according to an embodiment of the present invention.

Detailed Description

It is further noted that, in the description of the present invention, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The OLED display device may be classified into a top emission type and a bottom emission type according to light emitting characteristics, and both the bottom emission type and the top emission type have light and thin characteristics. The related art disposes the OLEDs of the top emission type and the bottom emission type on the same substrate to form a dual-sided display device.

Fig. 1 shows a schematic arrangement of pixel units of a related art display device, and as shown in fig. 1, each of the pixel units 12 ' includes a top emission pixel unit 13 ' and a bottom emission pixel unit 14 ', thereby realizing dual emission.

The top emission pixel unit 13 'and the bottom emission pixel unit 14' acquire control signals through respective data lines and scan lines, respectively (not shown in the figure). In one specific example, scan lines that supply scan signals to the top emission pixel cells and the bottom emission pixel cells, respectively, are disposed in the lateral direction, and data lines that supply data signals to the top emission pixel cells and the bottom emission pixel cells, respectively, are disposed in the longitudinal direction.

Therefore, it can be imagined that after each bottom emission pixel unit and each top emission pixel unit in fig. 1 draw corresponding signal lines, the routing distribution in the arrangement structure of the pixel units shown in fig. 1 is very complicated, and the inventors found that, due to process reasons, the signal lines of the bottom emission pixel units can block the bottom emission pixel units, so that the display performance of the double-sided display is affected.

Based on the above findings and studies, the inventors propose a display panel, a manufacturing method, and a display device to solve the above problems.

As shown in fig. 2a, 3 and 4, a display panel 1 according to a first embodiment of the present invention includes:

a substrate 11;

pixel units 12 arrayed on the substrate, each of the pixel units 12 including a top emission pixel unit 13 and a bottom emission pixel unit 14, wherein

The top emission pixel unit 13 includes a top emission light emitting element 131, a first driving circuit 132 that drives the top emission light emitting element to emit light;

the bottom emission pixel unit 14 includes a bottom emission light emitting element 141, a second driving circuit 142 driving the bottom emission light emitting element to emit light,

wherein the projections of the top emission pixel unit 12 and the bottom emission pixel unit 13 on the substrate do not overlap, and the projection of the top emission pixel unit 12 on the substrate covers the projections of the first driving circuit 132 and the second driving circuit 142 on the substrate.

In this embodiment, through setting for the position relation between first drive circuit, second drive circuit and the top emission pixel unit, make the projection of top emission pixel unit on the base plate covers first drive circuit and second drive circuit are in projection on the base plate can enough reduce the influence of drive circuit's distribution on a large scale to the display effect in the two-sided display technology, can avoid second drive circuit to the sheltering from of end emission pixel unit again to improve two-sided display device's two-sided display effect, effectively improve display performance.

For example, as shown in fig. 2a, the light emitting direction of the top-emission pixel unit 13 is out of the paper, and the light emitting direction of the bottom-emission pixel unit 14 is in the paper, due to the process characteristics, the first driving circuit for driving the top-emission light-emitting element to emit light and the second driving circuit for driving the bottom-emission light-emitting element to emit light may be disposed in the same layer, while the second driving circuit formed in the prior art is disposed on the light emitting side of the bottom-emission light-emitting unit, so that the second driving circuit affects the light emitting effect of the bottom-emission light-emitting unit.

Therefore, in the present embodiment, the second driving circuit is reset, and the characteristic that the driving circuit arranged on the backlight side of the top emission pixel unit does not affect the light emission is utilized, the second driving circuit is arranged at the position of the top emission light emitting unit, that is, as shown in fig. 2a and fig. 3, at the projection position of the top emission pixel unit 14 on the substrate, not only the first driving circuit 132 for driving the top emission pixel unit 13 but also the second driving circuit 142 are arranged, and the projections of the top emission pixel unit 13 and the bottom emission pixel unit 14 on the substrate are not overlapped, so that the light emission side of the bottom emission pixel unit 14 is not shielded, so that the bottom emission pixel unit 14 can emit light without being affected, thereby effectively improving the double-sided display effect of the double-sided display device.

Fig. 2a shows a schematic structural diagram of a first driving circuit and a second driving circuit of the pixel arrangement structure of this embodiment, and in an alternative embodiment, the display panel further includes: a first scan line 1321 for providing a scan signal to the first driving circuit 132 and a first data line 1322 for providing a data signal; a second scan line 1421 for providing a scan signal to the second driving circuit 142 and a second data line 1422 for providing a data signal; the projections of the first scan line 1321, the first data line 1322, the second scan line 1421, and the second data line 1422 on the substrate do not overlap with the projection of the bottom emission pixel unit 14 on the substrate.

As shown in fig. 2A, the projections of the first scan line 1321, the first data line 1322, the second scan line 1421, and the second data line 1422 on the substrate do not overlap with the projection of the bottom-emission pixel unit 14 on the substrate, which is indicated as that the first scan line 1321, the first data line 1322, the second scan line 1421, and the second data line 1422 are not disposed at the projection position of the light-emitting side of the bottom-emission pixel unit 14, but disposed at the projection position of the top-emission pixel unit 13 on the substrate, as shown in fig. 4, since the light-emitting direction of the top-emission pixel unit 13 and the layer structure of the first driving transistor 132A of the first driving circuit are disposed away from each other, the above-mentioned signal lines do not affect the light-emitting effect of the top-emission pixel unit, and on this basis, not only the second driving circuit 142 does not affect the light-emitting effect of the bottom-emission pixel unit 14, furthermore, the second data line 1421 and the second scan line 1422 connected to the second driving circuit 142 do not shield the bottom emission pixel unit, so as to further improve the light emitting effect of the bottom emission light emitting unit, thereby effectively improving the double-sided display performance of the display panel.

In an alternative embodiment, as shown in fig. 3, each top-emitting pixel cell 13 includes a first red subpixel 133R, a first green subpixel 133G, and a first blue subpixel 133B. The first driving circuit 132 includes a first driving TFT transistor 132A, a second driving TFT transistor 132B, and a third driving TFT transistor 132C corresponding to the first red sub-pixel, the first green sub-pixel, and the first blue sub-pixel, respectively. The first scan line 1321 includes a first sub-scan line, a second sub-scan line, and a third sub-scan line that respectively supply scan signals to the first driving TFT transistor, the second driving TFT transistor, and the third driving TFT transistor.

Each bottom emission pixel unit 14 includes a second red sub-pixel 143R, a second green sub-pixel 143G, and a second blue sub-pixel 143B. The second driving circuit 142 includes a fourth driving TFT transistor 142E, a fifth driving TFT transistor 142F and a sixth driving TFT transistor 142G corresponding to the second red sub-pixel, the second green sub-pixel and the second blue sub-pixel, respectively. The second scan line 1421 includes a fourth sub-scan line, a fifth sub-scan line, and a sixth sub-scan line, which respectively provide scan signals for the fourth driving TFT transistor, the fifth driving TFT transistor, and the sixth driving TFT transistor.

In this embodiment, not only the first driving TFT transistor 132A, the second driving TFT transistor 132B and the third driving TFT transistor 132C of each top emission pixel unit 13 are located on the projection of the top emission pixel unit on the substrate, but also the positions of the fourth driving TFT transistor 142E, the fifth driving TFT transistor 142F and the sixth driving TFT transistor 142G of the bottom emission pixel unit 14 are moved, so that no driving TFT transistor is disposed at the projection of the bottom emission pixel unit 14 on the substrate, thereby further achieving a good display effect.

In an alternative embodiment, as shown in fig. 2b, the first sub-scanning line and the fourth sub-scanning line are the same scanning line, the second sub-scanning line and the fifth sub-scanning line are the same scanning line, and the third sub-scanning line and the sixth sub-scanning line are the same scanning line.

That is to say, in this embodiment, one sub-scanning line is used to provide scanning signals to the bottom emission pixel unit and the top emission pixel unit with the same color, for example, the six sub-scanning lines shown in fig. 2a are reduced to the three sub-scanning lines shown in fig. 2b, so that the number of the scanning lines is reduced, and on the basis of ensuring the normal driving of the display panel, the space required by the driving circuit can be saved, the aperture ratio of the bottom emission pixel unit can be further increased, and the display effect can be more effectively improved.

In another alternative embodiment, as shown in fig. 2c, the first sub-scanning line, the second sub-scanning line, the third sub-scanning line, the fourth sub-scanning line, the fifth sub-scanning line and the sixth sub-scanning line are all the same scanning line. In this embodiment, the present embodiment can reduce the six sub-scan lines shown in fig. 2a to one sub-scan line shown in fig. 2c, and further achieve the compression of the number of scan lines.

Those skilled in the art can select a corresponding scan line design manner according to a design in an actual application, for example, select the above-mentioned reduction of six sub-scan lines into three sub-scan lines, and also select the above-mentioned reduction of six sub-scan lines into one sub-scan line, and those skilled in the art can design according to the actual application, and details are not described herein.

In this embodiment, the number of data lines is not changed, for example, as shown in fig. 2a to 2c, the first data line 1322 of the top emission pixel unit includes a first sub data line, a second sub data line and a third sub data line respectively providing gray scale value information of each color sub pixel, and the second data line 1422 of the bottom emission pixel unit includes a fourth sub data line, a fifth sub data line and a sixth sub data line respectively providing gray scale value information of each color sub pixel. However, in the present embodiment, the position of the second data line of the bottom emission pixel unit is changed, and the second data line originally disposed at the light-emitting side position of the bottom emission pixel unit is moved from the position, for example, as shown in fig. 2a to 2c, the second data line 1422 may be moved to the projection position of the top emission pixel unit 14 on the substrate, that is, the first data line 1322 and the second data line 1422 are disposed at the projection position of the top emission pixel unit 14 on the substrate, so that the first data line 1322 and the second data line 1422 do not shield the bottom emission pixel unit 13, thereby further improving the double-sided display effect of the display panel.

In the above embodiments, the positions of the second driving circuits, for example, the positions of the plurality of driving TFT transistors (142E to 142G) of the bottom emission pixel unit, and the positions of the second scan line 1421 for providing the scan signal and the second data line 1422 for providing the data signal, are designed, so that the light emission of the bottom emission pixel unit is not affected.

In the conventional design, as shown in fig. 1, in the scanning line direction (row direction), the first red sub-pixel R, the first green sub-pixel G of the top emission pixel unit 13 ' and the second blue sub-pixel B ' of the bottom emission pixel unit 14 ' are sequentially arranged in the same row direction. In the scanning line direction of another row, the first blue sub-pixel B of the same top emission pixel unit 13 ', the second red sub-pixel R' of the bottom emission pixel unit 14 ', and the second blue sub-pixel B' are sequentially arranged in the same row direction. For the pixel arrangement structure, in the manufacturing process, each sub-pixel of the bottom emission pixel unit and each sub-pixel of the top emission pixel unit need to be formed through a mask process. For example, for one pixel unit, six sub-pixel openings are respectively formed in a mask, and the minimum distance between each sub-pixel is determined by the opening precision of the mask, which is generally 25mm, that is, as shown in fig. 1, the distance between the boundaries between adjacent sub-pixels is at least 25mm, the interval between adjacent sub-pixels is large, and the process precision limits the number of pixels arranged in the display device.

Based on the above problems, the embodiments of the present invention redesign the pixel arrangement structure of the display panel. In an alternative embodiment, the same color sub-pixels in adjacent top and bottom emission pixel units are adjacently disposed in the scan line direction.

In this embodiment, as shown in fig. 3, the scanning line direction of this embodiment is a row direction, the data line direction is a column direction, and the pixel arrangement structure of this embodiment is: in the scan line direction, the first blue subpixel 133B of the top emission pixel unit 13 and the second blue subpixel 143B of the bottom emission pixel unit 14 are adjacently disposed. In another row scanning line direction (row direction), taking a pixel unit 12 as an example, which includes a top emission pixel unit 13 and a bottom emission pixel unit 14 as an example, the arrangement of the sub-pixels is sequentially as follows: the first green subpixel 133G, the first red subpixel 133R of the top emission pixel unit 13, the second red subpixel 143R, and the second green subpixel 143G of the bottom emission pixel unit 14 are sequentially arranged. That is, in this arrangement, the first red subpixel 133R and the second red subpixel 143R are adjacently arranged.

Taking the top emission pixel units and the bottom emission pixel units arranged in an array as an example, as shown in fig. 3, the top emission pixel units 13 and the bottom emission pixel units 14 are alternately arranged in the same row direction, the top emission pixel units 13 are sequentially arranged in the same column direction, and the bottom emission pixel units 14 are sequentially arranged in another adjacent column direction. In the same row direction, the first blue sub-pixels 133B and the second blue sub-pixels 143B are alternately arranged, that is, the first blue sub-pixels 133B, the second blue sub-pixels 143B, the first blue sub-pixels 133B, and the second blue sub-pixels 143B are arranged.

In the other row direction, the first green subpixel 133G, the first red subpixel 133R, the second red subpixel, the second green subpixel 143G, the first green subpixel 133G, and the first red subpixel 133R are arranged. Among them, the same color sub-pixels in the adjacent top emission pixel unit 13 and bottom emission pixel unit 14 are adjacently disposed, that is, the first green sub-pixel 133G and the second green sub-pixel 143G are adjacently disposed, and the first red sub-pixel 133R and the second red sub-pixel 143R are adjacently disposed.

Based on the structural design, in the manufacturing process, the same opening of the mask plate can be used to form the sub-pixels with the same color, for example, a red sub-pixel layer including the first red sub-pixel 133R and the second red sub-pixel 143R is simultaneously formed through one opening of the mask plate, and the first red sub-pixel 133R and the second red sub-pixel 143R of the present embodiment are further formed through a photolithography process. For another example, a blue sub-pixel layer including the first blue sub-pixel 133B and the second blue sub-pixel 143B is simultaneously formed through one opening of the mask, and the first blue sub-pixel 133B and the second blue sub-pixel 143B of this embodiment are further formed through a photolithography process, respectively. And, a green sub-pixel layer including the first green sub-pixel 133G and the second green sub-pixel 143G is formed through one opening of the mask plate at the same time, and the first green sub-pixel 133G and the second green sub-pixel 143G of this embodiment are further formed through a photolithography process, and this pixel arrangement structure can reduce the opening of the mask plate from 6 openings to 3 openings, which can effectively improve the process accuracy.

As shown in fig. 1, in the prior art, a process distance between adjacent sub-pixels is mainly affected by a process precision of a mask, for example, the process precision of the mask in the prior art is 25mm, for example: the distance between adjacent first red and first green sub-pixels, adjacent first and second blue sub-pixels, adjacent second and second red sub-pixels, and adjacent second and second green sub-pixels is at least 25 mm.

As shown in fig. 3, under the arrangement structure of the present embodiment, the distance between the adjacent sub-pixels of the same color can be reduced from the process precision of the mask to the photolithography process precision, for example, the distance between the first red sub-pixel 133R and the second red sub-pixel 143R, the distance between the first blue sub-pixel 133B and the second blue sub-pixel 143B, and the distance between the first green sub-pixel 133G and the second green sub-pixel 143B can be reduced from the process precision (25mm) of the mask to the photolithography process precision (3mm), and the arrangement structure can effectively improve the aperture ratio and increase the service life of the display panel.

In an alternative embodiment, the area of the first blue sub-pixel is larger than the area of the first red sub-pixel or the first green sub-pixel; the area of the second blue sub-pixel is larger than the area of the second red sub-pixel or the second green sub-pixel. Considering that the attenuation speed of the blue sub-pixel is too fast, the embodiment sets the area of the blue sub-pixel to be the maximum, thereby ensuring the display performance and prolonging the service life of the display panel.

As shown in fig. 4, the layer structure arrangement of the display panel of the present embodiment is explained, and the display panel further includes: a light shielding layer 15 disposed at a projection of the top emission pixel unit 13 on the substrate 11, wherein the light shielding layer 15 is disposed between a layer of the first driving circuit 132 and the second driving circuit 142 close to the substrate 11 and the substrate 11, and the projection of the light shielding layer 15 on the substrate 11 covers the projection of the first driving circuit 132 and the second driving circuit 142 on the substrate 11.

As shown in fig. 4, a light-shielding layer 15 is disposed on the substrate 11 at a position corresponding to the top emission pixel unit 13, and the light-shielding layer 15 can block light that irradiates the driving TFT transistors of the first driving circuit 132 and the second driving circuit 142, thereby improving the service life of the TFTs, and can prevent the two sides from affecting each other when displaying different images at the same time, thereby improving the display effect.

In order to avoid the light shielding effect of the bottom emission pixel unit of the light shielding layer, as shown in fig. 4, the light shielding layer 15 in this embodiment is disposed at the projection of the top emission pixel unit 13 on the substrate 11, and the projection on the substrate 11 covers the projections of the first driving circuit 132 and the second driving circuit 142 on the substrate 11, so that the light shielding layer 15 does not affect the light extraction efficiency of the bottom emission pixel unit 14 on the basis of shielding the first driving circuit 132 and the second driving circuit 142.

In a specific example, as shown in fig. 2a and 5, the shaded portion is a distribution area of the light shielding layer 15, the light shielding layer is not disposed at the position of the bottom emission pixel unit 14, but is disposed at the position of the top emission pixel unit 13, and shields the first driving circuit 132 and the second driving circuit 142, protecting the respective driving TFT transistors disposed at the top emission pixel unit.

In a specific example, as shown in fig. 4, a buffer layer 19 is further formed on the light-shielding layer 15 in addition to the light-shielding layer 15 formed on the substrate 11. Further, the first driving circuit 132 and the second driving circuit 142 of the present embodiment are formed on the buffer layer.

Exemplarily, as shown in fig. 4, the layer structure diagram of the display panel of the present example only shows one driving TFT transistor of the bottom emission pixel unit, such as the fourth driving TFT transistor 142E, and one driving TFT transistor of the top emission pixel unit, such as the first driving TFT transistor 132A.

The first driving TFT transistor 132A of the top-emission pixel unit 13 includes a first active layer 1323 formed on the substrate 11, a first gate insulating layer 1324 covering the first active layer 1323, and a first gate electrode 1325 formed on the first gate insulating layer 1323. In a specific example, when the driving TFT transistor 132A has a double gate structure, a second gate insulating layer 1326 is formed on the first gate electrode 1325 and another third gate electrode 1327 is formed on the second gate insulating layer 1326. Then, an interlayer dielectric layer 1328 covering the third gate 1327 is formed, and a first source drain electrode layer 1329 electrically connected to the first active layer 1323 is formed on the interlayer dielectric layer 1328, illustratively, the first source drain layer includes a first source electrode and a first drain electrode, and the first source drain electrode layer is electrically connected to the first active layer through a through hole.

In one specific example, the fourth driving TFT transistor 142E of the bottom emission pixel unit may be disposed at the same layer as the first driving TFT transistor 132A. Illustratively, the fourth driving TFT transistor 142E includes a second active layer 1423, a second gate electrode 1425, and a second source/drain layer 1429 on the substrate 11.

When performing the layer structure manufacturing process, the second active layer 1423 may be formed in the same process as the first active layer 1323, the second gate electrode 1425 is formed in the same process as the first gate electrode 1325, and the first source drain layer 1329 and the second source drain layer 1429 are formed in the same process, where the first driving TFT transistor 132A and the fourth driving TFT transistor 142E may share one first gate insulating layer 1324 and one interlayer dielectric layer 1326. A second source drain layer 1429 is formed on the interlayer dielectric layer 1328, and the second source drain layer includes a second source and a second drain, which are electrically connected to the second active layer through the via hole on the interlayer dielectric layer, respectively. For example, when the fourth driving TFT transistor is also of a dual gate structure, the fourth gate electrode 1427 of the fourth driving TFT transistor 142E and the third gate electrode 1327 of the first driving TFT transistor may be formed in the same process.

In the process of manufacturing the first driving TFT transistor 132A and the fourth driving TFT transistor 142E, the projection of the light shielding layer 15 on the substrate 11 covers the projection of the first driving TFT transistor 132A and the fourth driving TFT transistor 142E formed on the substrate, so as to prevent the first driving TFT transistor 132A and the fourth driving TFT transistor 142E from being affected by external light.

After the layer structures of the first driving TFT transistor 132A and the fourth driving TFT transistor 142E are formed, the planarization layer 16 covering the first source-drain layer and the second source-drain layer is formed.

As shown in fig. 4, in an alternative embodiment, the top-emitting light-emitting element 131 includes a first anode 1311, a first light-emitting layer 1312, and a first cathode 1313, the first anode having a high reflectance with respect to the first cathode, and the first cathode having a high transmittance with respect to the first anode.

As shown in fig. 4, the first anode 1311 is formed on the planarization layer 16 and electrically connected to one of the first source electrode or the first drain electrode through the via hole 16 of the planarization layer. A pixel defining layer 17 is formed on the first anode 1311 and an opening defining the first light emitting layer 1312 is formed at a position corresponding to the first anode 1311, the first light emitting layer 1312 is formed on the pixel defining layer 17, and the first cathode 1313 is formed on the first light emitting layer 1312.

Considering the light emitting efficiency of the top emission pixel unit, the reflectivity of the first anode is higher than the emissivity of the first cathode, so that the light of the first light emitting layer can be reflected, and the display effect of the light emitting direction is improved.

In an alternative embodiment, to achieve the above-mentioned effect of the top-emission pixel unit, in a specific example, the first anode of the present embodiment is a stacked structure of ITO, Ag, and ITO, and the first cathode is a stacked structure of Mg and Ag, and this arrangement can achieve the light extraction efficiency of the top-emission pixel unit.

In another alternative embodiment, as shown in fig. 4, the bottom-emitting light-emitting element includes a second anode 1411, a second light-emitting layer 1412 and a second cathode 1413, the second anode has high transmittance with respect to the second cathode, and the second cathode has high reflectance with respect to the second anode, which also enables a single eye of the bottom-emitting pixel to emit light with high efficiency.

As shown in fig. 4, since the light emitting direction of the bottom-emission pixel unit 14 is from the second light-emitting layer 1412 toward the substrate 11, in order to improve the light emitting efficiency of the bottom-emission light-emitting element in the direction, the transmittance of the second anode 1412 is higher than that of the second cathode 1413, and the reflectance of the second cathode 1413 is higher than that of the second anode 1412, so that the light emitted from the light-emitting layer can be sufficiently reflected and transmitted, thereby ensuring the light emitting efficiency of the bottom-emission pixel unit in the direction toward the substrate.

In an alternative embodiment, the first anode of this embodiment is a laminated structure formed of ITO, Ag, ITO, the second anode is a laminated structure formed by ITO, Ag, ITO, the thickness of the Ag material layer in the second anode is smaller than that of the Ag material layer in the first anode, the second anode and the first anode of the bottom emission light emitting element of the present embodiment are formed by different processes, considering that the light emitting directions of the top emission pixel unit and the bottom emission pixel unit are opposite, therefore, the present embodiment sets the thickness of the first anode electrode to be thicker, improves the reflection performance of the top emission pixel unit, the thickness of the second anode is set to be thinner, the transmission performance of the bottom emission pixel unit is improved, therefore, the light emitting effects of the bottom emission pixel unit and the top emission pixel unit are ensured, and the double-sided display performance of the display panel provided by the embodiment of the invention is improved.

Illustratively, as shown in fig. 4, the second anode 1413 is formed on the planarization layer 16 and electrically connected to one of the second source electrode or the second drain electrode through the via hole of the planarization layer 16. The pixel defining layer 17 is formed on the second anode 1413 and an opening defining the second light emitting layer 1412 is formed at a position corresponding to the second anode 1413, the second light emitting layer 1412 is formed on the pixel defining layer 17, and the second cathode 1413 is formed on the second light emitting layer 1412. In this embodiment, part of the film layers of the bottom emission pixel unit 14 and the top emission pixel unit 13 may be formed simultaneously by the same process, for example, the pixel defining layer 17 of the bottom emission pixel unit 14 and the pixel defining layer 17 of the top emission pixel unit 13 may be formed by the same process, for example, the first light emitting layer 1312 of the top emission pixel unit 13 and the second light emitting layer 1412 of the bottom emission pixel unit 14 may be formed by the same process, and for example, the first cathode 1413 of the top emission pixel unit 13 and the second cathode 1413 of the bottom emission pixel unit 14 may be formed by the same process, so as to form the bottom emission light emitting element and the top emission light emitting element of the present embodiment.

In a specific example, as shown in fig. 4, the first light emitting layer 1312 of the top-emission pixel unit 13 and the second light emitting layer 1412 of the bottom-emission pixel unit 14 are fabricated by the same process, and in order to ensure the display effect of the top-emission pixel unit 13, the material used for the second cathode 1413 of this embodiment is the same as the material used for the first cathode 1313, and both are high transmittance materials, and in this structure, on the basis of ensuring the light emitting effect of the top-emission pixel unit 13, since the light emitting direction of the bottom-emission pixel unit 14 is opposite to the light emitting direction of the top-emission pixel unit 13, the light emitting effect of the top-emission pixel unit 13 may be affected by the high transmittance second cathode 1413,

in view of the above, in an alternative embodiment, as shown in fig. 4, the display panel further includes an auxiliary cathode 1414 disposed on the side of the second cathode 1413 away from the substrate 11, wherein the auxiliary cathode 1414 has a higher reflectivity than the second cathode 1413. In this embodiment, at the position of the opening corresponding to the second light emitting layer 1413 of the bottom-emission pixel unit 14, the auxiliary cathode 1414 with high reflectivity is formed on the side of the second cathode 1413 away from the substrate 11, and the auxiliary cathode 1414 is used to reflect the light transmitted by the second cathode 1413 with high transmittance, so that the reflected light can exit from one side of the substrate 11. In a specific example, the material of the auxiliary cathode of the present embodiment may be aluminum or a stacked structure formed of Mg and Ag.

In a specific example, after forming the auxiliary cathode 1414 of the bottom emission pixel unit 14, an encapsulation layer 18 is further disposed on the first cathode 1313 of the top emission pixel unit 13 and on the auxiliary cathode 1414. By way of example, the encapsulation layer of the embodiment is a structure conforming to the encapsulation layer formed by an inorganic material, an organic material and an inorganic material, and can fully ensure that water and oxygen enter the display panel, thereby improving the encapsulation performance.

Corresponding to the display panel of the above embodiment, another embodiment of the present invention provides a method for manufacturing the display panel, including:

The display panel formed by the method of the embodiment can reduce the influence of the large-range distribution of the driving circuits on the display effect in the double-sided display technology, and can avoid the shielding of the second driving circuit on the bottom emission pixel unit, so that the double-sided display effect of the double-sided display device is improved, and the display performance is effectively improved.

It should be noted that the present invention does not limit the display panel according to the embodiment of the present invention to the only way of manufacturing the display panel according to the above-mentioned embodiment, that is, the display panel shown in fig. 4 is manufactured by other methods, and the manufacturing method is also within the scope of the present invention.

Since the display panel manufacturing method provided by the embodiment of the present invention corresponds to the display panels provided by the above several embodiments, the foregoing embodiments are also applicable to the display panel manufacturing method provided by the embodiment, and detailed description is omitted in this embodiment. Those skilled in the art will appreciate that the foregoing embodiments and the attendant advantages are also applicable to this embodiment, and therefore, the description of the same parts is omitted.

Another embodiment of the present invention provides a display device, including the display panel according to the above embodiment. For example, the display device may be any product or component requiring a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, a vehicle-mounted center console, and the like, which is not limited in this respect.

It should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention, and it will be obvious to those skilled in the art that other variations and modifications can be made on the basis of the above description, and all embodiments cannot be exhaustive, and all obvious variations and modifications belonging to the technical scheme of the present invention are within the protection scope of the present invention.

Claims

1. A display panel, comprising:

a substrate;

2. The display panel according to claim 1, characterized in that the display panel further comprises:

3. The display panel according to claim 2,

each top emission pixel unit comprises a first red sub-pixel, a first green sub-pixel and a first blue sub-pixel;

4. The display panel according to claim 3,

in the scanning line direction, sub-pixels of the same color in adjacent top emission pixel units and bottom emission pixel units are adjacently disposed.

5. The display panel according to claim 3 or 4,

the area of the first blue sub-pixel is larger than that of the first red sub-pixel or the first green sub-pixel;

6. The display panel according to any one of claims 1 to 4,

the top emission light emitting element includes a first anode having a high reflectance with respect to a first cathode, a first light emitting layer, and a first cathode having a high transmittance with respect to the first anode.

7. The display panel according to claim 6,

the first anode is a stacked structure formed of ITO, Ag, and ITO, and the first cathode is a stacked structure formed of Mg and Ag.

8. The display panel according to any one of claims 7, wherein the bottom-emission light-emitting element comprises a second anode having a high transmittance with respect to the second cathode, a second light-emitting layer, and a second cathode having a high reflectance with respect to the second anode.

9. The display panel according to claim 8,

the second anode is a laminated structure formed by ITO, Ag and ITO, wherein the thickness of the Ag material layer in the second anode is smaller than that of the Ag material layer in the first anode.

10. The display panel according to claim 8, further comprising an auxiliary cathode disposed on the second cathode away from the substrate side, the auxiliary cathode having a reflectance higher than that of the second cathode.

11. The display panel according to any one of claims 1 to 4, characterized by further comprising:

the light shielding layer is arranged at the projection position of the top emission pixel unit on the substrate, the light shielding layer is arranged between the film layer of the first driving circuit and the second driving circuit close to the substrate and the substrate, and the projection of the light shielding layer on the substrate covers the projection of the first driving circuit and the second driving circuit on the substrate.

12. A method of manufacturing a display panel according to any one of claims 1 to 11, comprising:

13. A display device characterized by comprising the display panel according to any one of claims 1 to 11.