CN114141736B - Semiconductor device and method for manufacturing semiconductor device - Google Patents

Semiconductor device and method for manufacturing semiconductor device Download PDF

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CN114141736B
CN114141736B CN202210117112.XA CN202210117112A CN114141736B CN 114141736 B CN114141736 B CN 114141736B CN 202210117112 A CN202210117112 A CN 202210117112A CN 114141736 B CN114141736 B CN 114141736B
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layer
heat
electrode
heat conduction
semiconductor device
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CN114141736A (en
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许建华
乐伶聪
杨天应
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Shenzhen Times Suxin Technology Co Ltd
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Shenzhen Times Suxin Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

The invention provides a semiconductor device and a preparation method thereof, relating to the technical field of semiconductors. Through additionally setting up by the first heat-conducting layer of heat concentration heart to diffusion all around for the heat distribution in electrode distribution district is more even, and the heat that produces in the electrode distribution district can be carried out heat-conduction by first heat-conducting layer adaptively, and by the central zone that the temperature is the highest to conduction all around, has strengthened the heat-sinking capability in electrode distribution district. Compared with the prior art, the semiconductor device provided by the invention can improve the overall thermal uniformity of the device and enhance the heat dissipation capability of the front side of the device.

Description

Semiconductor device and method for manufacturing semiconductor device
Technical Field
The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a preparation method of the semiconductor device.
Background
The power device operation generates a large amount of heat, which is typically generated and concentrated in the channel region under and near the gate, i.e., the channel region between the source and drain. In addition, the heat generation and accumulation of the whole device are not uniform, the channel at the center of the area where the metal electrode is located is the area farthest from the boundary, and the area is most difficult to dissipate heat, so that the temperature rise of the area is highest. And the temperature rise effect can cause the performance reduction and reliability failure of the device.
In the prior art, a heat dissipation structure is not additionally arranged on the front surface of the device, heat of the device is conducted to the outside of the device through convection between the upper surface and air and heat conduction between the back substrate and the welding substrate, and the overall heat dissipation effect is poor.
Disclosure of Invention
Objects of the present invention include, for example, providing a semiconductor device and a method of fabricating the same that can improve thermal uniformity across the device and enhance heat dissipation from the front side of the device.
Embodiments of the invention may be implemented as follows:
in a first aspect, the present invention provides a semiconductor device comprising:
a substrate;
a semiconductor layer disposed on one side of the substrate;
the source electrode, the drain electrode and the grid electrode are arranged on one side of the semiconductor layer, which is far away from the substrate;
the first heat conduction layer is arranged on one side, far away from the substrate, of the semiconductor layer;
wherein, be provided with the electrode distribution district on the semiconductor layer, the source electrode the drain electrode with grid interval distribution is in the electrode distribution district, first heat-conducting layer sets up the electrode distribution district, and at least part sets up the source electrode with between the drain electrode, just under the distribution characteristic of first heat-conducting layer and operating condition the temperature distribution contour map looks adaptation in electrode distribution district, so that first heat-conducting layer by the heat of electrode distribution district is concentrated the heart and is spread all around.
In an alternative embodiment, the first heat conducting layer includes a first heat conducting material, the first heat conducting material is distributed in the electrode distribution area, and the distribution density of the first heat conducting material in the central area of the electrode distribution area is greater than that in the edge area.
In an alternative embodiment, a second heat conduction layer is further disposed on a side of the semiconductor layer away from the substrate, the second heat conduction layer is distributed around the first heat conduction layer and covers the semiconductor layer, and the thickness of the second heat conduction layer is smaller than or equal to that of the first heat conduction layer.
In an alternative embodiment, the second thermally conductive layer comprises a second thermally conductive material having a thermal conductivity less than or equal to the thermal conductivity of the first thermally conductive material.
In an alternative embodiment, the first heat conducting layer is provided with at least one heat conducting open slot.
In an alternative embodiment, the heat conducting open slot is filled with a third heat conducting material, so as to form a third heat conducting layer in the heat conducting open slot.
In an optional embodiment, the first heat conducting material is a metal material, the first heat conducting layer is provided with an abdicating slot, the abdicating slot penetrates through the first heat conducting layer and corresponds to the grid, so that the first heat conducting layer is distributed on two sides of the grid.
In an optional embodiment, the receding slot is filled with the second heat conduction material or the third heat conduction material.
In an optional implementation mode, one side of the semiconductor layer, which is far away from the substrate, is further provided with a gate pad, a source pad and a drain pad, the gate pad, the source pad and the drain pad are all arranged outside an electrode distribution region, the gate pad is connected with the gate, the source pad is connected with the source electrode, the drain pad is connected with the drain electrode, and the first heat conduction layer is further distributed on the gate pad, the source pad and the drain pad.
In a second aspect, the present invention provides a method for manufacturing a semiconductor device, comprising:
forming a semiconductor layer on one side of a substrate;
forming a source electrode, a drain electrode and a grid electrode on one side of the semiconductor layer far away from the substrate;
forming a first heat conduction layer on one side of the semiconductor layer far away from the substrate;
wherein, be provided with the electrode distribution district on the semiconductor layer, the source electrode the drain electrode with grid interval distribution is in the electrode distribution district, first heat-conducting layer sets up at least the electrode distribution district, and at least part sets up the source electrode with between the drain electrode, just under the distribution characteristic of first heat-conducting layer and operating condition the temperature distribution contour map looks adaptation in electrode distribution district, so that first heat-conducting layer by the heat of electrode distribution district is concentrated the heart and is spread all around.
In an alternative embodiment, before the step of forming the first thermally conductive layer on the side of the semiconductor layer remote from the substrate, the method further comprises:
arranging a second heat conduction layer on one side of the semiconductor layer far away from the substrate;
wherein the second thermally conductive layer is distributed around the first thermally conductive layer and covers the semiconductor layer.
The beneficial effects of the embodiment of the invention include, for example:
the source electrode, the drain electrode and the grid electrode are distributed in the electrode distribution area at intervals, meanwhile, the first heat conduction layer is arranged on one side, away from the substrate, of the semiconductor layer, the first heat conduction layer is arranged in the electrode distribution area and at least partially arranged between the source electrode and the drain electrode, the distribution characteristics of the first heat conduction layer are matched with the temperature distribution contour line diagram of the electrode distribution area in the working state, and therefore the first heat conduction layer is enabled to diffuse from the heat collection center of the electrode distribution area to the periphery. Through additionally setting up the first heat-conducting layer of concentrating heart to diffusion all around by the heat for the heat distribution in electrode distribution district is more even, and the heat that produces in the electrode distribution district can be carried out heat-conduction by first heat-conducting layer adaptively, and by the central zone that the temperature is the highest to conducting all around, has strengthened the heat-sinking capability in electrode distribution district. Compared with the prior art, the semiconductor device provided by the invention can improve the overall thermal uniformity of the device and enhance the heat dissipation capability of the front side of the device.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
Fig. 1 is a schematic structural diagram of a semiconductor device according to a first embodiment of the present invention;
FIG. 2 is a schematic cross-sectional view taken along line A-A of FIG. 1;
FIG. 3 is a schematic cross-sectional view taken along line B-B of FIG. 1;
fig. 4 is a schematic structural diagram of a semiconductor device according to a second embodiment of the present invention;
FIG. 5 is a schematic cross-sectional view taken along line A-A in FIG. 4;
fig. 6 is a schematic structural diagram of a semiconductor device according to a third embodiment of the present invention;
FIG. 7 is a schematic cross-sectional view taken along line A-A of FIG. 6;
fig. 8 is a schematic structural diagram of a semiconductor device according to a fourth embodiment of the present invention;
FIG. 9 is a schematic cross-sectional view taken along line A-A in FIG. 8;
fig. 10 is a schematic structural view of a semiconductor device according to a fifth embodiment of the present invention;
FIG. 11 is a schematic cross-sectional view taken along line A-A of FIG. 10;
fig. 12 is a schematic structural view of a semiconductor device according to a sixth embodiment of the present invention;
FIG. 13 is a schematic cross-sectional view taken along line A-A of FIG. 12;
fig. 14 is a schematic structural view of a semiconductor device according to a seventh embodiment of the present invention;
fig. 15 is a schematic structural view of a semiconductor device according to an eighth embodiment of the present invention;
fig. 16 is a schematic structural view of a semiconductor device according to a ninth embodiment of the present invention;
fig. 17 is a schematic structural view of a semiconductor device according to a tenth embodiment of the present invention;
fig. 18 is a schematic structural view of a semiconductor device according to an eleventh embodiment of the present invention;
FIG. 19 is a schematic cross-sectional view taken along line A-A in FIG. 18;
fig. 20 is a schematic cross-sectional view taken at a-a in fig. 18.
Icon: 100-a semiconductor device; 110-a substrate; 120-a semiconductor layer; 121-a dielectric layer; 123-electrode distribution area; 130-source electrode; 131-source pad; 140-a drain electrode; 141-drain pad; 150-a gate; 151-gate pad; 160-first thermally conductive layer; 161-longitudinally disposed section; 163-a transverse portion; 165-thermally conductive open slots; 167-proliferative portion; 169-abdicating and slotting; 170 — second thermally conductive layer; 180-third thermally conductive layer.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. indicate an orientation or a positional relationship based on that shown in the drawings or that the product of the present invention is used as it is, this is only for convenience of description and simplification of the description, and it does not indicate or imply that the device or the element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the present invention.
Furthermore, the appearances of the terms "first," "second," and the like, if any, are used solely to distinguish one from another and are not to be construed as indicating or implying relative importance.
As disclosed in the background art, the front surface of the power device in the conventional art is not provided with the enhanced heat dissipation structure, the heat of the device is conducted to the outside of the device through the convection between the upper surface and the air and the heat conduction between the back substrate and the soldering substrate, the overall heat dissipation effect is poor, and the front surface has low moisture resistance due to the fact that the front surface of the device is directly exposed and the front surface has less covering layer.
Further, the prior art also has a scheme of adopting a CNT micro-channel heat sink as a heat dissipation channel between the outside and the surface of the device on a substrate material of the flip-chip GaN-based HEMT device, that is, a heat dissipation structure is added on the substrate, which can only increase the heat dissipation capability of the substrate, cannot directly reach a heat source for heat dissipation (front heating), and the improvement of the heat dissipation capability is very limited, and can only be used in the flip-chip structure.
In order to solve the problems of the prior art, the present invention provides a novel semiconductor device and a method for manufacturing the same, and it is to be noted that features in embodiments of the present invention may be combined with each other without conflict.
First embodiment
Referring to fig. 1 to 3, the present embodiment provides a semiconductor device 100, which can improve the thermal uniformity of the whole device and enhance the heat dissipation capability of the front surface of the device, while not increasing the parasitic parameters of the front surface of the device and enhancing the moisture resistance of the device.
The present embodiment provides a semiconductor device 100, which includes a substrate 110, a semiconductor layer 120, a source 130, a drain 140, a gate 150, and a first heat conducting layer 160, wherein the semiconductor layer 120 is disposed on one side of the substrate 110, the source 130, the drain 140, and the gate 150 are disposed on one side of the semiconductor layer 120 away from the substrate 110, while the first thermally conductive layer 160 is also disposed on a side of the semiconductor layer 120 away from the substrate 110, wherein, the semiconductor layer 120 is provided with an electrode distribution area 123, the source electrode 130, the drain electrode 140 and the gate electrode 150 are distributed at the electrode distribution area 123 at intervals, the first heat conduction layer 160 is arranged at the electrode distribution area 123, and is at least partially disposed in the channel region between the source 130 and drain 140 electrodes, and the distribution characteristics of the first thermally conductive layer 160 are adapted to the temperature distribution contour of the electrode distribution area 123 in the operating state, so that the first heat conduction layer 160 is diffused all around from the heat concentration center of the electrode distribution area 123.
It should be noted that in this embodiment, the semiconductor layer 120 is deposited and formed on the substrate 110, the source 130, the drain 140 and the gate 150 are deposited and formed on the substrate 110, meanwhile, a dielectric layer 121 is also deposited and formed on the surface of the semiconductor layer 120, the dielectric layer 121 covers the gate 150, the source 130 and the drain 140 may be connected to the outside by filling an interconnection metal after opening the dielectric layer 121, and the basic configurations of the dielectric layer 121, the semiconductor layer 120 and the metal electrode are the same as those of a conventional power device, and will not be described in detail herein. In this embodiment, the first thermally conductive layer 160 is deposited on the surface of the dielectric layer 121.
In this embodiment, the plurality of sources 130, the plurality of drains 140, and the plurality of gates 150 are all provided, the plurality of sources 130 and the plurality of drains 140 are arranged alternately, the gate 150 is provided between each source 130 and each drain 140, specifically, 3 sources 130, 2 drains 140, and 4 gates 150, and the specific distribution of the gates 150 is consistent with that of a conventional power device, the electrode distribution area 123 is rectangular as a whole, in an operating state, a large amount of heat is generated in the electrode distribution area 123, the temperature distribution contour diagram of the electrode distribution area 123 is elliptical and distributed in layers, and the closer to the center, the worse the heat dissipation capability is, the more concentrated the heat is, so that the heat concentration center of the electrode distribution area 123, that is, the geometric center of the electrode distribution area 123 is a high temperature region, the edge position is a low temperature region, the distribution characteristics of the first heat conduction layer 160 in this embodiment are adapted to the temperature distribution contour diagram of the electrode distribution area 123, that is, the first heat conduction layer 160 is mainly distributed in the high temperature region where the electrodes are distributed and extends toward the low temperature region, so as to ensure that the heat is accurately conducted to the heat concentration position, and the temperature equalization of the electrode distribution region 123 is realized.
It should be noted that the temperature distribution contour diagram in this embodiment refers to a heat distribution range and a temperature interval diagram of the electrode distribution area 123 in an operating state, and can show the height and the range of the temperature, and the first heat conduction layer 160 can be adapted to the temperature distribution contour diagram, so as to ensure that the heat conduction can be performed on the area where the heat is most concentrated, and thus the temperature distribution in the electrode distribution area 123 is uniform. Through additionally arranging the first heat conduction layer 160 which is concentrated by heat to spread all around, the heat distribution of the electrode distribution area 123 is more uniform, the heat generated in the electrode distribution area 123 can be adaptively conducted by the first heat conduction layer 160, and the heat dissipation capacity of the electrode distribution area 123 is enhanced by conducting all around from the central area with the worst heat dissipation capacity and the highest temperature.
In this embodiment, the first heat conducting layer 160 includes a first heat conducting material, the first heat conducting material is distributed in the electrode distribution area 123, and the distribution density of the first heat conducting material in the central area of the electrode distribution area 123 is greater than that in the edge area. Specifically, the thickness of the first heat conduction layer 160 is T1, and here, the distribution density of the first heat conduction material refers to the mass percentage of the first heat conduction material in a certain range, that is, more first heat conduction materials can be distributed in the central area, so that better heat conduction capability is achieved, the heat dissipation capability of the front side of the device is improved, and further, the heat distribution in the electrode distribution area 123 is uniform.
It should be noted that, in this embodiment, the first thermal conductive material may be an insulating thermal conductive material, such as diamond, carbon, silicon carbide, or boron nitride, which covers the surface of the semiconductor layer 120 and is distributed in the channel region between the source electrode 130 and the drain electrode 140, and at the same time, the first thermal conductive material also bridges over the source electrode 130 and the drain electrode 140 located in the middle of the electrode distribution region 123, so as to connect the first thermal conductive materials in adjacent channel regions in series.
In this embodiment, the first heat conducting layer 160 includes a longitudinal portion 161 and a plurality of lateral portions 163, the plurality of lateral portions 163 are sequentially distributed in the channel region between the plurality of sources 130 and drains 140, the longitudinal portion 161 connects the plurality of lateral portions 163 in series and spans the plurality of sources 130, drains 140 and gates 150, the width of the lateral portions 163 is the same as the width of the channel region, and the length of the lateral portions 163 in the channel extending direction is larger closer to the heat concentration center, so that the overall first heat conducting layer 160 is arranged in an elliptical temperature distribution contour map.
In this embodiment, a side of the semiconductor layer 120 away from the substrate 110 is further provided with a second heat conduction layer 170, and the second heat conduction layer 170 is distributed around the first heat conduction layer 160 and covers the semiconductor layer 120. Specifically, the second heat conduction layer 170 covers the front surface of the semiconductor layer 120, so that the heat dissipation capability of the front surface of the device can be further improved, the second heat conduction layer 170 is deposited on the surface of the medium layer 121, and the second heat conduction layer 170 is spliced with the first heat conduction layer 160 to completely cover the medium layer 121 exposed outside, so that the front surface of the device can be ensured to be in a complete covering state, and the moisture resistance capability of the device is further improved. Preferably, the second heat conducting layer 170 may be distributed in the electrode distribution area 123 in an area not covered by the first heat conducting layer 160, while also being distributed outside the electrode distribution area 123.
It is noted that in this embodiment, a gate pad 151, a source pad 131 and a drain pad 141 are further disposed on a side of the semiconductor layer 120 away from the substrate 110, the gate pad 151, the source pad 131 and the drain pad 141 are all disposed outside the electrode distribution region 123, the gate pad 151 is connected to the gate electrode 150, the source pad 131 is connected to the source electrode 130, the drain pad 141 is connected to the drain electrode 140, and the second heat conduction layer 170 is further distributed around the source pad 131, the drain pad 141 and the gate pad 151. Specifically, the gate pad 151 and the drain pad 141 are disposed at both sides of the electrode distribution region 123, respectively, and the source pad 131 is disposed at both ends of the electrode distribution region 123, wherein basic structures and distribution characteristics of the gate pad 151, the source pad 131, and the drain pad 141 are identical to those of a conventional device pad and will not be described in detail herein.
In this embodiment, the height of the gate pad 151, the source pad 131 and the drain pad 141 is the same as the height of the first heat conducting layer 160, which facilitates good contact between the front surface of the device and the substrate during flip-chip mounting. Of course, in other embodiments, when the flip-chip is not required, the height of the pad is not directly related to the height of the first heat conducting layer 160, for example, the height of the pad may be higher or lower than the height of the first heat conducting layer 160.
In this embodiment, the second thermally conductive layer 170 comprises a second thermally conductive material having a thermal conductivity less than or equal to the thermal conductivity of the first thermally conductive material. Specifically, the second heat conducting material may be a resin material containing insulating high heat conducting material microparticles, where the second heat conducting material is also an insulating heat conducting material, and its heat conductivity coefficient is smaller than that of the first heat conducting material, so as to form a more layered heat conducting network together with the first heat conducting material, so as to further make the front heat distribution of the whole device more uniform.
It should be noted that in this embodiment, the second heat conduction layer 170 covers the exposed area of the dielectric layer 121, so that the dielectric layer 121 is completely covered by the first heat conduction layer 160, and meanwhile, there is no gap between the second heat conduction layer 170 and the first heat conduction layer 160, so that the whole dielectric layer 121 and the semiconductor layer 120 are both in a completely covered state, on one hand, the heat dissipation capability of the front surface of the device is increased in a hierarchical manner, and on the other hand, the semiconductor layer 120 is also protected, so that the moisture resistance of the device is improved.
In this embodiment, the thickness of the second heat conducting layer 170 is less than or equal to the thickness of the first heat conducting layer 160. Specifically, the thickness of the second heat conduction layer 170 is T2, wherein T2 is less than T1, make first heat conduction layer 160 can be the protruding setting of second heat conduction layer 170 relatively, through adopting thicker first heat conduction layer 160, make the heat conduction material in the high temperature region of electrode distribution area 123 more, the heat-sinking capability is stronger, further promote positive heat-sinking capability, and under the circumstances of guaranteeing the heat-sinking capability, also can make the second heat conduction layer 170 need not too thickly, the material has been saved.
In summary, in the semiconductor device 100 provided by the present embodiment, the source 130, the drain 140 and the gate 150 are spaced apart from each other in the electrode distribution area 123, the first heat conducting layer 160 and the second heat conducting layer 170 are disposed on the side of the semiconductor layer away from the substrate 110, the first heat conducting layer 160 is disposed in the electrode distribution area 123 and at least partially disposed between the source 130 and the drain 140, and the distribution characteristic of the first heat conducting layer 160 is adapted to the temperature distribution contour map of the electrode distribution area 123 in the operating state, so that the first heat conducting layer 160 is diffused from the heat concentration center of the electrode distribution area 123 to the periphery. The second heat conduction layer 170 is distributed around the first heat conduction layer 160, and the first heat conduction layer 160 which is diffused from the heat concentration center to the periphery is additionally arranged, so that the heat distribution of the electrode distribution area 123 is more uniform, the heat generated in the electrode distribution area 123 can be adaptively conducted by the first heat conduction layer 160, and is conducted from the central area with the highest temperature to the periphery, and the heat dissipation capacity of the electrode distribution area 123 is enhanced. Meanwhile, the second heat conduction layer 170 is arranged, so that the heat dissipation capacity of the front side of the device is further enhanced on the one hand, and the humidity resistance capacity of the front side of the device is stronger on the other hand.
Second embodiment
Referring to fig. 4 and 5, the present embodiment provides a semiconductor device 100, the basic structure and principle thereof and the technical effects thereof are the same as those of the first embodiment, and for the sake of brief description, no mention is made in part of the present embodiment, and reference may be made to the corresponding contents in the first embodiment.
In the present embodiment, the first heat conducting layer 160 includes a longitudinal portion 161 and a plurality of transverse portions 163, the plurality of transverse portions 163 are sequentially distributed in the channel region between the plurality of source electrodes 130 and drain electrodes 140, the width of the transverse portions 163 is larger than the width of the channel region, and the length of the transverse portions 163 in the channel extending direction is larger closer to the heat concentration center, so that the entire first heat conducting layer 160 is arranged along the elliptical temperature distribution contour map.
In this embodiment, the first heat conducting layer 160 partially covers the adjacent source 130 and drain 140, and completely covers the channel region between the source 130 and drain 140, so as to achieve better heat dissipation effect.
Third embodiment
Referring to fig. 6 and 7, the present embodiment provides a semiconductor device 100, the basic structure and principle thereof and the technical effects thereof are the same as those of the first embodiment, and for the sake of brief description, no mention is made in part of the present embodiment, and reference may be made to the corresponding contents in the first embodiment.
In the present embodiment, the first heat conducting layer 160 includes a longitudinal portion 161 and a plurality of transverse portions 163, the plurality of transverse portions 163 are sequentially distributed in the channel region between the plurality of source electrodes 130 and drain electrodes 140, the width of the transverse portions 163 is smaller than the width of the channel region, and the length of the transverse portions 163 in the channel extending direction is larger closer to the heat concentration center, so that the entire first heat conducting layer 160 is arranged along the elliptical temperature distribution contour map.
In this embodiment, the width of the horizontal portion 163 is smaller than the width of the channel region, and is located in the middle of the channel region and directly faces the gate 150, so that the horizontal portion 163 and the adjacent source 130 and drain 140 are both spaced apart, thereby achieving the heat dissipation effect, saving material, and making the temperature distribution more uniform.
Fourth embodiment
Referring to fig. 8 and 9, the present embodiment provides a semiconductor device 100, the basic structure and principle thereof and the technical effects thereof are the same as those of the first embodiment, and for the sake of brief description, no mention is made in part of the present embodiment, and reference may be made to the corresponding contents in the first embodiment.
In the present embodiment, the first heat conducting layer 160 includes a longitudinal portion 161 and a plurality of transverse portions 163, the plurality of transverse portions 163 are sequentially distributed in the channel region between the plurality of source electrodes 130 and drain electrodes 140, the width of the transverse portions 163 is the same as the width of the channel region, and the length of the transverse portions 163 in the channel extending direction is larger closer to the heat concentration center, so that the entire first heat conducting layer 160 is arranged along the oval temperature distribution contour map. Wherein the top end of each of the lateral portions 163 has a portion expanding to both sides, so that the lateral portions 163 have a T-shape in cross section and extend to the adjacent source 130 or drain 140.
Further, the top end of the longitudinal portion 161 also has a portion expanding to both sides, so that the longitudinal portion 161 has a T-shaped cross section.
In this embodiment, the first heat conduction layer 160 having a T-shaped cross section is adopted, so that the heat dissipation area of the first heat conduction layer 160 can be increased, the heat conduction capability of the first heat conduction layer 160 is further improved, and the heat dissipation capability of the front surface of the device is further improved.
Fifth embodiment
Referring to fig. 10 and fig. 11, the present embodiment provides a semiconductor device 100, the basic structure and principle thereof and the technical effects thereof are the same as those of the first embodiment or the second embodiment, and for the sake of brief description, the corresponding contents of the first embodiment or the second embodiment may be referred to where the present embodiment is not mentioned in part.
In this embodiment, the first heat conductive layer 160 is provided with at least one heat conductive open slot 165. Specifically, the first heat conduction layer 160 includes a longitudinal portion 161 and a plurality of lateral portions 163, the plurality of lateral portions 163 are sequentially distributed in the channel region between the plurality of source electrodes 130 and drain electrodes 140, the width of the lateral portions 163 is larger than the width of the channel region, and the length of the lateral portions 163 in the channel extending direction is larger closer to the position of the heat concentration center, so that the entire first heat conduction layer 160 is arranged along the oval temperature distribution contour map. Each of the transverse portions 163 may be provided with a heat conducting open slot 165, wherein the extending direction of the heat conducting open slot 165 is the same as the extending direction of the channel.
Preferably, in this embodiment, each of the transverse portions 163 is provided with two linear heat conducting open slots 165, and the two linear heat conducting open slots 165 are respectively located at two sides of the grid 150, so that the heat conducting open slots 165 are formed by opening the slots in the first heat conducting layer 160, and the heat dissipation area of the first heat conducting layer 160 can be further increased, thereby improving the heat dissipation capability thereof.
Sixth embodiment
Referring to fig. 12 and 13, the present embodiment provides a semiconductor device 100, the basic structure and principle thereof and the technical effects thereof are the same as those of the first embodiment or the fifth embodiment, and for the sake of brief description, the corresponding contents of the first embodiment or the fifth embodiment may be referred to where the present embodiment is not mentioned in part.
In this embodiment, the first heat conducting layer 160 is provided with at least one heat conducting open slot 165, and the heat conducting open slot 165 extends at least to be flush with the second heat conducting layer 170 along the opening direction. Specifically, the heat conducting open slot 165 is flush with the second heat conducting layer 170, the number of the heat conducting open slots 165 may be plural, the first heat conducting layer 160 includes a longitudinal portion 161 and a plurality of lateral portions 163, the plurality of lateral portions 163 are sequentially distributed in the channel region between the plurality of source electrodes 130 and drain electrodes 140, the width of the lateral portions 163 is larger than the width of the channel region, and the length of the lateral portions 163 in the channel extending direction is larger closer to the heat concentration center, so that the entire first heat conducting layer 160 is arranged along the elliptical temperature distribution contour map. Each of the transverse portions 163 may be formed with two heat conducting open slots 165 parallel to each other, wherein an extending direction of each heat conducting open slot 165 is the same as an extending direction of the channel.
In the present embodiment, each of the heat conducting open slots 165 is filled with the third heat conducting material to form the third heat conducting layer 180 in the heat conducting open slot 165. Specifically, the thermal conductivity coefficient of the third thermal conductive material may be greater than that of the second thermal conductive material, and the third thermal conductive material may be inserted into the first thermal conductive material by filling the third thermal conductive material in the thermal conductive opening groove 165, so as to further improve the heat dissipation capability thereof.
In this embodiment, the third thermal conductive material may be an electrically and thermally conductive material, such as copper or gold, which has a relatively strong thermal conductivity and can increase the heat dissipation capability of the front surface of the device.
Seventh embodiment
Referring to fig. 14, the basic structure and principle of the semiconductor device 100 and the technical effects thereof are the same as those of the first embodiment, and for the sake of brief description, no mention may be made in this embodiment, and reference may be made to the corresponding contents in the first embodiment.
In this embodiment, the first heat conduction layer 160 includes a longitudinal portion 161 and a plurality of lateral portions 163, the plurality of lateral portions 163 are sequentially distributed in a channel region between the plurality of sources 130 and the plurality of drains 140, and the longitudinal portion 161 connects the plurality of lateral portions 163 in series and spans the plurality of sources 130, the plurality of drains 140 and the plurality of gates 150. Two adjacent horizontal portions 163 are joined to each other and cross over the corresponding source 130 and drain 140, thereby forming a central heat sink portion having a rectangular shape and edge heat sink portions distributed around the central heat sink portion.
In this embodiment, by adding the portion of the first thermal conductive material covering the source electrode 130 and the drain electrode 140, the thermal conductivity of the first thermal conductive layer 160 can be further increased, so as to enhance the heat dissipation capability of the front surface of the device.
Eighth embodiment
Referring to fig. 15, the basic structure and principle of the semiconductor device 100 and the technical effects thereof are the same as those of the first embodiment, and for the sake of brief description, no mention may be made in this embodiment, and reference may be made to the corresponding contents in the first embodiment.
In this embodiment, the first heat conduction layer 160 includes a longitudinal portion 161, a plurality of lateral portions 163 and a plurality of raised portions 167, the plurality of lateral portions 163 are sequentially distributed in the channel region between the plurality of sources 130 and drains 140, and the longitudinal portion 161 connects the plurality of lateral portions 163 in series and crosses the plurality of sources 130, drains 140 and gates 150. The width of the lateral portion 163 is the same as the width of the channel region, and the length of the lateral portion 163 in the channel extending direction is larger the closer to the position of the heat accumulation center, so that the entire first heat conductive layer 160 is arranged along the elliptical temperature distribution contour map. The plurality of raised portions 167 are laterally disposed and located between two adjacent lateral portions 163, i.e., on the drain electrode 140 and the source electrode 130, and can additionally dissipate heat from the drain electrode 140 and the source electrode 130, and the length of the raised portions 167 is larger as they are closer to the heat collecting center.
In this embodiment, by additionally providing the raised portion 167, the source electrode 130 and the drain electrode 140 located in the central region of the heat accumulation can be conducted thermally, and the heat dissipation capability of the front surface of the device is further improved.
Ninth embodiment
Referring to fig. 16, the basic structure and principle of the semiconductor device 100 and the technical effects thereof are the same as those of the first embodiment, and for the sake of brief description, no mention may be made in this embodiment, and reference may be made to the corresponding contents in the first embodiment.
In this embodiment, the first heat conduction layer 160 includes a plurality of longitudinal portions 161 and a plurality of transverse portions 163, the plurality of transverse portions 163 are sequentially distributed in the channel region between the plurality of sources 130 and the plurality of drains 140, at least one longitudinal portion 161 connects the plurality of transverse portions 163 in series, and the plurality of longitudinal portions 161 are spaced and arranged in parallel. The width of the lateral portion 163 is the same as the width of the channel region, and the length of the lateral portion 163 in the channel extending direction is larger the closer to the position of the heat accumulation center, so that the entire first heat conductive layer 160 is arranged along the elliptical temperature distribution contour map.
In this embodiment, there may be three longitudinal portions 161, the central longitudinal portion 161 connects the plurality of transverse portions 163 in series, and the remaining two longitudinal portions 161 connect the two transverse portions 163 located in the central region, so as to form a heat dissipation network, and further improve the heat dissipation capability and temperature uniformity of the device.
Tenth embodiment
Referring to fig. 17, the present embodiment provides a semiconductor device 100, the basic structure and principle thereof and the technical effects thereof are the same as those of the first embodiment, and for the sake of brief description, no mention is made in this embodiment, and reference may be made to the corresponding contents in the first embodiment.
The first heat conduction layer 160 includes a longitudinal portion 161 and a plurality of transverse portions 163, the plurality of transverse portions 163 are sequentially distributed in a channel region between the plurality of source electrodes 130 and drain electrodes 140, the longitudinal portion 161 connects the plurality of transverse portions 163 in series and spans the plurality of source electrodes 130, drain electrodes 140 and gate electrodes 150, the width of the transverse portions 163 is the same as the width of the channel region, and the length of the transverse portions 163 in the channel extending direction is larger the closer to the heat concentration center, so that the entire first heat conduction layer 160 is arranged along an elliptical temperature distribution contour map.
In this embodiment, the middle regions of the transverse portions 163 at the heat accumulation center are all spaced by the first heat conductive material, that is, the middle regions of the transverse portions 163 with longer length are not continuous, and the portions for spacing are located at two sides of the longitudinal portions 161, so that the transverse portions 163 at the heat accumulation center are spaced from the longitudinal portions 161, and the spaced portions can be filled with the second heat conductive layer 170. By arranging the spacing part, a reinforced heat dissipation network is formed, and the temperature uniformity of the device is further improved.
Eleventh embodiment
Referring to fig. 18 and fig. 19, the present embodiment provides a semiconductor device 100, the basic structure and principle thereof and the technical effects thereof are the same as those of the first embodiment, and for the sake of brief description, no mention is made in part of the present embodiment, and reference may be made to the corresponding contents in the first embodiment.
In this embodiment, the first thermal conductive material is made of a metal material, the first thermal conductive layer 160 is provided with a relief groove 169, and the relief groove 169 penetrates through the first thermal conductive layer 160 and corresponds to the grid 150, so that the first thermal conductive layer 160 is distributed on two sides of the grid 150. Specifically, the first heat conducting material may be a metal material with a good heat conducting capability, such as copper, gold, or silver, and the receding groove 169 is provided, so that the first heat conducting layer 160 and the gate 150 can be arranged at an interval, and the first heat conducting layer 160 is prevented from bridging the gate 150 to affect the frequency characteristic of the device.
In the present embodiment, the offset groove 169 may be filled with the second heat conduction layer 170, i.e. filled with the second heat conduction material, so as to ensure the heat conduction capability at the gate 150. Meanwhile, the first heat conduction layer 160 is also distributed on the gate pad 151, the source pad 131 and the drain pad 141, and under the condition that pad welding is not affected, the heat dissipation capacity of the front surface of the device can be further improved.
Referring to fig. 20, in another preferred embodiment of the present invention, the offset groove 169 may be further filled with a third thermal conductive material to form a third thermal conductive layer 180, wherein the third thermal conductive material may be a high thermal conductive insulating material, which can further enhance the heat dissipation capability of the device.
Twelfth embodiment
The present embodiment provides a method for manufacturing a semiconductor device 100, which is used to manufacture the semiconductor device 100 provided in the foregoing embodiments, wherein the basic structure and principle of the semiconductor device 100 and the technical effects thereof are the same as those of the foregoing embodiments, and for the sake of brief description, reference may be made to the corresponding contents in the foregoing embodiments for the parts that are not mentioned in the present embodiment.
The method for manufacturing the semiconductor device 100 provided in this embodiment includes the following steps:
s1: a semiconductor layer 120 is formed on one side of the substrate 110.
Specifically, a substrate 110, such as a silicon carbide substrate, is provided, and semiconductor materials such as a channel layer, a barrier layer, etc. are sequentially deposited on the substrate 110.
S2: a source 130, a drain 140 and a gate 150 are formed in the semiconductor layer 120 on a side thereof remote from the substrate 110.
Specifically, the semiconductor layer 120 is provided with an electrode distribution region 123, the source electrode 130, the drain electrode 140 and the gate electrode 150 are distributed in the electrode distribution region 123 at intervals, and the source pad 131, the drain pad 141 and the gate pad 151 can be formed together while forming the metal electrode on the semiconductor layer 120, wherein when step S2 is performed, a dielectric layer 121 needs to be deposited on the surface of the semiconductor layer 120, so as to protect the region except the metal electrode or the metal pad.
S3: a second thermally conductive layer 170 is disposed on a side of the semiconductor layer 120 remote from the substrate 110.
Specifically, after the dielectric layer 121 is formed, the second thermal conductive layer 170 is formed by deposition on the exposed surface of the dielectric layer 121, and the second thermal conductive layer 170 on the top of the dielectric layer is removed in the area where the first thermal conductive layer 160 needs to be disposed and the area where wire bonding is needed in the bonding pad. The second heat conduction layer 170 can cover the medium layer 121 except the area covered by the first heat conduction layer 160, so that the protection effect is achieved, and the moisture resistance of the device is improved.
S4: a first thermally conductive layer 160 is formed on a side of the semiconductor layer 120 remote from the substrate 110.
Specifically, after the second heat conduction layer 170 is formed, the first heat conduction layer 160 is deposited and formed on the medium layer 121 in an area where the first heat conduction layer 160 needs to be arranged, after a conventional power device structure is formed, the first heat conduction layer 160 is arranged on the electrode distribution area 123, the first heat conduction layer 160 is at least partially arranged in a channel between the source electrode 130 and the drain electrode 140, and the distribution characteristic of the first heat conduction layer 160 is matched with the temperature distribution contour map of the electrode distribution area 123 in an operating state, so that the first heat conduction layer 160 is diffused towards the periphery from the heat concentration center of the electrode distribution area 123.
It should be noted that, here, the contour map of the temperature distribution in the electrode distribution area 123 may be fitted according to empirical values, or may be obtained according to a real-time temperature measurement image during testing. Meanwhile, the distribution, size and shape of the first heat conduction layer 160 may be various, and reference may be made to the related description in the foregoing embodiments.
The present embodiment provides a method for manufacturing a semiconductor device 100, in which a source 130, a drain 140 and a gate 150 are spaced apart from each other in an electrode distribution area 123, a first heat conducting layer 160 and a second heat conducting layer 170 are disposed on a side of the semiconductor layer away from the substrate 110, the first heat conducting layer 160 is disposed in the electrode distribution area 123 and at least partially disposed between the source 130 and the drain 140, and a distribution characteristic of the first heat conducting layer 160 is adapted to a temperature distribution contour map of the electrode distribution area 123 in an operating state, so that the first heat conducting layer 160 is diffused from a heat concentration center of the electrode distribution area 123 to the periphery. The second heat conduction layer 170 is distributed around the first heat conduction layer 160, and the first heat conduction layer 160 which is diffused from the heat concentration center to the periphery is additionally arranged, so that the heat distribution of the electrode distribution area 123 is more uniform, the heat generated in the electrode distribution area 123 can be adaptively conducted by the first heat conduction layer 160, and is conducted from the central area with the highest temperature to the periphery, and the heat dissipation capacity of the electrode distribution area 123 is enhanced. Meanwhile, the second heat conduction layer 170 is arranged, so that the heat dissipation capacity of the front side of the device is further enhanced on the one hand, and the humidity resistance capacity of the front side of the device is stronger on the other hand.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims (11)

1. A semiconductor device, comprising:
a substrate;
a semiconductor layer disposed on one side of the substrate;
the source electrode, the drain electrode and the grid electrode are arranged on one side of the semiconductor layer, which is far away from the substrate;
the first heat conduction layer is arranged on one side, far away from the substrate, of the semiconductor layer;
the semiconductor layer is provided with an electrode distribution area, the source electrode, the drain electrode and the grid electrode are distributed in the electrode distribution area at intervals, the first heat conduction layer is at least arranged in the electrode distribution area and at least partially arranged between the source electrode and the drain electrode, and the distribution characteristics of the first heat conduction layer are matched with the temperature distribution contour line diagram of the electrode distribution area in the working state, so that the first heat conduction layer is diffused from the heat concentration center of the electrode distribution area to the periphery;
the first heat conduction layer is deposited on the surface of the dielectric layer on the surface of the semiconductor device, and at least part of the first heat conduction layer is distributed on the surface in the channel region between the source electrode and the drain electrode so as to adaptively thermally conduct heat generated in the electrode distribution region;
the first heat conduction layer comprises at least one longitudinal portion and a plurality of transverse portions, the transverse portions are at least distributed in a channel region between the source electrode and the drain electrode, and the length of the transverse portions in the channel extending direction is larger at positions closer to the heat accumulation center, so that the first heat conduction layer is arranged along an elliptical temperature distribution contour map.
2. The semiconductor device of claim 1, wherein the first thermally conductive layer comprises a first thermally conductive material, the first thermally conductive material is distributed in the electrode distribution area, and a distribution density of the first thermally conductive material in a central area of the electrode distribution area is greater than a distribution density in an edge area of the electrode distribution area.
3. The semiconductor device according to claim 2, wherein a second heat conducting layer is further arranged on a side of the semiconductor layer away from the substrate, the second heat conducting layer is distributed around the first heat conducting layer and covers the semiconductor layer, and the thickness of the second heat conducting layer is smaller than or equal to that of the first heat conducting layer.
4. The semiconductor device of claim 3, wherein the second thermally conductive layer comprises a second thermally conductive material having a thermal conductivity less than or equal to a thermal conductivity of the first thermally conductive material.
5. The semiconductor device of claim 3, wherein the first thermally conductive layer has at least one thermally conductive open slot disposed therein.
6. The semiconductor device of claim 5, wherein the heat conducting open slot is filled with a third heat conducting material to form a third heat conducting layer within the heat conducting open slot.
7. The semiconductor device according to claim 3, wherein the first thermal conductive material is a metal material, and a relief groove is formed in the first thermal conductive layer, and the relief groove extends through the first thermal conductive layer and corresponds to the gate, so that the first thermal conductive layer is disposed on two sides of the gate.
8. The semiconductor device of claim 7, wherein the relief slot is filled with a second or third thermally conductive material.
9. The semiconductor device according to claim 7, wherein a gate pad, a source pad and a drain pad are further arranged on one side of the semiconductor layer away from the substrate, the gate pad, the source pad and the drain pad are arranged outside an electrode distribution region, the gate pad is connected with the gate, the source pad is connected with the source electrode, the drain pad is connected with the drain electrode, and the first heat conduction layer is further distributed on the gate pad, the source pad and the drain pad.
10. A method of manufacturing a semiconductor device, comprising:
forming a semiconductor layer on one side of a substrate;
forming a source electrode, a drain electrode and a grid electrode on one side of the semiconductor layer far away from the substrate;
forming a first heat conduction layer on one side of the semiconductor layer far away from the substrate;
the semiconductor layer is provided with an electrode distribution area, the source electrode, the drain electrode and the grid electrode are distributed in the electrode distribution area at intervals, the first heat conduction layer is at least arranged in the electrode distribution area and at least partially arranged between the source electrode and the drain electrode, and the distribution characteristics of the first heat conduction layer are matched with the temperature distribution contour line diagram of the electrode distribution area in the working state, so that the first heat conduction layer is diffused from the heat concentration center of the electrode distribution area to the periphery;
the first heat conduction layer is deposited on the surface of the dielectric layer on the surface of the semiconductor device, and at least part of the first heat conduction layer is distributed on the surface in the channel region between the source electrode and the drain electrode so as to adaptively thermally conduct heat generated in the electrode distribution region;
the first heat conduction layer comprises at least one longitudinal portion and a plurality of transverse portions, the transverse portions are at least distributed in a channel region between the source electrode and the drain electrode, and the length of the transverse portions in the channel extending direction is larger at positions closer to the heat accumulation center, so that the first heat conduction layer is arranged along an elliptical temperature distribution contour map.
11. The method according to claim 10, wherein before the step of forming the first heat conductive layer on the side of the semiconductor layer away from the substrate, the method further comprises:
arranging a second heat conduction layer on one side of the semiconductor layer far away from the substrate;
wherein the second thermally conductive layer is distributed around the first thermally conductive layer and covers the semiconductor layer.
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