CN114121672A - Method for homogenizing oxidation layer on surface of fin structure - Google Patents

Method for homogenizing oxidation layer on surface of fin structure Download PDF

Info

Publication number
CN114121672A
CN114121672A CN202111390525.7A CN202111390525A CN114121672A CN 114121672 A CN114121672 A CN 114121672A CN 202111390525 A CN202111390525 A CN 202111390525A CN 114121672 A CN114121672 A CN 114121672A
Authority
CN
China
Prior art keywords
fin structure
layer
oxide layer
hard mask
mask layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111390525.7A
Other languages
Chinese (zh)
Inventor
李勇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Original Assignee
Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huali Integrated Circuit Manufacturing Co Ltd filed Critical Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority to CN202111390525.7A priority Critical patent/CN114121672A/en
Publication of CN114121672A publication Critical patent/CN114121672A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

The method for homogenizing the oxide layer on the surface of the fin structure comprises the following steps: s1: after the shallow channel isolation layer generated in the middle of the fin structure is subjected to first chemical mechanical polishing, the first hard mask layer is exposed, the shallow channel isolation layer is continuously subjected to recess removal, and the bottom part of the first hard mask layer is removed to form a groove; s2: the recess is side-oxidized, the recess being more easily oxidized than other portions corresponding to the top-side corners of the fin structure. Therefore, the groove is subjected to side oxidation firstly, and the top surface is covered with the first hard mask layer, and the corresponding part of the groove is oxidized, so that the defect that the thickness of the corner of the fin is smaller than that of the top surface due to different oxidation rate effects at different crystal planes is offset, the finally generated surface oxidation layer is basically the same (the top surface, the corner and the side surface of the fin structure are the same), the uniformity of the oxidation layer is improved, the reliability of the device is improved, and the possibility of electric leakage is reduced.

Description

Method for homogenizing oxidation layer on surface of fin structure
Technical Field
The invention relates to the field of semiconductor processing methods, in particular to a method for homogenizing an oxide layer on the surface of a fin structure.
Background
A Fin-Field-Effect Transistor (FinFET) is a three-dimensional device having a Fin structure. Referring to fig. 1, a structural diagram of a Fin field effect transistor includes Fin structures (Fin) 01, trenches 02 between adjacent Fin structures 01, an oxide layer 03, a silicon nitride layer 04, and a Shallow Trench Isolation (STI) 05 in the trenches 02, the oxide layer 03, the silicon nitride layer 04, and the Shallow Trench Isolation (STI) 05 are polished until an upper portion 06 of the Fin structure is exposed, and the upper portion 06 of the Fin structure has a top surface 07 and a corner 08.
In the prior art, since silicon crystals have different oxidation rates at different crystal planes, generally, the oxidation rates are the following: silicon (100) > silicon (110) > silicon (111), so typically, an in-situ moisture oxidation process (ISSG) performed on the top of the fin structure will form an oxide layer having a thickness less at the corners of the fin than the top surface. The oxide layer is used as an insulating material to isolate the fin structure from the upper layer structure of the fin. The non-uniform thickness of the oxide layer may result in reduced reliability of the device and leakage.
The prior art has the problems that the thickness of an oxide layer generated on the upper part of a fin is inconsistent due to different crystal plane oxidation rates, the reliability of a device is reduced, and electric leakage is generated.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: how to improve the uniformity of the thickness of the oxide layer on the fin.
In order to solve the above technical problems, the present invention provides a method for homogenizing a surface oxide layer of a fin structure, which aims to keep the thicknesses of the surface oxide layer on the upper portion of the fin structure at the top and the corners consistent, thereby improving the reliability of the device and reducing the leakage.
In order to achieve the above object, the present invention provides a method for homogenizing an oxide layer on a surface of a fin structure, comprising:
s1: after the shallow channel isolation layer generated in the middle of the fin structure is subjected to first chemical mechanical polishing, the first hard mask layer is exposed, the shallow channel isolation layer is continuously subjected to recess removal, and the bottom part of the first hard mask layer is removed to form a groove;
s2: the recess is side-oxidized, the recess being more easily oxidized than other portions corresponding to the top-side corners of the fin structure.
Preferably, before step S1, the method further includes:
SP 1: forming a pad oxide layer on a silicon substrate, forming a first hard mask layer on the pad oxide layer, patterning the first hard mask layer, and etching to form a fin structure on the basis of the patterned first hard mask layer;
SP 2: depositing a first oxide layer on the side wall of the fin structure and the bottom of the groove between the fin structures, and depositing a second hard mask layer on the first oxide layer, the pad oxide layer and the first hard mask layer;
SP 3: depositing to form shallow trench isolation layer.
Preferably, after step S2, the method further includes:
SR 1: removing the first hard mask layer;
SR 2: carrying out second chemical mechanical polishing on the shallow trench isolation layer, removing the pad oxide layer, the first oxide layer, the second hard mask layer and the shallow trench isolation layer which are covered by the fin structure to the same depth until the fin structure is partially exposed, forming a groove, wherein the shallow trench isolation layer, the first oxide layer and the second hard mask layer which are not removed exist at the bottom of the groove;
SR 3: and performing an oxidation process on the exposed fin structure to form a surface oxide layer.
Preferably, after the step SR3, the method further comprises:
SR 4: adopting a nitriding and annealing process to drive nitrogen into the surface oxide layer and keep the nitrogen in the surface oxide layer;
SR 5: polysilicon is deposited and patterned to form a gate structure.
Preferably, in step S1, the fin structure is not exposed, the first hard mask layer covers the fin structure, and the pad oxide layer and/or the first oxide layer covers the recess.
Preferably, in step SP3, a shallow trench isolation layer is formed by deposition using a fluid chemical vapor deposition method.
Preferably, in step SR3, an in-situ water vapor oxidation process is used to grow to form a surface oxide layer.
Preferably, the first hard mask layer and the second hard mask layer are made of silicon nitride.
Preferably, in step SR4, a decoupled plasma nitridation process is performed, followed by a post nitridation annealing process to implant plasma nitrogen into the surface oxide layer of the fin structure.
Preferably, two corner edges of the top of the formed fin structure are circular arc-shaped.
Compared with the prior art, the invention provides a method for homogenizing a surface oxide layer of a fin structure, which comprises the following steps: s1: after the shallow channel isolation layer generated in the middle of the fin structure is subjected to first chemical mechanical polishing, the first hard mask layer is exposed, the shallow channel isolation layer is continuously subjected to recess removal, and the bottom part of the first hard mask layer is removed to form a groove; s2: the recess is side-oxidized, the recess being more easily oxidized than other portions corresponding to the top-side corners of the fin structure. Therefore, the invention can achieve the technical effects that the side surface of the groove is firstly oxidized, the top surface is covered with the first hard mask layer, and the part corresponding to the groove is oxidized, so that the defect that the thickness of the corner of the fin is smaller than that of the top surface due to different oxidation rate effects at different crystal planes is offset, the finally generated surface oxide layers are basically the same (the top surface, the corner and the side surface of the fin structure are the same), the uniformity of the oxide layers is improved, the reliability of the device is improved, and the possibility of electric leakage is reduced.
Drawings
Fig. 1 shows a prior art fin structure form.
Fig. 2A to 2G are schematic structural evolution diagrams of a part of steps of a method for homogenizing a surface oxide layer of a fin structure according to an embodiment of the present invention.
Fig. 3 shows that the top surface of the fin structure and the surface oxide layer at the corners are uniform in thickness and have arc-shaped corners, which are manufactured by the method for homogenizing the surface oxide layer of the fin structure according to the embodiment of the present invention.
Reference numerals indicate the same.
The prior art is as follows:
01 fin structure
02 channel
03 oxide layer
04 silicon nitride layer
05 shallow trench isolation layer
06 upper part of fin structure
07 Top surface
08 corner;
the invention comprises the following steps:
100 silicon substrate
101 pad oxide layer
102 first hard mask layer
103 fin structure
104 first oxide layer
105 second hard mask layer
106 shallow trench isolation layer
107 groove
108 groove
109 a surface oxide layer.
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings.
Referring to fig. 2C and 2D, an embodiment of a method for homogenizing a surface oxide layer of a fin structure according to the present invention is provided.
The method comprises the following steps: referring to fig. 2C, step S1: partially removing the shallow trench isolation layer 106 until the first hard mask layer 102 is exposed; continuing to recess and remove the shallow trench isolation layer 106, and removing the bottom part of the first hard mask layer 102 to form a groove 107; referring to fig. 2D, step S2: an oxidation process is performed on the exposed fin structure 103 to form a surface oxide layer 109.
Referring to fig. 2A to fig. 2G, another embodiment of the method for uniformizing the oxide layer on the surface of the fin structure according to the present invention is shown.
Referring to fig. 2A, a pad oxide layer 101 is formed on a silicon substrate 100, a first hard mask layer 102 is formed on the pad oxide layer 101, the first hard mask layer 102 is patterned, and a Fin structure 103 (Fin) is formed by etching based on the patterned first hard mask layer 102.
Referring to fig. 2B, a first oxide layer 104 is deposited on the sidewalls of the fin structures 103 and the bottom of the trench between the fin structures, and a second hard mask layer 105 is deposited on the first oxide layer 104, the pad oxide layer 101, and the first hard mask layer 102.
The first and second hard mask layers 102 and 105 are silicon nitride (SiN).
Referring to fig. 2B, shallow trench isolation layers 106 are deposited. The shallow trench isolation layer 106 can be formed by Fluid Chemical Vapor Deposition (FCVD).
A first Chemical Mechanical Polishing (CMP) is performed on the shallow trench isolation layer 103.
Referring to fig. 2C, the shallow trench isolation layer 106 is partially removed to expose the first hard mask layer 102. The recess removal of the shallow trench isolation layer 106 is continued, and the removal of the bottom portion of the first hard mask layer 102 forms a recess 107. The groove 107 appears stereoscopically concave in line perpendicular to the viewing plane, perpendicular to the viewing plane shown in fig. 2C.
Specifically, the fin structure 103 is not exposed, the first hard mask layer 102 covers the fin structure 103, and the pad oxide layer 101 and/or the first oxide layer 104 covers the recess 107.
Due to the capping as shown in fig. 2C, and referring to fig. 2D, the recess 107 is laterally oxidized, the recess 107 is more easily oxidized in correspondence to the top-side corners of the fin structure than in other portions.
Referring to fig. 2E, the first hard mask layer 102 is removed. The pad oxide layer 101 is exposed.
Referring to fig. 2F, a second Chemical Mechanical Polishing (CMP) is performed on the shallow trench isolation layer 106, so that the pad oxide layer 101, the first oxide layer 104, the second hard mask layer 105, and the shallow trench isolation layer 106 covered by the fin structure 103 are all removed to the same depth until the fin structure 106 is partially exposed, a trench 108 is formed, and the unremoved shallow trench isolation layer 106, the first oxide layer 104, and the second hard mask layer 105 exist at the bottom of the trench.
Referring to fig. 2G, an oxidation process is performed on the exposed fin structure 103 to form a surface oxide layer 109. Since, in the previous step, the corner of the top surface-side surface of the recess 107 corresponding to the fin structure 106 is more easily oxidized than other portions, and the corner is thinner than the top surface oxide layer due to different oxidation rates of different crystal planes of the superimposed crystal, so that the final surface oxide layer 109 has a uniform thickness.
An in-situ steam oxidation (ISSG) process is used to grow to form the surface oxide layer 109.
Referring to fig. 3, a schematic top view of the fin structure surface oxide layer 109 formed by the method for homogenizing the fin structure surface oxide layer according to the present invention is shown, in the figure, thicknesses of the surface oxide layers 109 at the top surface and the corners are the same, and two corner edges at the top of the finally formed fin structure are arc-shaped.
A nitridation and annealing process is used to drive nitrogen into the surface oxide layer 109 and to retain the nitrogen in the surface oxide layer.
Specifically, a decoupled plasma nitridation process (DPN) is performed, followed by a post-nitridation annealing Process (PNA), to inject plasma nitrogen into the surface oxide layer of the fin structure.
Polysilicon is deposited and patterned to form a gate structure.
The surface oxide layer 109 serves to isolate the gate from the top of the fin structure.
The above is a specific embodiment of the method for homogenizing the oxide layer on the surface of the fin structure provided by the present invention. Therefore, the invention can achieve the technical effects that the side surface of the groove is firstly oxidized, the top surface is covered with the first hard mask layer, and the part corresponding to the groove is oxidized, so that the defect that the thickness of the corner of the fin is smaller than that of the top surface due to different oxidation rate effects at different crystal planes is offset, the finally generated surface oxide layers are basically the same (the top surface, the corner and the side surface of the fin structure are the same), the uniformity of the oxide layers is improved, the reliability of the device is improved, and the possibility of electric leakage is reduced.
The above-mentioned embodiments and the accompanying drawings are only for illustrating the technical solutions and effects of the present invention, and are not to be construed as limiting the present invention. It is to be understood that those skilled in the art can modify and change the above-described embodiments without departing from the technical spirit and scope of the present invention as defined in the appended claims.

Claims (10)

1. A method for homogenizing an oxide layer on a surface of a fin structure, comprising:
s1: after the shallow channel isolation layer generated in the middle of the fin structure is subjected to first chemical mechanical polishing, the first hard mask layer is exposed, the shallow channel isolation layer is continuously subjected to recess removal, and the bottom part of the first hard mask layer is removed to form a groove;
s2: the recess is side-oxidized, the recess being more easily oxidized than other portions corresponding to the top-side corners of the fin structure.
2. The method of claim 1, further comprising, before the step S1:
SP 1: forming a pad oxide layer on a silicon substrate, forming a first hard mask layer on the pad oxide layer, patterning the first hard mask layer, and etching to form a fin structure on the basis of the patterned first hard mask layer;
SP 2: depositing a first oxide layer on the side wall of the fin structure and the bottom of the groove between the fin structures, and depositing a second hard mask layer on the first oxide layer, the pad oxide layer and the first hard mask layer;
SP 3: depositing to form shallow trench isolation layer.
3. The method of claim 2, further comprising, after the step S2:
SR 1: removing the first hard mask layer;
SR 2: carrying out second chemical mechanical polishing on the shallow trench isolation layer, removing the pad oxide layer, the first oxide layer, the second hard mask layer and the shallow trench isolation layer which are covered by the fin structure to the same depth until the fin structure is partially exposed, forming a groove, wherein the shallow trench isolation layer, the first oxide layer and the second hard mask layer which are not removed exist at the bottom of the groove;
SR 3: and performing an oxidation process on the exposed fin structure to form a surface oxide layer.
4. The method of claim 3, further comprising, after the step SR 3:
SR 4: adopting a nitriding and annealing process to drive nitrogen into the surface oxide layer and keep the nitrogen in the surface oxide layer;
SR 5: polysilicon is deposited and patterned to form a gate structure.
5. The method of claim 1, wherein in step S1, the fin structure is not exposed, the first hard mask layer covers the fin structure, and the pad oxide layer and/or the first oxide layer covers the recess.
6. The method for uniformizing the surface oxide layer of fin structure as claimed in claim 2, wherein in step SP3, a shallow trench isolation layer is formed by using a fluid chemical vapor deposition method.
7. The method of claim 3, wherein in step SR3, an in-situ water vapor oxidation process is used to grow the surface oxide layer.
8. The method of claim 2, wherein the first and second hard mask layers are silicon nitride.
9. The method of claim 4, wherein in the step SR4, the plasma nitrogen is implanted into the surface oxide layer of the fin structure by a decoupled plasma nitridation process followed by a post nitridation annealing process.
10. The method of claim 1, wherein two corner edges of the top of the fin structure are rounded.
CN202111390525.7A 2021-11-23 2021-11-23 Method for homogenizing oxidation layer on surface of fin structure Pending CN114121672A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111390525.7A CN114121672A (en) 2021-11-23 2021-11-23 Method for homogenizing oxidation layer on surface of fin structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111390525.7A CN114121672A (en) 2021-11-23 2021-11-23 Method for homogenizing oxidation layer on surface of fin structure

Publications (1)

Publication Number Publication Date
CN114121672A true CN114121672A (en) 2022-03-01

Family

ID=80439844

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111390525.7A Pending CN114121672A (en) 2021-11-23 2021-11-23 Method for homogenizing oxidation layer on surface of fin structure

Country Status (1)

Country Link
CN (1) CN114121672A (en)

Similar Documents

Publication Publication Date Title
JP3157357B2 (en) Semiconductor device
US20010041421A1 (en) Trench isolatoin regions having trench liners with recessed ends
US20060228866A1 (en) Methods of filling openings with oxide, and methods of forming trenched isolation regions
JPH0279445A (en) Forming method of element isolating region
JPS6340337A (en) Method of isolating integrated circuit
US7611950B2 (en) Method for forming shallow trench isolation in semiconductor device
US4916087A (en) Method of manufacturing a semiconductor device by filling and planarizing narrow and wide trenches
KR20060129037A (en) Method of reducing sti divot formation during semiconductor device fabrication
US20070170511A1 (en) Method for fabricating a recessed-gate mos transistor device
US6407005B2 (en) Method for forming semiconductor device to prevent electric field concentration from being generated at corner of active region
KR100615570B1 (en) method of fabricating a recessed channel MOS transistor having rounded active corners
CN114121672A (en) Method for homogenizing oxidation layer on surface of fin structure
CN115799072A (en) Shielding gate groove power device and manufacturing method thereof
US6503815B1 (en) Method for reducing stress and encroachment of sidewall oxide layer of shallow trench isolation
CN110277313A (en) The manufacturing method of side wall
CN114121673A (en) Method for homogenizing oxidation layer on surface of fin structure
KR20000003352A (en) Semiconductor device production method
JP3265836B2 (en) Method for manufacturing semiconductor device
KR100895810B1 (en) Method for forming isolation layer of semiconductor device
TW564519B (en) Process for forming shallow trench isolation (STI) with corner protection layer
US20080318383A1 (en) Method of manufacturing semiconductor device
KR101026474B1 (en) Method for forming isolation layer of semiconductor device
JP4726612B2 (en) Method for manufacturing a semiconductor device having a long channel length
JPH06224187A (en) Forming method for locos oxide film
KR100323720B1 (en) Elevated semiconductor layer and method for forming the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination